c627877fcf1658615837f1c46e040bd19cb80c66
1 #ifndef _ASM_POWERPC_PGTABLE_PPC64_H_
2 #define _ASM_POWERPC_PGTABLE_PPC64_H_
4 * This file contains the functions and defines necessary to modify and use
5 * the ppc64 hashed page table.
9 #include <linux/stddef.h>
10 #include <asm/tlbflush.h>
11 #endif /* __ASSEMBLY__ */
13 #ifdef CONFIG_PPC_64K_PAGES
14 #include <asm/pgtable-64k.h>
16 #include <asm/pgtable-4k.h>
19 #define FIRST_USER_ADDRESS 0
22 * Size of EA range mapped by our pagetables.
24 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
25 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
26 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
28 #if TASK_SIZE_USER64 > PGTABLE_RANGE
29 #error TASK_SIZE_USER64 exceeds pagetable range
32 #if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
33 #error TASK_SIZE_USER64 exceeds user VSID range
38 * Define the address range of the vmalloc VM area.
40 #define VMALLOC_START ASM_CONST(0xD000000000000000)
41 #define VMALLOC_SIZE (PGTABLE_RANGE >> 1)
42 #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
45 * Define the address ranges for MMIO and IO space :
47 * ISA_IO_BASE = VMALLOC_END, 64K reserved area
48 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
49 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
51 #define FULL_IO_SIZE 0x80000000ul
52 #define ISA_IO_BASE (VMALLOC_END)
53 #define ISA_IO_END (VMALLOC_END + 0x10000ul)
54 #define PHB_IO_BASE (ISA_IO_END)
55 #define PHB_IO_END (VMALLOC_END + FULL_IO_SIZE)
56 #define IOREMAP_BASE (PHB_IO_END)
57 #define IOREMAP_END (VMALLOC_START + PGTABLE_RANGE)
62 #define REGION_SHIFT 60UL
63 #define REGION_MASK (0xfUL << REGION_SHIFT)
64 #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
66 #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
67 #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
68 #define VMEMMAP_REGION_ID (0xfUL)
69 #define USER_REGION_ID (0UL)
72 * Defines the address of the vmemap area, in its own region
74 #define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
75 #define vmemmap ((struct page *)VMEMMAP_BASE)
79 * Common bits in a linux-style PTE. These match the bits in the
80 * (hardware-defined) PowerPC PTE as closely as possible. Additional
81 * bits may be defined in pgtable-*.h
83 #define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
84 #define _PAGE_USER 0x0002 /* matches one of the PP bits */
85 #define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
86 #define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
87 #define _PAGE_GUARDED 0x0008
88 #define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
89 #define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
90 #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
91 #define _PAGE_DIRTY 0x0080 /* C: page changed */
92 #define _PAGE_ACCESSED 0x0100 /* R: page referenced */
93 #define _PAGE_RW 0x0200 /* software: user write access allowed */
94 #define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
96 /* Strong Access Ordering */
97 #define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
99 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
101 #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
103 /* __pgprot defined in arch/powerpc/include/asm/page.h */
104 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
106 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
107 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
108 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
109 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
110 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
111 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
112 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
113 #define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
114 _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
115 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
117 #define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
118 #define HAVE_PAGE_AGP
120 #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
121 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
122 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
123 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
125 #define _PTEIDX_SECONDARY 0x8
126 #define _PTEIDX_GROUP_IX 0x7
128 /* To make some generic powerpc code happy */
129 #define _PAGE_HWEXEC 0
132 * POWER4 and newer have per page execute protection, older chips can only
133 * do this on a segment (256MB) basis.
135 * Also, write permissions imply read permissions.
136 * This is the closest we can get..
138 * Note due to the way vm flags are laid out, the bits are XWR
140 #define __P000 PAGE_NONE
141 #define __P001 PAGE_READONLY
142 #define __P010 PAGE_COPY
143 #define __P011 PAGE_COPY
144 #define __P100 PAGE_READONLY_X
145 #define __P101 PAGE_READONLY_X
146 #define __P110 PAGE_COPY_X
147 #define __P111 PAGE_COPY_X
149 #define __S000 PAGE_NONE
150 #define __S001 PAGE_READONLY
151 #define __S010 PAGE_SHARED
152 #define __S011 PAGE_SHARED
153 #define __S100 PAGE_READONLY_X
154 #define __S101 PAGE_READONLY_X
155 #define __S110 PAGE_SHARED_X
156 #define __S111 PAGE_SHARED_X
158 #ifdef CONFIG_PPC_MM_SLICES
159 #define HAVE_ARCH_UNMAPPED_AREA
160 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
161 #endif /* CONFIG_PPC_MM_SLICES */
166 * Conversion functions: convert a page and protection to a page entry,
167 * and a page entry and page directory to the page they refer to.
169 * mk_pte takes a (struct page *) as input
171 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
173 static inline pte_t
pfn_pte(unsigned long pfn
, pgprot_t pgprot
)
178 pte_val(pte
) = (pfn
<< PTE_RPN_SHIFT
) | pgprot_val(pgprot
);
182 #define pte_modify(_pte, newprot) \
183 (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
185 #define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
186 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
188 /* pte_clear moved to later in this file */
190 #define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
191 #define pte_page(x) pfn_to_page(pte_pfn(x))
193 #define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
194 #define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
196 #define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval))
197 #define pmd_none(pmd) (!pmd_val(pmd))
198 #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
199 || (pmd_val(pmd) & PMD_BAD_BITS))
200 #define pmd_present(pmd) (pmd_val(pmd) != 0)
201 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
202 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
203 #define pmd_page(pmd) virt_to_page(pmd_page_vaddr(pmd))
205 #define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval))
206 #define pud_none(pud) (!pud_val(pud))
207 #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
208 || (pud_val(pud) & PUD_BAD_BITS))
209 #define pud_present(pud) (pud_val(pud) != 0)
210 #define pud_clear(pudp) (pud_val(*(pudp)) = 0)
211 #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
212 #define pud_page(pud) virt_to_page(pud_page_vaddr(pud))
214 #define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
217 * Find an entry in a page-table-directory. We combine the address region
218 * (the high order N bits) and the pgd portion of the address.
220 /* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
221 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff)
223 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
225 #define pmd_offset(pudp,addr) \
226 (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
228 #define pte_offset_kernel(dir,addr) \
229 (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
231 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
232 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
233 #define pte_unmap(pte) do { } while(0)
234 #define pte_unmap_nested(pte) do { } while(0)
236 /* to find an entry in a kernel page-table-directory */
237 /* This now only contains the vmalloc pages */
238 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
241 * The following only work if pte_present() is true.
242 * Undefined behaviour if not..
244 static inline int pte_write(pte_t pte
) { return pte_val(pte
) & _PAGE_RW
;}
245 static inline int pte_dirty(pte_t pte
) { return pte_val(pte
) & _PAGE_DIRTY
;}
246 static inline int pte_young(pte_t pte
) { return pte_val(pte
) & _PAGE_ACCESSED
;}
247 static inline int pte_file(pte_t pte
) { return pte_val(pte
) & _PAGE_FILE
;}
248 static inline int pte_special(pte_t pte
) { return pte_val(pte
) & _PAGE_SPECIAL
; }
250 static inline pte_t
pte_wrprotect(pte_t pte
) {
251 pte_val(pte
) &= ~(_PAGE_RW
); return pte
; }
252 static inline pte_t
pte_mkclean(pte_t pte
) {
253 pte_val(pte
) &= ~(_PAGE_DIRTY
); return pte
; }
254 static inline pte_t
pte_mkold(pte_t pte
) {
255 pte_val(pte
) &= ~_PAGE_ACCESSED
; return pte
; }
256 static inline pte_t
pte_mkwrite(pte_t pte
) {
257 pte_val(pte
) |= _PAGE_RW
; return pte
; }
258 static inline pte_t
pte_mkdirty(pte_t pte
) {
259 pte_val(pte
) |= _PAGE_DIRTY
; return pte
; }
260 static inline pte_t
pte_mkyoung(pte_t pte
) {
261 pte_val(pte
) |= _PAGE_ACCESSED
; return pte
; }
262 static inline pte_t
pte_mkhuge(pte_t pte
) {
264 static inline pte_t
pte_mkspecial(pte_t pte
) {
265 pte_val(pte
) |= _PAGE_SPECIAL
; return pte
; }
266 static inline pgprot_t
pte_pgprot(pte_t pte
)
268 return __pgprot(pte_val(pte
) & PAGE_PROT_BITS
);
271 /* Atomic PTE updates */
272 static inline unsigned long pte_update(struct mm_struct
*mm
,
274 pte_t
*ptep
, unsigned long clr
,
277 unsigned long old
, tmp
;
279 __asm__
__volatile__(
280 "1: ldarx %0,0,%3 # pte_update\n\
286 : "=&r" (old
), "=&r" (tmp
), "=m" (*ptep
)
287 : "r" (ptep
), "r" (clr
), "m" (*ptep
), "i" (_PAGE_BUSY
)
290 /* huge pages use the old page table lock */
292 assert_pte_locked(mm
, addr
);
294 if (old
& _PAGE_HASHPTE
)
295 hpte_need_flush(mm
, addr
, ptep
, old
, huge
);
299 static inline int __ptep_test_and_clear_young(struct mm_struct
*mm
,
300 unsigned long addr
, pte_t
*ptep
)
304 if ((pte_val(*ptep
) & (_PAGE_ACCESSED
| _PAGE_HASHPTE
)) == 0)
306 old
= pte_update(mm
, addr
, ptep
, _PAGE_ACCESSED
, 0);
307 return (old
& _PAGE_ACCESSED
) != 0;
309 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
310 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
313 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
317 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
318 static inline void ptep_set_wrprotect(struct mm_struct
*mm
, unsigned long addr
,
323 if ((pte_val(*ptep
) & _PAGE_RW
) == 0)
325 old
= pte_update(mm
, addr
, ptep
, _PAGE_RW
, 0);
328 static inline void huge_ptep_set_wrprotect(struct mm_struct
*mm
,
329 unsigned long addr
, pte_t
*ptep
)
333 if ((pte_val(*ptep
) & _PAGE_RW
) == 0)
335 old
= pte_update(mm
, addr
, ptep
, _PAGE_RW
, 1);
339 * We currently remove entries from the hashtable regardless of whether
340 * the entry was young or dirty. The generic routines only flush if the
341 * entry was young or dirty which is not good enough.
343 * We should be more intelligent about this but for the moment we override
344 * these functions and force a tlb flush unconditionally
346 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
347 #define ptep_clear_flush_young(__vma, __address, __ptep) \
349 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
354 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
355 static inline pte_t
ptep_get_and_clear(struct mm_struct
*mm
,
356 unsigned long addr
, pte_t
*ptep
)
358 unsigned long old
= pte_update(mm
, addr
, ptep
, ~0UL, 0);
362 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
365 pte_update(mm
, addr
, ptep
, ~0UL, 0);
369 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
370 * function doesn't need to flush the hash entry
372 static inline void __ptep_set_access_flags(pte_t
*ptep
, pte_t entry
)
374 unsigned long bits
= pte_val(entry
) &
375 (_PAGE_DIRTY
| _PAGE_ACCESSED
| _PAGE_RW
| _PAGE_EXEC
);
376 unsigned long old
, tmp
;
378 __asm__
__volatile__(
385 :"=&r" (old
), "=&r" (tmp
), "=m" (*ptep
)
386 :"r" (bits
), "r" (ptep
), "m" (*ptep
), "i" (_PAGE_BUSY
)
390 #define __HAVE_ARCH_PTE_SAME
391 #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
393 #define pte_ERROR(e) \
394 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
395 #define pmd_ERROR(e) \
396 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
397 #define pgd_ERROR(e) \
398 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
400 /* Encode and de-code a swap entry */
401 #define __swp_type(entry) (((entry).val >> 1) & 0x3f)
402 #define __swp_offset(entry) ((entry).val >> 8)
403 #define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
404 #define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
405 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT })
406 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT)
407 #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
408 #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
410 void pgtable_cache_init(void);
413 * find_linux_pte returns the address of a linux pte for a given
414 * effective address and directory. If not found, it returns zero.
415 */static inline pte_t
*find_linux_pte(pgd_t
*pgdir
, unsigned long ea
)
422 pg
= pgdir
+ pgd_index(ea
);
423 if (!pgd_none(*pg
)) {
424 pu
= pud_offset(pg
, ea
);
425 if (!pud_none(*pu
)) {
426 pm
= pmd_offset(pu
, ea
);
427 if (pmd_present(*pm
))
428 pt
= pte_offset_kernel(pm
, ea
);
434 pte_t
*huge_pte_offset(struct mm_struct
*mm
, unsigned long address
);
436 #endif /* __ASSEMBLY__ */
438 #endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */
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