1 /* Included from asm/pgtable-*.h only ! */
4 * Some bits are only used on some cpu families... Make sure that all
5 * the undefined gets a sensible default
8 #define _PAGE_HASHPTE 0
11 #define _PAGE_SHARED 0
14 #define _PAGE_HWWRITE 0
20 #define _PAGE_ENDIAN 0
22 #ifndef _PAGE_COHERENT
23 #define _PAGE_COHERENT 0
25 #ifndef _PAGE_WRITETHRU
26 #define _PAGE_WRITETHRU 0
29 #define _PAGE_4K_PFN 0
37 #ifndef _PMD_PRESENT_MASK
38 #define _PMD_PRESENT_MASK _PMD_PRESENT
42 #define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
44 #ifndef _PAGE_KERNEL_RO
45 #define _PAGE_KERNEL_RO 0
47 #ifndef _PAGE_KERNEL_ROX
48 #define _PAGE_KERNEL_ROX (_PAGE_EXEC)
50 #ifndef _PAGE_KERNEL_RW
51 #define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
53 #ifndef _PAGE_KERNEL_RWX
54 #define _PAGE_KERNEL_RWX (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE | _PAGE_EXEC)
56 #ifndef _PAGE_HPTEFLAGS
57 #define _PAGE_HPTEFLAGS _PAGE_HASHPTE
59 #ifndef _PTE_NONE_MASK
60 #define _PTE_NONE_MASK _PAGE_HPTEFLAGS
63 /* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
64 * kernel without large page PMD support
67 extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
68 #endif /* __ASSEMBLY__ */
70 /* Location of the PFN in the PTE. Most 32-bit platforms use the same
71 * as _PAGE_SHIFT here (ie, naturally aligned).
72 * Platform who don't just pre-define the value so we don't override it here
75 #define PTE_RPN_SHIFT (PAGE_SHIFT)
78 /* The mask convered by the RPN must be a ULL on 32-bit platforms with
81 #if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT)
82 #define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
83 #define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
85 #define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
86 #define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
89 /* _PAGE_CHG_MASK masks of bits that are to be preserved across
92 #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
93 _PAGE_ACCESSED | _PAGE_SPECIAL)
95 /* Mask of bits returned by pte_pgprot() */
96 #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
97 _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \
98 _PAGE_USER | _PAGE_ACCESSED | \
99 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | _PAGE_EXEC)
101 #ifdef CONFIG_NUMA_BALANCING
102 /* Mask of bits that distinguish present and numa ptes */
103 #define _PAGE_NUMA_MASK (_PAGE_NUMA|_PAGE_PRESENT)
107 * We define 2 sets of base prot bits, one for basic pages (ie,
108 * cacheable kernel and user pages) and one for non cacheable
109 * pages. We always set _PAGE_COHERENT when SMP is enabled or
110 * the processor might need it for DMA coherency.
112 #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
113 #if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
114 #define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT)
116 #define _PAGE_BASE (_PAGE_BASE_NC)
119 /* Permission masks used to generate the __P and __S table,
121 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
123 * Write permissions imply read permissions for now (we could make write-only
124 * pages on BookE but we don't bother for now). Execute permission control is
125 * possible on platforms that define _PAGE_EXEC
127 * Note due to the way vm flags are laid out, the bits are XWR
129 #define PAGE_NONE __pgprot(_PAGE_BASE)
130 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
131 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
132 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
133 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
134 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
135 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
137 #define __P000 PAGE_NONE
138 #define __P001 PAGE_READONLY
139 #define __P010 PAGE_COPY
140 #define __P011 PAGE_COPY
141 #define __P100 PAGE_READONLY_X
142 #define __P101 PAGE_READONLY_X
143 #define __P110 PAGE_COPY_X
144 #define __P111 PAGE_COPY_X
146 #define __S000 PAGE_NONE
147 #define __S001 PAGE_READONLY
148 #define __S010 PAGE_SHARED
149 #define __S011 PAGE_SHARED
150 #define __S100 PAGE_READONLY_X
151 #define __S101 PAGE_READONLY_X
152 #define __S110 PAGE_SHARED_X
153 #define __S111 PAGE_SHARED_X
155 /* Permission masks used for kernel mappings */
156 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
157 #define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
159 #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
160 _PAGE_NO_CACHE | _PAGE_GUARDED)
161 #define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
162 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
163 #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
165 /* Protection used for kernel text. We want the debuggers to be able to
166 * set breakpoints anywhere, so don't write protect the kernel text
167 * on platforms where such control is possible.
169 #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
170 defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
171 #define PAGE_KERNEL_TEXT PAGE_KERNEL_X
173 #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
176 /* Make modules code happy. We don't set RO yet */
177 #define PAGE_KERNEL_EXEC PAGE_KERNEL_X
180 * Don't just check for any non zero bits in __PAGE_USER, since for book3e
181 * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
182 * _PAGE_USER. Need to explicitly match _PAGE_BAP_UR bit in that case too.
184 #define pte_user(val) ((val & _PAGE_USER) == _PAGE_USER)
186 /* Advertise special mapping type for AGP */
187 #define PAGE_AGP (PAGE_KERNEL_NC)
188 #define HAVE_PAGE_AGP
190 /* Advertise support for _PAGE_SPECIAL */
191 #define __HAVE_ARCH_PTE_SPECIAL
This page took 0.04836 seconds and 5 git commands to generate.