arch/powerpc/include/asm/ptrace.h

   1 #ifndef _ASM_POWERPC_PTRACE_H
   2 #define _ASM_POWERPC_PTRACE_H
   3
   4 /*
   5  * Copyright (C) 2001 PPC64 Team, IBM Corp
   6  *
   7  * This struct defines the way the registers are stored on the
   8  * kernel stack during a system call or other kernel entry.
   9  *
  10  * this should only contain volatile regs
  11  * since we can keep non-volatile in the thread_struct
  12  * should set this up when only volatiles are saved
  13  * by intr code.
  14  *
  15  * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
  16  * that the overall structure is a multiple of 16 bytes in length.
  17  *
  18  * Note that the offsets of the fields in this struct correspond with
  19  * the PT_* values below.  This simplifies arch/powerpc/kernel/ptrace.c.
  20  *
  21  * This program is free software; you can redistribute it and/or
  22  * modify it under the terms of the GNU General Public License
  23  * as published by the Free Software Foundation; either version
  24  * 2 of the License, or (at your option) any later version.
  25  */
  26
  27 #ifdef __KERNEL__
  28 #include <linux/types.h>
  29 #else
  30 #include <stdint.h>
  31 #endif
  32
  33 #ifndef __ASSEMBLY__
  34
  35 struct pt_regs {
  36         unsigned long gpr[32];
  37         unsigned long nip;
  38         unsigned long msr;
  39         unsigned long orig_gpr3;        /* Used for restarting system calls */
  40         unsigned long ctr;
  41         unsigned long link;
  42         unsigned long xer;
  43         unsigned long ccr;
  44 #ifdef __powerpc64__
  45         unsigned long softe;            /* Soft enabled/disabled */
  46 #else
  47         unsigned long mq;               /* 601 only (not used at present) */
  48                                         /* Used on APUS to hold IPL value. */
  49 #endif
  50         unsigned long trap;             /* Reason for being here */
  51         /* N.B. for critical exceptions on 4xx, the dar and dsisr
  52            fields are overloaded to hold srr0 and srr1. */
  53         unsigned long dar;              /* Fault registers */
  54         unsigned long dsisr;            /* on 4xx/Book-E used for ESR */
  55         unsigned long result;           /* Result of a system call */
  56 };
  57
  58 #endif /* __ASSEMBLY__ */
  59
  60 #ifdef __KERNEL__
  61
  62 #ifdef __powerpc64__
  63
  64 #define STACK_FRAME_OVERHEAD    112     /* size of minimum stack frame */
  65 #define STACK_FRAME_LR_SAVE     2       /* Location of LR in stack frame */
  66 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
  67 #define STACK_INT_FRAME_SIZE    (sizeof(struct pt_regs) + \
  68                                         STACK_FRAME_OVERHEAD + 288)
  69 #define STACK_FRAME_MARKER      12
  70
  71 /* Size of dummy stack frame allocated when calling signal handler. */
  72 #define __SIGNAL_FRAMESIZE      128
  73 #define __SIGNAL_FRAMESIZE32    64
  74
  75 #else /* __powerpc64__ */
  76
  77 #define STACK_FRAME_OVERHEAD    16      /* size of minimum stack frame */
  78 #define STACK_FRAME_LR_SAVE     1       /* Location of LR in stack frame */
  79 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
  80 #define STACK_INT_FRAME_SIZE    (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
  81 #define STACK_FRAME_MARKER      2
  82
  83 /* Size of stack frame allocated when calling signal handler. */
  84 #define __SIGNAL_FRAMESIZE      64
  85
  86 #endif /* __powerpc64__ */
  87
  88 #ifndef __ASSEMBLY__
  89
  90 #define instruction_pointer(regs) ((regs)->nip)
  91 #define user_stack_pointer(regs) ((regs)->gpr[1])
  92 #define kernel_stack_pointer(regs) ((regs)->gpr[1])
  93 #define regs_return_value(regs) ((regs)->gpr[3])
  94
  95 #ifdef CONFIG_SMP
  96 extern unsigned long profile_pc(struct pt_regs *regs);
  97 #else
  98 #define profile_pc(regs) instruction_pointer(regs)
  99 #endif
 100
 101 #ifdef __powerpc64__
 102 #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
 103 #else
 104 #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
 105 #endif
 106
 107 #define force_successful_syscall_return()   \
 108         do { \
 109                 set_thread_flag(TIF_NOERROR); \
 110         } while(0)
 111
 112 struct task_struct;
 113 extern unsigned long ptrace_get_reg(struct task_struct *task, int regno);
 114 extern int ptrace_put_reg(struct task_struct *task, int regno,
 115                           unsigned long data);
 116
 117 /*
 118  * We use the least-significant bit of the trap field to indicate
 119  * whether we have saved the full set of registers, or only a
 120  * partial set.  A 1 there means the partial set.
 121  * On 4xx we use the next bit to indicate whether the exception
 122  * is a critical exception (1 means it is).
 123  */
 124 #define FULL_REGS(regs)         (((regs)->trap & 1) == 0)
 125 #ifndef __powerpc64__
 126 #define IS_CRITICAL_EXC(regs)   (((regs)->trap & 2) != 0)
 127 #define IS_MCHECK_EXC(regs)     (((regs)->trap & 4) != 0)
 128 #define IS_DEBUG_EXC(regs)      (((regs)->trap & 8) != 0)
 129 #endif /* ! __powerpc64__ */
 130 #define TRAP(regs)              ((regs)->trap & ~0xF)
 131 #ifdef __powerpc64__
 132 #define CHECK_FULL_REGS(regs)   BUG_ON(regs->trap & 1)
 133 #else
 134 #define CHECK_FULL_REGS(regs)                                                 \
 135 do {                                                                          \
 136         if ((regs)->trap & 1)                                                 \
 137                 printk(KERN_CRIT "%s: partial register set\n", __func__); \
 138 } while (0)
 139 #endif /* __powerpc64__ */
 140
 141 #define arch_has_single_step()  (1)
 142 #define arch_has_block_step()   (!cpu_has_feature(CPU_FTR_601))
 143 #define ARCH_HAS_USER_SINGLE_STEP_INFO
 144
 145 /*
 146  * kprobe-based event tracer support
 147  */
 148
 149 #include <linux/stddef.h>
 150 #include <linux/thread_info.h>
 151 extern int regs_query_register_offset(const char *name);
 152 extern const char *regs_query_register_name(unsigned int offset);
 153 #define MAX_REG_OFFSET (offsetof(struct pt_regs, dsisr))
 154
 155 /**
 156  * regs_get_register() - get register value from its offset
 157  * @regs:          pt_regs from which register value is gotten
 158  * @offset:    offset number of the register.
 159  *
 160  * regs_get_register returns the value of a register whose offset from @regs.
 161  * The @offset is the offset of the register in struct pt_regs.
 162  * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
 163  */
 164 static inline unsigned long regs_get_register(struct pt_regs *regs,
 165                                                 unsigned int offset)
 166 {
 167         if (unlikely(offset > MAX_REG_OFFSET))
 168                 return 0;
 169         return *(unsigned long *)((unsigned long)regs + offset);
 170 }
 171
 172 /**
 173  * regs_within_kernel_stack() - check the address in the stack
 174  * @regs:      pt_regs which contains kernel stack pointer.
 175  * @addr:      address which is checked.
 176  *
 177  * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
 178  * If @addr is within the kernel stack, it returns true. If not, returns false.
 179  */
 180
 181 static inline bool regs_within_kernel_stack(struct pt_regs *regs,
 182                                                 unsigned long addr)
 183 {
 184         return ((addr & ~(THREAD_SIZE - 1))  ==
 185                 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1)));
 186 }
 187
 188 /**
 189  * regs_get_kernel_stack_nth() - get Nth entry of the stack
 190  * @regs:       pt_regs which contains kernel stack pointer.
 191  * @n:          stack entry number.
 192  *
 193  * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
 194  * is specified by @regs. If the @n th entry is NOT in the kernel stack,
 195  * this returns 0.
 196  */
 197 static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
 198                                                       unsigned int n)
 199 {
 200         unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
 201         addr += n;
 202         if (regs_within_kernel_stack(regs, (unsigned long)addr))
 203                 return *addr;
 204         else
 205                 return 0;
 206 }
 207
 208 #endif /* __ASSEMBLY__ */
 209
 210 #endif /* __KERNEL__ */
 211
 212 /*
 213  * Offsets used by 'ptrace' system call interface.
 214  * These can't be changed without breaking binary compatibility
 215  * with MkLinux, etc.
 216  */
 217 #define PT_R0   0
 218 #define PT_R1   1
 219 #define PT_R2   2
 220 #define PT_R3   3
 221 #define PT_R4   4
 222 #define PT_R5   5
 223 #define PT_R6   6
 224 #define PT_R7   7
 225 #define PT_R8   8
 226 #define PT_R9   9
 227 #define PT_R10  10
 228 #define PT_R11  11
 229 #define PT_R12  12
 230 #define PT_R13  13
 231 #define PT_R14  14
 232 #define PT_R15  15
 233 #define PT_R16  16
 234 #define PT_R17  17
 235 #define PT_R18  18
 236 #define PT_R19  19
 237 #define PT_R20  20
 238 #define PT_R21  21
 239 #define PT_R22  22
 240 #define PT_R23  23
 241 #define PT_R24  24
 242 #define PT_R25  25
 243 #define PT_R26  26
 244 #define PT_R27  27
 245 #define PT_R28  28
 246 #define PT_R29  29
 247 #define PT_R30  30
 248 #define PT_R31  31
 249
 250 #define PT_NIP  32
 251 #define PT_MSR  33
 252 #define PT_ORIG_R3 34
 253 #define PT_CTR  35
 254 #define PT_LNK  36
 255 #define PT_XER  37
 256 #define PT_CCR  38
 257 #ifndef __powerpc64__
 258 #define PT_MQ   39
 259 #else
 260 #define PT_SOFTE 39
 261 #endif
 262 #define PT_TRAP 40
 263 #define PT_DAR  41
 264 #define PT_DSISR 42
 265 #define PT_RESULT 43
 266 #define PT_REGS_COUNT 44
 267
 268 #define PT_FPR0 48      /* each FP reg occupies 2 slots in this space */
 269
 270 #ifndef __powerpc64__
 271
 272 #define PT_FPR31 (PT_FPR0 + 2*31)
 273 #define PT_FPSCR (PT_FPR0 + 2*32 + 1)
 274
 275 #else /* __powerpc64__ */
 276
 277 #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
 278
 279 #ifdef __KERNEL__
 280 #define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */
 281 #endif
 282
 283 #define PT_VR0 82       /* each Vector reg occupies 2 slots in 64-bit */
 284 #define PT_VSCR (PT_VR0 + 32*2 + 1)
 285 #define PT_VRSAVE (PT_VR0 + 33*2)
 286
 287 #ifdef __KERNEL__
 288 #define PT_VR0_32 164   /* each Vector reg occupies 4 slots in 32-bit */
 289 #define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
 290 #define PT_VRSAVE_32 (PT_VR0 + 33*4)
 291 #endif
 292
 293 /*
 294  * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
 295  */
 296 #define PT_VSR0 150     /* each VSR reg occupies 2 slots in 64-bit */
 297 #define PT_VSR31 (PT_VSR0 + 2*31)
 298 #ifdef __KERNEL__
 299 #define PT_VSR0_32 300  /* each VSR reg occupies 4 slots in 32-bit */
 300 #endif
 301 #endif /* __powerpc64__ */
 302
 303 /*
 304  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
 305  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
 306  * corresponding vector registers.  Quadword 32 contains the vscr as the
 307  * last word (offset 12) within that quadword.  Quadword 33 contains the
 308  * vrsave as the first word (offset 0) within the quadword.
 309  *
 310  * This definition of the VMX state is compatible with the current PPC32
 311  * ptrace interface.  This allows signal handling and ptrace to use the same
 312  * structures.  This also simplifies the implementation of a bi-arch
 313  * (combined (32- and 64-bit) gdb.
 314  */
 315 #define PTRACE_GETVRREGS        18
 316 #define PTRACE_SETVRREGS        19
 317
 318 /* Get/set all the upper 32-bits of the SPE registers, accumulator, and
 319  * spefscr, in one go */
 320 #define PTRACE_GETEVRREGS       20
 321 #define PTRACE_SETEVRREGS       21
 322
 323 /* Get the first 32 128bit VSX registers */
 324 #define PTRACE_GETVSRREGS       27
 325 #define PTRACE_SETVSRREGS       28
 326
 327 /*
 328  * Get or set a debug register. The first 16 are DABR registers and the
 329  * second 16 are IABR registers.
 330  */
 331 #define PTRACE_GET_DEBUGREG     25
 332 #define PTRACE_SET_DEBUGREG     26
 333
 334 /* (new) PTRACE requests using the same numbers as x86 and the same
 335  * argument ordering. Additionally, they support more registers too
 336  */
 337 #define PTRACE_GETREGS            12
 338 #define PTRACE_SETREGS            13
 339 #define PTRACE_GETFPREGS          14
 340 #define PTRACE_SETFPREGS          15
 341 #define PTRACE_GETREGS64          22
 342 #define PTRACE_SETREGS64          23
 343
 344 /* (old) PTRACE requests with inverted arguments */
 345 #define PPC_PTRACE_GETREGS      0x99    /* Get GPRs 0 - 31 */
 346 #define PPC_PTRACE_SETREGS      0x98    /* Set GPRs 0 - 31 */
 347 #define PPC_PTRACE_GETFPREGS    0x97    /* Get FPRs 0 - 31 */
 348 #define PPC_PTRACE_SETFPREGS    0x96    /* Set FPRs 0 - 31 */
 349
 350 /* Calls to trace a 64bit program from a 32bit program */
 351 #define PPC_PTRACE_PEEKTEXT_3264 0x95
 352 #define PPC_PTRACE_PEEKDATA_3264 0x94
 353 #define PPC_PTRACE_POKETEXT_3264 0x93
 354 #define PPC_PTRACE_POKEDATA_3264 0x92
 355 #define PPC_PTRACE_PEEKUSR_3264  0x91
 356 #define PPC_PTRACE_POKEUSR_3264  0x90
 357
 358 #define PTRACE_SINGLEBLOCK      0x100   /* resume execution until next branch */
 359
 360 #define PPC_PTRACE_GETHWDBGINFO 0x89
 361 #define PPC_PTRACE_SETHWDEBUG   0x88
 362 #define PPC_PTRACE_DELHWDEBUG   0x87
 363
 364 #ifndef __ASSEMBLY__
 365
 366 struct ppc_debug_info {
 367         uint32_t version;               /* Only version 1 exists to date */
 368         uint32_t num_instruction_bps;
 369         uint32_t num_data_bps;
 370         uint32_t num_condition_regs;
 371         uint32_t data_bp_alignment;
 372         uint32_t sizeof_condition;      /* size of the DVC register */
 373         uint64_t features;
 374 };
 375
 376 #endif /* __ASSEMBLY__ */
 377
 378 /*
 379  * features will have bits indication whether there is support for:
 380  */
 381 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE         0x0000000000000001
 382 #define PPC_DEBUG_FEATURE_INSN_BP_MASK          0x0000000000000002
 383 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE         0x0000000000000004
 384 #define PPC_DEBUG_FEATURE_DATA_BP_MASK          0x0000000000000008
 385
 386 #ifndef __ASSEMBLY__
 387
 388 struct ppc_hw_breakpoint {
 389         uint32_t version;               /* currently, version must be 1 */
 390         uint32_t trigger_type;          /* only some combinations allowed */
 391         uint32_t addr_mode;             /* address match mode */
 392         uint32_t condition_mode;        /* break/watchpoint condition flags */
 393         uint64_t addr;                  /* break/watchpoint address */
 394         uint64_t addr2;                 /* range end or mask */
 395         uint64_t condition_value;       /* contents of the DVC register */
 396 };
 397
 398 #endif /* __ASSEMBLY__ */
 399
 400 /*
 401  * Trigger Type
 402  */
 403 #define PPC_BREAKPOINT_TRIGGER_EXECUTE  0x00000001
 404 #define PPC_BREAKPOINT_TRIGGER_READ     0x00000002
 405 #define PPC_BREAKPOINT_TRIGGER_WRITE    0x00000004
 406 #define PPC_BREAKPOINT_TRIGGER_RW       \
 407         (PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE)
 408
 409 /*
 410  * Address Mode
 411  */
 412 #define PPC_BREAKPOINT_MODE_EXACT               0x00000000
 413 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE     0x00000001
 414 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE     0x00000002
 415 #define PPC_BREAKPOINT_MODE_MASK                0x00000003
 416
 417 /*
 418  * Condition Mode
 419  */
 420 #define PPC_BREAKPOINT_CONDITION_MODE   0x00000003
 421 #define PPC_BREAKPOINT_CONDITION_NONE   0x00000000
 422 #define PPC_BREAKPOINT_CONDITION_AND    0x00000001
 423 #define PPC_BREAKPOINT_CONDITION_EXACT  PPC_BREAKPOINT_CONDITION_AND
 424 #define PPC_BREAKPOINT_CONDITION_OR     0x00000002
 425 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x00000003
 426 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
 427 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT       16
 428 #define PPC_BREAKPOINT_CONDITION_BE(n)  \
 429         (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
 430
 431 #endif /* _ASM_POWERPC_PTRACE_H */