arch/powerpc/include/asm/tlbflush.h

   1 #ifndef _ASM_POWERPC_TLBFLUSH_H
   2 #define _ASM_POWERPC_TLBFLUSH_H
   3
   4 /*
   5  * TLB flushing:
   6  *
   7  *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
   8  *  - flush_tlb_page(vma, vmaddr) flushes one page
   9  *  - local_flush_tlb_mm(mm) flushes the specified mm context on
  10  *                           the local processor
  11  *  - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
  12  *  - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
  13  *  - flush_tlb_range(vma, start, end) flushes a range of pages
  14  *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
  15  *
  16  *  This program is free software; you can redistribute it and/or
  17  *  modify it under the terms of the GNU General Public License
  18  *  as published by the Free Software Foundation; either version
  19  *  2 of the License, or (at your option) any later version.
  20  */
  21 #ifdef __KERNEL__
  22
  23 #ifdef CONFIG_PPC_MMU_NOHASH
  24 /*
  25  * TLB flushing for software loaded TLB chips
  26  *
  27  * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
  28  * flush_tlb_kernel_range are best implemented as tlbia vs
  29  * specific tlbie's
  30  */
  31
  32 #include <linux/mm.h>
  33
  34 #define MMU_NO_CONTEXT          ((unsigned int)-1)
  35
  36 extern void _tlbil_all(void);
  37 extern void _tlbil_pid(unsigned int pid);
  38 extern void _tlbil_va(unsigned long address, unsigned int pid);
  39 extern void _tlbivax_bcast(unsigned long address, unsigned int pid);
  40
  41 #if defined(CONFIG_40x) || defined(CONFIG_8xx)
  42 #define _tlbia()        asm volatile ("tlbia; sync" : : : "memory")
  43 #else /* CONFIG_44x || CONFIG_FSL_BOOKE */
  44 extern void _tlbia(void);
  45 #endif
  46
  47 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  48                             unsigned long end);
  49 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
  50
  51 extern void local_flush_tlb_mm(struct mm_struct *mm);
  52 extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  53
  54 #ifdef CONFIG_SMP
  55 extern void flush_tlb_mm(struct mm_struct *mm);
  56 extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  57 #else
  58 #define flush_tlb_mm(mm)                local_flush_tlb_mm(mm)
  59 #define flush_tlb_page(vma,addr)        local_flush_tlb_page(vma,addr)
  60 #endif
  61 #define flush_tlb_page_nohash(vma,addr) flush_tlb_page(vma,addr)
  62
  63 #elif defined(CONFIG_PPC_STD_MMU_32)
  64
  65 /*
  66  * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
  67  */
  68 extern void _tlbie(unsigned long address);
  69 extern void _tlbia(void);
  70
  71 extern void flush_tlb_mm(struct mm_struct *mm);
  72 extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  73 extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
  74 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  75                             unsigned long end);
  76 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
  77 static inline void local_flush_tlb_page(struct vm_area_struct *vma,
  78                                         unsigned long vmaddr)
  79 {
  80         flush_tlb_page(vma, vmaddr);
  81 }
  82 static inline void local_flush_tlb_mm(struct mm_struct *mm)
  83 {
  84         flush_tlb_mm(mm);
  85 }
  86
  87 #elif defined(CONFIG_PPC_STD_MMU_64)
  88
  89 /*
  90  * TLB flushing for 64-bit hash-MMU CPUs
  91  */
  92
  93 #include <linux/percpu.h>
  94 #include <asm/page.h>
  95
  96 #define PPC64_TLB_BATCH_NR 192
  97
  98 struct ppc64_tlb_batch {
  99         int                     active;
 100         unsigned long           index;
 101         struct mm_struct        *mm;
 102         real_pte_t              pte[PPC64_TLB_BATCH_NR];
 103         unsigned long           vaddr[PPC64_TLB_BATCH_NR];
 104         unsigned int            psize;
 105         int                     ssize;
 106 };
 107 DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
 108
 109 extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
 110
 111 extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
 112                             pte_t *ptep, unsigned long pte, int huge);
 113
 114 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 115
 116 static inline void arch_enter_lazy_mmu_mode(void)
 117 {
 118         struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
 119
 120         batch->active = 1;
 121 }
 122
 123 static inline void arch_leave_lazy_mmu_mode(void)
 124 {
 125         struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
 126
 127         if (batch->index)
 128                 __flush_tlb_pending(batch);
 129         batch->active = 0;
 130 }
 131
 132 #define arch_flush_lazy_mmu_mode()      do {} while (0)
 133
 134
 135 extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
 136                             int ssize, int local);
 137 extern void flush_hash_range(unsigned long number, int local);
 138
 139
 140 static inline void local_flush_tlb_mm(struct mm_struct *mm)
 141 {
 142 }
 143
 144 static inline void flush_tlb_mm(struct mm_struct *mm)
 145 {
 146 }
 147
 148 static inline void local_flush_tlb_page(struct vm_area_struct *vma,
 149                                         unsigned long vmaddr)
 150 {
 151 }
 152
 153 static inline void flush_tlb_page(struct vm_area_struct *vma,
 154                                   unsigned long vmaddr)
 155 {
 156 }
 157
 158 static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
 159                                          unsigned long vmaddr)
 160 {
 161 }
 162
 163 static inline void flush_tlb_range(struct vm_area_struct *vma,
 164                                    unsigned long start, unsigned long end)
 165 {
 166 }
 167
 168 static inline void flush_tlb_kernel_range(unsigned long start,
 169                                           unsigned long end)
 170 {
 171 }
 172
 173 /* Private function for use by PCI IO mapping code */
 174 extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
 175                                      unsigned long end);
 176
 177 #else
 178 #error Unsupported MMU type
 179 #endif
 180
 181 #endif /*__KERNEL__ */
 182 #endif /* _ASM_POWERPC_TLBFLUSH_H */