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[POWERPC] Add support for FP emulation for the e300c2 core
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25
26 /* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33 #ifdef CONFIG_PPC32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
43 #ifdef CONFIG_PPC64
44 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
46 extern void __restore_cpu_ppc970(void);
47 #endif /* CONFIG_PPC64 */
48
49 /* This table only contains "desktop" CPUs, it need to be filled with embedded
50 * ones as well...
51 */
52 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
53 PPC_FEATURE_HAS_MMU)
54 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
55 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
56 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
58 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
62 PPC_FEATURE_TRUE_LE)
63 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
64 PPC_FEATURE_TRUE_LE | \
65 PPC_FEATURE_HAS_ALTIVEC_COMP)
66 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
67 PPC_FEATURE_BOOKE)
68
69 /* We only set the spe features if the kernel was compiled with
70 * spe support
71 */
72 #ifdef CONFIG_SPE
73 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
74 #else
75 #define PPC_FEATURE_SPE_COMP 0
76 #endif
77
78 static struct cpu_spec cpu_specs[] = {
79 #ifdef CONFIG_PPC64
80 { /* Power3 */
81 .pvr_mask = 0xffff0000,
82 .pvr_value = 0x00400000,
83 .cpu_name = "POWER3 (630)",
84 .cpu_features = CPU_FTRS_POWER3,
85 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
86 .icache_bsize = 128,
87 .dcache_bsize = 128,
88 .num_pmcs = 8,
89 .oprofile_cpu_type = "ppc64/power3",
90 .oprofile_type = PPC_OPROFILE_RS64,
91 .platform = "power3",
92 },
93 { /* Power3+ */
94 .pvr_mask = 0xffff0000,
95 .pvr_value = 0x00410000,
96 .cpu_name = "POWER3 (630+)",
97 .cpu_features = CPU_FTRS_POWER3,
98 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
99 .icache_bsize = 128,
100 .dcache_bsize = 128,
101 .num_pmcs = 8,
102 .oprofile_cpu_type = "ppc64/power3",
103 .oprofile_type = PPC_OPROFILE_RS64,
104 .platform = "power3",
105 },
106 { /* Northstar */
107 .pvr_mask = 0xffff0000,
108 .pvr_value = 0x00330000,
109 .cpu_name = "RS64-II (northstar)",
110 .cpu_features = CPU_FTRS_RS64,
111 .cpu_user_features = COMMON_USER_PPC64,
112 .icache_bsize = 128,
113 .dcache_bsize = 128,
114 .num_pmcs = 8,
115 .oprofile_cpu_type = "ppc64/rs64",
116 .oprofile_type = PPC_OPROFILE_RS64,
117 .platform = "rs64",
118 },
119 { /* Pulsar */
120 .pvr_mask = 0xffff0000,
121 .pvr_value = 0x00340000,
122 .cpu_name = "RS64-III (pulsar)",
123 .cpu_features = CPU_FTRS_RS64,
124 .cpu_user_features = COMMON_USER_PPC64,
125 .icache_bsize = 128,
126 .dcache_bsize = 128,
127 .num_pmcs = 8,
128 .oprofile_cpu_type = "ppc64/rs64",
129 .oprofile_type = PPC_OPROFILE_RS64,
130 .platform = "rs64",
131 },
132 { /* I-star */
133 .pvr_mask = 0xffff0000,
134 .pvr_value = 0x00360000,
135 .cpu_name = "RS64-III (icestar)",
136 .cpu_features = CPU_FTRS_RS64,
137 .cpu_user_features = COMMON_USER_PPC64,
138 .icache_bsize = 128,
139 .dcache_bsize = 128,
140 .num_pmcs = 8,
141 .oprofile_cpu_type = "ppc64/rs64",
142 .oprofile_type = PPC_OPROFILE_RS64,
143 .platform = "rs64",
144 },
145 { /* S-star */
146 .pvr_mask = 0xffff0000,
147 .pvr_value = 0x00370000,
148 .cpu_name = "RS64-IV (sstar)",
149 .cpu_features = CPU_FTRS_RS64,
150 .cpu_user_features = COMMON_USER_PPC64,
151 .icache_bsize = 128,
152 .dcache_bsize = 128,
153 .num_pmcs = 8,
154 .oprofile_cpu_type = "ppc64/rs64",
155 .oprofile_type = PPC_OPROFILE_RS64,
156 .platform = "rs64",
157 },
158 { /* Power4 */
159 .pvr_mask = 0xffff0000,
160 .pvr_value = 0x00350000,
161 .cpu_name = "POWER4 (gp)",
162 .cpu_features = CPU_FTRS_POWER4,
163 .cpu_user_features = COMMON_USER_POWER4,
164 .icache_bsize = 128,
165 .dcache_bsize = 128,
166 .num_pmcs = 8,
167 .oprofile_cpu_type = "ppc64/power4",
168 .oprofile_type = PPC_OPROFILE_POWER4,
169 .platform = "power4",
170 },
171 { /* Power4+ */
172 .pvr_mask = 0xffff0000,
173 .pvr_value = 0x00380000,
174 .cpu_name = "POWER4+ (gq)",
175 .cpu_features = CPU_FTRS_POWER4,
176 .cpu_user_features = COMMON_USER_POWER4,
177 .icache_bsize = 128,
178 .dcache_bsize = 128,
179 .num_pmcs = 8,
180 .oprofile_cpu_type = "ppc64/power4",
181 .oprofile_type = PPC_OPROFILE_POWER4,
182 .platform = "power4",
183 },
184 { /* PPC970 */
185 .pvr_mask = 0xffff0000,
186 .pvr_value = 0x00390000,
187 .cpu_name = "PPC970",
188 .cpu_features = CPU_FTRS_PPC970,
189 .cpu_user_features = COMMON_USER_POWER4 |
190 PPC_FEATURE_HAS_ALTIVEC_COMP,
191 .icache_bsize = 128,
192 .dcache_bsize = 128,
193 .num_pmcs = 8,
194 .cpu_setup = __setup_cpu_ppc970,
195 .cpu_restore = __restore_cpu_ppc970,
196 .oprofile_cpu_type = "ppc64/970",
197 .oprofile_type = PPC_OPROFILE_POWER4,
198 .platform = "ppc970",
199 },
200 { /* PPC970FX */
201 .pvr_mask = 0xffff0000,
202 .pvr_value = 0x003c0000,
203 .cpu_name = "PPC970FX",
204 .cpu_features = CPU_FTRS_PPC970,
205 .cpu_user_features = COMMON_USER_POWER4 |
206 PPC_FEATURE_HAS_ALTIVEC_COMP,
207 .icache_bsize = 128,
208 .dcache_bsize = 128,
209 .num_pmcs = 8,
210 .cpu_setup = __setup_cpu_ppc970,
211 .cpu_restore = __restore_cpu_ppc970,
212 .oprofile_cpu_type = "ppc64/970",
213 .oprofile_type = PPC_OPROFILE_POWER4,
214 .platform = "ppc970",
215 },
216 { /* PPC970MP */
217 .pvr_mask = 0xffff0000,
218 .pvr_value = 0x00440000,
219 .cpu_name = "PPC970MP",
220 .cpu_features = CPU_FTRS_PPC970,
221 .cpu_user_features = COMMON_USER_POWER4 |
222 PPC_FEATURE_HAS_ALTIVEC_COMP,
223 .icache_bsize = 128,
224 .dcache_bsize = 128,
225 .num_pmcs = 8,
226 .cpu_setup = __setup_cpu_ppc970MP,
227 .cpu_restore = __restore_cpu_ppc970,
228 .oprofile_cpu_type = "ppc64/970MP",
229 .oprofile_type = PPC_OPROFILE_POWER4,
230 .platform = "ppc970",
231 },
232 { /* PPC970GX */
233 .pvr_mask = 0xffff0000,
234 .pvr_value = 0x00450000,
235 .cpu_name = "PPC970GX",
236 .cpu_features = CPU_FTRS_PPC970,
237 .cpu_user_features = COMMON_USER_POWER4 |
238 PPC_FEATURE_HAS_ALTIVEC_COMP,
239 .icache_bsize = 128,
240 .dcache_bsize = 128,
241 .num_pmcs = 8,
242 .cpu_setup = __setup_cpu_ppc970,
243 .oprofile_cpu_type = "ppc64/970",
244 .oprofile_type = PPC_OPROFILE_POWER4,
245 .platform = "ppc970",
246 },
247 { /* Power5 GR */
248 .pvr_mask = 0xffff0000,
249 .pvr_value = 0x003a0000,
250 .cpu_name = "POWER5 (gr)",
251 .cpu_features = CPU_FTRS_POWER5,
252 .cpu_user_features = COMMON_USER_POWER5,
253 .icache_bsize = 128,
254 .dcache_bsize = 128,
255 .num_pmcs = 6,
256 .oprofile_cpu_type = "ppc64/power5",
257 .oprofile_type = PPC_OPROFILE_POWER4,
258 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
259 * and above but only works on POWER5 and above
260 */
261 .oprofile_mmcra_sihv = MMCRA_SIHV,
262 .oprofile_mmcra_sipr = MMCRA_SIPR,
263 .platform = "power5",
264 },
265 { /* Power5 GS */
266 .pvr_mask = 0xffff0000,
267 .pvr_value = 0x003b0000,
268 .cpu_name = "POWER5+ (gs)",
269 .cpu_features = CPU_FTRS_POWER5,
270 .cpu_user_features = COMMON_USER_POWER5_PLUS,
271 .icache_bsize = 128,
272 .dcache_bsize = 128,
273 .num_pmcs = 6,
274 .oprofile_cpu_type = "ppc64/power5+",
275 .oprofile_type = PPC_OPROFILE_POWER4,
276 .oprofile_mmcra_sihv = MMCRA_SIHV,
277 .oprofile_mmcra_sipr = MMCRA_SIPR,
278 .platform = "power5+",
279 },
280 { /* POWER6 in P5+ mode; 2.04-compliant processor */
281 .pvr_mask = 0xffffffff,
282 .pvr_value = 0x0f000001,
283 .cpu_name = "POWER5+",
284 .cpu_features = CPU_FTRS_POWER5,
285 .cpu_user_features = COMMON_USER_POWER5_PLUS,
286 .icache_bsize = 128,
287 .dcache_bsize = 128,
288 .num_pmcs = 6,
289 .oprofile_cpu_type = "ppc64/power6",
290 .oprofile_type = PPC_OPROFILE_POWER4,
291 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
292 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
293 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
294 POWER6_MMCRA_OTHER,
295 .platform = "power5+",
296 },
297 { /* Power6 */
298 .pvr_mask = 0xffff0000,
299 .pvr_value = 0x003e0000,
300 .cpu_name = "POWER6 (raw)",
301 .cpu_features = CPU_FTRS_POWER6,
302 .cpu_user_features = COMMON_USER_POWER6 |
303 PPC_FEATURE_POWER6_EXT,
304 .icache_bsize = 128,
305 .dcache_bsize = 128,
306 .num_pmcs = 6,
307 .oprofile_cpu_type = "ppc64/power6",
308 .oprofile_type = PPC_OPROFILE_POWER4,
309 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
310 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
311 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
312 POWER6_MMCRA_OTHER,
313 .platform = "power6x",
314 },
315 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
316 .pvr_mask = 0xffffffff,
317 .pvr_value = 0x0f000002,
318 .cpu_name = "POWER6 (architected)",
319 .cpu_features = CPU_FTRS_POWER6,
320 .cpu_user_features = COMMON_USER_POWER6,
321 .icache_bsize = 128,
322 .dcache_bsize = 128,
323 .num_pmcs = 6,
324 .oprofile_cpu_type = "ppc64/power6",
325 .oprofile_type = PPC_OPROFILE_POWER4,
326 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
327 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
328 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
329 POWER6_MMCRA_OTHER,
330 .platform = "power6",
331 },
332 { /* Cell Broadband Engine */
333 .pvr_mask = 0xffff0000,
334 .pvr_value = 0x00700000,
335 .cpu_name = "Cell Broadband Engine",
336 .cpu_features = CPU_FTRS_CELL,
337 .cpu_user_features = COMMON_USER_PPC64 |
338 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
339 PPC_FEATURE_SMT,
340 .icache_bsize = 128,
341 .dcache_bsize = 128,
342 .num_pmcs = 4,
343 .oprofile_cpu_type = "ppc64/cell-be",
344 .oprofile_type = PPC_OPROFILE_CELL,
345 .platform = "ppc-cell-be",
346 },
347 { /* PA Semi PA6T */
348 .pvr_mask = 0x7fff0000,
349 .pvr_value = 0x00900000,
350 .cpu_name = "PA6T",
351 .cpu_features = CPU_FTRS_PA6T,
352 .cpu_user_features = COMMON_USER_PA6T,
353 .icache_bsize = 64,
354 .dcache_bsize = 64,
355 .num_pmcs = 6,
356 .platform = "pa6t",
357 },
358 { /* default match */
359 .pvr_mask = 0x00000000,
360 .pvr_value = 0x00000000,
361 .cpu_name = "POWER4 (compatible)",
362 .cpu_features = CPU_FTRS_COMPATIBLE,
363 .cpu_user_features = COMMON_USER_PPC64,
364 .icache_bsize = 128,
365 .dcache_bsize = 128,
366 .num_pmcs = 6,
367 .platform = "power4",
368 }
369 #endif /* CONFIG_PPC64 */
370 #ifdef CONFIG_PPC32
371 #if CLASSIC_PPC
372 { /* 601 */
373 .pvr_mask = 0xffff0000,
374 .pvr_value = 0x00010000,
375 .cpu_name = "601",
376 .cpu_features = CPU_FTRS_PPC601,
377 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
378 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
379 .icache_bsize = 32,
380 .dcache_bsize = 32,
381 .platform = "ppc601",
382 },
383 { /* 603 */
384 .pvr_mask = 0xffff0000,
385 .pvr_value = 0x00030000,
386 .cpu_name = "603",
387 .cpu_features = CPU_FTRS_603,
388 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
389 .icache_bsize = 32,
390 .dcache_bsize = 32,
391 .cpu_setup = __setup_cpu_603,
392 .platform = "ppc603",
393 },
394 { /* 603e */
395 .pvr_mask = 0xffff0000,
396 .pvr_value = 0x00060000,
397 .cpu_name = "603e",
398 .cpu_features = CPU_FTRS_603,
399 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
400 .icache_bsize = 32,
401 .dcache_bsize = 32,
402 .cpu_setup = __setup_cpu_603,
403 .platform = "ppc603",
404 },
405 { /* 603ev */
406 .pvr_mask = 0xffff0000,
407 .pvr_value = 0x00070000,
408 .cpu_name = "603ev",
409 .cpu_features = CPU_FTRS_603,
410 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
411 .icache_bsize = 32,
412 .dcache_bsize = 32,
413 .cpu_setup = __setup_cpu_603,
414 .platform = "ppc603",
415 },
416 { /* 604 */
417 .pvr_mask = 0xffff0000,
418 .pvr_value = 0x00040000,
419 .cpu_name = "604",
420 .cpu_features = CPU_FTRS_604,
421 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
422 .icache_bsize = 32,
423 .dcache_bsize = 32,
424 .num_pmcs = 2,
425 .cpu_setup = __setup_cpu_604,
426 .platform = "ppc604",
427 },
428 { /* 604e */
429 .pvr_mask = 0xfffff000,
430 .pvr_value = 0x00090000,
431 .cpu_name = "604e",
432 .cpu_features = CPU_FTRS_604,
433 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
434 .icache_bsize = 32,
435 .dcache_bsize = 32,
436 .num_pmcs = 4,
437 .cpu_setup = __setup_cpu_604,
438 .platform = "ppc604",
439 },
440 { /* 604r */
441 .pvr_mask = 0xffff0000,
442 .pvr_value = 0x00090000,
443 .cpu_name = "604r",
444 .cpu_features = CPU_FTRS_604,
445 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
446 .icache_bsize = 32,
447 .dcache_bsize = 32,
448 .num_pmcs = 4,
449 .cpu_setup = __setup_cpu_604,
450 .platform = "ppc604",
451 },
452 { /* 604ev */
453 .pvr_mask = 0xffff0000,
454 .pvr_value = 0x000a0000,
455 .cpu_name = "604ev",
456 .cpu_features = CPU_FTRS_604,
457 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
458 .icache_bsize = 32,
459 .dcache_bsize = 32,
460 .num_pmcs = 4,
461 .cpu_setup = __setup_cpu_604,
462 .platform = "ppc604",
463 },
464 { /* 740/750 (0x4202, don't support TAU ?) */
465 .pvr_mask = 0xffffffff,
466 .pvr_value = 0x00084202,
467 .cpu_name = "740/750",
468 .cpu_features = CPU_FTRS_740_NOTAU,
469 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
470 .icache_bsize = 32,
471 .dcache_bsize = 32,
472 .num_pmcs = 4,
473 .cpu_setup = __setup_cpu_750,
474 .platform = "ppc750",
475 },
476 { /* 750CX (80100 and 8010x?) */
477 .pvr_mask = 0xfffffff0,
478 .pvr_value = 0x00080100,
479 .cpu_name = "750CX",
480 .cpu_features = CPU_FTRS_750,
481 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
482 .icache_bsize = 32,
483 .dcache_bsize = 32,
484 .num_pmcs = 4,
485 .cpu_setup = __setup_cpu_750cx,
486 .platform = "ppc750",
487 },
488 { /* 750CX (82201 and 82202) */
489 .pvr_mask = 0xfffffff0,
490 .pvr_value = 0x00082200,
491 .cpu_name = "750CX",
492 .cpu_features = CPU_FTRS_750,
493 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
494 .icache_bsize = 32,
495 .dcache_bsize = 32,
496 .num_pmcs = 4,
497 .cpu_setup = __setup_cpu_750cx,
498 .platform = "ppc750",
499 },
500 { /* 750CXe (82214) */
501 .pvr_mask = 0xfffffff0,
502 .pvr_value = 0x00082210,
503 .cpu_name = "750CXe",
504 .cpu_features = CPU_FTRS_750,
505 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
506 .icache_bsize = 32,
507 .dcache_bsize = 32,
508 .num_pmcs = 4,
509 .cpu_setup = __setup_cpu_750cx,
510 .platform = "ppc750",
511 },
512 { /* 750CXe "Gekko" (83214) */
513 .pvr_mask = 0xffffffff,
514 .pvr_value = 0x00083214,
515 .cpu_name = "750CXe",
516 .cpu_features = CPU_FTRS_750,
517 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
518 .icache_bsize = 32,
519 .dcache_bsize = 32,
520 .num_pmcs = 4,
521 .cpu_setup = __setup_cpu_750cx,
522 .platform = "ppc750",
523 },
524 { /* 745/755 */
525 .pvr_mask = 0xfffff000,
526 .pvr_value = 0x00083000,
527 .cpu_name = "745/755",
528 .cpu_features = CPU_FTRS_750,
529 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
530 .icache_bsize = 32,
531 .dcache_bsize = 32,
532 .num_pmcs = 4,
533 .cpu_setup = __setup_cpu_750,
534 .platform = "ppc750",
535 },
536 { /* 750FX rev 1.x */
537 .pvr_mask = 0xffffff00,
538 .pvr_value = 0x70000100,
539 .cpu_name = "750FX",
540 .cpu_features = CPU_FTRS_750FX1,
541 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
542 .icache_bsize = 32,
543 .dcache_bsize = 32,
544 .num_pmcs = 4,
545 .cpu_setup = __setup_cpu_750,
546 .platform = "ppc750",
547 },
548 { /* 750FX rev 2.0 must disable HID0[DPM] */
549 .pvr_mask = 0xffffffff,
550 .pvr_value = 0x70000200,
551 .cpu_name = "750FX",
552 .cpu_features = CPU_FTRS_750FX2,
553 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
554 .icache_bsize = 32,
555 .dcache_bsize = 32,
556 .num_pmcs = 4,
557 .cpu_setup = __setup_cpu_750,
558 .platform = "ppc750",
559 },
560 { /* 750FX (All revs except 2.0) */
561 .pvr_mask = 0xffff0000,
562 .pvr_value = 0x70000000,
563 .cpu_name = "750FX",
564 .cpu_features = CPU_FTRS_750FX,
565 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
566 .icache_bsize = 32,
567 .dcache_bsize = 32,
568 .num_pmcs = 4,
569 .cpu_setup = __setup_cpu_750fx,
570 .platform = "ppc750",
571 },
572 { /* 750GX */
573 .pvr_mask = 0xffff0000,
574 .pvr_value = 0x70020000,
575 .cpu_name = "750GX",
576 .cpu_features = CPU_FTRS_750GX,
577 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
578 .icache_bsize = 32,
579 .dcache_bsize = 32,
580 .num_pmcs = 4,
581 .cpu_setup = __setup_cpu_750fx,
582 .platform = "ppc750",
583 },
584 { /* 740/750 (L2CR bit need fixup for 740) */
585 .pvr_mask = 0xffff0000,
586 .pvr_value = 0x00080000,
587 .cpu_name = "740/750",
588 .cpu_features = CPU_FTRS_740,
589 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
590 .icache_bsize = 32,
591 .dcache_bsize = 32,
592 .num_pmcs = 4,
593 .cpu_setup = __setup_cpu_750,
594 .platform = "ppc750",
595 },
596 { /* 7400 rev 1.1 ? (no TAU) */
597 .pvr_mask = 0xffffffff,
598 .pvr_value = 0x000c1101,
599 .cpu_name = "7400 (1.1)",
600 .cpu_features = CPU_FTRS_7400_NOTAU,
601 .cpu_user_features = COMMON_USER |
602 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
603 .icache_bsize = 32,
604 .dcache_bsize = 32,
605 .num_pmcs = 4,
606 .cpu_setup = __setup_cpu_7400,
607 .platform = "ppc7400",
608 },
609 { /* 7400 */
610 .pvr_mask = 0xffff0000,
611 .pvr_value = 0x000c0000,
612 .cpu_name = "7400",
613 .cpu_features = CPU_FTRS_7400,
614 .cpu_user_features = COMMON_USER |
615 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
616 .icache_bsize = 32,
617 .dcache_bsize = 32,
618 .num_pmcs = 4,
619 .cpu_setup = __setup_cpu_7400,
620 .platform = "ppc7400",
621 },
622 { /* 7410 */
623 .pvr_mask = 0xffff0000,
624 .pvr_value = 0x800c0000,
625 .cpu_name = "7410",
626 .cpu_features = CPU_FTRS_7400,
627 .cpu_user_features = COMMON_USER |
628 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
629 .icache_bsize = 32,
630 .dcache_bsize = 32,
631 .num_pmcs = 4,
632 .cpu_setup = __setup_cpu_7410,
633 .platform = "ppc7400",
634 },
635 { /* 7450 2.0 - no doze/nap */
636 .pvr_mask = 0xffffffff,
637 .pvr_value = 0x80000200,
638 .cpu_name = "7450",
639 .cpu_features = CPU_FTRS_7450_20,
640 .cpu_user_features = COMMON_USER |
641 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
642 .icache_bsize = 32,
643 .dcache_bsize = 32,
644 .num_pmcs = 6,
645 .cpu_setup = __setup_cpu_745x,
646 .oprofile_cpu_type = "ppc/7450",
647 .oprofile_type = PPC_OPROFILE_G4,
648 .platform = "ppc7450",
649 },
650 { /* 7450 2.1 */
651 .pvr_mask = 0xffffffff,
652 .pvr_value = 0x80000201,
653 .cpu_name = "7450",
654 .cpu_features = CPU_FTRS_7450_21,
655 .cpu_user_features = COMMON_USER |
656 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
657 .icache_bsize = 32,
658 .dcache_bsize = 32,
659 .num_pmcs = 6,
660 .cpu_setup = __setup_cpu_745x,
661 .oprofile_cpu_type = "ppc/7450",
662 .oprofile_type = PPC_OPROFILE_G4,
663 .platform = "ppc7450",
664 },
665 { /* 7450 2.3 and newer */
666 .pvr_mask = 0xffff0000,
667 .pvr_value = 0x80000000,
668 .cpu_name = "7450",
669 .cpu_features = CPU_FTRS_7450_23,
670 .cpu_user_features = COMMON_USER |
671 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
672 .icache_bsize = 32,
673 .dcache_bsize = 32,
674 .num_pmcs = 6,
675 .cpu_setup = __setup_cpu_745x,
676 .oprofile_cpu_type = "ppc/7450",
677 .oprofile_type = PPC_OPROFILE_G4,
678 .platform = "ppc7450",
679 },
680 { /* 7455 rev 1.x */
681 .pvr_mask = 0xffffff00,
682 .pvr_value = 0x80010100,
683 .cpu_name = "7455",
684 .cpu_features = CPU_FTRS_7455_1,
685 .cpu_user_features = COMMON_USER |
686 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
687 .icache_bsize = 32,
688 .dcache_bsize = 32,
689 .num_pmcs = 6,
690 .cpu_setup = __setup_cpu_745x,
691 .oprofile_cpu_type = "ppc/7450",
692 .oprofile_type = PPC_OPROFILE_G4,
693 .platform = "ppc7450",
694 },
695 { /* 7455 rev 2.0 */
696 .pvr_mask = 0xffffffff,
697 .pvr_value = 0x80010200,
698 .cpu_name = "7455",
699 .cpu_features = CPU_FTRS_7455_20,
700 .cpu_user_features = COMMON_USER |
701 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
702 .icache_bsize = 32,
703 .dcache_bsize = 32,
704 .num_pmcs = 6,
705 .cpu_setup = __setup_cpu_745x,
706 .oprofile_cpu_type = "ppc/7450",
707 .oprofile_type = PPC_OPROFILE_G4,
708 .platform = "ppc7450",
709 },
710 { /* 7455 others */
711 .pvr_mask = 0xffff0000,
712 .pvr_value = 0x80010000,
713 .cpu_name = "7455",
714 .cpu_features = CPU_FTRS_7455,
715 .cpu_user_features = COMMON_USER |
716 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
717 .icache_bsize = 32,
718 .dcache_bsize = 32,
719 .num_pmcs = 6,
720 .cpu_setup = __setup_cpu_745x,
721 .oprofile_cpu_type = "ppc/7450",
722 .oprofile_type = PPC_OPROFILE_G4,
723 .platform = "ppc7450",
724 },
725 { /* 7447/7457 Rev 1.0 */
726 .pvr_mask = 0xffffffff,
727 .pvr_value = 0x80020100,
728 .cpu_name = "7447/7457",
729 .cpu_features = CPU_FTRS_7447_10,
730 .cpu_user_features = COMMON_USER |
731 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
732 .icache_bsize = 32,
733 .dcache_bsize = 32,
734 .num_pmcs = 6,
735 .cpu_setup = __setup_cpu_745x,
736 .oprofile_cpu_type = "ppc/7450",
737 .oprofile_type = PPC_OPROFILE_G4,
738 .platform = "ppc7450",
739 },
740 { /* 7447/7457 Rev 1.1 */
741 .pvr_mask = 0xffffffff,
742 .pvr_value = 0x80020101,
743 .cpu_name = "7447/7457",
744 .cpu_features = CPU_FTRS_7447_10,
745 .cpu_user_features = COMMON_USER |
746 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
747 .icache_bsize = 32,
748 .dcache_bsize = 32,
749 .num_pmcs = 6,
750 .cpu_setup = __setup_cpu_745x,
751 .oprofile_cpu_type = "ppc/7450",
752 .oprofile_type = PPC_OPROFILE_G4,
753 .platform = "ppc7450",
754 },
755 { /* 7447/7457 Rev 1.2 and later */
756 .pvr_mask = 0xffff0000,
757 .pvr_value = 0x80020000,
758 .cpu_name = "7447/7457",
759 .cpu_features = CPU_FTRS_7447,
760 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
761 .icache_bsize = 32,
762 .dcache_bsize = 32,
763 .num_pmcs = 6,
764 .cpu_setup = __setup_cpu_745x,
765 .oprofile_cpu_type = "ppc/7450",
766 .oprofile_type = PPC_OPROFILE_G4,
767 .platform = "ppc7450",
768 },
769 { /* 7447A */
770 .pvr_mask = 0xffff0000,
771 .pvr_value = 0x80030000,
772 .cpu_name = "7447A",
773 .cpu_features = CPU_FTRS_7447A,
774 .cpu_user_features = COMMON_USER |
775 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
776 .icache_bsize = 32,
777 .dcache_bsize = 32,
778 .num_pmcs = 6,
779 .cpu_setup = __setup_cpu_745x,
780 .oprofile_cpu_type = "ppc/7450",
781 .oprofile_type = PPC_OPROFILE_G4,
782 .platform = "ppc7450",
783 },
784 { /* 7448 */
785 .pvr_mask = 0xffff0000,
786 .pvr_value = 0x80040000,
787 .cpu_name = "7448",
788 .cpu_features = CPU_FTRS_7447A,
789 .cpu_user_features = COMMON_USER |
790 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
791 .icache_bsize = 32,
792 .dcache_bsize = 32,
793 .num_pmcs = 6,
794 .cpu_setup = __setup_cpu_745x,
795 .oprofile_cpu_type = "ppc/7450",
796 .oprofile_type = PPC_OPROFILE_G4,
797 .platform = "ppc7450",
798 },
799 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
800 .pvr_mask = 0x7fff0000,
801 .pvr_value = 0x00810000,
802 .cpu_name = "82xx",
803 .cpu_features = CPU_FTRS_82XX,
804 .cpu_user_features = COMMON_USER,
805 .icache_bsize = 32,
806 .dcache_bsize = 32,
807 .cpu_setup = __setup_cpu_603,
808 .platform = "ppc603",
809 },
810 { /* All G2_LE (603e core, plus some) have the same pvr */
811 .pvr_mask = 0x7fff0000,
812 .pvr_value = 0x00820000,
813 .cpu_name = "G2_LE",
814 .cpu_features = CPU_FTRS_G2_LE,
815 .cpu_user_features = COMMON_USER,
816 .icache_bsize = 32,
817 .dcache_bsize = 32,
818 .cpu_setup = __setup_cpu_603,
819 .platform = "ppc603",
820 },
821 { /* e300c1 (a 603e core, plus some) on 83xx */
822 .pvr_mask = 0x7fff0000,
823 .pvr_value = 0x00830000,
824 .cpu_name = "e300c1",
825 .cpu_features = CPU_FTRS_E300,
826 .cpu_user_features = COMMON_USER,
827 .icache_bsize = 32,
828 .dcache_bsize = 32,
829 .cpu_setup = __setup_cpu_603,
830 .platform = "ppc603",
831 },
832 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
833 .pvr_mask = 0x7fff0000,
834 .pvr_value = 0x00840000,
835 .cpu_name = "e300c2",
836 .cpu_features = CPU_FTRS_E300C2,
837 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
838 .icache_bsize = 32,
839 .dcache_bsize = 32,
840 .cpu_setup = __setup_cpu_603,
841 .platform = "ppc603",
842 },
843 { /* e300c3 on 83xx */
844 .pvr_mask = 0x7fff0000,
845 .pvr_value = 0x00850000,
846 .cpu_name = "e300c3",
847 .cpu_features = CPU_FTRS_E300,
848 .cpu_user_features = COMMON_USER,
849 .icache_bsize = 32,
850 .dcache_bsize = 32,
851 .cpu_setup = __setup_cpu_603,
852 .platform = "ppc603",
853 },
854 { /* default match, we assume split I/D cache & TB (non-601)... */
855 .pvr_mask = 0x00000000,
856 .pvr_value = 0x00000000,
857 .cpu_name = "(generic PPC)",
858 .cpu_features = CPU_FTRS_CLASSIC32,
859 .cpu_user_features = COMMON_USER,
860 .icache_bsize = 32,
861 .dcache_bsize = 32,
862 .platform = "ppc603",
863 },
864 #endif /* CLASSIC_PPC */
865 #ifdef CONFIG_8xx
866 { /* 8xx */
867 .pvr_mask = 0xffff0000,
868 .pvr_value = 0x00500000,
869 .cpu_name = "8xx",
870 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
871 * if the 8xx code is there.... */
872 .cpu_features = CPU_FTRS_8XX,
873 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
874 .icache_bsize = 16,
875 .dcache_bsize = 16,
876 .platform = "ppc823",
877 },
878 #endif /* CONFIG_8xx */
879 #ifdef CONFIG_40x
880 { /* 403GC */
881 .pvr_mask = 0xffffff00,
882 .pvr_value = 0x00200200,
883 .cpu_name = "403GC",
884 .cpu_features = CPU_FTRS_40X,
885 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
886 .icache_bsize = 16,
887 .dcache_bsize = 16,
888 .platform = "ppc403",
889 },
890 { /* 403GCX */
891 .pvr_mask = 0xffffff00,
892 .pvr_value = 0x00201400,
893 .cpu_name = "403GCX",
894 .cpu_features = CPU_FTRS_40X,
895 .cpu_user_features = PPC_FEATURE_32 |
896 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
897 .icache_bsize = 16,
898 .dcache_bsize = 16,
899 .platform = "ppc403",
900 },
901 { /* 403G ?? */
902 .pvr_mask = 0xffff0000,
903 .pvr_value = 0x00200000,
904 .cpu_name = "403G ??",
905 .cpu_features = CPU_FTRS_40X,
906 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
907 .icache_bsize = 16,
908 .dcache_bsize = 16,
909 .platform = "ppc403",
910 },
911 { /* 405GP */
912 .pvr_mask = 0xffff0000,
913 .pvr_value = 0x40110000,
914 .cpu_name = "405GP",
915 .cpu_features = CPU_FTRS_40X,
916 .cpu_user_features = PPC_FEATURE_32 |
917 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
918 .icache_bsize = 32,
919 .dcache_bsize = 32,
920 .platform = "ppc405",
921 },
922 { /* STB 03xxx */
923 .pvr_mask = 0xffff0000,
924 .pvr_value = 0x40130000,
925 .cpu_name = "STB03xxx",
926 .cpu_features = CPU_FTRS_40X,
927 .cpu_user_features = PPC_FEATURE_32 |
928 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
929 .icache_bsize = 32,
930 .dcache_bsize = 32,
931 .platform = "ppc405",
932 },
933 { /* STB 04xxx */
934 .pvr_mask = 0xffff0000,
935 .pvr_value = 0x41810000,
936 .cpu_name = "STB04xxx",
937 .cpu_features = CPU_FTRS_40X,
938 .cpu_user_features = PPC_FEATURE_32 |
939 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
940 .icache_bsize = 32,
941 .dcache_bsize = 32,
942 .platform = "ppc405",
943 },
944 { /* NP405L */
945 .pvr_mask = 0xffff0000,
946 .pvr_value = 0x41610000,
947 .cpu_name = "NP405L",
948 .cpu_features = CPU_FTRS_40X,
949 .cpu_user_features = PPC_FEATURE_32 |
950 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
951 .icache_bsize = 32,
952 .dcache_bsize = 32,
953 .platform = "ppc405",
954 },
955 { /* NP4GS3 */
956 .pvr_mask = 0xffff0000,
957 .pvr_value = 0x40B10000,
958 .cpu_name = "NP4GS3",
959 .cpu_features = CPU_FTRS_40X,
960 .cpu_user_features = PPC_FEATURE_32 |
961 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
962 .icache_bsize = 32,
963 .dcache_bsize = 32,
964 .platform = "ppc405",
965 },
966 { /* NP405H */
967 .pvr_mask = 0xffff0000,
968 .pvr_value = 0x41410000,
969 .cpu_name = "NP405H",
970 .cpu_features = CPU_FTRS_40X,
971 .cpu_user_features = PPC_FEATURE_32 |
972 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
973 .icache_bsize = 32,
974 .dcache_bsize = 32,
975 .platform = "ppc405",
976 },
977 { /* 405GPr */
978 .pvr_mask = 0xffff0000,
979 .pvr_value = 0x50910000,
980 .cpu_name = "405GPr",
981 .cpu_features = CPU_FTRS_40X,
982 .cpu_user_features = PPC_FEATURE_32 |
983 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
984 .icache_bsize = 32,
985 .dcache_bsize = 32,
986 .platform = "ppc405",
987 },
988 { /* STBx25xx */
989 .pvr_mask = 0xffff0000,
990 .pvr_value = 0x51510000,
991 .cpu_name = "STBx25xx",
992 .cpu_features = CPU_FTRS_40X,
993 .cpu_user_features = PPC_FEATURE_32 |
994 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
995 .icache_bsize = 32,
996 .dcache_bsize = 32,
997 .platform = "ppc405",
998 },
999 { /* 405LP */
1000 .pvr_mask = 0xffff0000,
1001 .pvr_value = 0x41F10000,
1002 .cpu_name = "405LP",
1003 .cpu_features = CPU_FTRS_40X,
1004 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1005 .icache_bsize = 32,
1006 .dcache_bsize = 32,
1007 .platform = "ppc405",
1008 },
1009 { /* Xilinx Virtex-II Pro */
1010 .pvr_mask = 0xfffff000,
1011 .pvr_value = 0x20010000,
1012 .cpu_name = "Virtex-II Pro",
1013 .cpu_features = CPU_FTRS_40X,
1014 .cpu_user_features = PPC_FEATURE_32 |
1015 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1016 .icache_bsize = 32,
1017 .dcache_bsize = 32,
1018 .platform = "ppc405",
1019 },
1020 { /* Xilinx Virtex-4 FX */
1021 .pvr_mask = 0xfffff000,
1022 .pvr_value = 0x20011000,
1023 .cpu_name = "Virtex-4 FX",
1024 .cpu_features = CPU_FTRS_40X,
1025 .cpu_user_features = PPC_FEATURE_32 |
1026 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1027 .icache_bsize = 32,
1028 .dcache_bsize = 32,
1029 .platform = "ppc405",
1030 },
1031 { /* 405EP */
1032 .pvr_mask = 0xffff0000,
1033 .pvr_value = 0x51210000,
1034 .cpu_name = "405EP",
1035 .cpu_features = CPU_FTRS_40X,
1036 .cpu_user_features = PPC_FEATURE_32 |
1037 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1038 .icache_bsize = 32,
1039 .dcache_bsize = 32,
1040 .platform = "ppc405",
1041 },
1042
1043 #endif /* CONFIG_40x */
1044 #ifdef CONFIG_44x
1045 {
1046 .pvr_mask = 0xf0000fff,
1047 .pvr_value = 0x40000850,
1048 .cpu_name = "440EP Rev. A",
1049 .cpu_features = CPU_FTRS_44X,
1050 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1051 .icache_bsize = 32,
1052 .dcache_bsize = 32,
1053 .platform = "ppc440",
1054 },
1055 {
1056 .pvr_mask = 0xf0000fff,
1057 .pvr_value = 0x400008d3,
1058 .cpu_name = "440EP Rev. B",
1059 .cpu_features = CPU_FTRS_44X,
1060 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1061 .icache_bsize = 32,
1062 .dcache_bsize = 32,
1063 .platform = "ppc440",
1064 },
1065 { /* 440GP Rev. B */
1066 .pvr_mask = 0xf0000fff,
1067 .pvr_value = 0x40000440,
1068 .cpu_name = "440GP Rev. B",
1069 .cpu_features = CPU_FTRS_44X,
1070 .cpu_user_features = COMMON_USER_BOOKE,
1071 .icache_bsize = 32,
1072 .dcache_bsize = 32,
1073 .platform = "ppc440gp",
1074 },
1075 { /* 440GP Rev. C */
1076 .pvr_mask = 0xf0000fff,
1077 .pvr_value = 0x40000481,
1078 .cpu_name = "440GP Rev. C",
1079 .cpu_features = CPU_FTRS_44X,
1080 .cpu_user_features = COMMON_USER_BOOKE,
1081 .icache_bsize = 32,
1082 .dcache_bsize = 32,
1083 .platform = "ppc440gp",
1084 },
1085 { /* 440GX Rev. A */
1086 .pvr_mask = 0xf0000fff,
1087 .pvr_value = 0x50000850,
1088 .cpu_name = "440GX Rev. A",
1089 .cpu_features = CPU_FTRS_44X,
1090 .cpu_user_features = COMMON_USER_BOOKE,
1091 .icache_bsize = 32,
1092 .dcache_bsize = 32,
1093 .platform = "ppc440",
1094 },
1095 { /* 440GX Rev. B */
1096 .pvr_mask = 0xf0000fff,
1097 .pvr_value = 0x50000851,
1098 .cpu_name = "440GX Rev. B",
1099 .cpu_features = CPU_FTRS_44X,
1100 .cpu_user_features = COMMON_USER_BOOKE,
1101 .icache_bsize = 32,
1102 .dcache_bsize = 32,
1103 .platform = "ppc440",
1104 },
1105 { /* 440GX Rev. C */
1106 .pvr_mask = 0xf0000fff,
1107 .pvr_value = 0x50000892,
1108 .cpu_name = "440GX Rev. C",
1109 .cpu_features = CPU_FTRS_44X,
1110 .cpu_user_features = COMMON_USER_BOOKE,
1111 .icache_bsize = 32,
1112 .dcache_bsize = 32,
1113 .platform = "ppc440",
1114 },
1115 { /* 440GX Rev. F */
1116 .pvr_mask = 0xf0000fff,
1117 .pvr_value = 0x50000894,
1118 .cpu_name = "440GX Rev. F",
1119 .cpu_features = CPU_FTRS_44X,
1120 .cpu_user_features = COMMON_USER_BOOKE,
1121 .icache_bsize = 32,
1122 .dcache_bsize = 32,
1123 .platform = "ppc440",
1124 },
1125 { /* 440SP Rev. A */
1126 .pvr_mask = 0xff000fff,
1127 .pvr_value = 0x53000891,
1128 .cpu_name = "440SP Rev. A",
1129 .cpu_features = CPU_FTRS_44X,
1130 .cpu_user_features = COMMON_USER_BOOKE,
1131 .icache_bsize = 32,
1132 .dcache_bsize = 32,
1133 .platform = "ppc440",
1134 },
1135 { /* 440SPe Rev. A */
1136 .pvr_mask = 0xff000fff,
1137 .pvr_value = 0x53000890,
1138 .cpu_name = "440SPe Rev. A",
1139 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1140 CPU_FTR_USE_TB,
1141 .cpu_user_features = COMMON_USER_BOOKE,
1142 .icache_bsize = 32,
1143 .dcache_bsize = 32,
1144 .platform = "ppc440",
1145 },
1146 #endif /* CONFIG_44x */
1147 #ifdef CONFIG_FSL_BOOKE
1148 { /* e200z5 */
1149 .pvr_mask = 0xfff00000,
1150 .pvr_value = 0x81000000,
1151 .cpu_name = "e200z5",
1152 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1153 .cpu_features = CPU_FTRS_E200,
1154 .cpu_user_features = COMMON_USER_BOOKE |
1155 PPC_FEATURE_HAS_EFP_SINGLE |
1156 PPC_FEATURE_UNIFIED_CACHE,
1157 .dcache_bsize = 32,
1158 .platform = "ppc5554",
1159 },
1160 { /* e200z6 */
1161 .pvr_mask = 0xfff00000,
1162 .pvr_value = 0x81100000,
1163 .cpu_name = "e200z6",
1164 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1165 .cpu_features = CPU_FTRS_E200,
1166 .cpu_user_features = COMMON_USER_BOOKE |
1167 PPC_FEATURE_SPE_COMP |
1168 PPC_FEATURE_HAS_EFP_SINGLE |
1169 PPC_FEATURE_UNIFIED_CACHE,
1170 .dcache_bsize = 32,
1171 .platform = "ppc5554",
1172 },
1173 { /* e500 */
1174 .pvr_mask = 0xffff0000,
1175 .pvr_value = 0x80200000,
1176 .cpu_name = "e500",
1177 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1178 .cpu_features = CPU_FTRS_E500,
1179 .cpu_user_features = COMMON_USER_BOOKE |
1180 PPC_FEATURE_SPE_COMP |
1181 PPC_FEATURE_HAS_EFP_SINGLE,
1182 .icache_bsize = 32,
1183 .dcache_bsize = 32,
1184 .num_pmcs = 4,
1185 .oprofile_cpu_type = "ppc/e500",
1186 .oprofile_type = PPC_OPROFILE_BOOKE,
1187 .platform = "ppc8540",
1188 },
1189 { /* e500v2 */
1190 .pvr_mask = 0xffff0000,
1191 .pvr_value = 0x80210000,
1192 .cpu_name = "e500v2",
1193 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1194 .cpu_features = CPU_FTRS_E500_2,
1195 .cpu_user_features = COMMON_USER_BOOKE |
1196 PPC_FEATURE_SPE_COMP |
1197 PPC_FEATURE_HAS_EFP_SINGLE |
1198 PPC_FEATURE_HAS_EFP_DOUBLE,
1199 .icache_bsize = 32,
1200 .dcache_bsize = 32,
1201 .num_pmcs = 4,
1202 .oprofile_cpu_type = "ppc/e500",
1203 .oprofile_type = PPC_OPROFILE_BOOKE,
1204 .platform = "ppc8548",
1205 },
1206 #endif
1207 #if !CLASSIC_PPC
1208 { /* default match */
1209 .pvr_mask = 0x00000000,
1210 .pvr_value = 0x00000000,
1211 .cpu_name = "(generic PPC)",
1212 .cpu_features = CPU_FTRS_GENERIC_32,
1213 .cpu_user_features = PPC_FEATURE_32,
1214 .icache_bsize = 32,
1215 .dcache_bsize = 32,
1216 .platform = "powerpc",
1217 }
1218 #endif /* !CLASSIC_PPC */
1219 #endif /* CONFIG_PPC32 */
1220 };
1221
1222 struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
1223 {
1224 struct cpu_spec *s = cpu_specs;
1225 struct cpu_spec **cur = &cur_cpu_spec;
1226 int i;
1227
1228 s = PTRRELOC(s);
1229 cur = PTRRELOC(cur);
1230
1231 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1232 if ((pvr & s->pvr_mask) == s->pvr_value) {
1233 *cur = cpu_specs + i;
1234 #ifdef CONFIG_PPC64
1235 /* ppc64 expects identify_cpu to also call setup_cpu
1236 * for that processor. I will consolidate that at a
1237 * later time, for now, just use our friend #ifdef.
1238 * we also don't need to PTRRELOC the function pointer
1239 * on ppc64 as we are running at 0 in real mode.
1240 */
1241 if (s->cpu_setup) {
1242 s->cpu_setup(offset, s);
1243 }
1244 #endif /* CONFIG_PPC64 */
1245 return s;
1246 }
1247 BUG();
1248 return NULL;
1249 }
1250
1251 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
1252 {
1253 struct fixup_entry {
1254 unsigned long mask;
1255 unsigned long value;
1256 long start_off;
1257 long end_off;
1258 } *fcur, *fend;
1259
1260 fcur = fixup_start;
1261 fend = fixup_end;
1262
1263 for (; fcur < fend; fcur++) {
1264 unsigned int *pstart, *pend, *p;
1265
1266 if ((value & fcur->mask) == fcur->value)
1267 continue;
1268
1269 /* These PTRRELOCs will disappear once the new scheme for
1270 * modules and vdso is implemented
1271 */
1272 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
1273 pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
1274
1275 for (p = pstart; p < pend; p++) {
1276 *p = 0x60000000u;
1277 asm volatile ("dcbst 0, %0" : : "r" (p));
1278 }
1279 asm volatile ("sync" : : : "memory");
1280 for (p = pstart; p < pend; p++)
1281 asm volatile ("icbi 0,%0" : : "r" (p));
1282 asm volatile ("sync; isync" : : : "memory");
1283 }
1284 }
Linux kernel - Deliverables
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