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1f0937d7d4b546a1f8e90269075fec63a9b7df88
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23 #include <asm/setup.h>
24
25 struct cpu_spec* cur_cpu_spec = NULL;
26 EXPORT_SYMBOL(cur_cpu_spec);
27
28 /* The platform string corresponding to the real PVR */
29 const char *powerpc_base_platform;
30
31 /* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38 #ifdef CONFIG_PPC32
39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61 #endif /* CONFIG_PPC32 */
62 #ifdef CONFIG_PPC64
63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power8(void);
73 extern void __restore_cpu_a2(void);
74 #endif /* CONFIG_PPC64 */
75 #if defined(CONFIG_E500)
76 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
77 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
78 extern void __restore_cpu_e5500(void);
79 extern void __restore_cpu_e6500(void);
80 #endif /* CONFIG_E500 */
81
82 /* This table only contains "desktop" CPUs, it need to be filled with embedded
83 * ones as well...
84 */
85 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
86 PPC_FEATURE_HAS_MMU)
87 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
88 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
89 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
91 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
93 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
95 PPC_FEATURE_TRUE_LE | \
96 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
97 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
99 PPC_FEATURE_TRUE_LE | \
100 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
101 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
102 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
103 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
104 PPC_FEATURE_TRUE_LE | \
105 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
106 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
107 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \
108 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR)
109 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
110 PPC_FEATURE_TRUE_LE | \
111 PPC_FEATURE_HAS_ALTIVEC_COMP)
112 #ifdef CONFIG_PPC_BOOK3E_64
113 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
114 #else
115 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
116 PPC_FEATURE_BOOKE)
117 #endif
118
119 static struct cpu_spec __initdata cpu_specs[] = {
120 #ifdef CONFIG_PPC_BOOK3S_64
121 { /* Power3 */
122 .pvr_mask = 0xffff0000,
123 .pvr_value = 0x00400000,
124 .cpu_name = "POWER3 (630)",
125 .cpu_features = CPU_FTRS_POWER3,
126 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
127 .mmu_features = MMU_FTR_HPTE_TABLE,
128 .icache_bsize = 128,
129 .dcache_bsize = 128,
130 .num_pmcs = 8,
131 .pmc_type = PPC_PMC_IBM,
132 .oprofile_cpu_type = "ppc64/power3",
133 .oprofile_type = PPC_OPROFILE_RS64,
134 .platform = "power3",
135 },
136 { /* Power3+ */
137 .pvr_mask = 0xffff0000,
138 .pvr_value = 0x00410000,
139 .cpu_name = "POWER3 (630+)",
140 .cpu_features = CPU_FTRS_POWER3,
141 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
142 .mmu_features = MMU_FTR_HPTE_TABLE,
143 .icache_bsize = 128,
144 .dcache_bsize = 128,
145 .num_pmcs = 8,
146 .pmc_type = PPC_PMC_IBM,
147 .oprofile_cpu_type = "ppc64/power3",
148 .oprofile_type = PPC_OPROFILE_RS64,
149 .platform = "power3",
150 },
151 { /* Northstar */
152 .pvr_mask = 0xffff0000,
153 .pvr_value = 0x00330000,
154 .cpu_name = "RS64-II (northstar)",
155 .cpu_features = CPU_FTRS_RS64,
156 .cpu_user_features = COMMON_USER_PPC64,
157 .mmu_features = MMU_FTR_HPTE_TABLE,
158 .icache_bsize = 128,
159 .dcache_bsize = 128,
160 .num_pmcs = 8,
161 .pmc_type = PPC_PMC_IBM,
162 .oprofile_cpu_type = "ppc64/rs64",
163 .oprofile_type = PPC_OPROFILE_RS64,
164 .platform = "rs64",
165 },
166 { /* Pulsar */
167 .pvr_mask = 0xffff0000,
168 .pvr_value = 0x00340000,
169 .cpu_name = "RS64-III (pulsar)",
170 .cpu_features = CPU_FTRS_RS64,
171 .cpu_user_features = COMMON_USER_PPC64,
172 .mmu_features = MMU_FTR_HPTE_TABLE,
173 .icache_bsize = 128,
174 .dcache_bsize = 128,
175 .num_pmcs = 8,
176 .pmc_type = PPC_PMC_IBM,
177 .oprofile_cpu_type = "ppc64/rs64",
178 .oprofile_type = PPC_OPROFILE_RS64,
179 .platform = "rs64",
180 },
181 { /* I-star */
182 .pvr_mask = 0xffff0000,
183 .pvr_value = 0x00360000,
184 .cpu_name = "RS64-III (icestar)",
185 .cpu_features = CPU_FTRS_RS64,
186 .cpu_user_features = COMMON_USER_PPC64,
187 .mmu_features = MMU_FTR_HPTE_TABLE,
188 .icache_bsize = 128,
189 .dcache_bsize = 128,
190 .num_pmcs = 8,
191 .pmc_type = PPC_PMC_IBM,
192 .oprofile_cpu_type = "ppc64/rs64",
193 .oprofile_type = PPC_OPROFILE_RS64,
194 .platform = "rs64",
195 },
196 { /* S-star */
197 .pvr_mask = 0xffff0000,
198 .pvr_value = 0x00370000,
199 .cpu_name = "RS64-IV (sstar)",
200 .cpu_features = CPU_FTRS_RS64,
201 .cpu_user_features = COMMON_USER_PPC64,
202 .mmu_features = MMU_FTR_HPTE_TABLE,
203 .icache_bsize = 128,
204 .dcache_bsize = 128,
205 .num_pmcs = 8,
206 .pmc_type = PPC_PMC_IBM,
207 .oprofile_cpu_type = "ppc64/rs64",
208 .oprofile_type = PPC_OPROFILE_RS64,
209 .platform = "rs64",
210 },
211 { /* Power4 */
212 .pvr_mask = 0xffff0000,
213 .pvr_value = 0x00350000,
214 .cpu_name = "POWER4 (gp)",
215 .cpu_features = CPU_FTRS_POWER4,
216 .cpu_user_features = COMMON_USER_POWER4,
217 .mmu_features = MMU_FTRS_POWER4,
218 .icache_bsize = 128,
219 .dcache_bsize = 128,
220 .num_pmcs = 8,
221 .pmc_type = PPC_PMC_IBM,
222 .oprofile_cpu_type = "ppc64/power4",
223 .oprofile_type = PPC_OPROFILE_POWER4,
224 .platform = "power4",
225 },
226 { /* Power4+ */
227 .pvr_mask = 0xffff0000,
228 .pvr_value = 0x00380000,
229 .cpu_name = "POWER4+ (gq)",
230 .cpu_features = CPU_FTRS_POWER4,
231 .cpu_user_features = COMMON_USER_POWER4,
232 .mmu_features = MMU_FTRS_POWER4,
233 .icache_bsize = 128,
234 .dcache_bsize = 128,
235 .num_pmcs = 8,
236 .pmc_type = PPC_PMC_IBM,
237 .oprofile_cpu_type = "ppc64/power4",
238 .oprofile_type = PPC_OPROFILE_POWER4,
239 .platform = "power4",
240 },
241 { /* PPC970 */
242 .pvr_mask = 0xffff0000,
243 .pvr_value = 0x00390000,
244 .cpu_name = "PPC970",
245 .cpu_features = CPU_FTRS_PPC970,
246 .cpu_user_features = COMMON_USER_POWER4 |
247 PPC_FEATURE_HAS_ALTIVEC_COMP,
248 .mmu_features = MMU_FTRS_PPC970,
249 .icache_bsize = 128,
250 .dcache_bsize = 128,
251 .num_pmcs = 8,
252 .pmc_type = PPC_PMC_IBM,
253 .cpu_setup = __setup_cpu_ppc970,
254 .cpu_restore = __restore_cpu_ppc970,
255 .oprofile_cpu_type = "ppc64/970",
256 .oprofile_type = PPC_OPROFILE_POWER4,
257 .platform = "ppc970",
258 },
259 { /* PPC970FX */
260 .pvr_mask = 0xffff0000,
261 .pvr_value = 0x003c0000,
262 .cpu_name = "PPC970FX",
263 .cpu_features = CPU_FTRS_PPC970,
264 .cpu_user_features = COMMON_USER_POWER4 |
265 PPC_FEATURE_HAS_ALTIVEC_COMP,
266 .mmu_features = MMU_FTRS_PPC970,
267 .icache_bsize = 128,
268 .dcache_bsize = 128,
269 .num_pmcs = 8,
270 .pmc_type = PPC_PMC_IBM,
271 .cpu_setup = __setup_cpu_ppc970,
272 .cpu_restore = __restore_cpu_ppc970,
273 .oprofile_cpu_type = "ppc64/970",
274 .oprofile_type = PPC_OPROFILE_POWER4,
275 .platform = "ppc970",
276 },
277 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
278 .pvr_mask = 0xffffffff,
279 .pvr_value = 0x00440100,
280 .cpu_name = "PPC970MP",
281 .cpu_features = CPU_FTRS_PPC970,
282 .cpu_user_features = COMMON_USER_POWER4 |
283 PPC_FEATURE_HAS_ALTIVEC_COMP,
284 .mmu_features = MMU_FTRS_PPC970,
285 .icache_bsize = 128,
286 .dcache_bsize = 128,
287 .num_pmcs = 8,
288 .pmc_type = PPC_PMC_IBM,
289 .cpu_setup = __setup_cpu_ppc970,
290 .cpu_restore = __restore_cpu_ppc970,
291 .oprofile_cpu_type = "ppc64/970MP",
292 .oprofile_type = PPC_OPROFILE_POWER4,
293 .platform = "ppc970",
294 },
295 { /* PPC970MP */
296 .pvr_mask = 0xffff0000,
297 .pvr_value = 0x00440000,
298 .cpu_name = "PPC970MP",
299 .cpu_features = CPU_FTRS_PPC970,
300 .cpu_user_features = COMMON_USER_POWER4 |
301 PPC_FEATURE_HAS_ALTIVEC_COMP,
302 .mmu_features = MMU_FTRS_PPC970,
303 .icache_bsize = 128,
304 .dcache_bsize = 128,
305 .num_pmcs = 8,
306 .pmc_type = PPC_PMC_IBM,
307 .cpu_setup = __setup_cpu_ppc970MP,
308 .cpu_restore = __restore_cpu_ppc970,
309 .oprofile_cpu_type = "ppc64/970MP",
310 .oprofile_type = PPC_OPROFILE_POWER4,
311 .platform = "ppc970",
312 },
313 { /* PPC970GX */
314 .pvr_mask = 0xffff0000,
315 .pvr_value = 0x00450000,
316 .cpu_name = "PPC970GX",
317 .cpu_features = CPU_FTRS_PPC970,
318 .cpu_user_features = COMMON_USER_POWER4 |
319 PPC_FEATURE_HAS_ALTIVEC_COMP,
320 .mmu_features = MMU_FTRS_PPC970,
321 .icache_bsize = 128,
322 .dcache_bsize = 128,
323 .num_pmcs = 8,
324 .pmc_type = PPC_PMC_IBM,
325 .cpu_setup = __setup_cpu_ppc970,
326 .oprofile_cpu_type = "ppc64/970",
327 .oprofile_type = PPC_OPROFILE_POWER4,
328 .platform = "ppc970",
329 },
330 { /* Power5 GR */
331 .pvr_mask = 0xffff0000,
332 .pvr_value = 0x003a0000,
333 .cpu_name = "POWER5 (gr)",
334 .cpu_features = CPU_FTRS_POWER5,
335 .cpu_user_features = COMMON_USER_POWER5,
336 .mmu_features = MMU_FTRS_POWER5,
337 .icache_bsize = 128,
338 .dcache_bsize = 128,
339 .num_pmcs = 6,
340 .pmc_type = PPC_PMC_IBM,
341 .oprofile_cpu_type = "ppc64/power5",
342 .oprofile_type = PPC_OPROFILE_POWER4,
343 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
344 * and above but only works on POWER5 and above
345 */
346 .oprofile_mmcra_sihv = MMCRA_SIHV,
347 .oprofile_mmcra_sipr = MMCRA_SIPR,
348 .platform = "power5",
349 },
350 { /* Power5++ */
351 .pvr_mask = 0xffffff00,
352 .pvr_value = 0x003b0300,
353 .cpu_name = "POWER5+ (gs)",
354 .cpu_features = CPU_FTRS_POWER5,
355 .cpu_user_features = COMMON_USER_POWER5_PLUS,
356 .mmu_features = MMU_FTRS_POWER5,
357 .icache_bsize = 128,
358 .dcache_bsize = 128,
359 .num_pmcs = 6,
360 .oprofile_cpu_type = "ppc64/power5++",
361 .oprofile_type = PPC_OPROFILE_POWER4,
362 .oprofile_mmcra_sihv = MMCRA_SIHV,
363 .oprofile_mmcra_sipr = MMCRA_SIPR,
364 .platform = "power5+",
365 },
366 { /* Power5 GS */
367 .pvr_mask = 0xffff0000,
368 .pvr_value = 0x003b0000,
369 .cpu_name = "POWER5+ (gs)",
370 .cpu_features = CPU_FTRS_POWER5,
371 .cpu_user_features = COMMON_USER_POWER5_PLUS,
372 .mmu_features = MMU_FTRS_POWER5,
373 .icache_bsize = 128,
374 .dcache_bsize = 128,
375 .num_pmcs = 6,
376 .pmc_type = PPC_PMC_IBM,
377 .oprofile_cpu_type = "ppc64/power5+",
378 .oprofile_type = PPC_OPROFILE_POWER4,
379 .oprofile_mmcra_sihv = MMCRA_SIHV,
380 .oprofile_mmcra_sipr = MMCRA_SIPR,
381 .platform = "power5+",
382 },
383 { /* POWER6 in P5+ mode; 2.04-compliant processor */
384 .pvr_mask = 0xffffffff,
385 .pvr_value = 0x0f000001,
386 .cpu_name = "POWER5+",
387 .cpu_features = CPU_FTRS_POWER5,
388 .cpu_user_features = COMMON_USER_POWER5_PLUS,
389 .mmu_features = MMU_FTRS_POWER5,
390 .icache_bsize = 128,
391 .dcache_bsize = 128,
392 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
393 .oprofile_type = PPC_OPROFILE_POWER4,
394 .platform = "power5+",
395 },
396 { /* Power6 */
397 .pvr_mask = 0xffff0000,
398 .pvr_value = 0x003e0000,
399 .cpu_name = "POWER6 (raw)",
400 .cpu_features = CPU_FTRS_POWER6,
401 .cpu_user_features = COMMON_USER_POWER6 |
402 PPC_FEATURE_POWER6_EXT,
403 .mmu_features = MMU_FTRS_POWER6,
404 .icache_bsize = 128,
405 .dcache_bsize = 128,
406 .num_pmcs = 6,
407 .pmc_type = PPC_PMC_IBM,
408 .oprofile_cpu_type = "ppc64/power6",
409 .oprofile_type = PPC_OPROFILE_POWER4,
410 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
411 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
412 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
413 POWER6_MMCRA_OTHER,
414 .platform = "power6x",
415 },
416 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
417 .pvr_mask = 0xffffffff,
418 .pvr_value = 0x0f000002,
419 .cpu_name = "POWER6 (architected)",
420 .cpu_features = CPU_FTRS_POWER6,
421 .cpu_user_features = COMMON_USER_POWER6,
422 .mmu_features = MMU_FTRS_POWER6,
423 .icache_bsize = 128,
424 .dcache_bsize = 128,
425 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
426 .oprofile_type = PPC_OPROFILE_POWER4,
427 .platform = "power6",
428 },
429 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
430 .pvr_mask = 0xffffffff,
431 .pvr_value = 0x0f000003,
432 .cpu_name = "POWER7 (architected)",
433 .cpu_features = CPU_FTRS_POWER7,
434 .cpu_user_features = COMMON_USER_POWER7,
435 .cpu_user_features2 = COMMON_USER2_POWER7,
436 .mmu_features = MMU_FTRS_POWER7,
437 .icache_bsize = 128,
438 .dcache_bsize = 128,
439 .oprofile_type = PPC_OPROFILE_POWER4,
440 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
441 .cpu_setup = __setup_cpu_power7,
442 .cpu_restore = __restore_cpu_power7,
443 .platform = "power7",
444 },
445 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
446 .pvr_mask = 0xffffffff,
447 .pvr_value = 0x0f000004,
448 .cpu_name = "POWER8 (architected)",
449 .cpu_features = CPU_FTRS_POWER8,
450 .cpu_user_features = COMMON_USER_POWER8,
451 .cpu_user_features2 = COMMON_USER2_POWER8,
452 .mmu_features = MMU_FTRS_POWER8,
453 .icache_bsize = 128,
454 .dcache_bsize = 128,
455 .oprofile_type = PPC_OPROFILE_POWER4,
456 .oprofile_cpu_type = 0,
457 .cpu_setup = __setup_cpu_power8,
458 .cpu_restore = __restore_cpu_power8,
459 .platform = "power8",
460 },
461 { /* Power7 */
462 .pvr_mask = 0xffff0000,
463 .pvr_value = 0x003f0000,
464 .cpu_name = "POWER7 (raw)",
465 .cpu_features = CPU_FTRS_POWER7,
466 .cpu_user_features = COMMON_USER_POWER7,
467 .cpu_user_features2 = COMMON_USER2_POWER7,
468 .mmu_features = MMU_FTRS_POWER7,
469 .icache_bsize = 128,
470 .dcache_bsize = 128,
471 .num_pmcs = 6,
472 .pmc_type = PPC_PMC_IBM,
473 .oprofile_cpu_type = "ppc64/power7",
474 .oprofile_type = PPC_OPROFILE_POWER4,
475 .cpu_setup = __setup_cpu_power7,
476 .cpu_restore = __restore_cpu_power7,
477 .platform = "power7",
478 },
479 { /* Power7+ */
480 .pvr_mask = 0xffff0000,
481 .pvr_value = 0x004A0000,
482 .cpu_name = "POWER7+ (raw)",
483 .cpu_features = CPU_FTRS_POWER7,
484 .cpu_user_features = COMMON_USER_POWER7,
485 .cpu_user_features2 = COMMON_USER2_POWER7,
486 .mmu_features = MMU_FTRS_POWER7,
487 .icache_bsize = 128,
488 .dcache_bsize = 128,
489 .num_pmcs = 6,
490 .pmc_type = PPC_PMC_IBM,
491 .oprofile_cpu_type = "ppc64/power7",
492 .oprofile_type = PPC_OPROFILE_POWER4,
493 .cpu_setup = __setup_cpu_power7,
494 .cpu_restore = __restore_cpu_power7,
495 .platform = "power7+",
496 },
497 { /* Power8 */
498 .pvr_mask = 0xffff0000,
499 .pvr_value = 0x004b0000,
500 .cpu_name = "POWER8 (raw)",
501 .cpu_features = CPU_FTRS_POWER8,
502 .cpu_user_features = COMMON_USER_POWER8,
503 .cpu_user_features2 = COMMON_USER2_POWER8,
504 .mmu_features = MMU_FTRS_POWER8,
505 .icache_bsize = 128,
506 .dcache_bsize = 128,
507 .num_pmcs = 6,
508 .pmc_type = PPC_PMC_IBM,
509 .oprofile_cpu_type = 0,
510 .oprofile_type = PPC_OPROFILE_POWER4,
511 .cpu_setup = __setup_cpu_power8,
512 .cpu_restore = __restore_cpu_power8,
513 .platform = "power8",
514 },
515 { /* Cell Broadband Engine */
516 .pvr_mask = 0xffff0000,
517 .pvr_value = 0x00700000,
518 .cpu_name = "Cell Broadband Engine",
519 .cpu_features = CPU_FTRS_CELL,
520 .cpu_user_features = COMMON_USER_PPC64 |
521 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
522 PPC_FEATURE_SMT,
523 .mmu_features = MMU_FTRS_CELL,
524 .icache_bsize = 128,
525 .dcache_bsize = 128,
526 .num_pmcs = 4,
527 .pmc_type = PPC_PMC_IBM,
528 .oprofile_cpu_type = "ppc64/cell-be",
529 .oprofile_type = PPC_OPROFILE_CELL,
530 .platform = "ppc-cell-be",
531 },
532 { /* PA Semi PA6T */
533 .pvr_mask = 0x7fff0000,
534 .pvr_value = 0x00900000,
535 .cpu_name = "PA6T",
536 .cpu_features = CPU_FTRS_PA6T,
537 .cpu_user_features = COMMON_USER_PA6T,
538 .mmu_features = MMU_FTRS_PA6T,
539 .icache_bsize = 64,
540 .dcache_bsize = 64,
541 .num_pmcs = 6,
542 .pmc_type = PPC_PMC_PA6T,
543 .cpu_setup = __setup_cpu_pa6t,
544 .cpu_restore = __restore_cpu_pa6t,
545 .oprofile_cpu_type = "ppc64/pa6t",
546 .oprofile_type = PPC_OPROFILE_PA6T,
547 .platform = "pa6t",
548 },
549 { /* default match */
550 .pvr_mask = 0x00000000,
551 .pvr_value = 0x00000000,
552 .cpu_name = "POWER4 (compatible)",
553 .cpu_features = CPU_FTRS_COMPATIBLE,
554 .cpu_user_features = COMMON_USER_PPC64,
555 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
556 .icache_bsize = 128,
557 .dcache_bsize = 128,
558 .num_pmcs = 6,
559 .pmc_type = PPC_PMC_IBM,
560 .platform = "power4",
561 }
562 #endif /* CONFIG_PPC_BOOK3S_64 */
563
564 #ifdef CONFIG_PPC32
565 #if CLASSIC_PPC
566 { /* 601 */
567 .pvr_mask = 0xffff0000,
568 .pvr_value = 0x00010000,
569 .cpu_name = "601",
570 .cpu_features = CPU_FTRS_PPC601,
571 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
572 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
573 .mmu_features = MMU_FTR_HPTE_TABLE,
574 .icache_bsize = 32,
575 .dcache_bsize = 32,
576 .machine_check = machine_check_generic,
577 .platform = "ppc601",
578 },
579 { /* 603 */
580 .pvr_mask = 0xffff0000,
581 .pvr_value = 0x00030000,
582 .cpu_name = "603",
583 .cpu_features = CPU_FTRS_603,
584 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
585 .mmu_features = 0,
586 .icache_bsize = 32,
587 .dcache_bsize = 32,
588 .cpu_setup = __setup_cpu_603,
589 .machine_check = machine_check_generic,
590 .platform = "ppc603",
591 },
592 { /* 603e */
593 .pvr_mask = 0xffff0000,
594 .pvr_value = 0x00060000,
595 .cpu_name = "603e",
596 .cpu_features = CPU_FTRS_603,
597 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
598 .mmu_features = 0,
599 .icache_bsize = 32,
600 .dcache_bsize = 32,
601 .cpu_setup = __setup_cpu_603,
602 .machine_check = machine_check_generic,
603 .platform = "ppc603",
604 },
605 { /* 603ev */
606 .pvr_mask = 0xffff0000,
607 .pvr_value = 0x00070000,
608 .cpu_name = "603ev",
609 .cpu_features = CPU_FTRS_603,
610 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
611 .mmu_features = 0,
612 .icache_bsize = 32,
613 .dcache_bsize = 32,
614 .cpu_setup = __setup_cpu_603,
615 .machine_check = machine_check_generic,
616 .platform = "ppc603",
617 },
618 { /* 604 */
619 .pvr_mask = 0xffff0000,
620 .pvr_value = 0x00040000,
621 .cpu_name = "604",
622 .cpu_features = CPU_FTRS_604,
623 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
624 .mmu_features = MMU_FTR_HPTE_TABLE,
625 .icache_bsize = 32,
626 .dcache_bsize = 32,
627 .num_pmcs = 2,
628 .cpu_setup = __setup_cpu_604,
629 .machine_check = machine_check_generic,
630 .platform = "ppc604",
631 },
632 { /* 604e */
633 .pvr_mask = 0xfffff000,
634 .pvr_value = 0x00090000,
635 .cpu_name = "604e",
636 .cpu_features = CPU_FTRS_604,
637 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
638 .mmu_features = MMU_FTR_HPTE_TABLE,
639 .icache_bsize = 32,
640 .dcache_bsize = 32,
641 .num_pmcs = 4,
642 .cpu_setup = __setup_cpu_604,
643 .machine_check = machine_check_generic,
644 .platform = "ppc604",
645 },
646 { /* 604r */
647 .pvr_mask = 0xffff0000,
648 .pvr_value = 0x00090000,
649 .cpu_name = "604r",
650 .cpu_features = CPU_FTRS_604,
651 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
652 .mmu_features = MMU_FTR_HPTE_TABLE,
653 .icache_bsize = 32,
654 .dcache_bsize = 32,
655 .num_pmcs = 4,
656 .cpu_setup = __setup_cpu_604,
657 .machine_check = machine_check_generic,
658 .platform = "ppc604",
659 },
660 { /* 604ev */
661 .pvr_mask = 0xffff0000,
662 .pvr_value = 0x000a0000,
663 .cpu_name = "604ev",
664 .cpu_features = CPU_FTRS_604,
665 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
666 .mmu_features = MMU_FTR_HPTE_TABLE,
667 .icache_bsize = 32,
668 .dcache_bsize = 32,
669 .num_pmcs = 4,
670 .cpu_setup = __setup_cpu_604,
671 .machine_check = machine_check_generic,
672 .platform = "ppc604",
673 },
674 { /* 740/750 (0x4202, don't support TAU ?) */
675 .pvr_mask = 0xffffffff,
676 .pvr_value = 0x00084202,
677 .cpu_name = "740/750",
678 .cpu_features = CPU_FTRS_740_NOTAU,
679 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
680 .mmu_features = MMU_FTR_HPTE_TABLE,
681 .icache_bsize = 32,
682 .dcache_bsize = 32,
683 .num_pmcs = 4,
684 .cpu_setup = __setup_cpu_750,
685 .machine_check = machine_check_generic,
686 .platform = "ppc750",
687 },
688 { /* 750CX (80100 and 8010x?) */
689 .pvr_mask = 0xfffffff0,
690 .pvr_value = 0x00080100,
691 .cpu_name = "750CX",
692 .cpu_features = CPU_FTRS_750,
693 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
694 .mmu_features = MMU_FTR_HPTE_TABLE,
695 .icache_bsize = 32,
696 .dcache_bsize = 32,
697 .num_pmcs = 4,
698 .cpu_setup = __setup_cpu_750cx,
699 .machine_check = machine_check_generic,
700 .platform = "ppc750",
701 },
702 { /* 750CX (82201 and 82202) */
703 .pvr_mask = 0xfffffff0,
704 .pvr_value = 0x00082200,
705 .cpu_name = "750CX",
706 .cpu_features = CPU_FTRS_750,
707 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
708 .mmu_features = MMU_FTR_HPTE_TABLE,
709 .icache_bsize = 32,
710 .dcache_bsize = 32,
711 .num_pmcs = 4,
712 .pmc_type = PPC_PMC_IBM,
713 .cpu_setup = __setup_cpu_750cx,
714 .machine_check = machine_check_generic,
715 .platform = "ppc750",
716 },
717 { /* 750CXe (82214) */
718 .pvr_mask = 0xfffffff0,
719 .pvr_value = 0x00082210,
720 .cpu_name = "750CXe",
721 .cpu_features = CPU_FTRS_750,
722 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
723 .mmu_features = MMU_FTR_HPTE_TABLE,
724 .icache_bsize = 32,
725 .dcache_bsize = 32,
726 .num_pmcs = 4,
727 .pmc_type = PPC_PMC_IBM,
728 .cpu_setup = __setup_cpu_750cx,
729 .machine_check = machine_check_generic,
730 .platform = "ppc750",
731 },
732 { /* 750CXe "Gekko" (83214) */
733 .pvr_mask = 0xffffffff,
734 .pvr_value = 0x00083214,
735 .cpu_name = "750CXe",
736 .cpu_features = CPU_FTRS_750,
737 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
738 .mmu_features = MMU_FTR_HPTE_TABLE,
739 .icache_bsize = 32,
740 .dcache_bsize = 32,
741 .num_pmcs = 4,
742 .pmc_type = PPC_PMC_IBM,
743 .cpu_setup = __setup_cpu_750cx,
744 .machine_check = machine_check_generic,
745 .platform = "ppc750",
746 },
747 { /* 750CL (and "Broadway") */
748 .pvr_mask = 0xfffff0e0,
749 .pvr_value = 0x00087000,
750 .cpu_name = "750CL",
751 .cpu_features = CPU_FTRS_750CL,
752 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
753 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
754 .icache_bsize = 32,
755 .dcache_bsize = 32,
756 .num_pmcs = 4,
757 .pmc_type = PPC_PMC_IBM,
758 .cpu_setup = __setup_cpu_750,
759 .machine_check = machine_check_generic,
760 .platform = "ppc750",
761 .oprofile_cpu_type = "ppc/750",
762 .oprofile_type = PPC_OPROFILE_G4,
763 },
764 { /* 745/755 */
765 .pvr_mask = 0xfffff000,
766 .pvr_value = 0x00083000,
767 .cpu_name = "745/755",
768 .cpu_features = CPU_FTRS_750,
769 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
770 .mmu_features = MMU_FTR_HPTE_TABLE,
771 .icache_bsize = 32,
772 .dcache_bsize = 32,
773 .num_pmcs = 4,
774 .pmc_type = PPC_PMC_IBM,
775 .cpu_setup = __setup_cpu_750,
776 .machine_check = machine_check_generic,
777 .platform = "ppc750",
778 },
779 { /* 750FX rev 1.x */
780 .pvr_mask = 0xffffff00,
781 .pvr_value = 0x70000100,
782 .cpu_name = "750FX",
783 .cpu_features = CPU_FTRS_750FX1,
784 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
785 .mmu_features = MMU_FTR_HPTE_TABLE,
786 .icache_bsize = 32,
787 .dcache_bsize = 32,
788 .num_pmcs = 4,
789 .pmc_type = PPC_PMC_IBM,
790 .cpu_setup = __setup_cpu_750,
791 .machine_check = machine_check_generic,
792 .platform = "ppc750",
793 .oprofile_cpu_type = "ppc/750",
794 .oprofile_type = PPC_OPROFILE_G4,
795 },
796 { /* 750FX rev 2.0 must disable HID0[DPM] */
797 .pvr_mask = 0xffffffff,
798 .pvr_value = 0x70000200,
799 .cpu_name = "750FX",
800 .cpu_features = CPU_FTRS_750FX2,
801 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
802 .mmu_features = MMU_FTR_HPTE_TABLE,
803 .icache_bsize = 32,
804 .dcache_bsize = 32,
805 .num_pmcs = 4,
806 .pmc_type = PPC_PMC_IBM,
807 .cpu_setup = __setup_cpu_750,
808 .machine_check = machine_check_generic,
809 .platform = "ppc750",
810 .oprofile_cpu_type = "ppc/750",
811 .oprofile_type = PPC_OPROFILE_G4,
812 },
813 { /* 750FX (All revs except 2.0) */
814 .pvr_mask = 0xffff0000,
815 .pvr_value = 0x70000000,
816 .cpu_name = "750FX",
817 .cpu_features = CPU_FTRS_750FX,
818 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
819 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
820 .icache_bsize = 32,
821 .dcache_bsize = 32,
822 .num_pmcs = 4,
823 .pmc_type = PPC_PMC_IBM,
824 .cpu_setup = __setup_cpu_750fx,
825 .machine_check = machine_check_generic,
826 .platform = "ppc750",
827 .oprofile_cpu_type = "ppc/750",
828 .oprofile_type = PPC_OPROFILE_G4,
829 },
830 { /* 750GX */
831 .pvr_mask = 0xffff0000,
832 .pvr_value = 0x70020000,
833 .cpu_name = "750GX",
834 .cpu_features = CPU_FTRS_750GX,
835 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
836 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
837 .icache_bsize = 32,
838 .dcache_bsize = 32,
839 .num_pmcs = 4,
840 .pmc_type = PPC_PMC_IBM,
841 .cpu_setup = __setup_cpu_750fx,
842 .machine_check = machine_check_generic,
843 .platform = "ppc750",
844 .oprofile_cpu_type = "ppc/750",
845 .oprofile_type = PPC_OPROFILE_G4,
846 },
847 { /* 740/750 (L2CR bit need fixup for 740) */
848 .pvr_mask = 0xffff0000,
849 .pvr_value = 0x00080000,
850 .cpu_name = "740/750",
851 .cpu_features = CPU_FTRS_740,
852 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
853 .mmu_features = MMU_FTR_HPTE_TABLE,
854 .icache_bsize = 32,
855 .dcache_bsize = 32,
856 .num_pmcs = 4,
857 .pmc_type = PPC_PMC_IBM,
858 .cpu_setup = __setup_cpu_750,
859 .machine_check = machine_check_generic,
860 .platform = "ppc750",
861 },
862 { /* 7400 rev 1.1 ? (no TAU) */
863 .pvr_mask = 0xffffffff,
864 .pvr_value = 0x000c1101,
865 .cpu_name = "7400 (1.1)",
866 .cpu_features = CPU_FTRS_7400_NOTAU,
867 .cpu_user_features = COMMON_USER |
868 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
869 .mmu_features = MMU_FTR_HPTE_TABLE,
870 .icache_bsize = 32,
871 .dcache_bsize = 32,
872 .num_pmcs = 4,
873 .pmc_type = PPC_PMC_G4,
874 .cpu_setup = __setup_cpu_7400,
875 .machine_check = machine_check_generic,
876 .platform = "ppc7400",
877 },
878 { /* 7400 */
879 .pvr_mask = 0xffff0000,
880 .pvr_value = 0x000c0000,
881 .cpu_name = "7400",
882 .cpu_features = CPU_FTRS_7400,
883 .cpu_user_features = COMMON_USER |
884 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
885 .mmu_features = MMU_FTR_HPTE_TABLE,
886 .icache_bsize = 32,
887 .dcache_bsize = 32,
888 .num_pmcs = 4,
889 .pmc_type = PPC_PMC_G4,
890 .cpu_setup = __setup_cpu_7400,
891 .machine_check = machine_check_generic,
892 .platform = "ppc7400",
893 },
894 { /* 7410 */
895 .pvr_mask = 0xffff0000,
896 .pvr_value = 0x800c0000,
897 .cpu_name = "7410",
898 .cpu_features = CPU_FTRS_7400,
899 .cpu_user_features = COMMON_USER |
900 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
901 .mmu_features = MMU_FTR_HPTE_TABLE,
902 .icache_bsize = 32,
903 .dcache_bsize = 32,
904 .num_pmcs = 4,
905 .pmc_type = PPC_PMC_G4,
906 .cpu_setup = __setup_cpu_7410,
907 .machine_check = machine_check_generic,
908 .platform = "ppc7400",
909 },
910 { /* 7450 2.0 - no doze/nap */
911 .pvr_mask = 0xffffffff,
912 .pvr_value = 0x80000200,
913 .cpu_name = "7450",
914 .cpu_features = CPU_FTRS_7450_20,
915 .cpu_user_features = COMMON_USER |
916 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
917 .mmu_features = MMU_FTR_HPTE_TABLE,
918 .icache_bsize = 32,
919 .dcache_bsize = 32,
920 .num_pmcs = 6,
921 .pmc_type = PPC_PMC_G4,
922 .cpu_setup = __setup_cpu_745x,
923 .oprofile_cpu_type = "ppc/7450",
924 .oprofile_type = PPC_OPROFILE_G4,
925 .machine_check = machine_check_generic,
926 .platform = "ppc7450",
927 },
928 { /* 7450 2.1 */
929 .pvr_mask = 0xffffffff,
930 .pvr_value = 0x80000201,
931 .cpu_name = "7450",
932 .cpu_features = CPU_FTRS_7450_21,
933 .cpu_user_features = COMMON_USER |
934 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
935 .mmu_features = MMU_FTR_HPTE_TABLE,
936 .icache_bsize = 32,
937 .dcache_bsize = 32,
938 .num_pmcs = 6,
939 .pmc_type = PPC_PMC_G4,
940 .cpu_setup = __setup_cpu_745x,
941 .oprofile_cpu_type = "ppc/7450",
942 .oprofile_type = PPC_OPROFILE_G4,
943 .machine_check = machine_check_generic,
944 .platform = "ppc7450",
945 },
946 { /* 7450 2.3 and newer */
947 .pvr_mask = 0xffff0000,
948 .pvr_value = 0x80000000,
949 .cpu_name = "7450",
950 .cpu_features = CPU_FTRS_7450_23,
951 .cpu_user_features = COMMON_USER |
952 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
953 .mmu_features = MMU_FTR_HPTE_TABLE,
954 .icache_bsize = 32,
955 .dcache_bsize = 32,
956 .num_pmcs = 6,
957 .pmc_type = PPC_PMC_G4,
958 .cpu_setup = __setup_cpu_745x,
959 .oprofile_cpu_type = "ppc/7450",
960 .oprofile_type = PPC_OPROFILE_G4,
961 .machine_check = machine_check_generic,
962 .platform = "ppc7450",
963 },
964 { /* 7455 rev 1.x */
965 .pvr_mask = 0xffffff00,
966 .pvr_value = 0x80010100,
967 .cpu_name = "7455",
968 .cpu_features = CPU_FTRS_7455_1,
969 .cpu_user_features = COMMON_USER |
970 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
971 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
972 .icache_bsize = 32,
973 .dcache_bsize = 32,
974 .num_pmcs = 6,
975 .pmc_type = PPC_PMC_G4,
976 .cpu_setup = __setup_cpu_745x,
977 .oprofile_cpu_type = "ppc/7450",
978 .oprofile_type = PPC_OPROFILE_G4,
979 .machine_check = machine_check_generic,
980 .platform = "ppc7450",
981 },
982 { /* 7455 rev 2.0 */
983 .pvr_mask = 0xffffffff,
984 .pvr_value = 0x80010200,
985 .cpu_name = "7455",
986 .cpu_features = CPU_FTRS_7455_20,
987 .cpu_user_features = COMMON_USER |
988 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
989 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
990 .icache_bsize = 32,
991 .dcache_bsize = 32,
992 .num_pmcs = 6,
993 .pmc_type = PPC_PMC_G4,
994 .cpu_setup = __setup_cpu_745x,
995 .oprofile_cpu_type = "ppc/7450",
996 .oprofile_type = PPC_OPROFILE_G4,
997 .machine_check = machine_check_generic,
998 .platform = "ppc7450",
999 },
1000 { /* 7455 others */
1001 .pvr_mask = 0xffff0000,
1002 .pvr_value = 0x80010000,
1003 .cpu_name = "7455",
1004 .cpu_features = CPU_FTRS_7455,
1005 .cpu_user_features = COMMON_USER |
1006 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1007 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1008 .icache_bsize = 32,
1009 .dcache_bsize = 32,
1010 .num_pmcs = 6,
1011 .pmc_type = PPC_PMC_G4,
1012 .cpu_setup = __setup_cpu_745x,
1013 .oprofile_cpu_type = "ppc/7450",
1014 .oprofile_type = PPC_OPROFILE_G4,
1015 .machine_check = machine_check_generic,
1016 .platform = "ppc7450",
1017 },
1018 { /* 7447/7457 Rev 1.0 */
1019 .pvr_mask = 0xffffffff,
1020 .pvr_value = 0x80020100,
1021 .cpu_name = "7447/7457",
1022 .cpu_features = CPU_FTRS_7447_10,
1023 .cpu_user_features = COMMON_USER |
1024 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1025 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1026 .icache_bsize = 32,
1027 .dcache_bsize = 32,
1028 .num_pmcs = 6,
1029 .pmc_type = PPC_PMC_G4,
1030 .cpu_setup = __setup_cpu_745x,
1031 .oprofile_cpu_type = "ppc/7450",
1032 .oprofile_type = PPC_OPROFILE_G4,
1033 .machine_check = machine_check_generic,
1034 .platform = "ppc7450",
1035 },
1036 { /* 7447/7457 Rev 1.1 */
1037 .pvr_mask = 0xffffffff,
1038 .pvr_value = 0x80020101,
1039 .cpu_name = "7447/7457",
1040 .cpu_features = CPU_FTRS_7447_10,
1041 .cpu_user_features = COMMON_USER |
1042 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1043 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1044 .icache_bsize = 32,
1045 .dcache_bsize = 32,
1046 .num_pmcs = 6,
1047 .pmc_type = PPC_PMC_G4,
1048 .cpu_setup = __setup_cpu_745x,
1049 .oprofile_cpu_type = "ppc/7450",
1050 .oprofile_type = PPC_OPROFILE_G4,
1051 .machine_check = machine_check_generic,
1052 .platform = "ppc7450",
1053 },
1054 { /* 7447/7457 Rev 1.2 and later */
1055 .pvr_mask = 0xffff0000,
1056 .pvr_value = 0x80020000,
1057 .cpu_name = "7447/7457",
1058 .cpu_features = CPU_FTRS_7447,
1059 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1060 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1061 .icache_bsize = 32,
1062 .dcache_bsize = 32,
1063 .num_pmcs = 6,
1064 .pmc_type = PPC_PMC_G4,
1065 .cpu_setup = __setup_cpu_745x,
1066 .oprofile_cpu_type = "ppc/7450",
1067 .oprofile_type = PPC_OPROFILE_G4,
1068 .machine_check = machine_check_generic,
1069 .platform = "ppc7450",
1070 },
1071 { /* 7447A */
1072 .pvr_mask = 0xffff0000,
1073 .pvr_value = 0x80030000,
1074 .cpu_name = "7447A",
1075 .cpu_features = CPU_FTRS_7447A,
1076 .cpu_user_features = COMMON_USER |
1077 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1078 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1079 .icache_bsize = 32,
1080 .dcache_bsize = 32,
1081 .num_pmcs = 6,
1082 .pmc_type = PPC_PMC_G4,
1083 .cpu_setup = __setup_cpu_745x,
1084 .oprofile_cpu_type = "ppc/7450",
1085 .oprofile_type = PPC_OPROFILE_G4,
1086 .machine_check = machine_check_generic,
1087 .platform = "ppc7450",
1088 },
1089 { /* 7448 */
1090 .pvr_mask = 0xffff0000,
1091 .pvr_value = 0x80040000,
1092 .cpu_name = "7448",
1093 .cpu_features = CPU_FTRS_7448,
1094 .cpu_user_features = COMMON_USER |
1095 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1096 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1097 .icache_bsize = 32,
1098 .dcache_bsize = 32,
1099 .num_pmcs = 6,
1100 .pmc_type = PPC_PMC_G4,
1101 .cpu_setup = __setup_cpu_745x,
1102 .oprofile_cpu_type = "ppc/7450",
1103 .oprofile_type = PPC_OPROFILE_G4,
1104 .machine_check = machine_check_generic,
1105 .platform = "ppc7450",
1106 },
1107 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1108 .pvr_mask = 0x7fff0000,
1109 .pvr_value = 0x00810000,
1110 .cpu_name = "82xx",
1111 .cpu_features = CPU_FTRS_82XX,
1112 .cpu_user_features = COMMON_USER,
1113 .mmu_features = 0,
1114 .icache_bsize = 32,
1115 .dcache_bsize = 32,
1116 .cpu_setup = __setup_cpu_603,
1117 .machine_check = machine_check_generic,
1118 .platform = "ppc603",
1119 },
1120 { /* All G2_LE (603e core, plus some) have the same pvr */
1121 .pvr_mask = 0x7fff0000,
1122 .pvr_value = 0x00820000,
1123 .cpu_name = "G2_LE",
1124 .cpu_features = CPU_FTRS_G2_LE,
1125 .cpu_user_features = COMMON_USER,
1126 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1127 .icache_bsize = 32,
1128 .dcache_bsize = 32,
1129 .cpu_setup = __setup_cpu_603,
1130 .machine_check = machine_check_generic,
1131 .platform = "ppc603",
1132 },
1133 { /* e300c1 (a 603e core, plus some) on 83xx */
1134 .pvr_mask = 0x7fff0000,
1135 .pvr_value = 0x00830000,
1136 .cpu_name = "e300c1",
1137 .cpu_features = CPU_FTRS_E300,
1138 .cpu_user_features = COMMON_USER,
1139 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1140 .icache_bsize = 32,
1141 .dcache_bsize = 32,
1142 .cpu_setup = __setup_cpu_603,
1143 .machine_check = machine_check_generic,
1144 .platform = "ppc603",
1145 },
1146 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1147 .pvr_mask = 0x7fff0000,
1148 .pvr_value = 0x00840000,
1149 .cpu_name = "e300c2",
1150 .cpu_features = CPU_FTRS_E300C2,
1151 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1152 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1153 MMU_FTR_NEED_DTLB_SW_LRU,
1154 .icache_bsize = 32,
1155 .dcache_bsize = 32,
1156 .cpu_setup = __setup_cpu_603,
1157 .machine_check = machine_check_generic,
1158 .platform = "ppc603",
1159 },
1160 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1161 .pvr_mask = 0x7fff0000,
1162 .pvr_value = 0x00850000,
1163 .cpu_name = "e300c3",
1164 .cpu_features = CPU_FTRS_E300,
1165 .cpu_user_features = COMMON_USER,
1166 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1167 MMU_FTR_NEED_DTLB_SW_LRU,
1168 .icache_bsize = 32,
1169 .dcache_bsize = 32,
1170 .cpu_setup = __setup_cpu_603,
1171 .num_pmcs = 4,
1172 .oprofile_cpu_type = "ppc/e300",
1173 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1174 .platform = "ppc603",
1175 },
1176 { /* e300c4 (e300c1, plus one IU) */
1177 .pvr_mask = 0x7fff0000,
1178 .pvr_value = 0x00860000,
1179 .cpu_name = "e300c4",
1180 .cpu_features = CPU_FTRS_E300,
1181 .cpu_user_features = COMMON_USER,
1182 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1183 MMU_FTR_NEED_DTLB_SW_LRU,
1184 .icache_bsize = 32,
1185 .dcache_bsize = 32,
1186 .cpu_setup = __setup_cpu_603,
1187 .machine_check = machine_check_generic,
1188 .num_pmcs = 4,
1189 .oprofile_cpu_type = "ppc/e300",
1190 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1191 .platform = "ppc603",
1192 },
1193 { /* default match, we assume split I/D cache & TB (non-601)... */
1194 .pvr_mask = 0x00000000,
1195 .pvr_value = 0x00000000,
1196 .cpu_name = "(generic PPC)",
1197 .cpu_features = CPU_FTRS_CLASSIC32,
1198 .cpu_user_features = COMMON_USER,
1199 .mmu_features = MMU_FTR_HPTE_TABLE,
1200 .icache_bsize = 32,
1201 .dcache_bsize = 32,
1202 .machine_check = machine_check_generic,
1203 .platform = "ppc603",
1204 },
1205 #endif /* CLASSIC_PPC */
1206 #ifdef CONFIG_8xx
1207 { /* 8xx */
1208 .pvr_mask = 0xffff0000,
1209 .pvr_value = 0x00500000,
1210 .cpu_name = "8xx",
1211 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1212 * if the 8xx code is there.... */
1213 .cpu_features = CPU_FTRS_8XX,
1214 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1215 .mmu_features = MMU_FTR_TYPE_8xx,
1216 .icache_bsize = 16,
1217 .dcache_bsize = 16,
1218 .platform = "ppc823",
1219 },
1220 #endif /* CONFIG_8xx */
1221 #ifdef CONFIG_40x
1222 { /* 403GC */
1223 .pvr_mask = 0xffffff00,
1224 .pvr_value = 0x00200200,
1225 .cpu_name = "403GC",
1226 .cpu_features = CPU_FTRS_40X,
1227 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1228 .mmu_features = MMU_FTR_TYPE_40x,
1229 .icache_bsize = 16,
1230 .dcache_bsize = 16,
1231 .machine_check = machine_check_4xx,
1232 .platform = "ppc403",
1233 },
1234 { /* 403GCX */
1235 .pvr_mask = 0xffffff00,
1236 .pvr_value = 0x00201400,
1237 .cpu_name = "403GCX",
1238 .cpu_features = CPU_FTRS_40X,
1239 .cpu_user_features = PPC_FEATURE_32 |
1240 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1241 .mmu_features = MMU_FTR_TYPE_40x,
1242 .icache_bsize = 16,
1243 .dcache_bsize = 16,
1244 .machine_check = machine_check_4xx,
1245 .platform = "ppc403",
1246 },
1247 { /* 403G ?? */
1248 .pvr_mask = 0xffff0000,
1249 .pvr_value = 0x00200000,
1250 .cpu_name = "403G ??",
1251 .cpu_features = CPU_FTRS_40X,
1252 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1253 .mmu_features = MMU_FTR_TYPE_40x,
1254 .icache_bsize = 16,
1255 .dcache_bsize = 16,
1256 .machine_check = machine_check_4xx,
1257 .platform = "ppc403",
1258 },
1259 { /* 405GP */
1260 .pvr_mask = 0xffff0000,
1261 .pvr_value = 0x40110000,
1262 .cpu_name = "405GP",
1263 .cpu_features = CPU_FTRS_40X,
1264 .cpu_user_features = PPC_FEATURE_32 |
1265 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1266 .mmu_features = MMU_FTR_TYPE_40x,
1267 .icache_bsize = 32,
1268 .dcache_bsize = 32,
1269 .machine_check = machine_check_4xx,
1270 .platform = "ppc405",
1271 },
1272 { /* STB 03xxx */
1273 .pvr_mask = 0xffff0000,
1274 .pvr_value = 0x40130000,
1275 .cpu_name = "STB03xxx",
1276 .cpu_features = CPU_FTRS_40X,
1277 .cpu_user_features = PPC_FEATURE_32 |
1278 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1279 .mmu_features = MMU_FTR_TYPE_40x,
1280 .icache_bsize = 32,
1281 .dcache_bsize = 32,
1282 .machine_check = machine_check_4xx,
1283 .platform = "ppc405",
1284 },
1285 { /* STB 04xxx */
1286 .pvr_mask = 0xffff0000,
1287 .pvr_value = 0x41810000,
1288 .cpu_name = "STB04xxx",
1289 .cpu_features = CPU_FTRS_40X,
1290 .cpu_user_features = PPC_FEATURE_32 |
1291 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1292 .mmu_features = MMU_FTR_TYPE_40x,
1293 .icache_bsize = 32,
1294 .dcache_bsize = 32,
1295 .machine_check = machine_check_4xx,
1296 .platform = "ppc405",
1297 },
1298 { /* NP405L */
1299 .pvr_mask = 0xffff0000,
1300 .pvr_value = 0x41610000,
1301 .cpu_name = "NP405L",
1302 .cpu_features = CPU_FTRS_40X,
1303 .cpu_user_features = PPC_FEATURE_32 |
1304 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1305 .mmu_features = MMU_FTR_TYPE_40x,
1306 .icache_bsize = 32,
1307 .dcache_bsize = 32,
1308 .machine_check = machine_check_4xx,
1309 .platform = "ppc405",
1310 },
1311 { /* NP4GS3 */
1312 .pvr_mask = 0xffff0000,
1313 .pvr_value = 0x40B10000,
1314 .cpu_name = "NP4GS3",
1315 .cpu_features = CPU_FTRS_40X,
1316 .cpu_user_features = PPC_FEATURE_32 |
1317 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1318 .mmu_features = MMU_FTR_TYPE_40x,
1319 .icache_bsize = 32,
1320 .dcache_bsize = 32,
1321 .machine_check = machine_check_4xx,
1322 .platform = "ppc405",
1323 },
1324 { /* NP405H */
1325 .pvr_mask = 0xffff0000,
1326 .pvr_value = 0x41410000,
1327 .cpu_name = "NP405H",
1328 .cpu_features = CPU_FTRS_40X,
1329 .cpu_user_features = PPC_FEATURE_32 |
1330 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1331 .mmu_features = MMU_FTR_TYPE_40x,
1332 .icache_bsize = 32,
1333 .dcache_bsize = 32,
1334 .machine_check = machine_check_4xx,
1335 .platform = "ppc405",
1336 },
1337 { /* 405GPr */
1338 .pvr_mask = 0xffff0000,
1339 .pvr_value = 0x50910000,
1340 .cpu_name = "405GPr",
1341 .cpu_features = CPU_FTRS_40X,
1342 .cpu_user_features = PPC_FEATURE_32 |
1343 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1344 .mmu_features = MMU_FTR_TYPE_40x,
1345 .icache_bsize = 32,
1346 .dcache_bsize = 32,
1347 .machine_check = machine_check_4xx,
1348 .platform = "ppc405",
1349 },
1350 { /* STBx25xx */
1351 .pvr_mask = 0xffff0000,
1352 .pvr_value = 0x51510000,
1353 .cpu_name = "STBx25xx",
1354 .cpu_features = CPU_FTRS_40X,
1355 .cpu_user_features = PPC_FEATURE_32 |
1356 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1357 .mmu_features = MMU_FTR_TYPE_40x,
1358 .icache_bsize = 32,
1359 .dcache_bsize = 32,
1360 .machine_check = machine_check_4xx,
1361 .platform = "ppc405",
1362 },
1363 { /* 405LP */
1364 .pvr_mask = 0xffff0000,
1365 .pvr_value = 0x41F10000,
1366 .cpu_name = "405LP",
1367 .cpu_features = CPU_FTRS_40X,
1368 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1369 .mmu_features = MMU_FTR_TYPE_40x,
1370 .icache_bsize = 32,
1371 .dcache_bsize = 32,
1372 .machine_check = machine_check_4xx,
1373 .platform = "ppc405",
1374 },
1375 { /* Xilinx Virtex-II Pro */
1376 .pvr_mask = 0xfffff000,
1377 .pvr_value = 0x20010000,
1378 .cpu_name = "Virtex-II Pro",
1379 .cpu_features = CPU_FTRS_40X,
1380 .cpu_user_features = PPC_FEATURE_32 |
1381 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1382 .mmu_features = MMU_FTR_TYPE_40x,
1383 .icache_bsize = 32,
1384 .dcache_bsize = 32,
1385 .machine_check = machine_check_4xx,
1386 .platform = "ppc405",
1387 },
1388 { /* Xilinx Virtex-4 FX */
1389 .pvr_mask = 0xfffff000,
1390 .pvr_value = 0x20011000,
1391 .cpu_name = "Virtex-4 FX",
1392 .cpu_features = CPU_FTRS_40X,
1393 .cpu_user_features = PPC_FEATURE_32 |
1394 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1395 .mmu_features = MMU_FTR_TYPE_40x,
1396 .icache_bsize = 32,
1397 .dcache_bsize = 32,
1398 .machine_check = machine_check_4xx,
1399 .platform = "ppc405",
1400 },
1401 { /* 405EP */
1402 .pvr_mask = 0xffff0000,
1403 .pvr_value = 0x51210000,
1404 .cpu_name = "405EP",
1405 .cpu_features = CPU_FTRS_40X,
1406 .cpu_user_features = PPC_FEATURE_32 |
1407 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1408 .mmu_features = MMU_FTR_TYPE_40x,
1409 .icache_bsize = 32,
1410 .dcache_bsize = 32,
1411 .machine_check = machine_check_4xx,
1412 .platform = "ppc405",
1413 },
1414 { /* 405EX Rev. A/B with Security */
1415 .pvr_mask = 0xffff000f,
1416 .pvr_value = 0x12910007,
1417 .cpu_name = "405EX Rev. A/B",
1418 .cpu_features = CPU_FTRS_40X,
1419 .cpu_user_features = PPC_FEATURE_32 |
1420 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1421 .mmu_features = MMU_FTR_TYPE_40x,
1422 .icache_bsize = 32,
1423 .dcache_bsize = 32,
1424 .machine_check = machine_check_4xx,
1425 .platform = "ppc405",
1426 },
1427 { /* 405EX Rev. C without Security */
1428 .pvr_mask = 0xffff000f,
1429 .pvr_value = 0x1291000d,
1430 .cpu_name = "405EX Rev. C",
1431 .cpu_features = CPU_FTRS_40X,
1432 .cpu_user_features = PPC_FEATURE_32 |
1433 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1434 .mmu_features = MMU_FTR_TYPE_40x,
1435 .icache_bsize = 32,
1436 .dcache_bsize = 32,
1437 .machine_check = machine_check_4xx,
1438 .platform = "ppc405",
1439 },
1440 { /* 405EX Rev. C with Security */
1441 .pvr_mask = 0xffff000f,
1442 .pvr_value = 0x1291000f,
1443 .cpu_name = "405EX Rev. C",
1444 .cpu_features = CPU_FTRS_40X,
1445 .cpu_user_features = PPC_FEATURE_32 |
1446 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1447 .mmu_features = MMU_FTR_TYPE_40x,
1448 .icache_bsize = 32,
1449 .dcache_bsize = 32,
1450 .machine_check = machine_check_4xx,
1451 .platform = "ppc405",
1452 },
1453 { /* 405EX Rev. D without Security */
1454 .pvr_mask = 0xffff000f,
1455 .pvr_value = 0x12910003,
1456 .cpu_name = "405EX Rev. D",
1457 .cpu_features = CPU_FTRS_40X,
1458 .cpu_user_features = PPC_FEATURE_32 |
1459 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1460 .mmu_features = MMU_FTR_TYPE_40x,
1461 .icache_bsize = 32,
1462 .dcache_bsize = 32,
1463 .machine_check = machine_check_4xx,
1464 .platform = "ppc405",
1465 },
1466 { /* 405EX Rev. D with Security */
1467 .pvr_mask = 0xffff000f,
1468 .pvr_value = 0x12910005,
1469 .cpu_name = "405EX Rev. D",
1470 .cpu_features = CPU_FTRS_40X,
1471 .cpu_user_features = PPC_FEATURE_32 |
1472 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1473 .mmu_features = MMU_FTR_TYPE_40x,
1474 .icache_bsize = 32,
1475 .dcache_bsize = 32,
1476 .machine_check = machine_check_4xx,
1477 .platform = "ppc405",
1478 },
1479 { /* 405EXr Rev. A/B without Security */
1480 .pvr_mask = 0xffff000f,
1481 .pvr_value = 0x12910001,
1482 .cpu_name = "405EXr Rev. A/B",
1483 .cpu_features = CPU_FTRS_40X,
1484 .cpu_user_features = PPC_FEATURE_32 |
1485 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1486 .mmu_features = MMU_FTR_TYPE_40x,
1487 .icache_bsize = 32,
1488 .dcache_bsize = 32,
1489 .machine_check = machine_check_4xx,
1490 .platform = "ppc405",
1491 },
1492 { /* 405EXr Rev. C without Security */
1493 .pvr_mask = 0xffff000f,
1494 .pvr_value = 0x12910009,
1495 .cpu_name = "405EXr Rev. C",
1496 .cpu_features = CPU_FTRS_40X,
1497 .cpu_user_features = PPC_FEATURE_32 |
1498 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1499 .mmu_features = MMU_FTR_TYPE_40x,
1500 .icache_bsize = 32,
1501 .dcache_bsize = 32,
1502 .machine_check = machine_check_4xx,
1503 .platform = "ppc405",
1504 },
1505 { /* 405EXr Rev. C with Security */
1506 .pvr_mask = 0xffff000f,
1507 .pvr_value = 0x1291000b,
1508 .cpu_name = "405EXr Rev. C",
1509 .cpu_features = CPU_FTRS_40X,
1510 .cpu_user_features = PPC_FEATURE_32 |
1511 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1512 .mmu_features = MMU_FTR_TYPE_40x,
1513 .icache_bsize = 32,
1514 .dcache_bsize = 32,
1515 .machine_check = machine_check_4xx,
1516 .platform = "ppc405",
1517 },
1518 { /* 405EXr Rev. D without Security */
1519 .pvr_mask = 0xffff000f,
1520 .pvr_value = 0x12910000,
1521 .cpu_name = "405EXr Rev. D",
1522 .cpu_features = CPU_FTRS_40X,
1523 .cpu_user_features = PPC_FEATURE_32 |
1524 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1525 .mmu_features = MMU_FTR_TYPE_40x,
1526 .icache_bsize = 32,
1527 .dcache_bsize = 32,
1528 .machine_check = machine_check_4xx,
1529 .platform = "ppc405",
1530 },
1531 { /* 405EXr Rev. D with Security */
1532 .pvr_mask = 0xffff000f,
1533 .pvr_value = 0x12910002,
1534 .cpu_name = "405EXr Rev. D",
1535 .cpu_features = CPU_FTRS_40X,
1536 .cpu_user_features = PPC_FEATURE_32 |
1537 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1538 .mmu_features = MMU_FTR_TYPE_40x,
1539 .icache_bsize = 32,
1540 .dcache_bsize = 32,
1541 .machine_check = machine_check_4xx,
1542 .platform = "ppc405",
1543 },
1544 {
1545 /* 405EZ */
1546 .pvr_mask = 0xffff0000,
1547 .pvr_value = 0x41510000,
1548 .cpu_name = "405EZ",
1549 .cpu_features = CPU_FTRS_40X,
1550 .cpu_user_features = PPC_FEATURE_32 |
1551 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1552 .mmu_features = MMU_FTR_TYPE_40x,
1553 .icache_bsize = 32,
1554 .dcache_bsize = 32,
1555 .machine_check = machine_check_4xx,
1556 .platform = "ppc405",
1557 },
1558 { /* APM8018X */
1559 .pvr_mask = 0xffff0000,
1560 .pvr_value = 0x7ff11432,
1561 .cpu_name = "APM8018X",
1562 .cpu_features = CPU_FTRS_40X,
1563 .cpu_user_features = PPC_FEATURE_32 |
1564 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1565 .mmu_features = MMU_FTR_TYPE_40x,
1566 .icache_bsize = 32,
1567 .dcache_bsize = 32,
1568 .machine_check = machine_check_4xx,
1569 .platform = "ppc405",
1570 },
1571 { /* default match */
1572 .pvr_mask = 0x00000000,
1573 .pvr_value = 0x00000000,
1574 .cpu_name = "(generic 40x PPC)",
1575 .cpu_features = CPU_FTRS_40X,
1576 .cpu_user_features = PPC_FEATURE_32 |
1577 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1578 .mmu_features = MMU_FTR_TYPE_40x,
1579 .icache_bsize = 32,
1580 .dcache_bsize = 32,
1581 .machine_check = machine_check_4xx,
1582 .platform = "ppc405",
1583 }
1584
1585 #endif /* CONFIG_40x */
1586 #ifdef CONFIG_44x
1587 {
1588 .pvr_mask = 0xf0000fff,
1589 .pvr_value = 0x40000850,
1590 .cpu_name = "440GR Rev. A",
1591 .cpu_features = CPU_FTRS_44X,
1592 .cpu_user_features = COMMON_USER_BOOKE,
1593 .mmu_features = MMU_FTR_TYPE_44x,
1594 .icache_bsize = 32,
1595 .dcache_bsize = 32,
1596 .machine_check = machine_check_4xx,
1597 .platform = "ppc440",
1598 },
1599 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1600 .pvr_mask = 0xf0000fff,
1601 .pvr_value = 0x40000858,
1602 .cpu_name = "440EP Rev. A",
1603 .cpu_features = CPU_FTRS_44X,
1604 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1605 .mmu_features = MMU_FTR_TYPE_44x,
1606 .icache_bsize = 32,
1607 .dcache_bsize = 32,
1608 .cpu_setup = __setup_cpu_440ep,
1609 .machine_check = machine_check_4xx,
1610 .platform = "ppc440",
1611 },
1612 {
1613 .pvr_mask = 0xf0000fff,
1614 .pvr_value = 0x400008d3,
1615 .cpu_name = "440GR Rev. B",
1616 .cpu_features = CPU_FTRS_44X,
1617 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1618 .mmu_features = MMU_FTR_TYPE_44x,
1619 .icache_bsize = 32,
1620 .dcache_bsize = 32,
1621 .machine_check = machine_check_4xx,
1622 .platform = "ppc440",
1623 },
1624 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1625 .pvr_mask = 0xf0000ff7,
1626 .pvr_value = 0x400008d4,
1627 .cpu_name = "440EP Rev. C",
1628 .cpu_features = CPU_FTRS_44X,
1629 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1630 .mmu_features = MMU_FTR_TYPE_44x,
1631 .icache_bsize = 32,
1632 .dcache_bsize = 32,
1633 .cpu_setup = __setup_cpu_440ep,
1634 .machine_check = machine_check_4xx,
1635 .platform = "ppc440",
1636 },
1637 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1638 .pvr_mask = 0xf0000fff,
1639 .pvr_value = 0x400008db,
1640 .cpu_name = "440EP Rev. B",
1641 .cpu_features = CPU_FTRS_44X,
1642 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1643 .mmu_features = MMU_FTR_TYPE_44x,
1644 .icache_bsize = 32,
1645 .dcache_bsize = 32,
1646 .cpu_setup = __setup_cpu_440ep,
1647 .machine_check = machine_check_4xx,
1648 .platform = "ppc440",
1649 },
1650 { /* 440GRX */
1651 .pvr_mask = 0xf0000ffb,
1652 .pvr_value = 0x200008D0,
1653 .cpu_name = "440GRX",
1654 .cpu_features = CPU_FTRS_44X,
1655 .cpu_user_features = COMMON_USER_BOOKE,
1656 .mmu_features = MMU_FTR_TYPE_44x,
1657 .icache_bsize = 32,
1658 .dcache_bsize = 32,
1659 .cpu_setup = __setup_cpu_440grx,
1660 .machine_check = machine_check_440A,
1661 .platform = "ppc440",
1662 },
1663 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1664 .pvr_mask = 0xf0000ffb,
1665 .pvr_value = 0x200008D8,
1666 .cpu_name = "440EPX",
1667 .cpu_features = CPU_FTRS_44X,
1668 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1669 .mmu_features = MMU_FTR_TYPE_44x,
1670 .icache_bsize = 32,
1671 .dcache_bsize = 32,
1672 .cpu_setup = __setup_cpu_440epx,
1673 .machine_check = machine_check_440A,
1674 .platform = "ppc440",
1675 },
1676 { /* 440GP Rev. B */
1677 .pvr_mask = 0xf0000fff,
1678 .pvr_value = 0x40000440,
1679 .cpu_name = "440GP Rev. B",
1680 .cpu_features = CPU_FTRS_44X,
1681 .cpu_user_features = COMMON_USER_BOOKE,
1682 .mmu_features = MMU_FTR_TYPE_44x,
1683 .icache_bsize = 32,
1684 .dcache_bsize = 32,
1685 .machine_check = machine_check_4xx,
1686 .platform = "ppc440gp",
1687 },
1688 { /* 440GP Rev. C */
1689 .pvr_mask = 0xf0000fff,
1690 .pvr_value = 0x40000481,
1691 .cpu_name = "440GP Rev. C",
1692 .cpu_features = CPU_FTRS_44X,
1693 .cpu_user_features = COMMON_USER_BOOKE,
1694 .mmu_features = MMU_FTR_TYPE_44x,
1695 .icache_bsize = 32,
1696 .dcache_bsize = 32,
1697 .machine_check = machine_check_4xx,
1698 .platform = "ppc440gp",
1699 },
1700 { /* 440GX Rev. A */
1701 .pvr_mask = 0xf0000fff,
1702 .pvr_value = 0x50000850,
1703 .cpu_name = "440GX Rev. A",
1704 .cpu_features = CPU_FTRS_44X,
1705 .cpu_user_features = COMMON_USER_BOOKE,
1706 .mmu_features = MMU_FTR_TYPE_44x,
1707 .icache_bsize = 32,
1708 .dcache_bsize = 32,
1709 .cpu_setup = __setup_cpu_440gx,
1710 .machine_check = machine_check_440A,
1711 .platform = "ppc440",
1712 },
1713 { /* 440GX Rev. B */
1714 .pvr_mask = 0xf0000fff,
1715 .pvr_value = 0x50000851,
1716 .cpu_name = "440GX Rev. B",
1717 .cpu_features = CPU_FTRS_44X,
1718 .cpu_user_features = COMMON_USER_BOOKE,
1719 .mmu_features = MMU_FTR_TYPE_44x,
1720 .icache_bsize = 32,
1721 .dcache_bsize = 32,
1722 .cpu_setup = __setup_cpu_440gx,
1723 .machine_check = machine_check_440A,
1724 .platform = "ppc440",
1725 },
1726 { /* 440GX Rev. C */
1727 .pvr_mask = 0xf0000fff,
1728 .pvr_value = 0x50000892,
1729 .cpu_name = "440GX Rev. C",
1730 .cpu_features = CPU_FTRS_44X,
1731 .cpu_user_features = COMMON_USER_BOOKE,
1732 .mmu_features = MMU_FTR_TYPE_44x,
1733 .icache_bsize = 32,
1734 .dcache_bsize = 32,
1735 .cpu_setup = __setup_cpu_440gx,
1736 .machine_check = machine_check_440A,
1737 .platform = "ppc440",
1738 },
1739 { /* 440GX Rev. F */
1740 .pvr_mask = 0xf0000fff,
1741 .pvr_value = 0x50000894,
1742 .cpu_name = "440GX Rev. F",
1743 .cpu_features = CPU_FTRS_44X,
1744 .cpu_user_features = COMMON_USER_BOOKE,
1745 .mmu_features = MMU_FTR_TYPE_44x,
1746 .icache_bsize = 32,
1747 .dcache_bsize = 32,
1748 .cpu_setup = __setup_cpu_440gx,
1749 .machine_check = machine_check_440A,
1750 .platform = "ppc440",
1751 },
1752 { /* 440SP Rev. A */
1753 .pvr_mask = 0xfff00fff,
1754 .pvr_value = 0x53200891,
1755 .cpu_name = "440SP Rev. A",
1756 .cpu_features = CPU_FTRS_44X,
1757 .cpu_user_features = COMMON_USER_BOOKE,
1758 .mmu_features = MMU_FTR_TYPE_44x,
1759 .icache_bsize = 32,
1760 .dcache_bsize = 32,
1761 .machine_check = machine_check_4xx,
1762 .platform = "ppc440",
1763 },
1764 { /* 440SPe Rev. A */
1765 .pvr_mask = 0xfff00fff,
1766 .pvr_value = 0x53400890,
1767 .cpu_name = "440SPe Rev. A",
1768 .cpu_features = CPU_FTRS_44X,
1769 .cpu_user_features = COMMON_USER_BOOKE,
1770 .mmu_features = MMU_FTR_TYPE_44x,
1771 .icache_bsize = 32,
1772 .dcache_bsize = 32,
1773 .cpu_setup = __setup_cpu_440spe,
1774 .machine_check = machine_check_440A,
1775 .platform = "ppc440",
1776 },
1777 { /* 440SPe Rev. B */
1778 .pvr_mask = 0xfff00fff,
1779 .pvr_value = 0x53400891,
1780 .cpu_name = "440SPe Rev. B",
1781 .cpu_features = CPU_FTRS_44X,
1782 .cpu_user_features = COMMON_USER_BOOKE,
1783 .mmu_features = MMU_FTR_TYPE_44x,
1784 .icache_bsize = 32,
1785 .dcache_bsize = 32,
1786 .cpu_setup = __setup_cpu_440spe,
1787 .machine_check = machine_check_440A,
1788 .platform = "ppc440",
1789 },
1790 { /* 440 in Xilinx Virtex-5 FXT */
1791 .pvr_mask = 0xfffffff0,
1792 .pvr_value = 0x7ff21910,
1793 .cpu_name = "440 in Virtex-5 FXT",
1794 .cpu_features = CPU_FTRS_44X,
1795 .cpu_user_features = COMMON_USER_BOOKE,
1796 .mmu_features = MMU_FTR_TYPE_44x,
1797 .icache_bsize = 32,
1798 .dcache_bsize = 32,
1799 .cpu_setup = __setup_cpu_440x5,
1800 .machine_check = machine_check_440A,
1801 .platform = "ppc440",
1802 },
1803 { /* 460EX */
1804 .pvr_mask = 0xffff0006,
1805 .pvr_value = 0x13020002,
1806 .cpu_name = "460EX",
1807 .cpu_features = CPU_FTRS_440x6,
1808 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1809 .mmu_features = MMU_FTR_TYPE_44x,
1810 .icache_bsize = 32,
1811 .dcache_bsize = 32,
1812 .cpu_setup = __setup_cpu_460ex,
1813 .machine_check = machine_check_440A,
1814 .platform = "ppc440",
1815 },
1816 { /* 460EX Rev B */
1817 .pvr_mask = 0xffff0007,
1818 .pvr_value = 0x13020004,
1819 .cpu_name = "460EX Rev. B",
1820 .cpu_features = CPU_FTRS_440x6,
1821 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1822 .mmu_features = MMU_FTR_TYPE_44x,
1823 .icache_bsize = 32,
1824 .dcache_bsize = 32,
1825 .cpu_setup = __setup_cpu_460ex,
1826 .machine_check = machine_check_440A,
1827 .platform = "ppc440",
1828 },
1829 { /* 460GT */
1830 .pvr_mask = 0xffff0006,
1831 .pvr_value = 0x13020000,
1832 .cpu_name = "460GT",
1833 .cpu_features = CPU_FTRS_440x6,
1834 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1835 .mmu_features = MMU_FTR_TYPE_44x,
1836 .icache_bsize = 32,
1837 .dcache_bsize = 32,
1838 .cpu_setup = __setup_cpu_460gt,
1839 .machine_check = machine_check_440A,
1840 .platform = "ppc440",
1841 },
1842 { /* 460GT Rev B */
1843 .pvr_mask = 0xffff0007,
1844 .pvr_value = 0x13020005,
1845 .cpu_name = "460GT Rev. B",
1846 .cpu_features = CPU_FTRS_440x6,
1847 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1848 .mmu_features = MMU_FTR_TYPE_44x,
1849 .icache_bsize = 32,
1850 .dcache_bsize = 32,
1851 .cpu_setup = __setup_cpu_460gt,
1852 .machine_check = machine_check_440A,
1853 .platform = "ppc440",
1854 },
1855 { /* 460SX */
1856 .pvr_mask = 0xffffff00,
1857 .pvr_value = 0x13541800,
1858 .cpu_name = "460SX",
1859 .cpu_features = CPU_FTRS_44X,
1860 .cpu_user_features = COMMON_USER_BOOKE,
1861 .mmu_features = MMU_FTR_TYPE_44x,
1862 .icache_bsize = 32,
1863 .dcache_bsize = 32,
1864 .cpu_setup = __setup_cpu_460sx,
1865 .machine_check = machine_check_440A,
1866 .platform = "ppc440",
1867 },
1868 { /* 464 in APM821xx */
1869 .pvr_mask = 0xfffffff0,
1870 .pvr_value = 0x12C41C80,
1871 .cpu_name = "APM821XX",
1872 .cpu_features = CPU_FTRS_44X,
1873 .cpu_user_features = COMMON_USER_BOOKE |
1874 PPC_FEATURE_HAS_FPU,
1875 .mmu_features = MMU_FTR_TYPE_44x,
1876 .icache_bsize = 32,
1877 .dcache_bsize = 32,
1878 .cpu_setup = __setup_cpu_apm821xx,
1879 .machine_check = machine_check_440A,
1880 .platform = "ppc440",
1881 },
1882 { /* 476 DD2 core */
1883 .pvr_mask = 0xffffffff,
1884 .pvr_value = 0x11a52080,
1885 .cpu_name = "476",
1886 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1887 .cpu_user_features = COMMON_USER_BOOKE |
1888 PPC_FEATURE_HAS_FPU,
1889 .mmu_features = MMU_FTR_TYPE_47x |
1890 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1891 .icache_bsize = 32,
1892 .dcache_bsize = 128,
1893 .machine_check = machine_check_47x,
1894 .platform = "ppc470",
1895 },
1896 { /* 476fpe */
1897 .pvr_mask = 0xffff0000,
1898 .pvr_value = 0x7ff50000,
1899 .cpu_name = "476fpe",
1900 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1901 .cpu_user_features = COMMON_USER_BOOKE |
1902 PPC_FEATURE_HAS_FPU,
1903 .mmu_features = MMU_FTR_TYPE_47x |
1904 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1905 .icache_bsize = 32,
1906 .dcache_bsize = 128,
1907 .machine_check = machine_check_47x,
1908 .platform = "ppc470",
1909 },
1910 { /* 476 iss */
1911 .pvr_mask = 0xffff0000,
1912 .pvr_value = 0x00050000,
1913 .cpu_name = "476",
1914 .cpu_features = CPU_FTRS_47X,
1915 .cpu_user_features = COMMON_USER_BOOKE |
1916 PPC_FEATURE_HAS_FPU,
1917 .mmu_features = MMU_FTR_TYPE_47x |
1918 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1919 .icache_bsize = 32,
1920 .dcache_bsize = 128,
1921 .machine_check = machine_check_47x,
1922 .platform = "ppc470",
1923 },
1924 { /* 476 others */
1925 .pvr_mask = 0xffff0000,
1926 .pvr_value = 0x11a50000,
1927 .cpu_name = "476",
1928 .cpu_features = CPU_FTRS_47X,
1929 .cpu_user_features = COMMON_USER_BOOKE |
1930 PPC_FEATURE_HAS_FPU,
1931 .mmu_features = MMU_FTR_TYPE_47x |
1932 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1933 .icache_bsize = 32,
1934 .dcache_bsize = 128,
1935 .machine_check = machine_check_47x,
1936 .platform = "ppc470",
1937 },
1938 { /* default match */
1939 .pvr_mask = 0x00000000,
1940 .pvr_value = 0x00000000,
1941 .cpu_name = "(generic 44x PPC)",
1942 .cpu_features = CPU_FTRS_44X,
1943 .cpu_user_features = COMMON_USER_BOOKE,
1944 .mmu_features = MMU_FTR_TYPE_44x,
1945 .icache_bsize = 32,
1946 .dcache_bsize = 32,
1947 .machine_check = machine_check_4xx,
1948 .platform = "ppc440",
1949 }
1950 #endif /* CONFIG_44x */
1951 #ifdef CONFIG_E200
1952 { /* e200z5 */
1953 .pvr_mask = 0xfff00000,
1954 .pvr_value = 0x81000000,
1955 .cpu_name = "e200z5",
1956 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1957 .cpu_features = CPU_FTRS_E200,
1958 .cpu_user_features = COMMON_USER_BOOKE |
1959 PPC_FEATURE_HAS_EFP_SINGLE |
1960 PPC_FEATURE_UNIFIED_CACHE,
1961 .mmu_features = MMU_FTR_TYPE_FSL_E,
1962 .dcache_bsize = 32,
1963 .machine_check = machine_check_e200,
1964 .platform = "ppc5554",
1965 },
1966 { /* e200z6 */
1967 .pvr_mask = 0xfff00000,
1968 .pvr_value = 0x81100000,
1969 .cpu_name = "e200z6",
1970 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1971 .cpu_features = CPU_FTRS_E200,
1972 .cpu_user_features = COMMON_USER_BOOKE |
1973 PPC_FEATURE_HAS_SPE_COMP |
1974 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1975 PPC_FEATURE_UNIFIED_CACHE,
1976 .mmu_features = MMU_FTR_TYPE_FSL_E,
1977 .dcache_bsize = 32,
1978 .machine_check = machine_check_e200,
1979 .platform = "ppc5554",
1980 },
1981 { /* default match */
1982 .pvr_mask = 0x00000000,
1983 .pvr_value = 0x00000000,
1984 .cpu_name = "(generic E200 PPC)",
1985 .cpu_features = CPU_FTRS_E200,
1986 .cpu_user_features = COMMON_USER_BOOKE |
1987 PPC_FEATURE_HAS_EFP_SINGLE |
1988 PPC_FEATURE_UNIFIED_CACHE,
1989 .mmu_features = MMU_FTR_TYPE_FSL_E,
1990 .dcache_bsize = 32,
1991 .cpu_setup = __setup_cpu_e200,
1992 .machine_check = machine_check_e200,
1993 .platform = "ppc5554",
1994 }
1995 #endif /* CONFIG_E200 */
1996 #endif /* CONFIG_PPC32 */
1997 #ifdef CONFIG_E500
1998 #ifdef CONFIG_PPC32
1999 { /* e500 */
2000 .pvr_mask = 0xffff0000,
2001 .pvr_value = 0x80200000,
2002 .cpu_name = "e500",
2003 .cpu_features = CPU_FTRS_E500,
2004 .cpu_user_features = COMMON_USER_BOOKE |
2005 PPC_FEATURE_HAS_SPE_COMP |
2006 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2007 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2008 .mmu_features = MMU_FTR_TYPE_FSL_E,
2009 .icache_bsize = 32,
2010 .dcache_bsize = 32,
2011 .num_pmcs = 4,
2012 .oprofile_cpu_type = "ppc/e500",
2013 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2014 .cpu_setup = __setup_cpu_e500v1,
2015 .machine_check = machine_check_e500,
2016 .platform = "ppc8540",
2017 },
2018 { /* e500v2 */
2019 .pvr_mask = 0xffff0000,
2020 .pvr_value = 0x80210000,
2021 .cpu_name = "e500v2",
2022 .cpu_features = CPU_FTRS_E500_2,
2023 .cpu_user_features = COMMON_USER_BOOKE |
2024 PPC_FEATURE_HAS_SPE_COMP |
2025 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2026 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2027 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2028 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2029 .icache_bsize = 32,
2030 .dcache_bsize = 32,
2031 .num_pmcs = 4,
2032 .oprofile_cpu_type = "ppc/e500",
2033 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2034 .cpu_setup = __setup_cpu_e500v2,
2035 .machine_check = machine_check_e500,
2036 .platform = "ppc8548",
2037 },
2038 { /* e500mc */
2039 .pvr_mask = 0xffff0000,
2040 .pvr_value = 0x80230000,
2041 .cpu_name = "e500mc",
2042 .cpu_features = CPU_FTRS_E500MC,
2043 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2044 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2045 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2046 MMU_FTR_USE_TLBILX,
2047 .icache_bsize = 64,
2048 .dcache_bsize = 64,
2049 .num_pmcs = 4,
2050 .oprofile_cpu_type = "ppc/e500mc",
2051 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2052 .cpu_setup = __setup_cpu_e500mc,
2053 .machine_check = machine_check_e500mc,
2054 .platform = "ppce500mc",
2055 },
2056 #endif /* CONFIG_PPC32 */
2057 { /* e5500 */
2058 .pvr_mask = 0xffff0000,
2059 .pvr_value = 0x80240000,
2060 .cpu_name = "e5500",
2061 .cpu_features = CPU_FTRS_E5500,
2062 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2063 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2064 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2065 MMU_FTR_USE_TLBILX,
2066 .icache_bsize = 64,
2067 .dcache_bsize = 64,
2068 .num_pmcs = 4,
2069 .oprofile_cpu_type = "ppc/e500mc",
2070 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2071 .cpu_setup = __setup_cpu_e5500,
2072 #ifndef CONFIG_PPC32
2073 .cpu_restore = __restore_cpu_e5500,
2074 #endif
2075 .machine_check = machine_check_e500mc,
2076 .platform = "ppce5500",
2077 },
2078 { /* e6500 */
2079 .pvr_mask = 0xffff0000,
2080 .pvr_value = 0x80400000,
2081 .cpu_name = "e6500",
2082 .cpu_features = CPU_FTRS_E6500,
2083 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2084 PPC_FEATURE_HAS_ALTIVEC_COMP,
2085 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2086 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2087 MMU_FTR_USE_TLBILX,
2088 .icache_bsize = 64,
2089 .dcache_bsize = 64,
2090 .num_pmcs = 4,
2091 .oprofile_cpu_type = "ppc/e6500",
2092 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2093 .cpu_setup = __setup_cpu_e6500,
2094 #ifndef CONFIG_PPC32
2095 .cpu_restore = __restore_cpu_e6500,
2096 #endif
2097 .machine_check = machine_check_e500mc,
2098 .platform = "ppce6500",
2099 },
2100 #ifdef CONFIG_PPC32
2101 { /* default match */
2102 .pvr_mask = 0x00000000,
2103 .pvr_value = 0x00000000,
2104 .cpu_name = "(generic E500 PPC)",
2105 .cpu_features = CPU_FTRS_E500,
2106 .cpu_user_features = COMMON_USER_BOOKE |
2107 PPC_FEATURE_HAS_SPE_COMP |
2108 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2109 .mmu_features = MMU_FTR_TYPE_FSL_E,
2110 .icache_bsize = 32,
2111 .dcache_bsize = 32,
2112 .machine_check = machine_check_e500,
2113 .platform = "powerpc",
2114 }
2115 #endif /* CONFIG_PPC32 */
2116 #endif /* CONFIG_E500 */
2117
2118 #ifdef CONFIG_PPC_A2
2119 { /* Standard A2 (>= DD2) + FPU core */
2120 .pvr_mask = 0xffff0000,
2121 .pvr_value = 0x00480000,
2122 .cpu_name = "A2 (>= DD2)",
2123 .cpu_features = CPU_FTRS_A2,
2124 .cpu_user_features = COMMON_USER_PPC64,
2125 .mmu_features = MMU_FTRS_A2,
2126 .icache_bsize = 64,
2127 .dcache_bsize = 64,
2128 .num_pmcs = 0,
2129 .cpu_setup = __setup_cpu_a2,
2130 .cpu_restore = __restore_cpu_a2,
2131 .machine_check = machine_check_generic,
2132 .platform = "ppca2",
2133 },
2134 { /* This is a default entry to get going, to be replaced by
2135 * a real one at some stage
2136 */
2137 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2138 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2139 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2140 .pvr_mask = 0x00000000,
2141 .pvr_value = 0x00000000,
2142 .cpu_name = "Book3E",
2143 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2144 .cpu_user_features = COMMON_USER_PPC64,
2145 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2146 MMU_FTR_USE_TLBIVAX_BCAST |
2147 MMU_FTR_LOCK_BCAST_INVAL,
2148 .icache_bsize = 64,
2149 .dcache_bsize = 64,
2150 .num_pmcs = 0,
2151 .machine_check = machine_check_generic,
2152 .platform = "power6",
2153 },
2154 #endif /* CONFIG_PPC_A2 */
2155 };
2156
2157 static struct cpu_spec the_cpu_spec;
2158
2159 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2160 struct cpu_spec *s)
2161 {
2162 struct cpu_spec *t = &the_cpu_spec;
2163 struct cpu_spec old;
2164
2165 t = PTRRELOC(t);
2166 old = *t;
2167
2168 /* Copy everything, then do fixups */
2169 *t = *s;
2170
2171 /*
2172 * If we are overriding a previous value derived from the real
2173 * PVR with a new value obtained using a logical PVR value,
2174 * don't modify the performance monitor fields.
2175 */
2176 if (old.num_pmcs && !s->num_pmcs) {
2177 t->num_pmcs = old.num_pmcs;
2178 t->pmc_type = old.pmc_type;
2179 t->oprofile_type = old.oprofile_type;
2180 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2181 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2182 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2183
2184 /*
2185 * If we have passed through this logic once before and
2186 * have pulled the default case because the real PVR was
2187 * not found inside cpu_specs[], then we are possibly
2188 * running in compatibility mode. In that case, let the
2189 * oprofiler know which set of compatibility counters to
2190 * pull from by making sure the oprofile_cpu_type string
2191 * is set to that of compatibility mode. If the
2192 * oprofile_cpu_type already has a value, then we are
2193 * possibly overriding a real PVR with a logical one,
2194 * and, in that case, keep the current value for
2195 * oprofile_cpu_type.
2196 */
2197 if (old.oprofile_cpu_type != NULL) {
2198 t->oprofile_cpu_type = old.oprofile_cpu_type;
2199 t->oprofile_type = old.oprofile_type;
2200 }
2201 }
2202
2203 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2204
2205 /*
2206 * Set the base platform string once; assumes
2207 * we're called with real pvr first.
2208 */
2209 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2210 *PTRRELOC(&powerpc_base_platform) = t->platform;
2211
2212 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2213 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2214 * that processor. I will consolidate that at a later time, for now,
2215 * just use #ifdef. We also don't need to PTRRELOC the function
2216 * pointer on ppc64 and booke as we are running at 0 in real mode
2217 * on ppc64 and reloc_offset is always 0 on booke.
2218 */
2219 if (t->cpu_setup) {
2220 t->cpu_setup(offset, t);
2221 }
2222 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2223
2224 return t;
2225 }
2226
2227 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2228 {
2229 struct cpu_spec *s = cpu_specs;
2230 int i;
2231
2232 s = PTRRELOC(s);
2233
2234 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2235 if ((pvr & s->pvr_mask) == s->pvr_value)
2236 return setup_cpu_spec(offset, s);
2237 }
2238
2239 BUG();
2240
2241 return NULL;
2242 }
Linux kernel - Deliverables
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