projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
powerpc: Add transactional memory unavaliable execption handler
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23 #include <asm/setup.h>
24
25 struct cpu_spec* cur_cpu_spec = NULL;
26 EXPORT_SYMBOL(cur_cpu_spec);
27
28 /* The platform string corresponding to the real PVR */
29 const char *powerpc_base_platform;
30
31 /* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38 #ifdef CONFIG_PPC32
39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61 #endif /* CONFIG_PPC32 */
62 #ifdef CONFIG_PPC64
63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power8(void);
73 extern void __restore_cpu_a2(void);
74 #endif /* CONFIG_PPC64 */
75 #if defined(CONFIG_E500)
76 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
77 extern void __restore_cpu_e5500(void);
78 #endif /* CONFIG_E500 */
79
80 /* This table only contains "desktop" CPUs, it need to be filled with embedded
81 * ones as well...
82 */
83 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
84 PPC_FEATURE_HAS_MMU)
85 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
86 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
87 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
88 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
89 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
91 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
92 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
93 PPC_FEATURE_TRUE_LE | \
94 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
95 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
97 PPC_FEATURE_TRUE_LE | \
98 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
99 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
101 PPC_FEATURE_TRUE_LE | \
102 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
103 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
104 PPC_FEATURE_TRUE_LE | \
105 PPC_FEATURE_HAS_ALTIVEC_COMP)
106 #ifdef CONFIG_PPC_BOOK3E_64
107 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
108 #else
109 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
110 PPC_FEATURE_BOOKE)
111 #endif
112
113 static struct cpu_spec __initdata cpu_specs[] = {
114 #ifdef CONFIG_PPC_BOOK3S_64
115 { /* Power3 */
116 .pvr_mask = 0xffff0000,
117 .pvr_value = 0x00400000,
118 .cpu_name = "POWER3 (630)",
119 .cpu_features = CPU_FTRS_POWER3,
120 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
121 .mmu_features = MMU_FTR_HPTE_TABLE,
122 .icache_bsize = 128,
123 .dcache_bsize = 128,
124 .num_pmcs = 8,
125 .pmc_type = PPC_PMC_IBM,
126 .oprofile_cpu_type = "ppc64/power3",
127 .oprofile_type = PPC_OPROFILE_RS64,
128 .platform = "power3",
129 },
130 { /* Power3+ */
131 .pvr_mask = 0xffff0000,
132 .pvr_value = 0x00410000,
133 .cpu_name = "POWER3 (630+)",
134 .cpu_features = CPU_FTRS_POWER3,
135 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
136 .mmu_features = MMU_FTR_HPTE_TABLE,
137 .icache_bsize = 128,
138 .dcache_bsize = 128,
139 .num_pmcs = 8,
140 .pmc_type = PPC_PMC_IBM,
141 .oprofile_cpu_type = "ppc64/power3",
142 .oprofile_type = PPC_OPROFILE_RS64,
143 .platform = "power3",
144 },
145 { /* Northstar */
146 .pvr_mask = 0xffff0000,
147 .pvr_value = 0x00330000,
148 .cpu_name = "RS64-II (northstar)",
149 .cpu_features = CPU_FTRS_RS64,
150 .cpu_user_features = COMMON_USER_PPC64,
151 .mmu_features = MMU_FTR_HPTE_TABLE,
152 .icache_bsize = 128,
153 .dcache_bsize = 128,
154 .num_pmcs = 8,
155 .pmc_type = PPC_PMC_IBM,
156 .oprofile_cpu_type = "ppc64/rs64",
157 .oprofile_type = PPC_OPROFILE_RS64,
158 .platform = "rs64",
159 },
160 { /* Pulsar */
161 .pvr_mask = 0xffff0000,
162 .pvr_value = 0x00340000,
163 .cpu_name = "RS64-III (pulsar)",
164 .cpu_features = CPU_FTRS_RS64,
165 .cpu_user_features = COMMON_USER_PPC64,
166 .mmu_features = MMU_FTR_HPTE_TABLE,
167 .icache_bsize = 128,
168 .dcache_bsize = 128,
169 .num_pmcs = 8,
170 .pmc_type = PPC_PMC_IBM,
171 .oprofile_cpu_type = "ppc64/rs64",
172 .oprofile_type = PPC_OPROFILE_RS64,
173 .platform = "rs64",
174 },
175 { /* I-star */
176 .pvr_mask = 0xffff0000,
177 .pvr_value = 0x00360000,
178 .cpu_name = "RS64-III (icestar)",
179 .cpu_features = CPU_FTRS_RS64,
180 .cpu_user_features = COMMON_USER_PPC64,
181 .mmu_features = MMU_FTR_HPTE_TABLE,
182 .icache_bsize = 128,
183 .dcache_bsize = 128,
184 .num_pmcs = 8,
185 .pmc_type = PPC_PMC_IBM,
186 .oprofile_cpu_type = "ppc64/rs64",
187 .oprofile_type = PPC_OPROFILE_RS64,
188 .platform = "rs64",
189 },
190 { /* S-star */
191 .pvr_mask = 0xffff0000,
192 .pvr_value = 0x00370000,
193 .cpu_name = "RS64-IV (sstar)",
194 .cpu_features = CPU_FTRS_RS64,
195 .cpu_user_features = COMMON_USER_PPC64,
196 .mmu_features = MMU_FTR_HPTE_TABLE,
197 .icache_bsize = 128,
198 .dcache_bsize = 128,
199 .num_pmcs = 8,
200 .pmc_type = PPC_PMC_IBM,
201 .oprofile_cpu_type = "ppc64/rs64",
202 .oprofile_type = PPC_OPROFILE_RS64,
203 .platform = "rs64",
204 },
205 { /* Power4 */
206 .pvr_mask = 0xffff0000,
207 .pvr_value = 0x00350000,
208 .cpu_name = "POWER4 (gp)",
209 .cpu_features = CPU_FTRS_POWER4,
210 .cpu_user_features = COMMON_USER_POWER4,
211 .mmu_features = MMU_FTRS_POWER4,
212 .icache_bsize = 128,
213 .dcache_bsize = 128,
214 .num_pmcs = 8,
215 .pmc_type = PPC_PMC_IBM,
216 .oprofile_cpu_type = "ppc64/power4",
217 .oprofile_type = PPC_OPROFILE_POWER4,
218 .platform = "power4",
219 },
220 { /* Power4+ */
221 .pvr_mask = 0xffff0000,
222 .pvr_value = 0x00380000,
223 .cpu_name = "POWER4+ (gq)",
224 .cpu_features = CPU_FTRS_POWER4,
225 .cpu_user_features = COMMON_USER_POWER4,
226 .mmu_features = MMU_FTRS_POWER4,
227 .icache_bsize = 128,
228 .dcache_bsize = 128,
229 .num_pmcs = 8,
230 .pmc_type = PPC_PMC_IBM,
231 .oprofile_cpu_type = "ppc64/power4",
232 .oprofile_type = PPC_OPROFILE_POWER4,
233 .platform = "power4",
234 },
235 { /* PPC970 */
236 .pvr_mask = 0xffff0000,
237 .pvr_value = 0x00390000,
238 .cpu_name = "PPC970",
239 .cpu_features = CPU_FTRS_PPC970,
240 .cpu_user_features = COMMON_USER_POWER4 |
241 PPC_FEATURE_HAS_ALTIVEC_COMP,
242 .mmu_features = MMU_FTRS_PPC970,
243 .icache_bsize = 128,
244 .dcache_bsize = 128,
245 .num_pmcs = 8,
246 .pmc_type = PPC_PMC_IBM,
247 .cpu_setup = __setup_cpu_ppc970,
248 .cpu_restore = __restore_cpu_ppc970,
249 .oprofile_cpu_type = "ppc64/970",
250 .oprofile_type = PPC_OPROFILE_POWER4,
251 .platform = "ppc970",
252 },
253 { /* PPC970FX */
254 .pvr_mask = 0xffff0000,
255 .pvr_value = 0x003c0000,
256 .cpu_name = "PPC970FX",
257 .cpu_features = CPU_FTRS_PPC970,
258 .cpu_user_features = COMMON_USER_POWER4 |
259 PPC_FEATURE_HAS_ALTIVEC_COMP,
260 .mmu_features = MMU_FTRS_PPC970,
261 .icache_bsize = 128,
262 .dcache_bsize = 128,
263 .num_pmcs = 8,
264 .pmc_type = PPC_PMC_IBM,
265 .cpu_setup = __setup_cpu_ppc970,
266 .cpu_restore = __restore_cpu_ppc970,
267 .oprofile_cpu_type = "ppc64/970",
268 .oprofile_type = PPC_OPROFILE_POWER4,
269 .platform = "ppc970",
270 },
271 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
272 .pvr_mask = 0xffffffff,
273 .pvr_value = 0x00440100,
274 .cpu_name = "PPC970MP",
275 .cpu_features = CPU_FTRS_PPC970,
276 .cpu_user_features = COMMON_USER_POWER4 |
277 PPC_FEATURE_HAS_ALTIVEC_COMP,
278 .mmu_features = MMU_FTR_HPTE_TABLE,
279 .icache_bsize = 128,
280 .dcache_bsize = 128,
281 .num_pmcs = 8,
282 .pmc_type = PPC_PMC_IBM,
283 .cpu_setup = __setup_cpu_ppc970,
284 .cpu_restore = __restore_cpu_ppc970,
285 .oprofile_cpu_type = "ppc64/970MP",
286 .oprofile_type = PPC_OPROFILE_POWER4,
287 .platform = "ppc970",
288 },
289 { /* PPC970MP */
290 .pvr_mask = 0xffff0000,
291 .pvr_value = 0x00440000,
292 .cpu_name = "PPC970MP",
293 .cpu_features = CPU_FTRS_PPC970,
294 .cpu_user_features = COMMON_USER_POWER4 |
295 PPC_FEATURE_HAS_ALTIVEC_COMP,
296 .mmu_features = MMU_FTRS_PPC970,
297 .icache_bsize = 128,
298 .dcache_bsize = 128,
299 .num_pmcs = 8,
300 .pmc_type = PPC_PMC_IBM,
301 .cpu_setup = __setup_cpu_ppc970MP,
302 .cpu_restore = __restore_cpu_ppc970,
303 .oprofile_cpu_type = "ppc64/970MP",
304 .oprofile_type = PPC_OPROFILE_POWER4,
305 .platform = "ppc970",
306 },
307 { /* PPC970GX */
308 .pvr_mask = 0xffff0000,
309 .pvr_value = 0x00450000,
310 .cpu_name = "PPC970GX",
311 .cpu_features = CPU_FTRS_PPC970,
312 .cpu_user_features = COMMON_USER_POWER4 |
313 PPC_FEATURE_HAS_ALTIVEC_COMP,
314 .mmu_features = MMU_FTRS_PPC970,
315 .icache_bsize = 128,
316 .dcache_bsize = 128,
317 .num_pmcs = 8,
318 .pmc_type = PPC_PMC_IBM,
319 .cpu_setup = __setup_cpu_ppc970,
320 .oprofile_cpu_type = "ppc64/970",
321 .oprofile_type = PPC_OPROFILE_POWER4,
322 .platform = "ppc970",
323 },
324 { /* Power5 GR */
325 .pvr_mask = 0xffff0000,
326 .pvr_value = 0x003a0000,
327 .cpu_name = "POWER5 (gr)",
328 .cpu_features = CPU_FTRS_POWER5,
329 .cpu_user_features = COMMON_USER_POWER5,
330 .mmu_features = MMU_FTRS_POWER5,
331 .icache_bsize = 128,
332 .dcache_bsize = 128,
333 .num_pmcs = 6,
334 .pmc_type = PPC_PMC_IBM,
335 .oprofile_cpu_type = "ppc64/power5",
336 .oprofile_type = PPC_OPROFILE_POWER4,
337 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
338 * and above but only works on POWER5 and above
339 */
340 .oprofile_mmcra_sihv = MMCRA_SIHV,
341 .oprofile_mmcra_sipr = MMCRA_SIPR,
342 .platform = "power5",
343 },
344 { /* Power5++ */
345 .pvr_mask = 0xffffff00,
346 .pvr_value = 0x003b0300,
347 .cpu_name = "POWER5+ (gs)",
348 .cpu_features = CPU_FTRS_POWER5,
349 .cpu_user_features = COMMON_USER_POWER5_PLUS,
350 .mmu_features = MMU_FTRS_POWER5,
351 .icache_bsize = 128,
352 .dcache_bsize = 128,
353 .num_pmcs = 6,
354 .oprofile_cpu_type = "ppc64/power5++",
355 .oprofile_type = PPC_OPROFILE_POWER4,
356 .oprofile_mmcra_sihv = MMCRA_SIHV,
357 .oprofile_mmcra_sipr = MMCRA_SIPR,
358 .platform = "power5+",
359 },
360 { /* Power5 GS */
361 .pvr_mask = 0xffff0000,
362 .pvr_value = 0x003b0000,
363 .cpu_name = "POWER5+ (gs)",
364 .cpu_features = CPU_FTRS_POWER5,
365 .cpu_user_features = COMMON_USER_POWER5_PLUS,
366 .mmu_features = MMU_FTRS_POWER5,
367 .icache_bsize = 128,
368 .dcache_bsize = 128,
369 .num_pmcs = 6,
370 .pmc_type = PPC_PMC_IBM,
371 .oprofile_cpu_type = "ppc64/power5+",
372 .oprofile_type = PPC_OPROFILE_POWER4,
373 .oprofile_mmcra_sihv = MMCRA_SIHV,
374 .oprofile_mmcra_sipr = MMCRA_SIPR,
375 .platform = "power5+",
376 },
377 { /* POWER6 in P5+ mode; 2.04-compliant processor */
378 .pvr_mask = 0xffffffff,
379 .pvr_value = 0x0f000001,
380 .cpu_name = "POWER5+",
381 .cpu_features = CPU_FTRS_POWER5,
382 .cpu_user_features = COMMON_USER_POWER5_PLUS,
383 .mmu_features = MMU_FTRS_POWER5,
384 .icache_bsize = 128,
385 .dcache_bsize = 128,
386 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
387 .oprofile_type = PPC_OPROFILE_POWER4,
388 .platform = "power5+",
389 },
390 { /* Power6 */
391 .pvr_mask = 0xffff0000,
392 .pvr_value = 0x003e0000,
393 .cpu_name = "POWER6 (raw)",
394 .cpu_features = CPU_FTRS_POWER6,
395 .cpu_user_features = COMMON_USER_POWER6 |
396 PPC_FEATURE_POWER6_EXT,
397 .mmu_features = MMU_FTRS_POWER6,
398 .icache_bsize = 128,
399 .dcache_bsize = 128,
400 .num_pmcs = 6,
401 .pmc_type = PPC_PMC_IBM,
402 .oprofile_cpu_type = "ppc64/power6",
403 .oprofile_type = PPC_OPROFILE_POWER4,
404 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
405 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
406 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
407 POWER6_MMCRA_OTHER,
408 .platform = "power6x",
409 },
410 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
411 .pvr_mask = 0xffffffff,
412 .pvr_value = 0x0f000002,
413 .cpu_name = "POWER6 (architected)",
414 .cpu_features = CPU_FTRS_POWER6,
415 .cpu_user_features = COMMON_USER_POWER6,
416 .mmu_features = MMU_FTRS_POWER6,
417 .icache_bsize = 128,
418 .dcache_bsize = 128,
419 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
420 .oprofile_type = PPC_OPROFILE_POWER4,
421 .platform = "power6",
422 },
423 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
424 .pvr_mask = 0xffffffff,
425 .pvr_value = 0x0f000003,
426 .cpu_name = "POWER7 (architected)",
427 .cpu_features = CPU_FTRS_POWER7,
428 .cpu_user_features = COMMON_USER_POWER7,
429 .mmu_features = MMU_FTRS_POWER7,
430 .icache_bsize = 128,
431 .dcache_bsize = 128,
432 .oprofile_type = PPC_OPROFILE_POWER4,
433 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
434 .cpu_setup = __setup_cpu_power7,
435 .cpu_restore = __restore_cpu_power7,
436 .platform = "power7",
437 },
438 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
439 .pvr_mask = 0xffffffff,
440 .pvr_value = 0x0f000004,
441 .cpu_name = "POWER8 (architected)",
442 .cpu_features = CPU_FTRS_POWER8,
443 .cpu_user_features = COMMON_USER_POWER8,
444 .mmu_features = MMU_FTRS_POWER8,
445 .icache_bsize = 128,
446 .dcache_bsize = 128,
447 .oprofile_type = PPC_OPROFILE_POWER4,
448 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
449 .cpu_setup = __setup_cpu_power8,
450 .cpu_restore = __restore_cpu_power8,
451 .platform = "power8",
452 },
453 { /* Power7 */
454 .pvr_mask = 0xffff0000,
455 .pvr_value = 0x003f0000,
456 .cpu_name = "POWER7 (raw)",
457 .cpu_features = CPU_FTRS_POWER7,
458 .cpu_user_features = COMMON_USER_POWER7,
459 .mmu_features = MMU_FTRS_POWER7,
460 .icache_bsize = 128,
461 .dcache_bsize = 128,
462 .num_pmcs = 6,
463 .pmc_type = PPC_PMC_IBM,
464 .oprofile_cpu_type = "ppc64/power7",
465 .oprofile_type = PPC_OPROFILE_POWER4,
466 .cpu_setup = __setup_cpu_power7,
467 .cpu_restore = __restore_cpu_power7,
468 .platform = "power7",
469 },
470 { /* Power7+ */
471 .pvr_mask = 0xffff0000,
472 .pvr_value = 0x004A0000,
473 .cpu_name = "POWER7+ (raw)",
474 .cpu_features = CPU_FTRS_POWER7,
475 .cpu_user_features = COMMON_USER_POWER7,
476 .mmu_features = MMU_FTRS_POWER7,
477 .icache_bsize = 128,
478 .dcache_bsize = 128,
479 .num_pmcs = 6,
480 .pmc_type = PPC_PMC_IBM,
481 .oprofile_cpu_type = "ppc64/power7",
482 .oprofile_type = PPC_OPROFILE_POWER4,
483 .cpu_setup = __setup_cpu_power7,
484 .cpu_restore = __restore_cpu_power7,
485 .platform = "power7+",
486 },
487 { /* Power8 */
488 .pvr_mask = 0xffff0000,
489 .pvr_value = 0x004b0000,
490 .cpu_name = "POWER8 (raw)",
491 .cpu_features = CPU_FTRS_POWER8,
492 .cpu_user_features = COMMON_USER_POWER8,
493 .mmu_features = MMU_FTRS_POWER8,
494 .icache_bsize = 128,
495 .dcache_bsize = 128,
496 .num_pmcs = 6,
497 .pmc_type = PPC_PMC_IBM,
498 .oprofile_cpu_type = "ppc64/power8",
499 .oprofile_type = PPC_OPROFILE_POWER4,
500 .cpu_setup = __setup_cpu_power8,
501 .cpu_restore = __restore_cpu_power8,
502 .platform = "power8",
503 },
504 { /* Cell Broadband Engine */
505 .pvr_mask = 0xffff0000,
506 .pvr_value = 0x00700000,
507 .cpu_name = "Cell Broadband Engine",
508 .cpu_features = CPU_FTRS_CELL,
509 .cpu_user_features = COMMON_USER_PPC64 |
510 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
511 PPC_FEATURE_SMT,
512 .mmu_features = MMU_FTRS_CELL,
513 .icache_bsize = 128,
514 .dcache_bsize = 128,
515 .num_pmcs = 4,
516 .pmc_type = PPC_PMC_IBM,
517 .oprofile_cpu_type = "ppc64/cell-be",
518 .oprofile_type = PPC_OPROFILE_CELL,
519 .platform = "ppc-cell-be",
520 },
521 { /* PA Semi PA6T */
522 .pvr_mask = 0x7fff0000,
523 .pvr_value = 0x00900000,
524 .cpu_name = "PA6T",
525 .cpu_features = CPU_FTRS_PA6T,
526 .cpu_user_features = COMMON_USER_PA6T,
527 .mmu_features = MMU_FTRS_PA6T,
528 .icache_bsize = 64,
529 .dcache_bsize = 64,
530 .num_pmcs = 6,
531 .pmc_type = PPC_PMC_PA6T,
532 .cpu_setup = __setup_cpu_pa6t,
533 .cpu_restore = __restore_cpu_pa6t,
534 .oprofile_cpu_type = "ppc64/pa6t",
535 .oprofile_type = PPC_OPROFILE_PA6T,
536 .platform = "pa6t",
537 },
538 { /* default match */
539 .pvr_mask = 0x00000000,
540 .pvr_value = 0x00000000,
541 .cpu_name = "POWER4 (compatible)",
542 .cpu_features = CPU_FTRS_COMPATIBLE,
543 .cpu_user_features = COMMON_USER_PPC64,
544 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
545 .icache_bsize = 128,
546 .dcache_bsize = 128,
547 .num_pmcs = 6,
548 .pmc_type = PPC_PMC_IBM,
549 .platform = "power4",
550 }
551 #endif /* CONFIG_PPC_BOOK3S_64 */
552
553 #ifdef CONFIG_PPC32
554 #if CLASSIC_PPC
555 { /* 601 */
556 .pvr_mask = 0xffff0000,
557 .pvr_value = 0x00010000,
558 .cpu_name = "601",
559 .cpu_features = CPU_FTRS_PPC601,
560 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
561 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
562 .mmu_features = MMU_FTR_HPTE_TABLE,
563 .icache_bsize = 32,
564 .dcache_bsize = 32,
565 .machine_check = machine_check_generic,
566 .platform = "ppc601",
567 },
568 { /* 603 */
569 .pvr_mask = 0xffff0000,
570 .pvr_value = 0x00030000,
571 .cpu_name = "603",
572 .cpu_features = CPU_FTRS_603,
573 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
574 .mmu_features = 0,
575 .icache_bsize = 32,
576 .dcache_bsize = 32,
577 .cpu_setup = __setup_cpu_603,
578 .machine_check = machine_check_generic,
579 .platform = "ppc603",
580 },
581 { /* 603e */
582 .pvr_mask = 0xffff0000,
583 .pvr_value = 0x00060000,
584 .cpu_name = "603e",
585 .cpu_features = CPU_FTRS_603,
586 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
587 .mmu_features = 0,
588 .icache_bsize = 32,
589 .dcache_bsize = 32,
590 .cpu_setup = __setup_cpu_603,
591 .machine_check = machine_check_generic,
592 .platform = "ppc603",
593 },
594 { /* 603ev */
595 .pvr_mask = 0xffff0000,
596 .pvr_value = 0x00070000,
597 .cpu_name = "603ev",
598 .cpu_features = CPU_FTRS_603,
599 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
600 .mmu_features = 0,
601 .icache_bsize = 32,
602 .dcache_bsize = 32,
603 .cpu_setup = __setup_cpu_603,
604 .machine_check = machine_check_generic,
605 .platform = "ppc603",
606 },
607 { /* 604 */
608 .pvr_mask = 0xffff0000,
609 .pvr_value = 0x00040000,
610 .cpu_name = "604",
611 .cpu_features = CPU_FTRS_604,
612 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
613 .mmu_features = MMU_FTR_HPTE_TABLE,
614 .icache_bsize = 32,
615 .dcache_bsize = 32,
616 .num_pmcs = 2,
617 .cpu_setup = __setup_cpu_604,
618 .machine_check = machine_check_generic,
619 .platform = "ppc604",
620 },
621 { /* 604e */
622 .pvr_mask = 0xfffff000,
623 .pvr_value = 0x00090000,
624 .cpu_name = "604e",
625 .cpu_features = CPU_FTRS_604,
626 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
627 .mmu_features = MMU_FTR_HPTE_TABLE,
628 .icache_bsize = 32,
629 .dcache_bsize = 32,
630 .num_pmcs = 4,
631 .cpu_setup = __setup_cpu_604,
632 .machine_check = machine_check_generic,
633 .platform = "ppc604",
634 },
635 { /* 604r */
636 .pvr_mask = 0xffff0000,
637 .pvr_value = 0x00090000,
638 .cpu_name = "604r",
639 .cpu_features = CPU_FTRS_604,
640 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
641 .mmu_features = MMU_FTR_HPTE_TABLE,
642 .icache_bsize = 32,
643 .dcache_bsize = 32,
644 .num_pmcs = 4,
645 .cpu_setup = __setup_cpu_604,
646 .machine_check = machine_check_generic,
647 .platform = "ppc604",
648 },
649 { /* 604ev */
650 .pvr_mask = 0xffff0000,
651 .pvr_value = 0x000a0000,
652 .cpu_name = "604ev",
653 .cpu_features = CPU_FTRS_604,
654 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
655 .mmu_features = MMU_FTR_HPTE_TABLE,
656 .icache_bsize = 32,
657 .dcache_bsize = 32,
658 .num_pmcs = 4,
659 .cpu_setup = __setup_cpu_604,
660 .machine_check = machine_check_generic,
661 .platform = "ppc604",
662 },
663 { /* 740/750 (0x4202, don't support TAU ?) */
664 .pvr_mask = 0xffffffff,
665 .pvr_value = 0x00084202,
666 .cpu_name = "740/750",
667 .cpu_features = CPU_FTRS_740_NOTAU,
668 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
669 .mmu_features = MMU_FTR_HPTE_TABLE,
670 .icache_bsize = 32,
671 .dcache_bsize = 32,
672 .num_pmcs = 4,
673 .cpu_setup = __setup_cpu_750,
674 .machine_check = machine_check_generic,
675 .platform = "ppc750",
676 },
677 { /* 750CX (80100 and 8010x?) */
678 .pvr_mask = 0xfffffff0,
679 .pvr_value = 0x00080100,
680 .cpu_name = "750CX",
681 .cpu_features = CPU_FTRS_750,
682 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
683 .mmu_features = MMU_FTR_HPTE_TABLE,
684 .icache_bsize = 32,
685 .dcache_bsize = 32,
686 .num_pmcs = 4,
687 .cpu_setup = __setup_cpu_750cx,
688 .machine_check = machine_check_generic,
689 .platform = "ppc750",
690 },
691 { /* 750CX (82201 and 82202) */
692 .pvr_mask = 0xfffffff0,
693 .pvr_value = 0x00082200,
694 .cpu_name = "750CX",
695 .cpu_features = CPU_FTRS_750,
696 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
697 .mmu_features = MMU_FTR_HPTE_TABLE,
698 .icache_bsize = 32,
699 .dcache_bsize = 32,
700 .num_pmcs = 4,
701 .pmc_type = PPC_PMC_IBM,
702 .cpu_setup = __setup_cpu_750cx,
703 .machine_check = machine_check_generic,
704 .platform = "ppc750",
705 },
706 { /* 750CXe (82214) */
707 .pvr_mask = 0xfffffff0,
708 .pvr_value = 0x00082210,
709 .cpu_name = "750CXe",
710 .cpu_features = CPU_FTRS_750,
711 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
712 .mmu_features = MMU_FTR_HPTE_TABLE,
713 .icache_bsize = 32,
714 .dcache_bsize = 32,
715 .num_pmcs = 4,
716 .pmc_type = PPC_PMC_IBM,
717 .cpu_setup = __setup_cpu_750cx,
718 .machine_check = machine_check_generic,
719 .platform = "ppc750",
720 },
721 { /* 750CXe "Gekko" (83214) */
722 .pvr_mask = 0xffffffff,
723 .pvr_value = 0x00083214,
724 .cpu_name = "750CXe",
725 .cpu_features = CPU_FTRS_750,
726 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
727 .mmu_features = MMU_FTR_HPTE_TABLE,
728 .icache_bsize = 32,
729 .dcache_bsize = 32,
730 .num_pmcs = 4,
731 .pmc_type = PPC_PMC_IBM,
732 .cpu_setup = __setup_cpu_750cx,
733 .machine_check = machine_check_generic,
734 .platform = "ppc750",
735 },
736 { /* 750CL (and "Broadway") */
737 .pvr_mask = 0xfffff0e0,
738 .pvr_value = 0x00087000,
739 .cpu_name = "750CL",
740 .cpu_features = CPU_FTRS_750CL,
741 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
742 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
743 .icache_bsize = 32,
744 .dcache_bsize = 32,
745 .num_pmcs = 4,
746 .pmc_type = PPC_PMC_IBM,
747 .cpu_setup = __setup_cpu_750,
748 .machine_check = machine_check_generic,
749 .platform = "ppc750",
750 .oprofile_cpu_type = "ppc/750",
751 .oprofile_type = PPC_OPROFILE_G4,
752 },
753 { /* 745/755 */
754 .pvr_mask = 0xfffff000,
755 .pvr_value = 0x00083000,
756 .cpu_name = "745/755",
757 .cpu_features = CPU_FTRS_750,
758 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
759 .mmu_features = MMU_FTR_HPTE_TABLE,
760 .icache_bsize = 32,
761 .dcache_bsize = 32,
762 .num_pmcs = 4,
763 .pmc_type = PPC_PMC_IBM,
764 .cpu_setup = __setup_cpu_750,
765 .machine_check = machine_check_generic,
766 .platform = "ppc750",
767 },
768 { /* 750FX rev 1.x */
769 .pvr_mask = 0xffffff00,
770 .pvr_value = 0x70000100,
771 .cpu_name = "750FX",
772 .cpu_features = CPU_FTRS_750FX1,
773 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
774 .mmu_features = MMU_FTR_HPTE_TABLE,
775 .icache_bsize = 32,
776 .dcache_bsize = 32,
777 .num_pmcs = 4,
778 .pmc_type = PPC_PMC_IBM,
779 .cpu_setup = __setup_cpu_750,
780 .machine_check = machine_check_generic,
781 .platform = "ppc750",
782 .oprofile_cpu_type = "ppc/750",
783 .oprofile_type = PPC_OPROFILE_G4,
784 },
785 { /* 750FX rev 2.0 must disable HID0[DPM] */
786 .pvr_mask = 0xffffffff,
787 .pvr_value = 0x70000200,
788 .cpu_name = "750FX",
789 .cpu_features = CPU_FTRS_750FX2,
790 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
791 .mmu_features = MMU_FTR_HPTE_TABLE,
792 .icache_bsize = 32,
793 .dcache_bsize = 32,
794 .num_pmcs = 4,
795 .pmc_type = PPC_PMC_IBM,
796 .cpu_setup = __setup_cpu_750,
797 .machine_check = machine_check_generic,
798 .platform = "ppc750",
799 .oprofile_cpu_type = "ppc/750",
800 .oprofile_type = PPC_OPROFILE_G4,
801 },
802 { /* 750FX (All revs except 2.0) */
803 .pvr_mask = 0xffff0000,
804 .pvr_value = 0x70000000,
805 .cpu_name = "750FX",
806 .cpu_features = CPU_FTRS_750FX,
807 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
808 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
809 .icache_bsize = 32,
810 .dcache_bsize = 32,
811 .num_pmcs = 4,
812 .pmc_type = PPC_PMC_IBM,
813 .cpu_setup = __setup_cpu_750fx,
814 .machine_check = machine_check_generic,
815 .platform = "ppc750",
816 .oprofile_cpu_type = "ppc/750",
817 .oprofile_type = PPC_OPROFILE_G4,
818 },
819 { /* 750GX */
820 .pvr_mask = 0xffff0000,
821 .pvr_value = 0x70020000,
822 .cpu_name = "750GX",
823 .cpu_features = CPU_FTRS_750GX,
824 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
825 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
826 .icache_bsize = 32,
827 .dcache_bsize = 32,
828 .num_pmcs = 4,
829 .pmc_type = PPC_PMC_IBM,
830 .cpu_setup = __setup_cpu_750fx,
831 .machine_check = machine_check_generic,
832 .platform = "ppc750",
833 .oprofile_cpu_type = "ppc/750",
834 .oprofile_type = PPC_OPROFILE_G4,
835 },
836 { /* 740/750 (L2CR bit need fixup for 740) */
837 .pvr_mask = 0xffff0000,
838 .pvr_value = 0x00080000,
839 .cpu_name = "740/750",
840 .cpu_features = CPU_FTRS_740,
841 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
842 .mmu_features = MMU_FTR_HPTE_TABLE,
843 .icache_bsize = 32,
844 .dcache_bsize = 32,
845 .num_pmcs = 4,
846 .pmc_type = PPC_PMC_IBM,
847 .cpu_setup = __setup_cpu_750,
848 .machine_check = machine_check_generic,
849 .platform = "ppc750",
850 },
851 { /* 7400 rev 1.1 ? (no TAU) */
852 .pvr_mask = 0xffffffff,
853 .pvr_value = 0x000c1101,
854 .cpu_name = "7400 (1.1)",
855 .cpu_features = CPU_FTRS_7400_NOTAU,
856 .cpu_user_features = COMMON_USER |
857 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
858 .mmu_features = MMU_FTR_HPTE_TABLE,
859 .icache_bsize = 32,
860 .dcache_bsize = 32,
861 .num_pmcs = 4,
862 .pmc_type = PPC_PMC_G4,
863 .cpu_setup = __setup_cpu_7400,
864 .machine_check = machine_check_generic,
865 .platform = "ppc7400",
866 },
867 { /* 7400 */
868 .pvr_mask = 0xffff0000,
869 .pvr_value = 0x000c0000,
870 .cpu_name = "7400",
871 .cpu_features = CPU_FTRS_7400,
872 .cpu_user_features = COMMON_USER |
873 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
874 .mmu_features = MMU_FTR_HPTE_TABLE,
875 .icache_bsize = 32,
876 .dcache_bsize = 32,
877 .num_pmcs = 4,
878 .pmc_type = PPC_PMC_G4,
879 .cpu_setup = __setup_cpu_7400,
880 .machine_check = machine_check_generic,
881 .platform = "ppc7400",
882 },
883 { /* 7410 */
884 .pvr_mask = 0xffff0000,
885 .pvr_value = 0x800c0000,
886 .cpu_name = "7410",
887 .cpu_features = CPU_FTRS_7400,
888 .cpu_user_features = COMMON_USER |
889 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
890 .mmu_features = MMU_FTR_HPTE_TABLE,
891 .icache_bsize = 32,
892 .dcache_bsize = 32,
893 .num_pmcs = 4,
894 .pmc_type = PPC_PMC_G4,
895 .cpu_setup = __setup_cpu_7410,
896 .machine_check = machine_check_generic,
897 .platform = "ppc7400",
898 },
899 { /* 7450 2.0 - no doze/nap */
900 .pvr_mask = 0xffffffff,
901 .pvr_value = 0x80000200,
902 .cpu_name = "7450",
903 .cpu_features = CPU_FTRS_7450_20,
904 .cpu_user_features = COMMON_USER |
905 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
906 .mmu_features = MMU_FTR_HPTE_TABLE,
907 .icache_bsize = 32,
908 .dcache_bsize = 32,
909 .num_pmcs = 6,
910 .pmc_type = PPC_PMC_G4,
911 .cpu_setup = __setup_cpu_745x,
912 .oprofile_cpu_type = "ppc/7450",
913 .oprofile_type = PPC_OPROFILE_G4,
914 .machine_check = machine_check_generic,
915 .platform = "ppc7450",
916 },
917 { /* 7450 2.1 */
918 .pvr_mask = 0xffffffff,
919 .pvr_value = 0x80000201,
920 .cpu_name = "7450",
921 .cpu_features = CPU_FTRS_7450_21,
922 .cpu_user_features = COMMON_USER |
923 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
924 .mmu_features = MMU_FTR_HPTE_TABLE,
925 .icache_bsize = 32,
926 .dcache_bsize = 32,
927 .num_pmcs = 6,
928 .pmc_type = PPC_PMC_G4,
929 .cpu_setup = __setup_cpu_745x,
930 .oprofile_cpu_type = "ppc/7450",
931 .oprofile_type = PPC_OPROFILE_G4,
932 .machine_check = machine_check_generic,
933 .platform = "ppc7450",
934 },
935 { /* 7450 2.3 and newer */
936 .pvr_mask = 0xffff0000,
937 .pvr_value = 0x80000000,
938 .cpu_name = "7450",
939 .cpu_features = CPU_FTRS_7450_23,
940 .cpu_user_features = COMMON_USER |
941 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
942 .mmu_features = MMU_FTR_HPTE_TABLE,
943 .icache_bsize = 32,
944 .dcache_bsize = 32,
945 .num_pmcs = 6,
946 .pmc_type = PPC_PMC_G4,
947 .cpu_setup = __setup_cpu_745x,
948 .oprofile_cpu_type = "ppc/7450",
949 .oprofile_type = PPC_OPROFILE_G4,
950 .machine_check = machine_check_generic,
951 .platform = "ppc7450",
952 },
953 { /* 7455 rev 1.x */
954 .pvr_mask = 0xffffff00,
955 .pvr_value = 0x80010100,
956 .cpu_name = "7455",
957 .cpu_features = CPU_FTRS_7455_1,
958 .cpu_user_features = COMMON_USER |
959 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
960 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
961 .icache_bsize = 32,
962 .dcache_bsize = 32,
963 .num_pmcs = 6,
964 .pmc_type = PPC_PMC_G4,
965 .cpu_setup = __setup_cpu_745x,
966 .oprofile_cpu_type = "ppc/7450",
967 .oprofile_type = PPC_OPROFILE_G4,
968 .machine_check = machine_check_generic,
969 .platform = "ppc7450",
970 },
971 { /* 7455 rev 2.0 */
972 .pvr_mask = 0xffffffff,
973 .pvr_value = 0x80010200,
974 .cpu_name = "7455",
975 .cpu_features = CPU_FTRS_7455_20,
976 .cpu_user_features = COMMON_USER |
977 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
978 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
979 .icache_bsize = 32,
980 .dcache_bsize = 32,
981 .num_pmcs = 6,
982 .pmc_type = PPC_PMC_G4,
983 .cpu_setup = __setup_cpu_745x,
984 .oprofile_cpu_type = "ppc/7450",
985 .oprofile_type = PPC_OPROFILE_G4,
986 .machine_check = machine_check_generic,
987 .platform = "ppc7450",
988 },
989 { /* 7455 others */
990 .pvr_mask = 0xffff0000,
991 .pvr_value = 0x80010000,
992 .cpu_name = "7455",
993 .cpu_features = CPU_FTRS_7455,
994 .cpu_user_features = COMMON_USER |
995 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
996 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
997 .icache_bsize = 32,
998 .dcache_bsize = 32,
999 .num_pmcs = 6,
1000 .pmc_type = PPC_PMC_G4,
1001 .cpu_setup = __setup_cpu_745x,
1002 .oprofile_cpu_type = "ppc/7450",
1003 .oprofile_type = PPC_OPROFILE_G4,
1004 .machine_check = machine_check_generic,
1005 .platform = "ppc7450",
1006 },
1007 { /* 7447/7457 Rev 1.0 */
1008 .pvr_mask = 0xffffffff,
1009 .pvr_value = 0x80020100,
1010 .cpu_name = "7447/7457",
1011 .cpu_features = CPU_FTRS_7447_10,
1012 .cpu_user_features = COMMON_USER |
1013 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1014 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1015 .icache_bsize = 32,
1016 .dcache_bsize = 32,
1017 .num_pmcs = 6,
1018 .pmc_type = PPC_PMC_G4,
1019 .cpu_setup = __setup_cpu_745x,
1020 .oprofile_cpu_type = "ppc/7450",
1021 .oprofile_type = PPC_OPROFILE_G4,
1022 .machine_check = machine_check_generic,
1023 .platform = "ppc7450",
1024 },
1025 { /* 7447/7457 Rev 1.1 */
1026 .pvr_mask = 0xffffffff,
1027 .pvr_value = 0x80020101,
1028 .cpu_name = "7447/7457",
1029 .cpu_features = CPU_FTRS_7447_10,
1030 .cpu_user_features = COMMON_USER |
1031 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1032 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1033 .icache_bsize = 32,
1034 .dcache_bsize = 32,
1035 .num_pmcs = 6,
1036 .pmc_type = PPC_PMC_G4,
1037 .cpu_setup = __setup_cpu_745x,
1038 .oprofile_cpu_type = "ppc/7450",
1039 .oprofile_type = PPC_OPROFILE_G4,
1040 .machine_check = machine_check_generic,
1041 .platform = "ppc7450",
1042 },
1043 { /* 7447/7457 Rev 1.2 and later */
1044 .pvr_mask = 0xffff0000,
1045 .pvr_value = 0x80020000,
1046 .cpu_name = "7447/7457",
1047 .cpu_features = CPU_FTRS_7447,
1048 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1049 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1050 .icache_bsize = 32,
1051 .dcache_bsize = 32,
1052 .num_pmcs = 6,
1053 .pmc_type = PPC_PMC_G4,
1054 .cpu_setup = __setup_cpu_745x,
1055 .oprofile_cpu_type = "ppc/7450",
1056 .oprofile_type = PPC_OPROFILE_G4,
1057 .machine_check = machine_check_generic,
1058 .platform = "ppc7450",
1059 },
1060 { /* 7447A */
1061 .pvr_mask = 0xffff0000,
1062 .pvr_value = 0x80030000,
1063 .cpu_name = "7447A",
1064 .cpu_features = CPU_FTRS_7447A,
1065 .cpu_user_features = COMMON_USER |
1066 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1067 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1068 .icache_bsize = 32,
1069 .dcache_bsize = 32,
1070 .num_pmcs = 6,
1071 .pmc_type = PPC_PMC_G4,
1072 .cpu_setup = __setup_cpu_745x,
1073 .oprofile_cpu_type = "ppc/7450",
1074 .oprofile_type = PPC_OPROFILE_G4,
1075 .machine_check = machine_check_generic,
1076 .platform = "ppc7450",
1077 },
1078 { /* 7448 */
1079 .pvr_mask = 0xffff0000,
1080 .pvr_value = 0x80040000,
1081 .cpu_name = "7448",
1082 .cpu_features = CPU_FTRS_7448,
1083 .cpu_user_features = COMMON_USER |
1084 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1085 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1086 .icache_bsize = 32,
1087 .dcache_bsize = 32,
1088 .num_pmcs = 6,
1089 .pmc_type = PPC_PMC_G4,
1090 .cpu_setup = __setup_cpu_745x,
1091 .oprofile_cpu_type = "ppc/7450",
1092 .oprofile_type = PPC_OPROFILE_G4,
1093 .machine_check = machine_check_generic,
1094 .platform = "ppc7450",
1095 },
1096 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1097 .pvr_mask = 0x7fff0000,
1098 .pvr_value = 0x00810000,
1099 .cpu_name = "82xx",
1100 .cpu_features = CPU_FTRS_82XX,
1101 .cpu_user_features = COMMON_USER,
1102 .mmu_features = 0,
1103 .icache_bsize = 32,
1104 .dcache_bsize = 32,
1105 .cpu_setup = __setup_cpu_603,
1106 .machine_check = machine_check_generic,
1107 .platform = "ppc603",
1108 },
1109 { /* All G2_LE (603e core, plus some) have the same pvr */
1110 .pvr_mask = 0x7fff0000,
1111 .pvr_value = 0x00820000,
1112 .cpu_name = "G2_LE",
1113 .cpu_features = CPU_FTRS_G2_LE,
1114 .cpu_user_features = COMMON_USER,
1115 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1116 .icache_bsize = 32,
1117 .dcache_bsize = 32,
1118 .cpu_setup = __setup_cpu_603,
1119 .machine_check = machine_check_generic,
1120 .platform = "ppc603",
1121 },
1122 { /* e300c1 (a 603e core, plus some) on 83xx */
1123 .pvr_mask = 0x7fff0000,
1124 .pvr_value = 0x00830000,
1125 .cpu_name = "e300c1",
1126 .cpu_features = CPU_FTRS_E300,
1127 .cpu_user_features = COMMON_USER,
1128 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1129 .icache_bsize = 32,
1130 .dcache_bsize = 32,
1131 .cpu_setup = __setup_cpu_603,
1132 .machine_check = machine_check_generic,
1133 .platform = "ppc603",
1134 },
1135 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1136 .pvr_mask = 0x7fff0000,
1137 .pvr_value = 0x00840000,
1138 .cpu_name = "e300c2",
1139 .cpu_features = CPU_FTRS_E300C2,
1140 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1141 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1142 MMU_FTR_NEED_DTLB_SW_LRU,
1143 .icache_bsize = 32,
1144 .dcache_bsize = 32,
1145 .cpu_setup = __setup_cpu_603,
1146 .machine_check = machine_check_generic,
1147 .platform = "ppc603",
1148 },
1149 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1150 .pvr_mask = 0x7fff0000,
1151 .pvr_value = 0x00850000,
1152 .cpu_name = "e300c3",
1153 .cpu_features = CPU_FTRS_E300,
1154 .cpu_user_features = COMMON_USER,
1155 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1156 MMU_FTR_NEED_DTLB_SW_LRU,
1157 .icache_bsize = 32,
1158 .dcache_bsize = 32,
1159 .cpu_setup = __setup_cpu_603,
1160 .num_pmcs = 4,
1161 .oprofile_cpu_type = "ppc/e300",
1162 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1163 .platform = "ppc603",
1164 },
1165 { /* e300c4 (e300c1, plus one IU) */
1166 .pvr_mask = 0x7fff0000,
1167 .pvr_value = 0x00860000,
1168 .cpu_name = "e300c4",
1169 .cpu_features = CPU_FTRS_E300,
1170 .cpu_user_features = COMMON_USER,
1171 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1172 MMU_FTR_NEED_DTLB_SW_LRU,
1173 .icache_bsize = 32,
1174 .dcache_bsize = 32,
1175 .cpu_setup = __setup_cpu_603,
1176 .machine_check = machine_check_generic,
1177 .num_pmcs = 4,
1178 .oprofile_cpu_type = "ppc/e300",
1179 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1180 .platform = "ppc603",
1181 },
1182 { /* default match, we assume split I/D cache & TB (non-601)... */
1183 .pvr_mask = 0x00000000,
1184 .pvr_value = 0x00000000,
1185 .cpu_name = "(generic PPC)",
1186 .cpu_features = CPU_FTRS_CLASSIC32,
1187 .cpu_user_features = COMMON_USER,
1188 .mmu_features = MMU_FTR_HPTE_TABLE,
1189 .icache_bsize = 32,
1190 .dcache_bsize = 32,
1191 .machine_check = machine_check_generic,
1192 .platform = "ppc603",
1193 },
1194 #endif /* CLASSIC_PPC */
1195 #ifdef CONFIG_8xx
1196 { /* 8xx */
1197 .pvr_mask = 0xffff0000,
1198 .pvr_value = 0x00500000,
1199 .cpu_name = "8xx",
1200 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1201 * if the 8xx code is there.... */
1202 .cpu_features = CPU_FTRS_8XX,
1203 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1204 .mmu_features = MMU_FTR_TYPE_8xx,
1205 .icache_bsize = 16,
1206 .dcache_bsize = 16,
1207 .platform = "ppc823",
1208 },
1209 #endif /* CONFIG_8xx */
1210 #ifdef CONFIG_40x
1211 { /* 403GC */
1212 .pvr_mask = 0xffffff00,
1213 .pvr_value = 0x00200200,
1214 .cpu_name = "403GC",
1215 .cpu_features = CPU_FTRS_40X,
1216 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1217 .mmu_features = MMU_FTR_TYPE_40x,
1218 .icache_bsize = 16,
1219 .dcache_bsize = 16,
1220 .machine_check = machine_check_4xx,
1221 .platform = "ppc403",
1222 },
1223 { /* 403GCX */
1224 .pvr_mask = 0xffffff00,
1225 .pvr_value = 0x00201400,
1226 .cpu_name = "403GCX",
1227 .cpu_features = CPU_FTRS_40X,
1228 .cpu_user_features = PPC_FEATURE_32 |
1229 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1230 .mmu_features = MMU_FTR_TYPE_40x,
1231 .icache_bsize = 16,
1232 .dcache_bsize = 16,
1233 .machine_check = machine_check_4xx,
1234 .platform = "ppc403",
1235 },
1236 { /* 403G ?? */
1237 .pvr_mask = 0xffff0000,
1238 .pvr_value = 0x00200000,
1239 .cpu_name = "403G ??",
1240 .cpu_features = CPU_FTRS_40X,
1241 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1242 .mmu_features = MMU_FTR_TYPE_40x,
1243 .icache_bsize = 16,
1244 .dcache_bsize = 16,
1245 .machine_check = machine_check_4xx,
1246 .platform = "ppc403",
1247 },
1248 { /* 405GP */
1249 .pvr_mask = 0xffff0000,
1250 .pvr_value = 0x40110000,
1251 .cpu_name = "405GP",
1252 .cpu_features = CPU_FTRS_40X,
1253 .cpu_user_features = PPC_FEATURE_32 |
1254 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1255 .mmu_features = MMU_FTR_TYPE_40x,
1256 .icache_bsize = 32,
1257 .dcache_bsize = 32,
1258 .machine_check = machine_check_4xx,
1259 .platform = "ppc405",
1260 },
1261 { /* STB 03xxx */
1262 .pvr_mask = 0xffff0000,
1263 .pvr_value = 0x40130000,
1264 .cpu_name = "STB03xxx",
1265 .cpu_features = CPU_FTRS_40X,
1266 .cpu_user_features = PPC_FEATURE_32 |
1267 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1268 .mmu_features = MMU_FTR_TYPE_40x,
1269 .icache_bsize = 32,
1270 .dcache_bsize = 32,
1271 .machine_check = machine_check_4xx,
1272 .platform = "ppc405",
1273 },
1274 { /* STB 04xxx */
1275 .pvr_mask = 0xffff0000,
1276 .pvr_value = 0x41810000,
1277 .cpu_name = "STB04xxx",
1278 .cpu_features = CPU_FTRS_40X,
1279 .cpu_user_features = PPC_FEATURE_32 |
1280 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1281 .mmu_features = MMU_FTR_TYPE_40x,
1282 .icache_bsize = 32,
1283 .dcache_bsize = 32,
1284 .machine_check = machine_check_4xx,
1285 .platform = "ppc405",
1286 },
1287 { /* NP405L */
1288 .pvr_mask = 0xffff0000,
1289 .pvr_value = 0x41610000,
1290 .cpu_name = "NP405L",
1291 .cpu_features = CPU_FTRS_40X,
1292 .cpu_user_features = PPC_FEATURE_32 |
1293 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1294 .mmu_features = MMU_FTR_TYPE_40x,
1295 .icache_bsize = 32,
1296 .dcache_bsize = 32,
1297 .machine_check = machine_check_4xx,
1298 .platform = "ppc405",
1299 },
1300 { /* NP4GS3 */
1301 .pvr_mask = 0xffff0000,
1302 .pvr_value = 0x40B10000,
1303 .cpu_name = "NP4GS3",
1304 .cpu_features = CPU_FTRS_40X,
1305 .cpu_user_features = PPC_FEATURE_32 |
1306 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1307 .mmu_features = MMU_FTR_TYPE_40x,
1308 .icache_bsize = 32,
1309 .dcache_bsize = 32,
1310 .machine_check = machine_check_4xx,
1311 .platform = "ppc405",
1312 },
1313 { /* NP405H */
1314 .pvr_mask = 0xffff0000,
1315 .pvr_value = 0x41410000,
1316 .cpu_name = "NP405H",
1317 .cpu_features = CPU_FTRS_40X,
1318 .cpu_user_features = PPC_FEATURE_32 |
1319 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1320 .mmu_features = MMU_FTR_TYPE_40x,
1321 .icache_bsize = 32,
1322 .dcache_bsize = 32,
1323 .machine_check = machine_check_4xx,
1324 .platform = "ppc405",
1325 },
1326 { /* 405GPr */
1327 .pvr_mask = 0xffff0000,
1328 .pvr_value = 0x50910000,
1329 .cpu_name = "405GPr",
1330 .cpu_features = CPU_FTRS_40X,
1331 .cpu_user_features = PPC_FEATURE_32 |
1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1333 .mmu_features = MMU_FTR_TYPE_40x,
1334 .icache_bsize = 32,
1335 .dcache_bsize = 32,
1336 .machine_check = machine_check_4xx,
1337 .platform = "ppc405",
1338 },
1339 { /* STBx25xx */
1340 .pvr_mask = 0xffff0000,
1341 .pvr_value = 0x51510000,
1342 .cpu_name = "STBx25xx",
1343 .cpu_features = CPU_FTRS_40X,
1344 .cpu_user_features = PPC_FEATURE_32 |
1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1346 .mmu_features = MMU_FTR_TYPE_40x,
1347 .icache_bsize = 32,
1348 .dcache_bsize = 32,
1349 .machine_check = machine_check_4xx,
1350 .platform = "ppc405",
1351 },
1352 { /* 405LP */
1353 .pvr_mask = 0xffff0000,
1354 .pvr_value = 0x41F10000,
1355 .cpu_name = "405LP",
1356 .cpu_features = CPU_FTRS_40X,
1357 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1358 .mmu_features = MMU_FTR_TYPE_40x,
1359 .icache_bsize = 32,
1360 .dcache_bsize = 32,
1361 .machine_check = machine_check_4xx,
1362 .platform = "ppc405",
1363 },
1364 { /* Xilinx Virtex-II Pro */
1365 .pvr_mask = 0xfffff000,
1366 .pvr_value = 0x20010000,
1367 .cpu_name = "Virtex-II Pro",
1368 .cpu_features = CPU_FTRS_40X,
1369 .cpu_user_features = PPC_FEATURE_32 |
1370 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1371 .mmu_features = MMU_FTR_TYPE_40x,
1372 .icache_bsize = 32,
1373 .dcache_bsize = 32,
1374 .machine_check = machine_check_4xx,
1375 .platform = "ppc405",
1376 },
1377 { /* Xilinx Virtex-4 FX */
1378 .pvr_mask = 0xfffff000,
1379 .pvr_value = 0x20011000,
1380 .cpu_name = "Virtex-4 FX",
1381 .cpu_features = CPU_FTRS_40X,
1382 .cpu_user_features = PPC_FEATURE_32 |
1383 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1384 .mmu_features = MMU_FTR_TYPE_40x,
1385 .icache_bsize = 32,
1386 .dcache_bsize = 32,
1387 .machine_check = machine_check_4xx,
1388 .platform = "ppc405",
1389 },
1390 { /* 405EP */
1391 .pvr_mask = 0xffff0000,
1392 .pvr_value = 0x51210000,
1393 .cpu_name = "405EP",
1394 .cpu_features = CPU_FTRS_40X,
1395 .cpu_user_features = PPC_FEATURE_32 |
1396 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1397 .mmu_features = MMU_FTR_TYPE_40x,
1398 .icache_bsize = 32,
1399 .dcache_bsize = 32,
1400 .machine_check = machine_check_4xx,
1401 .platform = "ppc405",
1402 },
1403 { /* 405EX Rev. A/B with Security */
1404 .pvr_mask = 0xffff000f,
1405 .pvr_value = 0x12910007,
1406 .cpu_name = "405EX Rev. A/B",
1407 .cpu_features = CPU_FTRS_40X,
1408 .cpu_user_features = PPC_FEATURE_32 |
1409 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1410 .mmu_features = MMU_FTR_TYPE_40x,
1411 .icache_bsize = 32,
1412 .dcache_bsize = 32,
1413 .machine_check = machine_check_4xx,
1414 .platform = "ppc405",
1415 },
1416 { /* 405EX Rev. C without Security */
1417 .pvr_mask = 0xffff000f,
1418 .pvr_value = 0x1291000d,
1419 .cpu_name = "405EX Rev. C",
1420 .cpu_features = CPU_FTRS_40X,
1421 .cpu_user_features = PPC_FEATURE_32 |
1422 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1423 .mmu_features = MMU_FTR_TYPE_40x,
1424 .icache_bsize = 32,
1425 .dcache_bsize = 32,
1426 .machine_check = machine_check_4xx,
1427 .platform = "ppc405",
1428 },
1429 { /* 405EX Rev. C with Security */
1430 .pvr_mask = 0xffff000f,
1431 .pvr_value = 0x1291000f,
1432 .cpu_name = "405EX Rev. C",
1433 .cpu_features = CPU_FTRS_40X,
1434 .cpu_user_features = PPC_FEATURE_32 |
1435 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1436 .mmu_features = MMU_FTR_TYPE_40x,
1437 .icache_bsize = 32,
1438 .dcache_bsize = 32,
1439 .machine_check = machine_check_4xx,
1440 .platform = "ppc405",
1441 },
1442 { /* 405EX Rev. D without Security */
1443 .pvr_mask = 0xffff000f,
1444 .pvr_value = 0x12910003,
1445 .cpu_name = "405EX Rev. D",
1446 .cpu_features = CPU_FTRS_40X,
1447 .cpu_user_features = PPC_FEATURE_32 |
1448 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1449 .mmu_features = MMU_FTR_TYPE_40x,
1450 .icache_bsize = 32,
1451 .dcache_bsize = 32,
1452 .machine_check = machine_check_4xx,
1453 .platform = "ppc405",
1454 },
1455 { /* 405EX Rev. D with Security */
1456 .pvr_mask = 0xffff000f,
1457 .pvr_value = 0x12910005,
1458 .cpu_name = "405EX Rev. D",
1459 .cpu_features = CPU_FTRS_40X,
1460 .cpu_user_features = PPC_FEATURE_32 |
1461 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1462 .mmu_features = MMU_FTR_TYPE_40x,
1463 .icache_bsize = 32,
1464 .dcache_bsize = 32,
1465 .machine_check = machine_check_4xx,
1466 .platform = "ppc405",
1467 },
1468 { /* 405EXr Rev. A/B without Security */
1469 .pvr_mask = 0xffff000f,
1470 .pvr_value = 0x12910001,
1471 .cpu_name = "405EXr Rev. A/B",
1472 .cpu_features = CPU_FTRS_40X,
1473 .cpu_user_features = PPC_FEATURE_32 |
1474 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1475 .mmu_features = MMU_FTR_TYPE_40x,
1476 .icache_bsize = 32,
1477 .dcache_bsize = 32,
1478 .machine_check = machine_check_4xx,
1479 .platform = "ppc405",
1480 },
1481 { /* 405EXr Rev. C without Security */
1482 .pvr_mask = 0xffff000f,
1483 .pvr_value = 0x12910009,
1484 .cpu_name = "405EXr Rev. C",
1485 .cpu_features = CPU_FTRS_40X,
1486 .cpu_user_features = PPC_FEATURE_32 |
1487 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1488 .mmu_features = MMU_FTR_TYPE_40x,
1489 .icache_bsize = 32,
1490 .dcache_bsize = 32,
1491 .machine_check = machine_check_4xx,
1492 .platform = "ppc405",
1493 },
1494 { /* 405EXr Rev. C with Security */
1495 .pvr_mask = 0xffff000f,
1496 .pvr_value = 0x1291000b,
1497 .cpu_name = "405EXr Rev. C",
1498 .cpu_features = CPU_FTRS_40X,
1499 .cpu_user_features = PPC_FEATURE_32 |
1500 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1501 .mmu_features = MMU_FTR_TYPE_40x,
1502 .icache_bsize = 32,
1503 .dcache_bsize = 32,
1504 .machine_check = machine_check_4xx,
1505 .platform = "ppc405",
1506 },
1507 { /* 405EXr Rev. D without Security */
1508 .pvr_mask = 0xffff000f,
1509 .pvr_value = 0x12910000,
1510 .cpu_name = "405EXr Rev. D",
1511 .cpu_features = CPU_FTRS_40X,
1512 .cpu_user_features = PPC_FEATURE_32 |
1513 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1514 .mmu_features = MMU_FTR_TYPE_40x,
1515 .icache_bsize = 32,
1516 .dcache_bsize = 32,
1517 .machine_check = machine_check_4xx,
1518 .platform = "ppc405",
1519 },
1520 { /* 405EXr Rev. D with Security */
1521 .pvr_mask = 0xffff000f,
1522 .pvr_value = 0x12910002,
1523 .cpu_name = "405EXr Rev. D",
1524 .cpu_features = CPU_FTRS_40X,
1525 .cpu_user_features = PPC_FEATURE_32 |
1526 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1527 .mmu_features = MMU_FTR_TYPE_40x,
1528 .icache_bsize = 32,
1529 .dcache_bsize = 32,
1530 .machine_check = machine_check_4xx,
1531 .platform = "ppc405",
1532 },
1533 {
1534 /* 405EZ */
1535 .pvr_mask = 0xffff0000,
1536 .pvr_value = 0x41510000,
1537 .cpu_name = "405EZ",
1538 .cpu_features = CPU_FTRS_40X,
1539 .cpu_user_features = PPC_FEATURE_32 |
1540 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1541 .mmu_features = MMU_FTR_TYPE_40x,
1542 .icache_bsize = 32,
1543 .dcache_bsize = 32,
1544 .machine_check = machine_check_4xx,
1545 .platform = "ppc405",
1546 },
1547 { /* APM8018X */
1548 .pvr_mask = 0xffff0000,
1549 .pvr_value = 0x7ff11432,
1550 .cpu_name = "APM8018X",
1551 .cpu_features = CPU_FTRS_40X,
1552 .cpu_user_features = PPC_FEATURE_32 |
1553 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1554 .mmu_features = MMU_FTR_TYPE_40x,
1555 .icache_bsize = 32,
1556 .dcache_bsize = 32,
1557 .machine_check = machine_check_4xx,
1558 .platform = "ppc405",
1559 },
1560 { /* default match */
1561 .pvr_mask = 0x00000000,
1562 .pvr_value = 0x00000000,
1563 .cpu_name = "(generic 40x PPC)",
1564 .cpu_features = CPU_FTRS_40X,
1565 .cpu_user_features = PPC_FEATURE_32 |
1566 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1567 .mmu_features = MMU_FTR_TYPE_40x,
1568 .icache_bsize = 32,
1569 .dcache_bsize = 32,
1570 .machine_check = machine_check_4xx,
1571 .platform = "ppc405",
1572 }
1573
1574 #endif /* CONFIG_40x */
1575 #ifdef CONFIG_44x
1576 {
1577 .pvr_mask = 0xf0000fff,
1578 .pvr_value = 0x40000850,
1579 .cpu_name = "440GR Rev. A",
1580 .cpu_features = CPU_FTRS_44X,
1581 .cpu_user_features = COMMON_USER_BOOKE,
1582 .mmu_features = MMU_FTR_TYPE_44x,
1583 .icache_bsize = 32,
1584 .dcache_bsize = 32,
1585 .machine_check = machine_check_4xx,
1586 .platform = "ppc440",
1587 },
1588 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1589 .pvr_mask = 0xf0000fff,
1590 .pvr_value = 0x40000858,
1591 .cpu_name = "440EP Rev. A",
1592 .cpu_features = CPU_FTRS_44X,
1593 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1594 .mmu_features = MMU_FTR_TYPE_44x,
1595 .icache_bsize = 32,
1596 .dcache_bsize = 32,
1597 .cpu_setup = __setup_cpu_440ep,
1598 .machine_check = machine_check_4xx,
1599 .platform = "ppc440",
1600 },
1601 {
1602 .pvr_mask = 0xf0000fff,
1603 .pvr_value = 0x400008d3,
1604 .cpu_name = "440GR Rev. B",
1605 .cpu_features = CPU_FTRS_44X,
1606 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1607 .mmu_features = MMU_FTR_TYPE_44x,
1608 .icache_bsize = 32,
1609 .dcache_bsize = 32,
1610 .machine_check = machine_check_4xx,
1611 .platform = "ppc440",
1612 },
1613 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1614 .pvr_mask = 0xf0000ff7,
1615 .pvr_value = 0x400008d4,
1616 .cpu_name = "440EP Rev. C",
1617 .cpu_features = CPU_FTRS_44X,
1618 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1619 .mmu_features = MMU_FTR_TYPE_44x,
1620 .icache_bsize = 32,
1621 .dcache_bsize = 32,
1622 .cpu_setup = __setup_cpu_440ep,
1623 .machine_check = machine_check_4xx,
1624 .platform = "ppc440",
1625 },
1626 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1627 .pvr_mask = 0xf0000fff,
1628 .pvr_value = 0x400008db,
1629 .cpu_name = "440EP Rev. B",
1630 .cpu_features = CPU_FTRS_44X,
1631 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1632 .mmu_features = MMU_FTR_TYPE_44x,
1633 .icache_bsize = 32,
1634 .dcache_bsize = 32,
1635 .cpu_setup = __setup_cpu_440ep,
1636 .machine_check = machine_check_4xx,
1637 .platform = "ppc440",
1638 },
1639 { /* 440GRX */
1640 .pvr_mask = 0xf0000ffb,
1641 .pvr_value = 0x200008D0,
1642 .cpu_name = "440GRX",
1643 .cpu_features = CPU_FTRS_44X,
1644 .cpu_user_features = COMMON_USER_BOOKE,
1645 .mmu_features = MMU_FTR_TYPE_44x,
1646 .icache_bsize = 32,
1647 .dcache_bsize = 32,
1648 .cpu_setup = __setup_cpu_440grx,
1649 .machine_check = machine_check_440A,
1650 .platform = "ppc440",
1651 },
1652 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1653 .pvr_mask = 0xf0000ffb,
1654 .pvr_value = 0x200008D8,
1655 .cpu_name = "440EPX",
1656 .cpu_features = CPU_FTRS_44X,
1657 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1658 .mmu_features = MMU_FTR_TYPE_44x,
1659 .icache_bsize = 32,
1660 .dcache_bsize = 32,
1661 .cpu_setup = __setup_cpu_440epx,
1662 .machine_check = machine_check_440A,
1663 .platform = "ppc440",
1664 },
1665 { /* 440GP Rev. B */
1666 .pvr_mask = 0xf0000fff,
1667 .pvr_value = 0x40000440,
1668 .cpu_name = "440GP Rev. B",
1669 .cpu_features = CPU_FTRS_44X,
1670 .cpu_user_features = COMMON_USER_BOOKE,
1671 .mmu_features = MMU_FTR_TYPE_44x,
1672 .icache_bsize = 32,
1673 .dcache_bsize = 32,
1674 .machine_check = machine_check_4xx,
1675 .platform = "ppc440gp",
1676 },
1677 { /* 440GP Rev. C */
1678 .pvr_mask = 0xf0000fff,
1679 .pvr_value = 0x40000481,
1680 .cpu_name = "440GP Rev. C",
1681 .cpu_features = CPU_FTRS_44X,
1682 .cpu_user_features = COMMON_USER_BOOKE,
1683 .mmu_features = MMU_FTR_TYPE_44x,
1684 .icache_bsize = 32,
1685 .dcache_bsize = 32,
1686 .machine_check = machine_check_4xx,
1687 .platform = "ppc440gp",
1688 },
1689 { /* 440GX Rev. A */
1690 .pvr_mask = 0xf0000fff,
1691 .pvr_value = 0x50000850,
1692 .cpu_name = "440GX Rev. A",
1693 .cpu_features = CPU_FTRS_44X,
1694 .cpu_user_features = COMMON_USER_BOOKE,
1695 .mmu_features = MMU_FTR_TYPE_44x,
1696 .icache_bsize = 32,
1697 .dcache_bsize = 32,
1698 .cpu_setup = __setup_cpu_440gx,
1699 .machine_check = machine_check_440A,
1700 .platform = "ppc440",
1701 },
1702 { /* 440GX Rev. B */
1703 .pvr_mask = 0xf0000fff,
1704 .pvr_value = 0x50000851,
1705 .cpu_name = "440GX Rev. B",
1706 .cpu_features = CPU_FTRS_44X,
1707 .cpu_user_features = COMMON_USER_BOOKE,
1708 .mmu_features = MMU_FTR_TYPE_44x,
1709 .icache_bsize = 32,
1710 .dcache_bsize = 32,
1711 .cpu_setup = __setup_cpu_440gx,
1712 .machine_check = machine_check_440A,
1713 .platform = "ppc440",
1714 },
1715 { /* 440GX Rev. C */
1716 .pvr_mask = 0xf0000fff,
1717 .pvr_value = 0x50000892,
1718 .cpu_name = "440GX Rev. C",
1719 .cpu_features = CPU_FTRS_44X,
1720 .cpu_user_features = COMMON_USER_BOOKE,
1721 .mmu_features = MMU_FTR_TYPE_44x,
1722 .icache_bsize = 32,
1723 .dcache_bsize = 32,
1724 .cpu_setup = __setup_cpu_440gx,
1725 .machine_check = machine_check_440A,
1726 .platform = "ppc440",
1727 },
1728 { /* 440GX Rev. F */
1729 .pvr_mask = 0xf0000fff,
1730 .pvr_value = 0x50000894,
1731 .cpu_name = "440GX Rev. F",
1732 .cpu_features = CPU_FTRS_44X,
1733 .cpu_user_features = COMMON_USER_BOOKE,
1734 .mmu_features = MMU_FTR_TYPE_44x,
1735 .icache_bsize = 32,
1736 .dcache_bsize = 32,
1737 .cpu_setup = __setup_cpu_440gx,
1738 .machine_check = machine_check_440A,
1739 .platform = "ppc440",
1740 },
1741 { /* 440SP Rev. A */
1742 .pvr_mask = 0xfff00fff,
1743 .pvr_value = 0x53200891,
1744 .cpu_name = "440SP Rev. A",
1745 .cpu_features = CPU_FTRS_44X,
1746 .cpu_user_features = COMMON_USER_BOOKE,
1747 .mmu_features = MMU_FTR_TYPE_44x,
1748 .icache_bsize = 32,
1749 .dcache_bsize = 32,
1750 .machine_check = machine_check_4xx,
1751 .platform = "ppc440",
1752 },
1753 { /* 440SPe Rev. A */
1754 .pvr_mask = 0xfff00fff,
1755 .pvr_value = 0x53400890,
1756 .cpu_name = "440SPe Rev. A",
1757 .cpu_features = CPU_FTRS_44X,
1758 .cpu_user_features = COMMON_USER_BOOKE,
1759 .mmu_features = MMU_FTR_TYPE_44x,
1760 .icache_bsize = 32,
1761 .dcache_bsize = 32,
1762 .cpu_setup = __setup_cpu_440spe,
1763 .machine_check = machine_check_440A,
1764 .platform = "ppc440",
1765 },
1766 { /* 440SPe Rev. B */
1767 .pvr_mask = 0xfff00fff,
1768 .pvr_value = 0x53400891,
1769 .cpu_name = "440SPe Rev. B",
1770 .cpu_features = CPU_FTRS_44X,
1771 .cpu_user_features = COMMON_USER_BOOKE,
1772 .mmu_features = MMU_FTR_TYPE_44x,
1773 .icache_bsize = 32,
1774 .dcache_bsize = 32,
1775 .cpu_setup = __setup_cpu_440spe,
1776 .machine_check = machine_check_440A,
1777 .platform = "ppc440",
1778 },
1779 { /* 440 in Xilinx Virtex-5 FXT */
1780 .pvr_mask = 0xfffffff0,
1781 .pvr_value = 0x7ff21910,
1782 .cpu_name = "440 in Virtex-5 FXT",
1783 .cpu_features = CPU_FTRS_44X,
1784 .cpu_user_features = COMMON_USER_BOOKE,
1785 .mmu_features = MMU_FTR_TYPE_44x,
1786 .icache_bsize = 32,
1787 .dcache_bsize = 32,
1788 .cpu_setup = __setup_cpu_440x5,
1789 .machine_check = machine_check_440A,
1790 .platform = "ppc440",
1791 },
1792 { /* 460EX */
1793 .pvr_mask = 0xffff0006,
1794 .pvr_value = 0x13020002,
1795 .cpu_name = "460EX",
1796 .cpu_features = CPU_FTRS_440x6,
1797 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1798 .mmu_features = MMU_FTR_TYPE_44x,
1799 .icache_bsize = 32,
1800 .dcache_bsize = 32,
1801 .cpu_setup = __setup_cpu_460ex,
1802 .machine_check = machine_check_440A,
1803 .platform = "ppc440",
1804 },
1805 { /* 460EX Rev B */
1806 .pvr_mask = 0xffff0007,
1807 .pvr_value = 0x13020004,
1808 .cpu_name = "460EX Rev. B",
1809 .cpu_features = CPU_FTRS_440x6,
1810 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1811 .mmu_features = MMU_FTR_TYPE_44x,
1812 .icache_bsize = 32,
1813 .dcache_bsize = 32,
1814 .cpu_setup = __setup_cpu_460ex,
1815 .machine_check = machine_check_440A,
1816 .platform = "ppc440",
1817 },
1818 { /* 460GT */
1819 .pvr_mask = 0xffff0006,
1820 .pvr_value = 0x13020000,
1821 .cpu_name = "460GT",
1822 .cpu_features = CPU_FTRS_440x6,
1823 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1824 .mmu_features = MMU_FTR_TYPE_44x,
1825 .icache_bsize = 32,
1826 .dcache_bsize = 32,
1827 .cpu_setup = __setup_cpu_460gt,
1828 .machine_check = machine_check_440A,
1829 .platform = "ppc440",
1830 },
1831 { /* 460GT Rev B */
1832 .pvr_mask = 0xffff0007,
1833 .pvr_value = 0x13020005,
1834 .cpu_name = "460GT Rev. B",
1835 .cpu_features = CPU_FTRS_440x6,
1836 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1837 .mmu_features = MMU_FTR_TYPE_44x,
1838 .icache_bsize = 32,
1839 .dcache_bsize = 32,
1840 .cpu_setup = __setup_cpu_460gt,
1841 .machine_check = machine_check_440A,
1842 .platform = "ppc440",
1843 },
1844 { /* 460SX */
1845 .pvr_mask = 0xffffff00,
1846 .pvr_value = 0x13541800,
1847 .cpu_name = "460SX",
1848 .cpu_features = CPU_FTRS_44X,
1849 .cpu_user_features = COMMON_USER_BOOKE,
1850 .mmu_features = MMU_FTR_TYPE_44x,
1851 .icache_bsize = 32,
1852 .dcache_bsize = 32,
1853 .cpu_setup = __setup_cpu_460sx,
1854 .machine_check = machine_check_440A,
1855 .platform = "ppc440",
1856 },
1857 { /* 464 in APM821xx */
1858 .pvr_mask = 0xfffffff0,
1859 .pvr_value = 0x12C41C80,
1860 .cpu_name = "APM821XX",
1861 .cpu_features = CPU_FTRS_44X,
1862 .cpu_user_features = COMMON_USER_BOOKE |
1863 PPC_FEATURE_HAS_FPU,
1864 .mmu_features = MMU_FTR_TYPE_44x,
1865 .icache_bsize = 32,
1866 .dcache_bsize = 32,
1867 .cpu_setup = __setup_cpu_apm821xx,
1868 .machine_check = machine_check_440A,
1869 .platform = "ppc440",
1870 },
1871 { /* 476 DD2 core */
1872 .pvr_mask = 0xffffffff,
1873 .pvr_value = 0x11a52080,
1874 .cpu_name = "476",
1875 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1876 .cpu_user_features = COMMON_USER_BOOKE |
1877 PPC_FEATURE_HAS_FPU,
1878 .mmu_features = MMU_FTR_TYPE_47x |
1879 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1880 .icache_bsize = 32,
1881 .dcache_bsize = 128,
1882 .machine_check = machine_check_47x,
1883 .platform = "ppc470",
1884 },
1885 { /* 476fpe */
1886 .pvr_mask = 0xffff0000,
1887 .pvr_value = 0x7ff50000,
1888 .cpu_name = "476fpe",
1889 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1890 .cpu_user_features = COMMON_USER_BOOKE |
1891 PPC_FEATURE_HAS_FPU,
1892 .mmu_features = MMU_FTR_TYPE_47x |
1893 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1894 .icache_bsize = 32,
1895 .dcache_bsize = 128,
1896 .machine_check = machine_check_47x,
1897 .platform = "ppc470",
1898 },
1899 { /* 476 iss */
1900 .pvr_mask = 0xffff0000,
1901 .pvr_value = 0x00050000,
1902 .cpu_name = "476",
1903 .cpu_features = CPU_FTRS_47X,
1904 .cpu_user_features = COMMON_USER_BOOKE |
1905 PPC_FEATURE_HAS_FPU,
1906 .mmu_features = MMU_FTR_TYPE_47x |
1907 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1908 .icache_bsize = 32,
1909 .dcache_bsize = 128,
1910 .machine_check = machine_check_47x,
1911 .platform = "ppc470",
1912 },
1913 { /* 476 others */
1914 .pvr_mask = 0xffff0000,
1915 .pvr_value = 0x11a50000,
1916 .cpu_name = "476",
1917 .cpu_features = CPU_FTRS_47X,
1918 .cpu_user_features = COMMON_USER_BOOKE |
1919 PPC_FEATURE_HAS_FPU,
1920 .mmu_features = MMU_FTR_TYPE_47x |
1921 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1922 .icache_bsize = 32,
1923 .dcache_bsize = 128,
1924 .machine_check = machine_check_47x,
1925 .platform = "ppc470",
1926 },
1927 { /* default match */
1928 .pvr_mask = 0x00000000,
1929 .pvr_value = 0x00000000,
1930 .cpu_name = "(generic 44x PPC)",
1931 .cpu_features = CPU_FTRS_44X,
1932 .cpu_user_features = COMMON_USER_BOOKE,
1933 .mmu_features = MMU_FTR_TYPE_44x,
1934 .icache_bsize = 32,
1935 .dcache_bsize = 32,
1936 .machine_check = machine_check_4xx,
1937 .platform = "ppc440",
1938 }
1939 #endif /* CONFIG_44x */
1940 #ifdef CONFIG_E200
1941 { /* e200z5 */
1942 .pvr_mask = 0xfff00000,
1943 .pvr_value = 0x81000000,
1944 .cpu_name = "e200z5",
1945 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1946 .cpu_features = CPU_FTRS_E200,
1947 .cpu_user_features = COMMON_USER_BOOKE |
1948 PPC_FEATURE_HAS_EFP_SINGLE |
1949 PPC_FEATURE_UNIFIED_CACHE,
1950 .mmu_features = MMU_FTR_TYPE_FSL_E,
1951 .dcache_bsize = 32,
1952 .machine_check = machine_check_e200,
1953 .platform = "ppc5554",
1954 },
1955 { /* e200z6 */
1956 .pvr_mask = 0xfff00000,
1957 .pvr_value = 0x81100000,
1958 .cpu_name = "e200z6",
1959 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1960 .cpu_features = CPU_FTRS_E200,
1961 .cpu_user_features = COMMON_USER_BOOKE |
1962 PPC_FEATURE_HAS_SPE_COMP |
1963 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1964 PPC_FEATURE_UNIFIED_CACHE,
1965 .mmu_features = MMU_FTR_TYPE_FSL_E,
1966 .dcache_bsize = 32,
1967 .machine_check = machine_check_e200,
1968 .platform = "ppc5554",
1969 },
1970 { /* default match */
1971 .pvr_mask = 0x00000000,
1972 .pvr_value = 0x00000000,
1973 .cpu_name = "(generic E200 PPC)",
1974 .cpu_features = CPU_FTRS_E200,
1975 .cpu_user_features = COMMON_USER_BOOKE |
1976 PPC_FEATURE_HAS_EFP_SINGLE |
1977 PPC_FEATURE_UNIFIED_CACHE,
1978 .mmu_features = MMU_FTR_TYPE_FSL_E,
1979 .dcache_bsize = 32,
1980 .cpu_setup = __setup_cpu_e200,
1981 .machine_check = machine_check_e200,
1982 .platform = "ppc5554",
1983 }
1984 #endif /* CONFIG_E200 */
1985 #endif /* CONFIG_PPC32 */
1986 #ifdef CONFIG_E500
1987 #ifdef CONFIG_PPC32
1988 { /* e500 */
1989 .pvr_mask = 0xffff0000,
1990 .pvr_value = 0x80200000,
1991 .cpu_name = "e500",
1992 .cpu_features = CPU_FTRS_E500,
1993 .cpu_user_features = COMMON_USER_BOOKE |
1994 PPC_FEATURE_HAS_SPE_COMP |
1995 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1996 .mmu_features = MMU_FTR_TYPE_FSL_E,
1997 .icache_bsize = 32,
1998 .dcache_bsize = 32,
1999 .num_pmcs = 4,
2000 .oprofile_cpu_type = "ppc/e500",
2001 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2002 .cpu_setup = __setup_cpu_e500v1,
2003 .machine_check = machine_check_e500,
2004 .platform = "ppc8540",
2005 },
2006 { /* e500v2 */
2007 .pvr_mask = 0xffff0000,
2008 .pvr_value = 0x80210000,
2009 .cpu_name = "e500v2",
2010 .cpu_features = CPU_FTRS_E500_2,
2011 .cpu_user_features = COMMON_USER_BOOKE |
2012 PPC_FEATURE_HAS_SPE_COMP |
2013 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2014 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2015 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2016 .icache_bsize = 32,
2017 .dcache_bsize = 32,
2018 .num_pmcs = 4,
2019 .oprofile_cpu_type = "ppc/e500",
2020 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2021 .cpu_setup = __setup_cpu_e500v2,
2022 .machine_check = machine_check_e500,
2023 .platform = "ppc8548",
2024 },
2025 { /* e500mc */
2026 .pvr_mask = 0xffff0000,
2027 .pvr_value = 0x80230000,
2028 .cpu_name = "e500mc",
2029 .cpu_features = CPU_FTRS_E500MC,
2030 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2031 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2032 MMU_FTR_USE_TLBILX,
2033 .icache_bsize = 64,
2034 .dcache_bsize = 64,
2035 .num_pmcs = 4,
2036 .oprofile_cpu_type = "ppc/e500mc",
2037 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2038 .cpu_setup = __setup_cpu_e500mc,
2039 .machine_check = machine_check_e500mc,
2040 .platform = "ppce500mc",
2041 },
2042 #endif /* CONFIG_PPC32 */
2043 { /* e5500 */
2044 .pvr_mask = 0xffff0000,
2045 .pvr_value = 0x80240000,
2046 .cpu_name = "e5500",
2047 .cpu_features = CPU_FTRS_E5500,
2048 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2049 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2050 MMU_FTR_USE_TLBILX,
2051 .icache_bsize = 64,
2052 .dcache_bsize = 64,
2053 .num_pmcs = 4,
2054 .oprofile_cpu_type = "ppc/e500mc",
2055 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2056 .cpu_setup = __setup_cpu_e5500,
2057 #ifndef CONFIG_PPC32
2058 .cpu_restore = __restore_cpu_e5500,
2059 #endif
2060 .machine_check = machine_check_e500mc,
2061 .platform = "ppce5500",
2062 },
2063 { /* e6500 */
2064 .pvr_mask = 0xffff0000,
2065 .pvr_value = 0x80400000,
2066 .cpu_name = "e6500",
2067 .cpu_features = CPU_FTRS_E6500,
2068 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2069 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2070 MMU_FTR_USE_TLBILX,
2071 .icache_bsize = 64,
2072 .dcache_bsize = 64,
2073 .num_pmcs = 4,
2074 .oprofile_cpu_type = "ppc/e6500",
2075 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2076 .cpu_setup = __setup_cpu_e5500,
2077 #ifndef CONFIG_PPC32
2078 .cpu_restore = __restore_cpu_e5500,
2079 #endif
2080 .machine_check = machine_check_e500mc,
2081 .platform = "ppce6500",
2082 },
2083 #ifdef CONFIG_PPC32
2084 { /* default match */
2085 .pvr_mask = 0x00000000,
2086 .pvr_value = 0x00000000,
2087 .cpu_name = "(generic E500 PPC)",
2088 .cpu_features = CPU_FTRS_E500,
2089 .cpu_user_features = COMMON_USER_BOOKE |
2090 PPC_FEATURE_HAS_SPE_COMP |
2091 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2092 .mmu_features = MMU_FTR_TYPE_FSL_E,
2093 .icache_bsize = 32,
2094 .dcache_bsize = 32,
2095 .machine_check = machine_check_e500,
2096 .platform = "powerpc",
2097 }
2098 #endif /* CONFIG_PPC32 */
2099 #endif /* CONFIG_E500 */
2100
2101 #ifdef CONFIG_PPC_A2
2102 { /* Standard A2 (>= DD2) + FPU core */
2103 .pvr_mask = 0xffff0000,
2104 .pvr_value = 0x00480000,
2105 .cpu_name = "A2 (>= DD2)",
2106 .cpu_features = CPU_FTRS_A2,
2107 .cpu_user_features = COMMON_USER_PPC64,
2108 .mmu_features = MMU_FTRS_A2,
2109 .icache_bsize = 64,
2110 .dcache_bsize = 64,
2111 .num_pmcs = 0,
2112 .cpu_setup = __setup_cpu_a2,
2113 .cpu_restore = __restore_cpu_a2,
2114 .machine_check = machine_check_generic,
2115 .platform = "ppca2",
2116 },
2117 { /* This is a default entry to get going, to be replaced by
2118 * a real one at some stage
2119 */
2120 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2121 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2122 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2123 .pvr_mask = 0x00000000,
2124 .pvr_value = 0x00000000,
2125 .cpu_name = "Book3E",
2126 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2127 .cpu_user_features = COMMON_USER_PPC64,
2128 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2129 MMU_FTR_USE_TLBIVAX_BCAST |
2130 MMU_FTR_LOCK_BCAST_INVAL,
2131 .icache_bsize = 64,
2132 .dcache_bsize = 64,
2133 .num_pmcs = 0,
2134 .machine_check = machine_check_generic,
2135 .platform = "power6",
2136 },
2137 #endif /* CONFIG_PPC_A2 */
2138 };
2139
2140 static struct cpu_spec the_cpu_spec;
2141
2142 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2143 struct cpu_spec *s)
2144 {
2145 struct cpu_spec *t = &the_cpu_spec;
2146 struct cpu_spec old;
2147
2148 t = PTRRELOC(t);
2149 old = *t;
2150
2151 /* Copy everything, then do fixups */
2152 *t = *s;
2153
2154 /*
2155 * If we are overriding a previous value derived from the real
2156 * PVR with a new value obtained using a logical PVR value,
2157 * don't modify the performance monitor fields.
2158 */
2159 if (old.num_pmcs && !s->num_pmcs) {
2160 t->num_pmcs = old.num_pmcs;
2161 t->pmc_type = old.pmc_type;
2162 t->oprofile_type = old.oprofile_type;
2163 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2164 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2165 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2166
2167 /*
2168 * If we have passed through this logic once before and
2169 * have pulled the default case because the real PVR was
2170 * not found inside cpu_specs[], then we are possibly
2171 * running in compatibility mode. In that case, let the
2172 * oprofiler know which set of compatibility counters to
2173 * pull from by making sure the oprofile_cpu_type string
2174 * is set to that of compatibility mode. If the
2175 * oprofile_cpu_type already has a value, then we are
2176 * possibly overriding a real PVR with a logical one,
2177 * and, in that case, keep the current value for
2178 * oprofile_cpu_type.
2179 */
2180 if (old.oprofile_cpu_type != NULL) {
2181 t->oprofile_cpu_type = old.oprofile_cpu_type;
2182 t->oprofile_type = old.oprofile_type;
2183 }
2184 }
2185
2186 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2187
2188 /*
2189 * Set the base platform string once; assumes
2190 * we're called with real pvr first.
2191 */
2192 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2193 *PTRRELOC(&powerpc_base_platform) = t->platform;
2194
2195 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2196 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2197 * that processor. I will consolidate that at a later time, for now,
2198 * just use #ifdef. We also don't need to PTRRELOC the function
2199 * pointer on ppc64 and booke as we are running at 0 in real mode
2200 * on ppc64 and reloc_offset is always 0 on booke.
2201 */
2202 if (t->cpu_setup) {
2203 t->cpu_setup(offset, t);
2204 }
2205 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2206
2207 return t;
2208 }
2209
2210 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2211 {
2212 struct cpu_spec *s = cpu_specs;
2213 int i;
2214
2215 s = PTRRELOC(s);
2216
2217 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2218 if ((pvr & s->pvr_mask) == s->pvr_value)
2219 return setup_cpu_spec(offset, s);
2220 }
2221
2222 BUG();
2223
2224 return NULL;
2225 }
Linux kernel - Deliverables
This page took 0.097028 seconds and 5 git commands to generate.