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Merge commit 'ftrace/function-graph' into next
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23
24 struct cpu_spec* cur_cpu_spec = NULL;
25 EXPORT_SYMBOL(cur_cpu_spec);
26
27 /* The platform string corresponding to the real PVR */
28 const char *powerpc_base_platform;
29
30 /* NOTE:
31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
32 * the responsibility of the appropriate CPU save/restore functions to
33 * eventually copy these settings over. Those save/restore aren't yet
34 * part of the cputable though. That has to be fixed for both ppc32
35 * and ppc64
36 */
37 #ifdef CONFIG_PPC32
38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
52 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
58 #endif /* CONFIG_PPC32 */
59 #ifdef CONFIG_PPC64
60 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
61 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
62 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
63 extern void __restore_cpu_pa6t(void);
64 extern void __restore_cpu_ppc970(void);
65 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
66 extern void __restore_cpu_power7(void);
67 #endif /* CONFIG_PPC64 */
68
69 /* This table only contains "desktop" CPUs, it need to be filled with embedded
70 * ones as well...
71 */
72 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
73 PPC_FEATURE_HAS_MMU)
74 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
75 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
76 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
77 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
78 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
79 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
80 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
81 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
82 PPC_FEATURE_TRUE_LE | \
83 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
84 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
85 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
86 PPC_FEATURE_TRUE_LE | \
87 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
88 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
89 PPC_FEATURE_TRUE_LE | \
90 PPC_FEATURE_HAS_ALTIVEC_COMP)
91 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
92 PPC_FEATURE_BOOKE)
93
94 static struct cpu_spec __initdata cpu_specs[] = {
95 #ifdef CONFIG_PPC64
96 { /* Power3 */
97 .pvr_mask = 0xffff0000,
98 .pvr_value = 0x00400000,
99 .cpu_name = "POWER3 (630)",
100 .cpu_features = CPU_FTRS_POWER3,
101 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
102 .mmu_features = MMU_FTR_HPTE_TABLE,
103 .icache_bsize = 128,
104 .dcache_bsize = 128,
105 .num_pmcs = 8,
106 .pmc_type = PPC_PMC_IBM,
107 .oprofile_cpu_type = "ppc64/power3",
108 .oprofile_type = PPC_OPROFILE_RS64,
109 .machine_check = machine_check_generic,
110 .platform = "power3",
111 },
112 { /* Power3+ */
113 .pvr_mask = 0xffff0000,
114 .pvr_value = 0x00410000,
115 .cpu_name = "POWER3 (630+)",
116 .cpu_features = CPU_FTRS_POWER3,
117 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
118 .mmu_features = MMU_FTR_HPTE_TABLE,
119 .icache_bsize = 128,
120 .dcache_bsize = 128,
121 .num_pmcs = 8,
122 .pmc_type = PPC_PMC_IBM,
123 .oprofile_cpu_type = "ppc64/power3",
124 .oprofile_type = PPC_OPROFILE_RS64,
125 .machine_check = machine_check_generic,
126 .platform = "power3",
127 },
128 { /* Northstar */
129 .pvr_mask = 0xffff0000,
130 .pvr_value = 0x00330000,
131 .cpu_name = "RS64-II (northstar)",
132 .cpu_features = CPU_FTRS_RS64,
133 .cpu_user_features = COMMON_USER_PPC64,
134 .mmu_features = MMU_FTR_HPTE_TABLE,
135 .icache_bsize = 128,
136 .dcache_bsize = 128,
137 .num_pmcs = 8,
138 .pmc_type = PPC_PMC_IBM,
139 .oprofile_cpu_type = "ppc64/rs64",
140 .oprofile_type = PPC_OPROFILE_RS64,
141 .machine_check = machine_check_generic,
142 .platform = "rs64",
143 },
144 { /* Pulsar */
145 .pvr_mask = 0xffff0000,
146 .pvr_value = 0x00340000,
147 .cpu_name = "RS64-III (pulsar)",
148 .cpu_features = CPU_FTRS_RS64,
149 .cpu_user_features = COMMON_USER_PPC64,
150 .mmu_features = MMU_FTR_HPTE_TABLE,
151 .icache_bsize = 128,
152 .dcache_bsize = 128,
153 .num_pmcs = 8,
154 .pmc_type = PPC_PMC_IBM,
155 .oprofile_cpu_type = "ppc64/rs64",
156 .oprofile_type = PPC_OPROFILE_RS64,
157 .machine_check = machine_check_generic,
158 .platform = "rs64",
159 },
160 { /* I-star */
161 .pvr_mask = 0xffff0000,
162 .pvr_value = 0x00360000,
163 .cpu_name = "RS64-III (icestar)",
164 .cpu_features = CPU_FTRS_RS64,
165 .cpu_user_features = COMMON_USER_PPC64,
166 .mmu_features = MMU_FTR_HPTE_TABLE,
167 .icache_bsize = 128,
168 .dcache_bsize = 128,
169 .num_pmcs = 8,
170 .pmc_type = PPC_PMC_IBM,
171 .oprofile_cpu_type = "ppc64/rs64",
172 .oprofile_type = PPC_OPROFILE_RS64,
173 .machine_check = machine_check_generic,
174 .platform = "rs64",
175 },
176 { /* S-star */
177 .pvr_mask = 0xffff0000,
178 .pvr_value = 0x00370000,
179 .cpu_name = "RS64-IV (sstar)",
180 .cpu_features = CPU_FTRS_RS64,
181 .cpu_user_features = COMMON_USER_PPC64,
182 .mmu_features = MMU_FTR_HPTE_TABLE,
183 .icache_bsize = 128,
184 .dcache_bsize = 128,
185 .num_pmcs = 8,
186 .pmc_type = PPC_PMC_IBM,
187 .oprofile_cpu_type = "ppc64/rs64",
188 .oprofile_type = PPC_OPROFILE_RS64,
189 .machine_check = machine_check_generic,
190 .platform = "rs64",
191 },
192 { /* Power4 */
193 .pvr_mask = 0xffff0000,
194 .pvr_value = 0x00350000,
195 .cpu_name = "POWER4 (gp)",
196 .cpu_features = CPU_FTRS_POWER4,
197 .cpu_user_features = COMMON_USER_POWER4,
198 .mmu_features = MMU_FTR_HPTE_TABLE,
199 .icache_bsize = 128,
200 .dcache_bsize = 128,
201 .num_pmcs = 8,
202 .pmc_type = PPC_PMC_IBM,
203 .oprofile_cpu_type = "ppc64/power4",
204 .oprofile_type = PPC_OPROFILE_POWER4,
205 .machine_check = machine_check_generic,
206 .platform = "power4",
207 },
208 { /* Power4+ */
209 .pvr_mask = 0xffff0000,
210 .pvr_value = 0x00380000,
211 .cpu_name = "POWER4+ (gq)",
212 .cpu_features = CPU_FTRS_POWER4,
213 .cpu_user_features = COMMON_USER_POWER4,
214 .mmu_features = MMU_FTR_HPTE_TABLE,
215 .icache_bsize = 128,
216 .dcache_bsize = 128,
217 .num_pmcs = 8,
218 .pmc_type = PPC_PMC_IBM,
219 .oprofile_cpu_type = "ppc64/power4",
220 .oprofile_type = PPC_OPROFILE_POWER4,
221 .machine_check = machine_check_generic,
222 .platform = "power4",
223 },
224 { /* PPC970 */
225 .pvr_mask = 0xffff0000,
226 .pvr_value = 0x00390000,
227 .cpu_name = "PPC970",
228 .cpu_features = CPU_FTRS_PPC970,
229 .cpu_user_features = COMMON_USER_POWER4 |
230 PPC_FEATURE_HAS_ALTIVEC_COMP,
231 .mmu_features = MMU_FTR_HPTE_TABLE,
232 .icache_bsize = 128,
233 .dcache_bsize = 128,
234 .num_pmcs = 8,
235 .pmc_type = PPC_PMC_IBM,
236 .cpu_setup = __setup_cpu_ppc970,
237 .cpu_restore = __restore_cpu_ppc970,
238 .oprofile_cpu_type = "ppc64/970",
239 .oprofile_type = PPC_OPROFILE_POWER4,
240 .machine_check = machine_check_generic,
241 .platform = "ppc970",
242 },
243 { /* PPC970FX */
244 .pvr_mask = 0xffff0000,
245 .pvr_value = 0x003c0000,
246 .cpu_name = "PPC970FX",
247 .cpu_features = CPU_FTRS_PPC970,
248 .cpu_user_features = COMMON_USER_POWER4 |
249 PPC_FEATURE_HAS_ALTIVEC_COMP,
250 .mmu_features = MMU_FTR_HPTE_TABLE,
251 .icache_bsize = 128,
252 .dcache_bsize = 128,
253 .num_pmcs = 8,
254 .pmc_type = PPC_PMC_IBM,
255 .cpu_setup = __setup_cpu_ppc970,
256 .cpu_restore = __restore_cpu_ppc970,
257 .oprofile_cpu_type = "ppc64/970",
258 .oprofile_type = PPC_OPROFILE_POWER4,
259 .machine_check = machine_check_generic,
260 .platform = "ppc970",
261 },
262 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
263 .pvr_mask = 0xffffffff,
264 .pvr_value = 0x00440100,
265 .cpu_name = "PPC970MP",
266 .cpu_features = CPU_FTRS_PPC970,
267 .cpu_user_features = COMMON_USER_POWER4 |
268 PPC_FEATURE_HAS_ALTIVEC_COMP,
269 .mmu_features = MMU_FTR_HPTE_TABLE,
270 .icache_bsize = 128,
271 .dcache_bsize = 128,
272 .num_pmcs = 8,
273 .pmc_type = PPC_PMC_IBM,
274 .cpu_setup = __setup_cpu_ppc970,
275 .cpu_restore = __restore_cpu_ppc970,
276 .oprofile_cpu_type = "ppc64/970MP",
277 .oprofile_type = PPC_OPROFILE_POWER4,
278 .machine_check = machine_check_generic,
279 .platform = "ppc970",
280 },
281 { /* PPC970MP */
282 .pvr_mask = 0xffff0000,
283 .pvr_value = 0x00440000,
284 .cpu_name = "PPC970MP",
285 .cpu_features = CPU_FTRS_PPC970,
286 .cpu_user_features = COMMON_USER_POWER4 |
287 PPC_FEATURE_HAS_ALTIVEC_COMP,
288 .mmu_features = MMU_FTR_HPTE_TABLE,
289 .icache_bsize = 128,
290 .dcache_bsize = 128,
291 .num_pmcs = 8,
292 .pmc_type = PPC_PMC_IBM,
293 .cpu_setup = __setup_cpu_ppc970MP,
294 .cpu_restore = __restore_cpu_ppc970,
295 .oprofile_cpu_type = "ppc64/970MP",
296 .oprofile_type = PPC_OPROFILE_POWER4,
297 .machine_check = machine_check_generic,
298 .platform = "ppc970",
299 },
300 { /* PPC970GX */
301 .pvr_mask = 0xffff0000,
302 .pvr_value = 0x00450000,
303 .cpu_name = "PPC970GX",
304 .cpu_features = CPU_FTRS_PPC970,
305 .cpu_user_features = COMMON_USER_POWER4 |
306 PPC_FEATURE_HAS_ALTIVEC_COMP,
307 .mmu_features = MMU_FTR_HPTE_TABLE,
308 .icache_bsize = 128,
309 .dcache_bsize = 128,
310 .num_pmcs = 8,
311 .pmc_type = PPC_PMC_IBM,
312 .cpu_setup = __setup_cpu_ppc970,
313 .oprofile_cpu_type = "ppc64/970",
314 .oprofile_type = PPC_OPROFILE_POWER4,
315 .machine_check = machine_check_generic,
316 .platform = "ppc970",
317 },
318 { /* Power5 GR */
319 .pvr_mask = 0xffff0000,
320 .pvr_value = 0x003a0000,
321 .cpu_name = "POWER5 (gr)",
322 .cpu_features = CPU_FTRS_POWER5,
323 .cpu_user_features = COMMON_USER_POWER5,
324 .mmu_features = MMU_FTR_HPTE_TABLE,
325 .icache_bsize = 128,
326 .dcache_bsize = 128,
327 .num_pmcs = 6,
328 .pmc_type = PPC_PMC_IBM,
329 .oprofile_cpu_type = "ppc64/power5",
330 .oprofile_type = PPC_OPROFILE_POWER4,
331 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
332 * and above but only works on POWER5 and above
333 */
334 .oprofile_mmcra_sihv = MMCRA_SIHV,
335 .oprofile_mmcra_sipr = MMCRA_SIPR,
336 .machine_check = machine_check_generic,
337 .platform = "power5",
338 },
339 { /* Power5++ */
340 .pvr_mask = 0xffffff00,
341 .pvr_value = 0x003b0300,
342 .cpu_name = "POWER5+ (gs)",
343 .cpu_features = CPU_FTRS_POWER5,
344 .cpu_user_features = COMMON_USER_POWER5_PLUS,
345 .mmu_features = MMU_FTR_HPTE_TABLE,
346 .icache_bsize = 128,
347 .dcache_bsize = 128,
348 .num_pmcs = 6,
349 .oprofile_cpu_type = "ppc64/power5++",
350 .oprofile_type = PPC_OPROFILE_POWER4,
351 .oprofile_mmcra_sihv = MMCRA_SIHV,
352 .oprofile_mmcra_sipr = MMCRA_SIPR,
353 .machine_check = machine_check_generic,
354 .platform = "power5+",
355 },
356 { /* Power5 GS */
357 .pvr_mask = 0xffff0000,
358 .pvr_value = 0x003b0000,
359 .cpu_name = "POWER5+ (gs)",
360 .cpu_features = CPU_FTRS_POWER5,
361 .cpu_user_features = COMMON_USER_POWER5_PLUS,
362 .mmu_features = MMU_FTR_HPTE_TABLE,
363 .icache_bsize = 128,
364 .dcache_bsize = 128,
365 .num_pmcs = 6,
366 .pmc_type = PPC_PMC_IBM,
367 .oprofile_cpu_type = "ppc64/power5+",
368 .oprofile_type = PPC_OPROFILE_POWER4,
369 .oprofile_mmcra_sihv = MMCRA_SIHV,
370 .oprofile_mmcra_sipr = MMCRA_SIPR,
371 .machine_check = machine_check_generic,
372 .platform = "power5+",
373 },
374 { /* POWER6 in P5+ mode; 2.04-compliant processor */
375 .pvr_mask = 0xffffffff,
376 .pvr_value = 0x0f000001,
377 .cpu_name = "POWER5+",
378 .cpu_features = CPU_FTRS_POWER5,
379 .cpu_user_features = COMMON_USER_POWER5_PLUS,
380 .mmu_features = MMU_FTR_HPTE_TABLE,
381 .icache_bsize = 128,
382 .dcache_bsize = 128,
383 .machine_check = machine_check_generic,
384 .oprofile_cpu_type = "ppc64/compat-power5+",
385 .platform = "power5+",
386 },
387 { /* Power6 */
388 .pvr_mask = 0xffff0000,
389 .pvr_value = 0x003e0000,
390 .cpu_name = "POWER6 (raw)",
391 .cpu_features = CPU_FTRS_POWER6,
392 .cpu_user_features = COMMON_USER_POWER6 |
393 PPC_FEATURE_POWER6_EXT,
394 .mmu_features = MMU_FTR_HPTE_TABLE,
395 .icache_bsize = 128,
396 .dcache_bsize = 128,
397 .num_pmcs = 6,
398 .pmc_type = PPC_PMC_IBM,
399 .oprofile_cpu_type = "ppc64/power6",
400 .oprofile_type = PPC_OPROFILE_POWER4,
401 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
402 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
403 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
404 POWER6_MMCRA_OTHER,
405 .machine_check = machine_check_generic,
406 .platform = "power6x",
407 },
408 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
409 .pvr_mask = 0xffffffff,
410 .pvr_value = 0x0f000002,
411 .cpu_name = "POWER6 (architected)",
412 .cpu_features = CPU_FTRS_POWER6,
413 .cpu_user_features = COMMON_USER_POWER6,
414 .mmu_features = MMU_FTR_HPTE_TABLE,
415 .icache_bsize = 128,
416 .dcache_bsize = 128,
417 .machine_check = machine_check_generic,
418 .oprofile_cpu_type = "ppc64/compat-power6",
419 .platform = "power6",
420 },
421 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
422 .pvr_mask = 0xffffffff,
423 .pvr_value = 0x0f000003,
424 .cpu_name = "POWER7 (architected)",
425 .cpu_features = CPU_FTRS_POWER7,
426 .cpu_user_features = COMMON_USER_POWER7,
427 .mmu_features = MMU_FTR_HPTE_TABLE,
428 .icache_bsize = 128,
429 .dcache_bsize = 128,
430 .machine_check = machine_check_generic,
431 .oprofile_cpu_type = "ppc64/compat-power7",
432 .platform = "power7",
433 },
434 { /* Power7 */
435 .pvr_mask = 0xffff0000,
436 .pvr_value = 0x003f0000,
437 .cpu_name = "POWER7 (raw)",
438 .cpu_features = CPU_FTRS_POWER7,
439 .cpu_user_features = COMMON_USER_POWER7,
440 .mmu_features = MMU_FTR_HPTE_TABLE,
441 .icache_bsize = 128,
442 .dcache_bsize = 128,
443 .num_pmcs = 6,
444 .pmc_type = PPC_PMC_IBM,
445 .cpu_setup = __setup_cpu_power7,
446 .cpu_restore = __restore_cpu_power7,
447 .oprofile_cpu_type = "ppc64/power7",
448 .oprofile_type = PPC_OPROFILE_POWER4,
449 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
450 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
451 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
452 POWER6_MMCRA_OTHER,
453 .platform = "power7",
454 },
455 { /* Cell Broadband Engine */
456 .pvr_mask = 0xffff0000,
457 .pvr_value = 0x00700000,
458 .cpu_name = "Cell Broadband Engine",
459 .cpu_features = CPU_FTRS_CELL,
460 .cpu_user_features = COMMON_USER_PPC64 |
461 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
462 PPC_FEATURE_SMT,
463 .mmu_features = MMU_FTR_HPTE_TABLE,
464 .icache_bsize = 128,
465 .dcache_bsize = 128,
466 .num_pmcs = 4,
467 .pmc_type = PPC_PMC_IBM,
468 .oprofile_cpu_type = "ppc64/cell-be",
469 .oprofile_type = PPC_OPROFILE_CELL,
470 .machine_check = machine_check_generic,
471 .platform = "ppc-cell-be",
472 },
473 { /* PA Semi PA6T */
474 .pvr_mask = 0x7fff0000,
475 .pvr_value = 0x00900000,
476 .cpu_name = "PA6T",
477 .cpu_features = CPU_FTRS_PA6T,
478 .cpu_user_features = COMMON_USER_PA6T,
479 .mmu_features = MMU_FTR_HPTE_TABLE,
480 .icache_bsize = 64,
481 .dcache_bsize = 64,
482 .num_pmcs = 6,
483 .pmc_type = PPC_PMC_PA6T,
484 .cpu_setup = __setup_cpu_pa6t,
485 .cpu_restore = __restore_cpu_pa6t,
486 .oprofile_cpu_type = "ppc64/pa6t",
487 .oprofile_type = PPC_OPROFILE_PA6T,
488 .machine_check = machine_check_generic,
489 .platform = "pa6t",
490 },
491 { /* default match */
492 .pvr_mask = 0x00000000,
493 .pvr_value = 0x00000000,
494 .cpu_name = "POWER4 (compatible)",
495 .cpu_features = CPU_FTRS_COMPATIBLE,
496 .cpu_user_features = COMMON_USER_PPC64,
497 .mmu_features = MMU_FTR_HPTE_TABLE,
498 .icache_bsize = 128,
499 .dcache_bsize = 128,
500 .num_pmcs = 6,
501 .pmc_type = PPC_PMC_IBM,
502 .machine_check = machine_check_generic,
503 .platform = "power4",
504 }
505 #endif /* CONFIG_PPC64 */
506 #ifdef CONFIG_PPC32
507 #if CLASSIC_PPC
508 { /* 601 */
509 .pvr_mask = 0xffff0000,
510 .pvr_value = 0x00010000,
511 .cpu_name = "601",
512 .cpu_features = CPU_FTRS_PPC601,
513 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
514 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
515 .mmu_features = MMU_FTR_HPTE_TABLE,
516 .icache_bsize = 32,
517 .dcache_bsize = 32,
518 .machine_check = machine_check_generic,
519 .platform = "ppc601",
520 },
521 { /* 603 */
522 .pvr_mask = 0xffff0000,
523 .pvr_value = 0x00030000,
524 .cpu_name = "603",
525 .cpu_features = CPU_FTRS_603,
526 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
527 .mmu_features = 0,
528 .icache_bsize = 32,
529 .dcache_bsize = 32,
530 .cpu_setup = __setup_cpu_603,
531 .machine_check = machine_check_generic,
532 .platform = "ppc603",
533 },
534 { /* 603e */
535 .pvr_mask = 0xffff0000,
536 .pvr_value = 0x00060000,
537 .cpu_name = "603e",
538 .cpu_features = CPU_FTRS_603,
539 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
540 .mmu_features = 0,
541 .icache_bsize = 32,
542 .dcache_bsize = 32,
543 .cpu_setup = __setup_cpu_603,
544 .machine_check = machine_check_generic,
545 .platform = "ppc603",
546 },
547 { /* 603ev */
548 .pvr_mask = 0xffff0000,
549 .pvr_value = 0x00070000,
550 .cpu_name = "603ev",
551 .cpu_features = CPU_FTRS_603,
552 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
553 .mmu_features = 0,
554 .icache_bsize = 32,
555 .dcache_bsize = 32,
556 .cpu_setup = __setup_cpu_603,
557 .machine_check = machine_check_generic,
558 .platform = "ppc603",
559 },
560 { /* 604 */
561 .pvr_mask = 0xffff0000,
562 .pvr_value = 0x00040000,
563 .cpu_name = "604",
564 .cpu_features = CPU_FTRS_604,
565 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
566 .mmu_features = MMU_FTR_HPTE_TABLE,
567 .icache_bsize = 32,
568 .dcache_bsize = 32,
569 .num_pmcs = 2,
570 .cpu_setup = __setup_cpu_604,
571 .machine_check = machine_check_generic,
572 .platform = "ppc604",
573 },
574 { /* 604e */
575 .pvr_mask = 0xfffff000,
576 .pvr_value = 0x00090000,
577 .cpu_name = "604e",
578 .cpu_features = CPU_FTRS_604,
579 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
580 .mmu_features = MMU_FTR_HPTE_TABLE,
581 .icache_bsize = 32,
582 .dcache_bsize = 32,
583 .num_pmcs = 4,
584 .cpu_setup = __setup_cpu_604,
585 .machine_check = machine_check_generic,
586 .platform = "ppc604",
587 },
588 { /* 604r */
589 .pvr_mask = 0xffff0000,
590 .pvr_value = 0x00090000,
591 .cpu_name = "604r",
592 .cpu_features = CPU_FTRS_604,
593 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
594 .mmu_features = MMU_FTR_HPTE_TABLE,
595 .icache_bsize = 32,
596 .dcache_bsize = 32,
597 .num_pmcs = 4,
598 .cpu_setup = __setup_cpu_604,
599 .machine_check = machine_check_generic,
600 .platform = "ppc604",
601 },
602 { /* 604ev */
603 .pvr_mask = 0xffff0000,
604 .pvr_value = 0x000a0000,
605 .cpu_name = "604ev",
606 .cpu_features = CPU_FTRS_604,
607 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
608 .mmu_features = MMU_FTR_HPTE_TABLE,
609 .icache_bsize = 32,
610 .dcache_bsize = 32,
611 .num_pmcs = 4,
612 .cpu_setup = __setup_cpu_604,
613 .machine_check = machine_check_generic,
614 .platform = "ppc604",
615 },
616 { /* 740/750 (0x4202, don't support TAU ?) */
617 .pvr_mask = 0xffffffff,
618 .pvr_value = 0x00084202,
619 .cpu_name = "740/750",
620 .cpu_features = CPU_FTRS_740_NOTAU,
621 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
622 .mmu_features = MMU_FTR_HPTE_TABLE,
623 .icache_bsize = 32,
624 .dcache_bsize = 32,
625 .num_pmcs = 4,
626 .cpu_setup = __setup_cpu_750,
627 .machine_check = machine_check_generic,
628 .platform = "ppc750",
629 },
630 { /* 750CX (80100 and 8010x?) */
631 .pvr_mask = 0xfffffff0,
632 .pvr_value = 0x00080100,
633 .cpu_name = "750CX",
634 .cpu_features = CPU_FTRS_750,
635 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
636 .mmu_features = MMU_FTR_HPTE_TABLE,
637 .icache_bsize = 32,
638 .dcache_bsize = 32,
639 .num_pmcs = 4,
640 .cpu_setup = __setup_cpu_750cx,
641 .machine_check = machine_check_generic,
642 .platform = "ppc750",
643 },
644 { /* 750CX (82201 and 82202) */
645 .pvr_mask = 0xfffffff0,
646 .pvr_value = 0x00082200,
647 .cpu_name = "750CX",
648 .cpu_features = CPU_FTRS_750,
649 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
650 .mmu_features = MMU_FTR_HPTE_TABLE,
651 .icache_bsize = 32,
652 .dcache_bsize = 32,
653 .num_pmcs = 4,
654 .pmc_type = PPC_PMC_IBM,
655 .cpu_setup = __setup_cpu_750cx,
656 .machine_check = machine_check_generic,
657 .platform = "ppc750",
658 },
659 { /* 750CXe (82214) */
660 .pvr_mask = 0xfffffff0,
661 .pvr_value = 0x00082210,
662 .cpu_name = "750CXe",
663 .cpu_features = CPU_FTRS_750,
664 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
665 .mmu_features = MMU_FTR_HPTE_TABLE,
666 .icache_bsize = 32,
667 .dcache_bsize = 32,
668 .num_pmcs = 4,
669 .pmc_type = PPC_PMC_IBM,
670 .cpu_setup = __setup_cpu_750cx,
671 .machine_check = machine_check_generic,
672 .platform = "ppc750",
673 },
674 { /* 750CXe "Gekko" (83214) */
675 .pvr_mask = 0xffffffff,
676 .pvr_value = 0x00083214,
677 .cpu_name = "750CXe",
678 .cpu_features = CPU_FTRS_750,
679 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
680 .mmu_features = MMU_FTR_HPTE_TABLE,
681 .icache_bsize = 32,
682 .dcache_bsize = 32,
683 .num_pmcs = 4,
684 .pmc_type = PPC_PMC_IBM,
685 .cpu_setup = __setup_cpu_750cx,
686 .machine_check = machine_check_generic,
687 .platform = "ppc750",
688 },
689 { /* 750CL */
690 .pvr_mask = 0xfffff0f0,
691 .pvr_value = 0x00087010,
692 .cpu_name = "750CL",
693 .cpu_features = CPU_FTRS_750CL,
694 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
695 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
696 .icache_bsize = 32,
697 .dcache_bsize = 32,
698 .num_pmcs = 4,
699 .pmc_type = PPC_PMC_IBM,
700 .cpu_setup = __setup_cpu_750,
701 .machine_check = machine_check_generic,
702 .platform = "ppc750",
703 },
704 { /* 745/755 */
705 .pvr_mask = 0xfffff000,
706 .pvr_value = 0x00083000,
707 .cpu_name = "745/755",
708 .cpu_features = CPU_FTRS_750,
709 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
710 .mmu_features = MMU_FTR_HPTE_TABLE,
711 .icache_bsize = 32,
712 .dcache_bsize = 32,
713 .num_pmcs = 4,
714 .pmc_type = PPC_PMC_IBM,
715 .cpu_setup = __setup_cpu_750,
716 .machine_check = machine_check_generic,
717 .platform = "ppc750",
718 },
719 { /* 750FX rev 1.x */
720 .pvr_mask = 0xffffff00,
721 .pvr_value = 0x70000100,
722 .cpu_name = "750FX",
723 .cpu_features = CPU_FTRS_750FX1,
724 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
725 .mmu_features = MMU_FTR_HPTE_TABLE,
726 .icache_bsize = 32,
727 .dcache_bsize = 32,
728 .num_pmcs = 4,
729 .pmc_type = PPC_PMC_IBM,
730 .cpu_setup = __setup_cpu_750,
731 .machine_check = machine_check_generic,
732 .platform = "ppc750",
733 },
734 { /* 750FX rev 2.0 must disable HID0[DPM] */
735 .pvr_mask = 0xffffffff,
736 .pvr_value = 0x70000200,
737 .cpu_name = "750FX",
738 .cpu_features = CPU_FTRS_750FX2,
739 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
740 .mmu_features = MMU_FTR_HPTE_TABLE,
741 .icache_bsize = 32,
742 .dcache_bsize = 32,
743 .num_pmcs = 4,
744 .pmc_type = PPC_PMC_IBM,
745 .cpu_setup = __setup_cpu_750,
746 .machine_check = machine_check_generic,
747 .platform = "ppc750",
748 },
749 { /* 750FX (All revs except 2.0) */
750 .pvr_mask = 0xffff0000,
751 .pvr_value = 0x70000000,
752 .cpu_name = "750FX",
753 .cpu_features = CPU_FTRS_750FX,
754 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
755 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
756 .icache_bsize = 32,
757 .dcache_bsize = 32,
758 .num_pmcs = 4,
759 .pmc_type = PPC_PMC_IBM,
760 .cpu_setup = __setup_cpu_750fx,
761 .machine_check = machine_check_generic,
762 .platform = "ppc750",
763 },
764 { /* 750GX */
765 .pvr_mask = 0xffff0000,
766 .pvr_value = 0x70020000,
767 .cpu_name = "750GX",
768 .cpu_features = CPU_FTRS_750GX,
769 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
770 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
771 .icache_bsize = 32,
772 .dcache_bsize = 32,
773 .num_pmcs = 4,
774 .pmc_type = PPC_PMC_IBM,
775 .cpu_setup = __setup_cpu_750fx,
776 .machine_check = machine_check_generic,
777 .platform = "ppc750",
778 },
779 { /* 740/750 (L2CR bit need fixup for 740) */
780 .pvr_mask = 0xffff0000,
781 .pvr_value = 0x00080000,
782 .cpu_name = "740/750",
783 .cpu_features = CPU_FTRS_740,
784 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
785 .mmu_features = MMU_FTR_HPTE_TABLE,
786 .icache_bsize = 32,
787 .dcache_bsize = 32,
788 .num_pmcs = 4,
789 .pmc_type = PPC_PMC_IBM,
790 .cpu_setup = __setup_cpu_750,
791 .machine_check = machine_check_generic,
792 .platform = "ppc750",
793 },
794 { /* 7400 rev 1.1 ? (no TAU) */
795 .pvr_mask = 0xffffffff,
796 .pvr_value = 0x000c1101,
797 .cpu_name = "7400 (1.1)",
798 .cpu_features = CPU_FTRS_7400_NOTAU,
799 .cpu_user_features = COMMON_USER |
800 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
801 .mmu_features = MMU_FTR_HPTE_TABLE,
802 .icache_bsize = 32,
803 .dcache_bsize = 32,
804 .num_pmcs = 4,
805 .pmc_type = PPC_PMC_G4,
806 .cpu_setup = __setup_cpu_7400,
807 .machine_check = machine_check_generic,
808 .platform = "ppc7400",
809 },
810 { /* 7400 */
811 .pvr_mask = 0xffff0000,
812 .pvr_value = 0x000c0000,
813 .cpu_name = "7400",
814 .cpu_features = CPU_FTRS_7400,
815 .cpu_user_features = COMMON_USER |
816 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
817 .mmu_features = MMU_FTR_HPTE_TABLE,
818 .icache_bsize = 32,
819 .dcache_bsize = 32,
820 .num_pmcs = 4,
821 .pmc_type = PPC_PMC_G4,
822 .cpu_setup = __setup_cpu_7400,
823 .machine_check = machine_check_generic,
824 .platform = "ppc7400",
825 },
826 { /* 7410 */
827 .pvr_mask = 0xffff0000,
828 .pvr_value = 0x800c0000,
829 .cpu_name = "7410",
830 .cpu_features = CPU_FTRS_7400,
831 .cpu_user_features = COMMON_USER |
832 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
833 .mmu_features = MMU_FTR_HPTE_TABLE,
834 .icache_bsize = 32,
835 .dcache_bsize = 32,
836 .num_pmcs = 4,
837 .pmc_type = PPC_PMC_G4,
838 .cpu_setup = __setup_cpu_7410,
839 .machine_check = machine_check_generic,
840 .platform = "ppc7400",
841 },
842 { /* 7450 2.0 - no doze/nap */
843 .pvr_mask = 0xffffffff,
844 .pvr_value = 0x80000200,
845 .cpu_name = "7450",
846 .cpu_features = CPU_FTRS_7450_20,
847 .cpu_user_features = COMMON_USER |
848 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
849 .mmu_features = MMU_FTR_HPTE_TABLE,
850 .icache_bsize = 32,
851 .dcache_bsize = 32,
852 .num_pmcs = 6,
853 .pmc_type = PPC_PMC_G4,
854 .cpu_setup = __setup_cpu_745x,
855 .oprofile_cpu_type = "ppc/7450",
856 .oprofile_type = PPC_OPROFILE_G4,
857 .machine_check = machine_check_generic,
858 .platform = "ppc7450",
859 },
860 { /* 7450 2.1 */
861 .pvr_mask = 0xffffffff,
862 .pvr_value = 0x80000201,
863 .cpu_name = "7450",
864 .cpu_features = CPU_FTRS_7450_21,
865 .cpu_user_features = COMMON_USER |
866 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
867 .mmu_features = MMU_FTR_HPTE_TABLE,
868 .icache_bsize = 32,
869 .dcache_bsize = 32,
870 .num_pmcs = 6,
871 .pmc_type = PPC_PMC_G4,
872 .cpu_setup = __setup_cpu_745x,
873 .oprofile_cpu_type = "ppc/7450",
874 .oprofile_type = PPC_OPROFILE_G4,
875 .machine_check = machine_check_generic,
876 .platform = "ppc7450",
877 },
878 { /* 7450 2.3 and newer */
879 .pvr_mask = 0xffff0000,
880 .pvr_value = 0x80000000,
881 .cpu_name = "7450",
882 .cpu_features = CPU_FTRS_7450_23,
883 .cpu_user_features = COMMON_USER |
884 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
885 .mmu_features = MMU_FTR_HPTE_TABLE,
886 .icache_bsize = 32,
887 .dcache_bsize = 32,
888 .num_pmcs = 6,
889 .pmc_type = PPC_PMC_G4,
890 .cpu_setup = __setup_cpu_745x,
891 .oprofile_cpu_type = "ppc/7450",
892 .oprofile_type = PPC_OPROFILE_G4,
893 .machine_check = machine_check_generic,
894 .platform = "ppc7450",
895 },
896 { /* 7455 rev 1.x */
897 .pvr_mask = 0xffffff00,
898 .pvr_value = 0x80010100,
899 .cpu_name = "7455",
900 .cpu_features = CPU_FTRS_7455_1,
901 .cpu_user_features = COMMON_USER |
902 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
903 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
904 .icache_bsize = 32,
905 .dcache_bsize = 32,
906 .num_pmcs = 6,
907 .pmc_type = PPC_PMC_G4,
908 .cpu_setup = __setup_cpu_745x,
909 .oprofile_cpu_type = "ppc/7450",
910 .oprofile_type = PPC_OPROFILE_G4,
911 .machine_check = machine_check_generic,
912 .platform = "ppc7450",
913 },
914 { /* 7455 rev 2.0 */
915 .pvr_mask = 0xffffffff,
916 .pvr_value = 0x80010200,
917 .cpu_name = "7455",
918 .cpu_features = CPU_FTRS_7455_20,
919 .cpu_user_features = COMMON_USER |
920 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
921 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
922 .icache_bsize = 32,
923 .dcache_bsize = 32,
924 .num_pmcs = 6,
925 .pmc_type = PPC_PMC_G4,
926 .cpu_setup = __setup_cpu_745x,
927 .oprofile_cpu_type = "ppc/7450",
928 .oprofile_type = PPC_OPROFILE_G4,
929 .machine_check = machine_check_generic,
930 .platform = "ppc7450",
931 },
932 { /* 7455 others */
933 .pvr_mask = 0xffff0000,
934 .pvr_value = 0x80010000,
935 .cpu_name = "7455",
936 .cpu_features = CPU_FTRS_7455,
937 .cpu_user_features = COMMON_USER |
938 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
939 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
940 .icache_bsize = 32,
941 .dcache_bsize = 32,
942 .num_pmcs = 6,
943 .pmc_type = PPC_PMC_G4,
944 .cpu_setup = __setup_cpu_745x,
945 .oprofile_cpu_type = "ppc/7450",
946 .oprofile_type = PPC_OPROFILE_G4,
947 .machine_check = machine_check_generic,
948 .platform = "ppc7450",
949 },
950 { /* 7447/7457 Rev 1.0 */
951 .pvr_mask = 0xffffffff,
952 .pvr_value = 0x80020100,
953 .cpu_name = "7447/7457",
954 .cpu_features = CPU_FTRS_7447_10,
955 .cpu_user_features = COMMON_USER |
956 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
957 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
958 .icache_bsize = 32,
959 .dcache_bsize = 32,
960 .num_pmcs = 6,
961 .pmc_type = PPC_PMC_G4,
962 .cpu_setup = __setup_cpu_745x,
963 .oprofile_cpu_type = "ppc/7450",
964 .oprofile_type = PPC_OPROFILE_G4,
965 .machine_check = machine_check_generic,
966 .platform = "ppc7450",
967 },
968 { /* 7447/7457 Rev 1.1 */
969 .pvr_mask = 0xffffffff,
970 .pvr_value = 0x80020101,
971 .cpu_name = "7447/7457",
972 .cpu_features = CPU_FTRS_7447_10,
973 .cpu_user_features = COMMON_USER |
974 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
975 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
976 .icache_bsize = 32,
977 .dcache_bsize = 32,
978 .num_pmcs = 6,
979 .pmc_type = PPC_PMC_G4,
980 .cpu_setup = __setup_cpu_745x,
981 .oprofile_cpu_type = "ppc/7450",
982 .oprofile_type = PPC_OPROFILE_G4,
983 .machine_check = machine_check_generic,
984 .platform = "ppc7450",
985 },
986 { /* 7447/7457 Rev 1.2 and later */
987 .pvr_mask = 0xffff0000,
988 .pvr_value = 0x80020000,
989 .cpu_name = "7447/7457",
990 .cpu_features = CPU_FTRS_7447,
991 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
992 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
993 .icache_bsize = 32,
994 .dcache_bsize = 32,
995 .num_pmcs = 6,
996 .pmc_type = PPC_PMC_G4,
997 .cpu_setup = __setup_cpu_745x,
998 .oprofile_cpu_type = "ppc/7450",
999 .oprofile_type = PPC_OPROFILE_G4,
1000 .machine_check = machine_check_generic,
1001 .platform = "ppc7450",
1002 },
1003 { /* 7447A */
1004 .pvr_mask = 0xffff0000,
1005 .pvr_value = 0x80030000,
1006 .cpu_name = "7447A",
1007 .cpu_features = CPU_FTRS_7447A,
1008 .cpu_user_features = COMMON_USER |
1009 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1010 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1011 .icache_bsize = 32,
1012 .dcache_bsize = 32,
1013 .num_pmcs = 6,
1014 .pmc_type = PPC_PMC_G4,
1015 .cpu_setup = __setup_cpu_745x,
1016 .oprofile_cpu_type = "ppc/7450",
1017 .oprofile_type = PPC_OPROFILE_G4,
1018 .machine_check = machine_check_generic,
1019 .platform = "ppc7450",
1020 },
1021 { /* 7448 */
1022 .pvr_mask = 0xffff0000,
1023 .pvr_value = 0x80040000,
1024 .cpu_name = "7448",
1025 .cpu_features = CPU_FTRS_7448,
1026 .cpu_user_features = COMMON_USER |
1027 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1028 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1029 .icache_bsize = 32,
1030 .dcache_bsize = 32,
1031 .num_pmcs = 6,
1032 .pmc_type = PPC_PMC_G4,
1033 .cpu_setup = __setup_cpu_745x,
1034 .oprofile_cpu_type = "ppc/7450",
1035 .oprofile_type = PPC_OPROFILE_G4,
1036 .machine_check = machine_check_generic,
1037 .platform = "ppc7450",
1038 },
1039 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1040 .pvr_mask = 0x7fff0000,
1041 .pvr_value = 0x00810000,
1042 .cpu_name = "82xx",
1043 .cpu_features = CPU_FTRS_82XX,
1044 .cpu_user_features = COMMON_USER,
1045 .mmu_features = 0,
1046 .icache_bsize = 32,
1047 .dcache_bsize = 32,
1048 .cpu_setup = __setup_cpu_603,
1049 .machine_check = machine_check_generic,
1050 .platform = "ppc603",
1051 },
1052 { /* All G2_LE (603e core, plus some) have the same pvr */
1053 .pvr_mask = 0x7fff0000,
1054 .pvr_value = 0x00820000,
1055 .cpu_name = "G2_LE",
1056 .cpu_features = CPU_FTRS_G2_LE,
1057 .cpu_user_features = COMMON_USER,
1058 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1059 .icache_bsize = 32,
1060 .dcache_bsize = 32,
1061 .cpu_setup = __setup_cpu_603,
1062 .machine_check = machine_check_generic,
1063 .platform = "ppc603",
1064 },
1065 { /* e300c1 (a 603e core, plus some) on 83xx */
1066 .pvr_mask = 0x7fff0000,
1067 .pvr_value = 0x00830000,
1068 .cpu_name = "e300c1",
1069 .cpu_features = CPU_FTRS_E300,
1070 .cpu_user_features = COMMON_USER,
1071 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1072 .icache_bsize = 32,
1073 .dcache_bsize = 32,
1074 .cpu_setup = __setup_cpu_603,
1075 .machine_check = machine_check_generic,
1076 .platform = "ppc603",
1077 },
1078 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1079 .pvr_mask = 0x7fff0000,
1080 .pvr_value = 0x00840000,
1081 .cpu_name = "e300c2",
1082 .cpu_features = CPU_FTRS_E300C2,
1083 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1084 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1085 .icache_bsize = 32,
1086 .dcache_bsize = 32,
1087 .cpu_setup = __setup_cpu_603,
1088 .machine_check = machine_check_generic,
1089 .platform = "ppc603",
1090 },
1091 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1092 .pvr_mask = 0x7fff0000,
1093 .pvr_value = 0x00850000,
1094 .cpu_name = "e300c3",
1095 .cpu_features = CPU_FTRS_E300,
1096 .cpu_user_features = COMMON_USER,
1097 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1098 .icache_bsize = 32,
1099 .dcache_bsize = 32,
1100 .cpu_setup = __setup_cpu_603,
1101 .num_pmcs = 4,
1102 .oprofile_cpu_type = "ppc/e300",
1103 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1104 .platform = "ppc603",
1105 },
1106 { /* e300c4 (e300c1, plus one IU) */
1107 .pvr_mask = 0x7fff0000,
1108 .pvr_value = 0x00860000,
1109 .cpu_name = "e300c4",
1110 .cpu_features = CPU_FTRS_E300,
1111 .cpu_user_features = COMMON_USER,
1112 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1113 .icache_bsize = 32,
1114 .dcache_bsize = 32,
1115 .cpu_setup = __setup_cpu_603,
1116 .machine_check = machine_check_generic,
1117 .num_pmcs = 4,
1118 .oprofile_cpu_type = "ppc/e300",
1119 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1120 .platform = "ppc603",
1121 },
1122 { /* default match, we assume split I/D cache & TB (non-601)... */
1123 .pvr_mask = 0x00000000,
1124 .pvr_value = 0x00000000,
1125 .cpu_name = "(generic PPC)",
1126 .cpu_features = CPU_FTRS_CLASSIC32,
1127 .cpu_user_features = COMMON_USER,
1128 .mmu_features = MMU_FTR_HPTE_TABLE,
1129 .icache_bsize = 32,
1130 .dcache_bsize = 32,
1131 .machine_check = machine_check_generic,
1132 .platform = "ppc603",
1133 },
1134 #endif /* CLASSIC_PPC */
1135 #ifdef CONFIG_8xx
1136 { /* 8xx */
1137 .pvr_mask = 0xffff0000,
1138 .pvr_value = 0x00500000,
1139 .cpu_name = "8xx",
1140 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1141 * if the 8xx code is there.... */
1142 .cpu_features = CPU_FTRS_8XX,
1143 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1144 .mmu_features = MMU_FTR_TYPE_8xx,
1145 .icache_bsize = 16,
1146 .dcache_bsize = 16,
1147 .platform = "ppc823",
1148 },
1149 #endif /* CONFIG_8xx */
1150 #ifdef CONFIG_40x
1151 { /* 403GC */
1152 .pvr_mask = 0xffffff00,
1153 .pvr_value = 0x00200200,
1154 .cpu_name = "403GC",
1155 .cpu_features = CPU_FTRS_40X,
1156 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1157 .mmu_features = MMU_FTR_TYPE_40x,
1158 .icache_bsize = 16,
1159 .dcache_bsize = 16,
1160 .machine_check = machine_check_4xx,
1161 .platform = "ppc403",
1162 },
1163 { /* 403GCX */
1164 .pvr_mask = 0xffffff00,
1165 .pvr_value = 0x00201400,
1166 .cpu_name = "403GCX",
1167 .cpu_features = CPU_FTRS_40X,
1168 .cpu_user_features = PPC_FEATURE_32 |
1169 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1170 .mmu_features = MMU_FTR_TYPE_40x,
1171 .icache_bsize = 16,
1172 .dcache_bsize = 16,
1173 .machine_check = machine_check_4xx,
1174 .platform = "ppc403",
1175 },
1176 { /* 403G ?? */
1177 .pvr_mask = 0xffff0000,
1178 .pvr_value = 0x00200000,
1179 .cpu_name = "403G ??",
1180 .cpu_features = CPU_FTRS_40X,
1181 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1182 .mmu_features = MMU_FTR_TYPE_40x,
1183 .icache_bsize = 16,
1184 .dcache_bsize = 16,
1185 .machine_check = machine_check_4xx,
1186 .platform = "ppc403",
1187 },
1188 { /* 405GP */
1189 .pvr_mask = 0xffff0000,
1190 .pvr_value = 0x40110000,
1191 .cpu_name = "405GP",
1192 .cpu_features = CPU_FTRS_40X,
1193 .cpu_user_features = PPC_FEATURE_32 |
1194 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1195 .mmu_features = MMU_FTR_TYPE_40x,
1196 .icache_bsize = 32,
1197 .dcache_bsize = 32,
1198 .machine_check = machine_check_4xx,
1199 .platform = "ppc405",
1200 },
1201 { /* STB 03xxx */
1202 .pvr_mask = 0xffff0000,
1203 .pvr_value = 0x40130000,
1204 .cpu_name = "STB03xxx",
1205 .cpu_features = CPU_FTRS_40X,
1206 .cpu_user_features = PPC_FEATURE_32 |
1207 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1208 .mmu_features = MMU_FTR_TYPE_40x,
1209 .icache_bsize = 32,
1210 .dcache_bsize = 32,
1211 .machine_check = machine_check_4xx,
1212 .platform = "ppc405",
1213 },
1214 { /* STB 04xxx */
1215 .pvr_mask = 0xffff0000,
1216 .pvr_value = 0x41810000,
1217 .cpu_name = "STB04xxx",
1218 .cpu_features = CPU_FTRS_40X,
1219 .cpu_user_features = PPC_FEATURE_32 |
1220 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1221 .mmu_features = MMU_FTR_TYPE_40x,
1222 .icache_bsize = 32,
1223 .dcache_bsize = 32,
1224 .machine_check = machine_check_4xx,
1225 .platform = "ppc405",
1226 },
1227 { /* NP405L */
1228 .pvr_mask = 0xffff0000,
1229 .pvr_value = 0x41610000,
1230 .cpu_name = "NP405L",
1231 .cpu_features = CPU_FTRS_40X,
1232 .cpu_user_features = PPC_FEATURE_32 |
1233 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1234 .mmu_features = MMU_FTR_TYPE_40x,
1235 .icache_bsize = 32,
1236 .dcache_bsize = 32,
1237 .machine_check = machine_check_4xx,
1238 .platform = "ppc405",
1239 },
1240 { /* NP4GS3 */
1241 .pvr_mask = 0xffff0000,
1242 .pvr_value = 0x40B10000,
1243 .cpu_name = "NP4GS3",
1244 .cpu_features = CPU_FTRS_40X,
1245 .cpu_user_features = PPC_FEATURE_32 |
1246 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1247 .mmu_features = MMU_FTR_TYPE_40x,
1248 .icache_bsize = 32,
1249 .dcache_bsize = 32,
1250 .machine_check = machine_check_4xx,
1251 .platform = "ppc405",
1252 },
1253 { /* NP405H */
1254 .pvr_mask = 0xffff0000,
1255 .pvr_value = 0x41410000,
1256 .cpu_name = "NP405H",
1257 .cpu_features = CPU_FTRS_40X,
1258 .cpu_user_features = PPC_FEATURE_32 |
1259 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1260 .mmu_features = MMU_FTR_TYPE_40x,
1261 .icache_bsize = 32,
1262 .dcache_bsize = 32,
1263 .machine_check = machine_check_4xx,
1264 .platform = "ppc405",
1265 },
1266 { /* 405GPr */
1267 .pvr_mask = 0xffff0000,
1268 .pvr_value = 0x50910000,
1269 .cpu_name = "405GPr",
1270 .cpu_features = CPU_FTRS_40X,
1271 .cpu_user_features = PPC_FEATURE_32 |
1272 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1273 .mmu_features = MMU_FTR_TYPE_40x,
1274 .icache_bsize = 32,
1275 .dcache_bsize = 32,
1276 .machine_check = machine_check_4xx,
1277 .platform = "ppc405",
1278 },
1279 { /* STBx25xx */
1280 .pvr_mask = 0xffff0000,
1281 .pvr_value = 0x51510000,
1282 .cpu_name = "STBx25xx",
1283 .cpu_features = CPU_FTRS_40X,
1284 .cpu_user_features = PPC_FEATURE_32 |
1285 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1286 .mmu_features = MMU_FTR_TYPE_40x,
1287 .icache_bsize = 32,
1288 .dcache_bsize = 32,
1289 .machine_check = machine_check_4xx,
1290 .platform = "ppc405",
1291 },
1292 { /* 405LP */
1293 .pvr_mask = 0xffff0000,
1294 .pvr_value = 0x41F10000,
1295 .cpu_name = "405LP",
1296 .cpu_features = CPU_FTRS_40X,
1297 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1298 .mmu_features = MMU_FTR_TYPE_40x,
1299 .icache_bsize = 32,
1300 .dcache_bsize = 32,
1301 .machine_check = machine_check_4xx,
1302 .platform = "ppc405",
1303 },
1304 { /* Xilinx Virtex-II Pro */
1305 .pvr_mask = 0xfffff000,
1306 .pvr_value = 0x20010000,
1307 .cpu_name = "Virtex-II Pro",
1308 .cpu_features = CPU_FTRS_40X,
1309 .cpu_user_features = PPC_FEATURE_32 |
1310 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1311 .mmu_features = MMU_FTR_TYPE_40x,
1312 .icache_bsize = 32,
1313 .dcache_bsize = 32,
1314 .machine_check = machine_check_4xx,
1315 .platform = "ppc405",
1316 },
1317 { /* Xilinx Virtex-4 FX */
1318 .pvr_mask = 0xfffff000,
1319 .pvr_value = 0x20011000,
1320 .cpu_name = "Virtex-4 FX",
1321 .cpu_features = CPU_FTRS_40X,
1322 .cpu_user_features = PPC_FEATURE_32 |
1323 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1324 .mmu_features = MMU_FTR_TYPE_40x,
1325 .icache_bsize = 32,
1326 .dcache_bsize = 32,
1327 .machine_check = machine_check_4xx,
1328 .platform = "ppc405",
1329 },
1330 { /* 405EP */
1331 .pvr_mask = 0xffff0000,
1332 .pvr_value = 0x51210000,
1333 .cpu_name = "405EP",
1334 .cpu_features = CPU_FTRS_40X,
1335 .cpu_user_features = PPC_FEATURE_32 |
1336 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1337 .mmu_features = MMU_FTR_TYPE_40x,
1338 .icache_bsize = 32,
1339 .dcache_bsize = 32,
1340 .machine_check = machine_check_4xx,
1341 .platform = "ppc405",
1342 },
1343 { /* 405EX */
1344 .pvr_mask = 0xffff0004,
1345 .pvr_value = 0x12910004,
1346 .cpu_name = "405EX",
1347 .cpu_features = CPU_FTRS_40X,
1348 .cpu_user_features = PPC_FEATURE_32 |
1349 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1350 .mmu_features = MMU_FTR_TYPE_40x,
1351 .icache_bsize = 32,
1352 .dcache_bsize = 32,
1353 .machine_check = machine_check_4xx,
1354 .platform = "ppc405",
1355 },
1356 { /* 405EXr */
1357 .pvr_mask = 0xffff0004,
1358 .pvr_value = 0x12910000,
1359 .cpu_name = "405EXr",
1360 .cpu_features = CPU_FTRS_40X,
1361 .cpu_user_features = PPC_FEATURE_32 |
1362 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1363 .mmu_features = MMU_FTR_TYPE_40x,
1364 .icache_bsize = 32,
1365 .dcache_bsize = 32,
1366 .machine_check = machine_check_4xx,
1367 .platform = "ppc405",
1368 },
1369 {
1370 /* 405EZ */
1371 .pvr_mask = 0xffff0000,
1372 .pvr_value = 0x41510000,
1373 .cpu_name = "405EZ",
1374 .cpu_features = CPU_FTRS_40X,
1375 .cpu_user_features = PPC_FEATURE_32 |
1376 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1377 .mmu_features = MMU_FTR_TYPE_40x,
1378 .icache_bsize = 32,
1379 .dcache_bsize = 32,
1380 .machine_check = machine_check_4xx,
1381 .platform = "ppc405",
1382 },
1383 { /* default match */
1384 .pvr_mask = 0x00000000,
1385 .pvr_value = 0x00000000,
1386 .cpu_name = "(generic 40x PPC)",
1387 .cpu_features = CPU_FTRS_40X,
1388 .cpu_user_features = PPC_FEATURE_32 |
1389 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1390 .mmu_features = MMU_FTR_TYPE_40x,
1391 .icache_bsize = 32,
1392 .dcache_bsize = 32,
1393 .machine_check = machine_check_4xx,
1394 .platform = "ppc405",
1395 }
1396
1397 #endif /* CONFIG_40x */
1398 #ifdef CONFIG_44x
1399 {
1400 .pvr_mask = 0xf0000fff,
1401 .pvr_value = 0x40000850,
1402 .cpu_name = "440GR Rev. A",
1403 .cpu_features = CPU_FTRS_44X,
1404 .cpu_user_features = COMMON_USER_BOOKE,
1405 .mmu_features = MMU_FTR_TYPE_44x,
1406 .icache_bsize = 32,
1407 .dcache_bsize = 32,
1408 .machine_check = machine_check_4xx,
1409 .platform = "ppc440",
1410 },
1411 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1412 .pvr_mask = 0xf0000fff,
1413 .pvr_value = 0x40000858,
1414 .cpu_name = "440EP Rev. A",
1415 .cpu_features = CPU_FTRS_44X,
1416 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1417 .mmu_features = MMU_FTR_TYPE_44x,
1418 .icache_bsize = 32,
1419 .dcache_bsize = 32,
1420 .cpu_setup = __setup_cpu_440ep,
1421 .machine_check = machine_check_4xx,
1422 .platform = "ppc440",
1423 },
1424 {
1425 .pvr_mask = 0xf0000fff,
1426 .pvr_value = 0x400008d3,
1427 .cpu_name = "440GR Rev. B",
1428 .cpu_features = CPU_FTRS_44X,
1429 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1430 .mmu_features = MMU_FTR_TYPE_44x,
1431 .icache_bsize = 32,
1432 .dcache_bsize = 32,
1433 .machine_check = machine_check_4xx,
1434 .platform = "ppc440",
1435 },
1436 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1437 .pvr_mask = 0xf0000ff7,
1438 .pvr_value = 0x400008d4,
1439 .cpu_name = "440EP Rev. C",
1440 .cpu_features = CPU_FTRS_44X,
1441 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1442 .mmu_features = MMU_FTR_TYPE_44x,
1443 .icache_bsize = 32,
1444 .dcache_bsize = 32,
1445 .cpu_setup = __setup_cpu_440ep,
1446 .machine_check = machine_check_4xx,
1447 .platform = "ppc440",
1448 },
1449 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1450 .pvr_mask = 0xf0000fff,
1451 .pvr_value = 0x400008db,
1452 .cpu_name = "440EP Rev. B",
1453 .cpu_features = CPU_FTRS_44X,
1454 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1455 .mmu_features = MMU_FTR_TYPE_44x,
1456 .icache_bsize = 32,
1457 .dcache_bsize = 32,
1458 .cpu_setup = __setup_cpu_440ep,
1459 .machine_check = machine_check_4xx,
1460 .platform = "ppc440",
1461 },
1462 { /* 440GRX */
1463 .pvr_mask = 0xf0000ffb,
1464 .pvr_value = 0x200008D0,
1465 .cpu_name = "440GRX",
1466 .cpu_features = CPU_FTRS_44X,
1467 .cpu_user_features = COMMON_USER_BOOKE,
1468 .mmu_features = MMU_FTR_TYPE_44x,
1469 .icache_bsize = 32,
1470 .dcache_bsize = 32,
1471 .cpu_setup = __setup_cpu_440grx,
1472 .machine_check = machine_check_440A,
1473 .platform = "ppc440",
1474 },
1475 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1476 .pvr_mask = 0xf0000ffb,
1477 .pvr_value = 0x200008D8,
1478 .cpu_name = "440EPX",
1479 .cpu_features = CPU_FTRS_44X,
1480 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1481 .mmu_features = MMU_FTR_TYPE_44x,
1482 .icache_bsize = 32,
1483 .dcache_bsize = 32,
1484 .cpu_setup = __setup_cpu_440epx,
1485 .machine_check = machine_check_440A,
1486 .platform = "ppc440",
1487 },
1488 { /* 440GP Rev. B */
1489 .pvr_mask = 0xf0000fff,
1490 .pvr_value = 0x40000440,
1491 .cpu_name = "440GP Rev. B",
1492 .cpu_features = CPU_FTRS_44X,
1493 .cpu_user_features = COMMON_USER_BOOKE,
1494 .mmu_features = MMU_FTR_TYPE_44x,
1495 .icache_bsize = 32,
1496 .dcache_bsize = 32,
1497 .machine_check = machine_check_4xx,
1498 .platform = "ppc440gp",
1499 },
1500 { /* 440GP Rev. C */
1501 .pvr_mask = 0xf0000fff,
1502 .pvr_value = 0x40000481,
1503 .cpu_name = "440GP Rev. C",
1504 .cpu_features = CPU_FTRS_44X,
1505 .cpu_user_features = COMMON_USER_BOOKE,
1506 .mmu_features = MMU_FTR_TYPE_44x,
1507 .icache_bsize = 32,
1508 .dcache_bsize = 32,
1509 .machine_check = machine_check_4xx,
1510 .platform = "ppc440gp",
1511 },
1512 { /* 440GX Rev. A */
1513 .pvr_mask = 0xf0000fff,
1514 .pvr_value = 0x50000850,
1515 .cpu_name = "440GX Rev. A",
1516 .cpu_features = CPU_FTRS_44X,
1517 .cpu_user_features = COMMON_USER_BOOKE,
1518 .mmu_features = MMU_FTR_TYPE_44x,
1519 .icache_bsize = 32,
1520 .dcache_bsize = 32,
1521 .cpu_setup = __setup_cpu_440gx,
1522 .machine_check = machine_check_440A,
1523 .platform = "ppc440",
1524 },
1525 { /* 440GX Rev. B */
1526 .pvr_mask = 0xf0000fff,
1527 .pvr_value = 0x50000851,
1528 .cpu_name = "440GX Rev. B",
1529 .cpu_features = CPU_FTRS_44X,
1530 .cpu_user_features = COMMON_USER_BOOKE,
1531 .mmu_features = MMU_FTR_TYPE_44x,
1532 .icache_bsize = 32,
1533 .dcache_bsize = 32,
1534 .cpu_setup = __setup_cpu_440gx,
1535 .machine_check = machine_check_440A,
1536 .platform = "ppc440",
1537 },
1538 { /* 440GX Rev. C */
1539 .pvr_mask = 0xf0000fff,
1540 .pvr_value = 0x50000892,
1541 .cpu_name = "440GX Rev. C",
1542 .cpu_features = CPU_FTRS_44X,
1543 .cpu_user_features = COMMON_USER_BOOKE,
1544 .mmu_features = MMU_FTR_TYPE_44x,
1545 .icache_bsize = 32,
1546 .dcache_bsize = 32,
1547 .cpu_setup = __setup_cpu_440gx,
1548 .machine_check = machine_check_440A,
1549 .platform = "ppc440",
1550 },
1551 { /* 440GX Rev. F */
1552 .pvr_mask = 0xf0000fff,
1553 .pvr_value = 0x50000894,
1554 .cpu_name = "440GX Rev. F",
1555 .cpu_features = CPU_FTRS_44X,
1556 .cpu_user_features = COMMON_USER_BOOKE,
1557 .mmu_features = MMU_FTR_TYPE_44x,
1558 .icache_bsize = 32,
1559 .dcache_bsize = 32,
1560 .cpu_setup = __setup_cpu_440gx,
1561 .machine_check = machine_check_440A,
1562 .platform = "ppc440",
1563 },
1564 { /* 440SP Rev. A */
1565 .pvr_mask = 0xfff00fff,
1566 .pvr_value = 0x53200891,
1567 .cpu_name = "440SP Rev. A",
1568 .cpu_features = CPU_FTRS_44X,
1569 .cpu_user_features = COMMON_USER_BOOKE,
1570 .mmu_features = MMU_FTR_TYPE_44x,
1571 .icache_bsize = 32,
1572 .dcache_bsize = 32,
1573 .machine_check = machine_check_4xx,
1574 .platform = "ppc440",
1575 },
1576 { /* 440SPe Rev. A */
1577 .pvr_mask = 0xfff00fff,
1578 .pvr_value = 0x53400890,
1579 .cpu_name = "440SPe Rev. A",
1580 .cpu_features = CPU_FTRS_44X,
1581 .cpu_user_features = COMMON_USER_BOOKE,
1582 .mmu_features = MMU_FTR_TYPE_44x,
1583 .icache_bsize = 32,
1584 .dcache_bsize = 32,
1585 .cpu_setup = __setup_cpu_440spe,
1586 .machine_check = machine_check_440A,
1587 .platform = "ppc440",
1588 },
1589 { /* 440SPe Rev. B */
1590 .pvr_mask = 0xfff00fff,
1591 .pvr_value = 0x53400891,
1592 .cpu_name = "440SPe Rev. B",
1593 .cpu_features = CPU_FTRS_44X,
1594 .cpu_user_features = COMMON_USER_BOOKE,
1595 .mmu_features = MMU_FTR_TYPE_44x,
1596 .icache_bsize = 32,
1597 .dcache_bsize = 32,
1598 .cpu_setup = __setup_cpu_440spe,
1599 .machine_check = machine_check_440A,
1600 .platform = "ppc440",
1601 },
1602 { /* 440 in Xilinx Virtex-5 FXT */
1603 .pvr_mask = 0xfffffff0,
1604 .pvr_value = 0x7ff21910,
1605 .cpu_name = "440 in Virtex-5 FXT",
1606 .cpu_features = CPU_FTRS_44X,
1607 .cpu_user_features = COMMON_USER_BOOKE,
1608 .mmu_features = MMU_FTR_TYPE_44x,
1609 .icache_bsize = 32,
1610 .dcache_bsize = 32,
1611 .cpu_setup = __setup_cpu_440x5,
1612 .machine_check = machine_check_440A,
1613 .platform = "ppc440",
1614 },
1615 { /* 460EX */
1616 .pvr_mask = 0xffff0002,
1617 .pvr_value = 0x13020002,
1618 .cpu_name = "460EX",
1619 .cpu_features = CPU_FTRS_440x6,
1620 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1621 .mmu_features = MMU_FTR_TYPE_44x,
1622 .icache_bsize = 32,
1623 .dcache_bsize = 32,
1624 .cpu_setup = __setup_cpu_460ex,
1625 .machine_check = machine_check_440A,
1626 .platform = "ppc440",
1627 },
1628 { /* 460GT */
1629 .pvr_mask = 0xffff0002,
1630 .pvr_value = 0x13020000,
1631 .cpu_name = "460GT",
1632 .cpu_features = CPU_FTRS_440x6,
1633 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1634 .mmu_features = MMU_FTR_TYPE_44x,
1635 .icache_bsize = 32,
1636 .dcache_bsize = 32,
1637 .cpu_setup = __setup_cpu_460gt,
1638 .machine_check = machine_check_440A,
1639 .platform = "ppc440",
1640 },
1641 { /* default match */
1642 .pvr_mask = 0x00000000,
1643 .pvr_value = 0x00000000,
1644 .cpu_name = "(generic 44x PPC)",
1645 .cpu_features = CPU_FTRS_44X,
1646 .cpu_user_features = COMMON_USER_BOOKE,
1647 .mmu_features = MMU_FTR_TYPE_44x,
1648 .icache_bsize = 32,
1649 .dcache_bsize = 32,
1650 .machine_check = machine_check_4xx,
1651 .platform = "ppc440",
1652 }
1653 #endif /* CONFIG_44x */
1654 #ifdef CONFIG_E200
1655 { /* e200z5 */
1656 .pvr_mask = 0xfff00000,
1657 .pvr_value = 0x81000000,
1658 .cpu_name = "e200z5",
1659 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1660 .cpu_features = CPU_FTRS_E200,
1661 .cpu_user_features = COMMON_USER_BOOKE |
1662 PPC_FEATURE_HAS_EFP_SINGLE |
1663 PPC_FEATURE_UNIFIED_CACHE,
1664 .mmu_features = MMU_FTR_TYPE_FSL_E,
1665 .dcache_bsize = 32,
1666 .machine_check = machine_check_e200,
1667 .platform = "ppc5554",
1668 },
1669 { /* e200z6 */
1670 .pvr_mask = 0xfff00000,
1671 .pvr_value = 0x81100000,
1672 .cpu_name = "e200z6",
1673 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1674 .cpu_features = CPU_FTRS_E200,
1675 .cpu_user_features = COMMON_USER_BOOKE |
1676 PPC_FEATURE_HAS_SPE_COMP |
1677 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1678 PPC_FEATURE_UNIFIED_CACHE,
1679 .mmu_features = MMU_FTR_TYPE_FSL_E,
1680 .dcache_bsize = 32,
1681 .machine_check = machine_check_e200,
1682 .platform = "ppc5554",
1683 },
1684 { /* default match */
1685 .pvr_mask = 0x00000000,
1686 .pvr_value = 0x00000000,
1687 .cpu_name = "(generic E200 PPC)",
1688 .cpu_features = CPU_FTRS_E200,
1689 .cpu_user_features = COMMON_USER_BOOKE |
1690 PPC_FEATURE_HAS_EFP_SINGLE |
1691 PPC_FEATURE_UNIFIED_CACHE,
1692 .mmu_features = MMU_FTR_TYPE_FSL_E,
1693 .dcache_bsize = 32,
1694 .cpu_setup = __setup_cpu_e200,
1695 .machine_check = machine_check_e200,
1696 .platform = "ppc5554",
1697 }
1698 #endif /* CONFIG_E200 */
1699 #ifdef CONFIG_E500
1700 { /* e500 */
1701 .pvr_mask = 0xffff0000,
1702 .pvr_value = 0x80200000,
1703 .cpu_name = "e500",
1704 .cpu_features = CPU_FTRS_E500,
1705 .cpu_user_features = COMMON_USER_BOOKE |
1706 PPC_FEATURE_HAS_SPE_COMP |
1707 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1708 .mmu_features = MMU_FTR_TYPE_FSL_E,
1709 .icache_bsize = 32,
1710 .dcache_bsize = 32,
1711 .num_pmcs = 4,
1712 .oprofile_cpu_type = "ppc/e500",
1713 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1714 .cpu_setup = __setup_cpu_e500v1,
1715 .machine_check = machine_check_e500,
1716 .platform = "ppc8540",
1717 },
1718 { /* e500v2 */
1719 .pvr_mask = 0xffff0000,
1720 .pvr_value = 0x80210000,
1721 .cpu_name = "e500v2",
1722 .cpu_features = CPU_FTRS_E500_2,
1723 .cpu_user_features = COMMON_USER_BOOKE |
1724 PPC_FEATURE_HAS_SPE_COMP |
1725 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1726 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1727 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1728 .icache_bsize = 32,
1729 .dcache_bsize = 32,
1730 .num_pmcs = 4,
1731 .oprofile_cpu_type = "ppc/e500",
1732 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1733 .cpu_setup = __setup_cpu_e500v2,
1734 .machine_check = machine_check_e500,
1735 .platform = "ppc8548",
1736 },
1737 { /* e500mc */
1738 .pvr_mask = 0xffff0000,
1739 .pvr_value = 0x80230000,
1740 .cpu_name = "e500mc",
1741 .cpu_features = CPU_FTRS_E500MC,
1742 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1743 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1744 .icache_bsize = 64,
1745 .dcache_bsize = 64,
1746 .num_pmcs = 4,
1747 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
1748 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1749 .cpu_setup = __setup_cpu_e500mc,
1750 .machine_check = machine_check_e500,
1751 .platform = "ppce500mc",
1752 },
1753 { /* default match */
1754 .pvr_mask = 0x00000000,
1755 .pvr_value = 0x00000000,
1756 .cpu_name = "(generic E500 PPC)",
1757 .cpu_features = CPU_FTRS_E500,
1758 .cpu_user_features = COMMON_USER_BOOKE |
1759 PPC_FEATURE_HAS_SPE_COMP |
1760 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1761 .mmu_features = MMU_FTR_TYPE_FSL_E,
1762 .icache_bsize = 32,
1763 .dcache_bsize = 32,
1764 .machine_check = machine_check_e500,
1765 .platform = "powerpc",
1766 }
1767 #endif /* CONFIG_E500 */
1768 #endif /* CONFIG_PPC32 */
1769 };
1770
1771 static struct cpu_spec the_cpu_spec;
1772
1773 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
1774 {
1775 struct cpu_spec *s = cpu_specs;
1776 struct cpu_spec *t = &the_cpu_spec;
1777 int i;
1778
1779 s = PTRRELOC(s);
1780 t = PTRRELOC(t);
1781
1782 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1783 if ((pvr & s->pvr_mask) == s->pvr_value) {
1784 /*
1785 * If we are overriding a previous value derived
1786 * from the real PVR with a new value obtained
1787 * using a logical PVR value, don't modify the
1788 * performance monitor fields.
1789 */
1790 if (t->num_pmcs && !s->num_pmcs) {
1791 t->cpu_name = s->cpu_name;
1792 t->cpu_features = s->cpu_features;
1793 t->cpu_user_features = s->cpu_user_features;
1794 t->icache_bsize = s->icache_bsize;
1795 t->dcache_bsize = s->dcache_bsize;
1796 t->cpu_setup = s->cpu_setup;
1797 t->cpu_restore = s->cpu_restore;
1798 t->platform = s->platform;
1799 /*
1800 * If we have passed through this logic once
1801 * before and have pulled the default case
1802 * because the real PVR was not found inside
1803 * cpu_specs[], then we are possibly running in
1804 * compatibility mode. In that case, let the
1805 * oprofiler know which set of compatibility
1806 * counters to pull from by making sure the
1807 * oprofile_cpu_type string is set to that of
1808 * compatibility mode. If the oprofile_cpu_type
1809 * already has a value, then we are possibly
1810 * overriding a real PVR with a logical one, and,
1811 * in that case, keep the current value for
1812 * oprofile_cpu_type.
1813 */
1814 if (t->oprofile_cpu_type == NULL)
1815 t->oprofile_cpu_type = s->oprofile_cpu_type;
1816 } else
1817 *t = *s;
1818 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
1819
1820 /*
1821 * Set the base platform string once; assumes
1822 * we're called with real pvr first.
1823 */
1824 if (*PTRRELOC(&powerpc_base_platform) == NULL)
1825 *PTRRELOC(&powerpc_base_platform) = t->platform;
1826
1827 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
1828 /* ppc64 and booke expect identify_cpu to also call
1829 * setup_cpu for that processor. I will consolidate
1830 * that at a later time, for now, just use #ifdef.
1831 * we also don't need to PTRRELOC the function pointer
1832 * on ppc64 and booke as we are running at 0 in real
1833 * mode on ppc64 and reloc_offset is always 0 on booke.
1834 */
1835 if (s->cpu_setup) {
1836 s->cpu_setup(offset, s);
1837 }
1838 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
1839 return s;
1840 }
1841 BUG();
1842 return NULL;
1843 }
Linux kernel - Deliverables
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