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[POWERPC] Fix PowerPC 750CL and 750GX CPU features
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25
26 /* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33 #ifdef CONFIG_PPC32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
43 #ifdef CONFIG_PPC64
44 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
47 extern void __restore_cpu_pa6t(void);
48 extern void __restore_cpu_ppc970(void);
49 #endif /* CONFIG_PPC64 */
50
51 /* This table only contains "desktop" CPUs, it need to be filled with embedded
52 * ones as well...
53 */
54 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
55 PPC_FEATURE_HAS_MMU)
56 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
57 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
58 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
62 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
63 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
64 PPC_FEATURE_TRUE_LE)
65 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
66 PPC_FEATURE_TRUE_LE | \
67 PPC_FEATURE_HAS_ALTIVEC_COMP)
68 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
69 PPC_FEATURE_BOOKE)
70
71 /* We only set the spe features if the kernel was compiled with
72 * spe support
73 */
74 #ifdef CONFIG_SPE
75 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
76 #else
77 #define PPC_FEATURE_SPE_COMP 0
78 #endif
79
80 static struct cpu_spec cpu_specs[] = {
81 #ifdef CONFIG_PPC64
82 { /* Power3 */
83 .pvr_mask = 0xffff0000,
84 .pvr_value = 0x00400000,
85 .cpu_name = "POWER3 (630)",
86 .cpu_features = CPU_FTRS_POWER3,
87 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
88 .icache_bsize = 128,
89 .dcache_bsize = 128,
90 .num_pmcs = 8,
91 .pmc_type = PPC_PMC_IBM,
92 .oprofile_cpu_type = "ppc64/power3",
93 .oprofile_type = PPC_OPROFILE_RS64,
94 .platform = "power3",
95 },
96 { /* Power3+ */
97 .pvr_mask = 0xffff0000,
98 .pvr_value = 0x00410000,
99 .cpu_name = "POWER3 (630+)",
100 .cpu_features = CPU_FTRS_POWER3,
101 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
102 .icache_bsize = 128,
103 .dcache_bsize = 128,
104 .num_pmcs = 8,
105 .pmc_type = PPC_PMC_IBM,
106 .oprofile_cpu_type = "ppc64/power3",
107 .oprofile_type = PPC_OPROFILE_RS64,
108 .platform = "power3",
109 },
110 { /* Northstar */
111 .pvr_mask = 0xffff0000,
112 .pvr_value = 0x00330000,
113 .cpu_name = "RS64-II (northstar)",
114 .cpu_features = CPU_FTRS_RS64,
115 .cpu_user_features = COMMON_USER_PPC64,
116 .icache_bsize = 128,
117 .dcache_bsize = 128,
118 .num_pmcs = 8,
119 .pmc_type = PPC_PMC_IBM,
120 .oprofile_cpu_type = "ppc64/rs64",
121 .oprofile_type = PPC_OPROFILE_RS64,
122 .platform = "rs64",
123 },
124 { /* Pulsar */
125 .pvr_mask = 0xffff0000,
126 .pvr_value = 0x00340000,
127 .cpu_name = "RS64-III (pulsar)",
128 .cpu_features = CPU_FTRS_RS64,
129 .cpu_user_features = COMMON_USER_PPC64,
130 .icache_bsize = 128,
131 .dcache_bsize = 128,
132 .num_pmcs = 8,
133 .pmc_type = PPC_PMC_IBM,
134 .oprofile_cpu_type = "ppc64/rs64",
135 .oprofile_type = PPC_OPROFILE_RS64,
136 .platform = "rs64",
137 },
138 { /* I-star */
139 .pvr_mask = 0xffff0000,
140 .pvr_value = 0x00360000,
141 .cpu_name = "RS64-III (icestar)",
142 .cpu_features = CPU_FTRS_RS64,
143 .cpu_user_features = COMMON_USER_PPC64,
144 .icache_bsize = 128,
145 .dcache_bsize = 128,
146 .num_pmcs = 8,
147 .pmc_type = PPC_PMC_IBM,
148 .oprofile_cpu_type = "ppc64/rs64",
149 .oprofile_type = PPC_OPROFILE_RS64,
150 .platform = "rs64",
151 },
152 { /* S-star */
153 .pvr_mask = 0xffff0000,
154 .pvr_value = 0x00370000,
155 .cpu_name = "RS64-IV (sstar)",
156 .cpu_features = CPU_FTRS_RS64,
157 .cpu_user_features = COMMON_USER_PPC64,
158 .icache_bsize = 128,
159 .dcache_bsize = 128,
160 .num_pmcs = 8,
161 .pmc_type = PPC_PMC_IBM,
162 .oprofile_cpu_type = "ppc64/rs64",
163 .oprofile_type = PPC_OPROFILE_RS64,
164 .platform = "rs64",
165 },
166 { /* Power4 */
167 .pvr_mask = 0xffff0000,
168 .pvr_value = 0x00350000,
169 .cpu_name = "POWER4 (gp)",
170 .cpu_features = CPU_FTRS_POWER4,
171 .cpu_user_features = COMMON_USER_POWER4,
172 .icache_bsize = 128,
173 .dcache_bsize = 128,
174 .num_pmcs = 8,
175 .pmc_type = PPC_PMC_IBM,
176 .oprofile_cpu_type = "ppc64/power4",
177 .oprofile_type = PPC_OPROFILE_POWER4,
178 .platform = "power4",
179 },
180 { /* Power4+ */
181 .pvr_mask = 0xffff0000,
182 .pvr_value = 0x00380000,
183 .cpu_name = "POWER4+ (gq)",
184 .cpu_features = CPU_FTRS_POWER4,
185 .cpu_user_features = COMMON_USER_POWER4,
186 .icache_bsize = 128,
187 .dcache_bsize = 128,
188 .num_pmcs = 8,
189 .pmc_type = PPC_PMC_IBM,
190 .oprofile_cpu_type = "ppc64/power4",
191 .oprofile_type = PPC_OPROFILE_POWER4,
192 .platform = "power4",
193 },
194 { /* PPC970 */
195 .pvr_mask = 0xffff0000,
196 .pvr_value = 0x00390000,
197 .cpu_name = "PPC970",
198 .cpu_features = CPU_FTRS_PPC970,
199 .cpu_user_features = COMMON_USER_POWER4 |
200 PPC_FEATURE_HAS_ALTIVEC_COMP,
201 .icache_bsize = 128,
202 .dcache_bsize = 128,
203 .num_pmcs = 8,
204 .pmc_type = PPC_PMC_IBM,
205 .cpu_setup = __setup_cpu_ppc970,
206 .cpu_restore = __restore_cpu_ppc970,
207 .oprofile_cpu_type = "ppc64/970",
208 .oprofile_type = PPC_OPROFILE_POWER4,
209 .platform = "ppc970",
210 },
211 { /* PPC970FX */
212 .pvr_mask = 0xffff0000,
213 .pvr_value = 0x003c0000,
214 .cpu_name = "PPC970FX",
215 .cpu_features = CPU_FTRS_PPC970,
216 .cpu_user_features = COMMON_USER_POWER4 |
217 PPC_FEATURE_HAS_ALTIVEC_COMP,
218 .icache_bsize = 128,
219 .dcache_bsize = 128,
220 .num_pmcs = 8,
221 .pmc_type = PPC_PMC_IBM,
222 .cpu_setup = __setup_cpu_ppc970,
223 .cpu_restore = __restore_cpu_ppc970,
224 .oprofile_cpu_type = "ppc64/970",
225 .oprofile_type = PPC_OPROFILE_POWER4,
226 .platform = "ppc970",
227 },
228 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
229 .pvr_mask = 0xffffffff,
230 .pvr_value = 0x00440100,
231 .cpu_name = "PPC970MP",
232 .cpu_features = CPU_FTRS_PPC970,
233 .cpu_user_features = COMMON_USER_POWER4 |
234 PPC_FEATURE_HAS_ALTIVEC_COMP,
235 .icache_bsize = 128,
236 .dcache_bsize = 128,
237 .num_pmcs = 8,
238 .cpu_setup = __setup_cpu_ppc970,
239 .cpu_restore = __restore_cpu_ppc970,
240 .oprofile_cpu_type = "ppc64/970MP",
241 .oprofile_type = PPC_OPROFILE_POWER4,
242 .platform = "ppc970",
243 },
244 { /* PPC970MP */
245 .pvr_mask = 0xffff0000,
246 .pvr_value = 0x00440000,
247 .cpu_name = "PPC970MP",
248 .cpu_features = CPU_FTRS_PPC970,
249 .cpu_user_features = COMMON_USER_POWER4 |
250 PPC_FEATURE_HAS_ALTIVEC_COMP,
251 .icache_bsize = 128,
252 .dcache_bsize = 128,
253 .num_pmcs = 8,
254 .cpu_setup = __setup_cpu_ppc970MP,
255 .cpu_restore = __restore_cpu_ppc970,
256 .oprofile_cpu_type = "ppc64/970MP",
257 .oprofile_type = PPC_OPROFILE_POWER4,
258 .platform = "ppc970",
259 },
260 { /* PPC970GX */
261 .pvr_mask = 0xffff0000,
262 .pvr_value = 0x00450000,
263 .cpu_name = "PPC970GX",
264 .cpu_features = CPU_FTRS_PPC970,
265 .cpu_user_features = COMMON_USER_POWER4 |
266 PPC_FEATURE_HAS_ALTIVEC_COMP,
267 .icache_bsize = 128,
268 .dcache_bsize = 128,
269 .num_pmcs = 8,
270 .pmc_type = PPC_PMC_IBM,
271 .cpu_setup = __setup_cpu_ppc970,
272 .oprofile_cpu_type = "ppc64/970",
273 .oprofile_type = PPC_OPROFILE_POWER4,
274 .platform = "ppc970",
275 },
276 { /* Power5 GR */
277 .pvr_mask = 0xffff0000,
278 .pvr_value = 0x003a0000,
279 .cpu_name = "POWER5 (gr)",
280 .cpu_features = CPU_FTRS_POWER5,
281 .cpu_user_features = COMMON_USER_POWER5,
282 .icache_bsize = 128,
283 .dcache_bsize = 128,
284 .num_pmcs = 6,
285 .pmc_type = PPC_PMC_IBM,
286 .oprofile_cpu_type = "ppc64/power5",
287 .oprofile_type = PPC_OPROFILE_POWER4,
288 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
289 * and above but only works on POWER5 and above
290 */
291 .oprofile_mmcra_sihv = MMCRA_SIHV,
292 .oprofile_mmcra_sipr = MMCRA_SIPR,
293 .platform = "power5",
294 },
295 { /* Power5 GS */
296 .pvr_mask = 0xffff0000,
297 .pvr_value = 0x003b0000,
298 .cpu_name = "POWER5+ (gs)",
299 .cpu_features = CPU_FTRS_POWER5,
300 .cpu_user_features = COMMON_USER_POWER5_PLUS,
301 .icache_bsize = 128,
302 .dcache_bsize = 128,
303 .num_pmcs = 6,
304 .pmc_type = PPC_PMC_IBM,
305 .oprofile_cpu_type = "ppc64/power5+",
306 .oprofile_type = PPC_OPROFILE_POWER4,
307 .oprofile_mmcra_sihv = MMCRA_SIHV,
308 .oprofile_mmcra_sipr = MMCRA_SIPR,
309 .platform = "power5+",
310 },
311 { /* POWER6 in P5+ mode; 2.04-compliant processor */
312 .pvr_mask = 0xffffffff,
313 .pvr_value = 0x0f000001,
314 .cpu_name = "POWER5+",
315 .cpu_features = CPU_FTRS_POWER5,
316 .cpu_user_features = COMMON_USER_POWER5_PLUS,
317 .icache_bsize = 128,
318 .dcache_bsize = 128,
319 .num_pmcs = 6,
320 .oprofile_cpu_type = "ppc64/power6",
321 .oprofile_type = PPC_OPROFILE_POWER4,
322 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
323 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
324 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
325 POWER6_MMCRA_OTHER,
326 .platform = "power5+",
327 },
328 { /* Power6 */
329 .pvr_mask = 0xffff0000,
330 .pvr_value = 0x003e0000,
331 .cpu_name = "POWER6 (raw)",
332 .cpu_features = CPU_FTRS_POWER6,
333 .cpu_user_features = COMMON_USER_POWER6 |
334 PPC_FEATURE_POWER6_EXT,
335 .icache_bsize = 128,
336 .dcache_bsize = 128,
337 .num_pmcs = 6,
338 .oprofile_cpu_type = "ppc64/power6",
339 .oprofile_type = PPC_OPROFILE_POWER4,
340 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
341 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
342 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
343 POWER6_MMCRA_OTHER,
344 .platform = "power6x",
345 },
346 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
347 .pvr_mask = 0xffffffff,
348 .pvr_value = 0x0f000002,
349 .cpu_name = "POWER6 (architected)",
350 .cpu_features = CPU_FTRS_POWER6,
351 .cpu_user_features = COMMON_USER_POWER6,
352 .icache_bsize = 128,
353 .dcache_bsize = 128,
354 .num_pmcs = 6,
355 .pmc_type = PPC_PMC_IBM,
356 .oprofile_cpu_type = "ppc64/power6",
357 .oprofile_type = PPC_OPROFILE_POWER4,
358 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
359 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
360 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
361 POWER6_MMCRA_OTHER,
362 .platform = "power6",
363 },
364 { /* Cell Broadband Engine */
365 .pvr_mask = 0xffff0000,
366 .pvr_value = 0x00700000,
367 .cpu_name = "Cell Broadband Engine",
368 .cpu_features = CPU_FTRS_CELL,
369 .cpu_user_features = COMMON_USER_PPC64 |
370 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
371 PPC_FEATURE_SMT,
372 .icache_bsize = 128,
373 .dcache_bsize = 128,
374 .num_pmcs = 4,
375 .pmc_type = PPC_PMC_IBM,
376 .oprofile_cpu_type = "ppc64/cell-be",
377 .oprofile_type = PPC_OPROFILE_CELL,
378 .platform = "ppc-cell-be",
379 },
380 { /* PA Semi PA6T */
381 .pvr_mask = 0x7fff0000,
382 .pvr_value = 0x00900000,
383 .cpu_name = "PA6T",
384 .cpu_features = CPU_FTRS_PA6T,
385 .cpu_user_features = COMMON_USER_PA6T,
386 .icache_bsize = 64,
387 .dcache_bsize = 64,
388 .num_pmcs = 6,
389 .pmc_type = PPC_PMC_PA6T,
390 .cpu_setup = __setup_cpu_pa6t,
391 .cpu_restore = __restore_cpu_pa6t,
392 .platform = "pa6t",
393 },
394 { /* default match */
395 .pvr_mask = 0x00000000,
396 .pvr_value = 0x00000000,
397 .cpu_name = "POWER4 (compatible)",
398 .cpu_features = CPU_FTRS_COMPATIBLE,
399 .cpu_user_features = COMMON_USER_PPC64,
400 .icache_bsize = 128,
401 .dcache_bsize = 128,
402 .num_pmcs = 6,
403 .pmc_type = PPC_PMC_IBM,
404 .platform = "power4",
405 }
406 #endif /* CONFIG_PPC64 */
407 #ifdef CONFIG_PPC32
408 #if CLASSIC_PPC
409 { /* 601 */
410 .pvr_mask = 0xffff0000,
411 .pvr_value = 0x00010000,
412 .cpu_name = "601",
413 .cpu_features = CPU_FTRS_PPC601,
414 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
415 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
416 .icache_bsize = 32,
417 .dcache_bsize = 32,
418 .platform = "ppc601",
419 },
420 { /* 603 */
421 .pvr_mask = 0xffff0000,
422 .pvr_value = 0x00030000,
423 .cpu_name = "603",
424 .cpu_features = CPU_FTRS_603,
425 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
426 .icache_bsize = 32,
427 .dcache_bsize = 32,
428 .cpu_setup = __setup_cpu_603,
429 .platform = "ppc603",
430 },
431 { /* 603e */
432 .pvr_mask = 0xffff0000,
433 .pvr_value = 0x00060000,
434 .cpu_name = "603e",
435 .cpu_features = CPU_FTRS_603,
436 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
437 .icache_bsize = 32,
438 .dcache_bsize = 32,
439 .cpu_setup = __setup_cpu_603,
440 .platform = "ppc603",
441 },
442 { /* 603ev */
443 .pvr_mask = 0xffff0000,
444 .pvr_value = 0x00070000,
445 .cpu_name = "603ev",
446 .cpu_features = CPU_FTRS_603,
447 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
448 .icache_bsize = 32,
449 .dcache_bsize = 32,
450 .cpu_setup = __setup_cpu_603,
451 .platform = "ppc603",
452 },
453 { /* 604 */
454 .pvr_mask = 0xffff0000,
455 .pvr_value = 0x00040000,
456 .cpu_name = "604",
457 .cpu_features = CPU_FTRS_604,
458 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
459 .icache_bsize = 32,
460 .dcache_bsize = 32,
461 .num_pmcs = 2,
462 .cpu_setup = __setup_cpu_604,
463 .platform = "ppc604",
464 },
465 { /* 604e */
466 .pvr_mask = 0xfffff000,
467 .pvr_value = 0x00090000,
468 .cpu_name = "604e",
469 .cpu_features = CPU_FTRS_604,
470 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
471 .icache_bsize = 32,
472 .dcache_bsize = 32,
473 .num_pmcs = 4,
474 .cpu_setup = __setup_cpu_604,
475 .platform = "ppc604",
476 },
477 { /* 604r */
478 .pvr_mask = 0xffff0000,
479 .pvr_value = 0x00090000,
480 .cpu_name = "604r",
481 .cpu_features = CPU_FTRS_604,
482 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
483 .icache_bsize = 32,
484 .dcache_bsize = 32,
485 .num_pmcs = 4,
486 .cpu_setup = __setup_cpu_604,
487 .platform = "ppc604",
488 },
489 { /* 604ev */
490 .pvr_mask = 0xffff0000,
491 .pvr_value = 0x000a0000,
492 .cpu_name = "604ev",
493 .cpu_features = CPU_FTRS_604,
494 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
495 .icache_bsize = 32,
496 .dcache_bsize = 32,
497 .num_pmcs = 4,
498 .cpu_setup = __setup_cpu_604,
499 .platform = "ppc604",
500 },
501 { /* 740/750 (0x4202, don't support TAU ?) */
502 .pvr_mask = 0xffffffff,
503 .pvr_value = 0x00084202,
504 .cpu_name = "740/750",
505 .cpu_features = CPU_FTRS_740_NOTAU,
506 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
507 .icache_bsize = 32,
508 .dcache_bsize = 32,
509 .num_pmcs = 4,
510 .cpu_setup = __setup_cpu_750,
511 .platform = "ppc750",
512 },
513 { /* 750CX (80100 and 8010x?) */
514 .pvr_mask = 0xfffffff0,
515 .pvr_value = 0x00080100,
516 .cpu_name = "750CX",
517 .cpu_features = CPU_FTRS_750,
518 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
519 .icache_bsize = 32,
520 .dcache_bsize = 32,
521 .num_pmcs = 4,
522 .cpu_setup = __setup_cpu_750cx,
523 .platform = "ppc750",
524 },
525 { /* 750CX (82201 and 82202) */
526 .pvr_mask = 0xfffffff0,
527 .pvr_value = 0x00082200,
528 .cpu_name = "750CX",
529 .cpu_features = CPU_FTRS_750,
530 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
531 .icache_bsize = 32,
532 .dcache_bsize = 32,
533 .num_pmcs = 4,
534 .cpu_setup = __setup_cpu_750cx,
535 .platform = "ppc750",
536 },
537 { /* 750CXe (82214) */
538 .pvr_mask = 0xfffffff0,
539 .pvr_value = 0x00082210,
540 .cpu_name = "750CXe",
541 .cpu_features = CPU_FTRS_750,
542 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
543 .icache_bsize = 32,
544 .dcache_bsize = 32,
545 .num_pmcs = 4,
546 .cpu_setup = __setup_cpu_750cx,
547 .platform = "ppc750",
548 },
549 { /* 750CXe "Gekko" (83214) */
550 .pvr_mask = 0xffffffff,
551 .pvr_value = 0x00083214,
552 .cpu_name = "750CXe",
553 .cpu_features = CPU_FTRS_750,
554 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
555 .icache_bsize = 32,
556 .dcache_bsize = 32,
557 .num_pmcs = 4,
558 .cpu_setup = __setup_cpu_750cx,
559 .platform = "ppc750",
560 },
561 { /* 750CL */
562 .pvr_mask = 0xfffff0f0,
563 .pvr_value = 0x00087010,
564 .cpu_name = "750CL",
565 .cpu_features = CPU_FTRS_750CL,
566 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
567 .icache_bsize = 32,
568 .dcache_bsize = 32,
569 .num_pmcs = 4,
570 .cpu_setup = __setup_cpu_750,
571 .platform = "ppc750",
572 },
573 { /* 745/755 */
574 .pvr_mask = 0xfffff000,
575 .pvr_value = 0x00083000,
576 .cpu_name = "745/755",
577 .cpu_features = CPU_FTRS_750,
578 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
579 .icache_bsize = 32,
580 .dcache_bsize = 32,
581 .num_pmcs = 4,
582 .cpu_setup = __setup_cpu_750,
583 .platform = "ppc750",
584 },
585 { /* 750FX rev 1.x */
586 .pvr_mask = 0xffffff00,
587 .pvr_value = 0x70000100,
588 .cpu_name = "750FX",
589 .cpu_features = CPU_FTRS_750FX1,
590 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
591 .icache_bsize = 32,
592 .dcache_bsize = 32,
593 .num_pmcs = 4,
594 .cpu_setup = __setup_cpu_750,
595 .platform = "ppc750",
596 },
597 { /* 750FX rev 2.0 must disable HID0[DPM] */
598 .pvr_mask = 0xffffffff,
599 .pvr_value = 0x70000200,
600 .cpu_name = "750FX",
601 .cpu_features = CPU_FTRS_750FX2,
602 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
603 .icache_bsize = 32,
604 .dcache_bsize = 32,
605 .num_pmcs = 4,
606 .cpu_setup = __setup_cpu_750,
607 .platform = "ppc750",
608 },
609 { /* 750FX (All revs except 2.0) */
610 .pvr_mask = 0xffff0000,
611 .pvr_value = 0x70000000,
612 .cpu_name = "750FX",
613 .cpu_features = CPU_FTRS_750FX,
614 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
615 .icache_bsize = 32,
616 .dcache_bsize = 32,
617 .num_pmcs = 4,
618 .cpu_setup = __setup_cpu_750fx,
619 .platform = "ppc750",
620 },
621 { /* 750GX */
622 .pvr_mask = 0xffff0000,
623 .pvr_value = 0x70020000,
624 .cpu_name = "750GX",
625 .cpu_features = CPU_FTRS_750GX,
626 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
627 .icache_bsize = 32,
628 .dcache_bsize = 32,
629 .num_pmcs = 4,
630 .cpu_setup = __setup_cpu_750fx,
631 .platform = "ppc750",
632 },
633 { /* 740/750 (L2CR bit need fixup for 740) */
634 .pvr_mask = 0xffff0000,
635 .pvr_value = 0x00080000,
636 .cpu_name = "740/750",
637 .cpu_features = CPU_FTRS_740,
638 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
639 .icache_bsize = 32,
640 .dcache_bsize = 32,
641 .num_pmcs = 4,
642 .cpu_setup = __setup_cpu_750,
643 .platform = "ppc750",
644 },
645 { /* 7400 rev 1.1 ? (no TAU) */
646 .pvr_mask = 0xffffffff,
647 .pvr_value = 0x000c1101,
648 .cpu_name = "7400 (1.1)",
649 .cpu_features = CPU_FTRS_7400_NOTAU,
650 .cpu_user_features = COMMON_USER |
651 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
652 .icache_bsize = 32,
653 .dcache_bsize = 32,
654 .num_pmcs = 4,
655 .cpu_setup = __setup_cpu_7400,
656 .platform = "ppc7400",
657 },
658 { /* 7400 */
659 .pvr_mask = 0xffff0000,
660 .pvr_value = 0x000c0000,
661 .cpu_name = "7400",
662 .cpu_features = CPU_FTRS_7400,
663 .cpu_user_features = COMMON_USER |
664 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
665 .icache_bsize = 32,
666 .dcache_bsize = 32,
667 .num_pmcs = 4,
668 .cpu_setup = __setup_cpu_7400,
669 .platform = "ppc7400",
670 },
671 { /* 7410 */
672 .pvr_mask = 0xffff0000,
673 .pvr_value = 0x800c0000,
674 .cpu_name = "7410",
675 .cpu_features = CPU_FTRS_7400,
676 .cpu_user_features = COMMON_USER |
677 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
678 .icache_bsize = 32,
679 .dcache_bsize = 32,
680 .num_pmcs = 4,
681 .cpu_setup = __setup_cpu_7410,
682 .platform = "ppc7400",
683 },
684 { /* 7450 2.0 - no doze/nap */
685 .pvr_mask = 0xffffffff,
686 .pvr_value = 0x80000200,
687 .cpu_name = "7450",
688 .cpu_features = CPU_FTRS_7450_20,
689 .cpu_user_features = COMMON_USER |
690 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
691 .icache_bsize = 32,
692 .dcache_bsize = 32,
693 .num_pmcs = 6,
694 .cpu_setup = __setup_cpu_745x,
695 .oprofile_cpu_type = "ppc/7450",
696 .oprofile_type = PPC_OPROFILE_G4,
697 .platform = "ppc7450",
698 },
699 { /* 7450 2.1 */
700 .pvr_mask = 0xffffffff,
701 .pvr_value = 0x80000201,
702 .cpu_name = "7450",
703 .cpu_features = CPU_FTRS_7450_21,
704 .cpu_user_features = COMMON_USER |
705 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
706 .icache_bsize = 32,
707 .dcache_bsize = 32,
708 .num_pmcs = 6,
709 .cpu_setup = __setup_cpu_745x,
710 .oprofile_cpu_type = "ppc/7450",
711 .oprofile_type = PPC_OPROFILE_G4,
712 .platform = "ppc7450",
713 },
714 { /* 7450 2.3 and newer */
715 .pvr_mask = 0xffff0000,
716 .pvr_value = 0x80000000,
717 .cpu_name = "7450",
718 .cpu_features = CPU_FTRS_7450_23,
719 .cpu_user_features = COMMON_USER |
720 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
721 .icache_bsize = 32,
722 .dcache_bsize = 32,
723 .num_pmcs = 6,
724 .cpu_setup = __setup_cpu_745x,
725 .oprofile_cpu_type = "ppc/7450",
726 .oprofile_type = PPC_OPROFILE_G4,
727 .platform = "ppc7450",
728 },
729 { /* 7455 rev 1.x */
730 .pvr_mask = 0xffffff00,
731 .pvr_value = 0x80010100,
732 .cpu_name = "7455",
733 .cpu_features = CPU_FTRS_7455_1,
734 .cpu_user_features = COMMON_USER |
735 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
736 .icache_bsize = 32,
737 .dcache_bsize = 32,
738 .num_pmcs = 6,
739 .cpu_setup = __setup_cpu_745x,
740 .oprofile_cpu_type = "ppc/7450",
741 .oprofile_type = PPC_OPROFILE_G4,
742 .platform = "ppc7450",
743 },
744 { /* 7455 rev 2.0 */
745 .pvr_mask = 0xffffffff,
746 .pvr_value = 0x80010200,
747 .cpu_name = "7455",
748 .cpu_features = CPU_FTRS_7455_20,
749 .cpu_user_features = COMMON_USER |
750 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
751 .icache_bsize = 32,
752 .dcache_bsize = 32,
753 .num_pmcs = 6,
754 .cpu_setup = __setup_cpu_745x,
755 .oprofile_cpu_type = "ppc/7450",
756 .oprofile_type = PPC_OPROFILE_G4,
757 .platform = "ppc7450",
758 },
759 { /* 7455 others */
760 .pvr_mask = 0xffff0000,
761 .pvr_value = 0x80010000,
762 .cpu_name = "7455",
763 .cpu_features = CPU_FTRS_7455,
764 .cpu_user_features = COMMON_USER |
765 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
766 .icache_bsize = 32,
767 .dcache_bsize = 32,
768 .num_pmcs = 6,
769 .cpu_setup = __setup_cpu_745x,
770 .oprofile_cpu_type = "ppc/7450",
771 .oprofile_type = PPC_OPROFILE_G4,
772 .platform = "ppc7450",
773 },
774 { /* 7447/7457 Rev 1.0 */
775 .pvr_mask = 0xffffffff,
776 .pvr_value = 0x80020100,
777 .cpu_name = "7447/7457",
778 .cpu_features = CPU_FTRS_7447_10,
779 .cpu_user_features = COMMON_USER |
780 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
781 .icache_bsize = 32,
782 .dcache_bsize = 32,
783 .num_pmcs = 6,
784 .cpu_setup = __setup_cpu_745x,
785 .oprofile_cpu_type = "ppc/7450",
786 .oprofile_type = PPC_OPROFILE_G4,
787 .platform = "ppc7450",
788 },
789 { /* 7447/7457 Rev 1.1 */
790 .pvr_mask = 0xffffffff,
791 .pvr_value = 0x80020101,
792 .cpu_name = "7447/7457",
793 .cpu_features = CPU_FTRS_7447_10,
794 .cpu_user_features = COMMON_USER |
795 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
796 .icache_bsize = 32,
797 .dcache_bsize = 32,
798 .num_pmcs = 6,
799 .cpu_setup = __setup_cpu_745x,
800 .oprofile_cpu_type = "ppc/7450",
801 .oprofile_type = PPC_OPROFILE_G4,
802 .platform = "ppc7450",
803 },
804 { /* 7447/7457 Rev 1.2 and later */
805 .pvr_mask = 0xffff0000,
806 .pvr_value = 0x80020000,
807 .cpu_name = "7447/7457",
808 .cpu_features = CPU_FTRS_7447,
809 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
810 .icache_bsize = 32,
811 .dcache_bsize = 32,
812 .num_pmcs = 6,
813 .cpu_setup = __setup_cpu_745x,
814 .oprofile_cpu_type = "ppc/7450",
815 .oprofile_type = PPC_OPROFILE_G4,
816 .platform = "ppc7450",
817 },
818 { /* 7447A */
819 .pvr_mask = 0xffff0000,
820 .pvr_value = 0x80030000,
821 .cpu_name = "7447A",
822 .cpu_features = CPU_FTRS_7447A,
823 .cpu_user_features = COMMON_USER |
824 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
825 .icache_bsize = 32,
826 .dcache_bsize = 32,
827 .num_pmcs = 6,
828 .cpu_setup = __setup_cpu_745x,
829 .oprofile_cpu_type = "ppc/7450",
830 .oprofile_type = PPC_OPROFILE_G4,
831 .platform = "ppc7450",
832 },
833 { /* 7448 */
834 .pvr_mask = 0xffff0000,
835 .pvr_value = 0x80040000,
836 .cpu_name = "7448",
837 .cpu_features = CPU_FTRS_7447A,
838 .cpu_user_features = COMMON_USER |
839 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
840 .icache_bsize = 32,
841 .dcache_bsize = 32,
842 .num_pmcs = 6,
843 .cpu_setup = __setup_cpu_745x,
844 .oprofile_cpu_type = "ppc/7450",
845 .oprofile_type = PPC_OPROFILE_G4,
846 .platform = "ppc7450",
847 },
848 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
849 .pvr_mask = 0x7fff0000,
850 .pvr_value = 0x00810000,
851 .cpu_name = "82xx",
852 .cpu_features = CPU_FTRS_82XX,
853 .cpu_user_features = COMMON_USER,
854 .icache_bsize = 32,
855 .dcache_bsize = 32,
856 .cpu_setup = __setup_cpu_603,
857 .platform = "ppc603",
858 },
859 { /* All G2_LE (603e core, plus some) have the same pvr */
860 .pvr_mask = 0x7fff0000,
861 .pvr_value = 0x00820000,
862 .cpu_name = "G2_LE",
863 .cpu_features = CPU_FTRS_G2_LE,
864 .cpu_user_features = COMMON_USER,
865 .icache_bsize = 32,
866 .dcache_bsize = 32,
867 .cpu_setup = __setup_cpu_603,
868 .platform = "ppc603",
869 },
870 { /* e300c1 (a 603e core, plus some) on 83xx */
871 .pvr_mask = 0x7fff0000,
872 .pvr_value = 0x00830000,
873 .cpu_name = "e300c1",
874 .cpu_features = CPU_FTRS_E300,
875 .cpu_user_features = COMMON_USER,
876 .icache_bsize = 32,
877 .dcache_bsize = 32,
878 .cpu_setup = __setup_cpu_603,
879 .platform = "ppc603",
880 },
881 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
882 .pvr_mask = 0x7fff0000,
883 .pvr_value = 0x00840000,
884 .cpu_name = "e300c2",
885 .cpu_features = CPU_FTRS_E300C2,
886 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
887 .icache_bsize = 32,
888 .dcache_bsize = 32,
889 .cpu_setup = __setup_cpu_603,
890 .platform = "ppc603",
891 },
892 { /* e300c3 on 83xx */
893 .pvr_mask = 0x7fff0000,
894 .pvr_value = 0x00850000,
895 .cpu_name = "e300c3",
896 .cpu_features = CPU_FTRS_E300,
897 .cpu_user_features = COMMON_USER,
898 .icache_bsize = 32,
899 .dcache_bsize = 32,
900 .cpu_setup = __setup_cpu_603,
901 .platform = "ppc603",
902 },
903 { /* default match, we assume split I/D cache & TB (non-601)... */
904 .pvr_mask = 0x00000000,
905 .pvr_value = 0x00000000,
906 .cpu_name = "(generic PPC)",
907 .cpu_features = CPU_FTRS_CLASSIC32,
908 .cpu_user_features = COMMON_USER,
909 .icache_bsize = 32,
910 .dcache_bsize = 32,
911 .platform = "ppc603",
912 },
913 #endif /* CLASSIC_PPC */
914 #ifdef CONFIG_8xx
915 { /* 8xx */
916 .pvr_mask = 0xffff0000,
917 .pvr_value = 0x00500000,
918 .cpu_name = "8xx",
919 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
920 * if the 8xx code is there.... */
921 .cpu_features = CPU_FTRS_8XX,
922 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
923 .icache_bsize = 16,
924 .dcache_bsize = 16,
925 .platform = "ppc823",
926 },
927 #endif /* CONFIG_8xx */
928 #ifdef CONFIG_40x
929 { /* 403GC */
930 .pvr_mask = 0xffffff00,
931 .pvr_value = 0x00200200,
932 .cpu_name = "403GC",
933 .cpu_features = CPU_FTRS_40X,
934 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
935 .icache_bsize = 16,
936 .dcache_bsize = 16,
937 .platform = "ppc403",
938 },
939 { /* 403GCX */
940 .pvr_mask = 0xffffff00,
941 .pvr_value = 0x00201400,
942 .cpu_name = "403GCX",
943 .cpu_features = CPU_FTRS_40X,
944 .cpu_user_features = PPC_FEATURE_32 |
945 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
946 .icache_bsize = 16,
947 .dcache_bsize = 16,
948 .platform = "ppc403",
949 },
950 { /* 403G ?? */
951 .pvr_mask = 0xffff0000,
952 .pvr_value = 0x00200000,
953 .cpu_name = "403G ??",
954 .cpu_features = CPU_FTRS_40X,
955 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
956 .icache_bsize = 16,
957 .dcache_bsize = 16,
958 .platform = "ppc403",
959 },
960 { /* 405GP */
961 .pvr_mask = 0xffff0000,
962 .pvr_value = 0x40110000,
963 .cpu_name = "405GP",
964 .cpu_features = CPU_FTRS_40X,
965 .cpu_user_features = PPC_FEATURE_32 |
966 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
967 .icache_bsize = 32,
968 .dcache_bsize = 32,
969 .platform = "ppc405",
970 },
971 { /* STB 03xxx */
972 .pvr_mask = 0xffff0000,
973 .pvr_value = 0x40130000,
974 .cpu_name = "STB03xxx",
975 .cpu_features = CPU_FTRS_40X,
976 .cpu_user_features = PPC_FEATURE_32 |
977 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
978 .icache_bsize = 32,
979 .dcache_bsize = 32,
980 .platform = "ppc405",
981 },
982 { /* STB 04xxx */
983 .pvr_mask = 0xffff0000,
984 .pvr_value = 0x41810000,
985 .cpu_name = "STB04xxx",
986 .cpu_features = CPU_FTRS_40X,
987 .cpu_user_features = PPC_FEATURE_32 |
988 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
989 .icache_bsize = 32,
990 .dcache_bsize = 32,
991 .platform = "ppc405",
992 },
993 { /* NP405L */
994 .pvr_mask = 0xffff0000,
995 .pvr_value = 0x41610000,
996 .cpu_name = "NP405L",
997 .cpu_features = CPU_FTRS_40X,
998 .cpu_user_features = PPC_FEATURE_32 |
999 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1000 .icache_bsize = 32,
1001 .dcache_bsize = 32,
1002 .platform = "ppc405",
1003 },
1004 { /* NP4GS3 */
1005 .pvr_mask = 0xffff0000,
1006 .pvr_value = 0x40B10000,
1007 .cpu_name = "NP4GS3",
1008 .cpu_features = CPU_FTRS_40X,
1009 .cpu_user_features = PPC_FEATURE_32 |
1010 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1011 .icache_bsize = 32,
1012 .dcache_bsize = 32,
1013 .platform = "ppc405",
1014 },
1015 { /* NP405H */
1016 .pvr_mask = 0xffff0000,
1017 .pvr_value = 0x41410000,
1018 .cpu_name = "NP405H",
1019 .cpu_features = CPU_FTRS_40X,
1020 .cpu_user_features = PPC_FEATURE_32 |
1021 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1022 .icache_bsize = 32,
1023 .dcache_bsize = 32,
1024 .platform = "ppc405",
1025 },
1026 { /* 405GPr */
1027 .pvr_mask = 0xffff0000,
1028 .pvr_value = 0x50910000,
1029 .cpu_name = "405GPr",
1030 .cpu_features = CPU_FTRS_40X,
1031 .cpu_user_features = PPC_FEATURE_32 |
1032 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1033 .icache_bsize = 32,
1034 .dcache_bsize = 32,
1035 .platform = "ppc405",
1036 },
1037 { /* STBx25xx */
1038 .pvr_mask = 0xffff0000,
1039 .pvr_value = 0x51510000,
1040 .cpu_name = "STBx25xx",
1041 .cpu_features = CPU_FTRS_40X,
1042 .cpu_user_features = PPC_FEATURE_32 |
1043 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1044 .icache_bsize = 32,
1045 .dcache_bsize = 32,
1046 .platform = "ppc405",
1047 },
1048 { /* 405LP */
1049 .pvr_mask = 0xffff0000,
1050 .pvr_value = 0x41F10000,
1051 .cpu_name = "405LP",
1052 .cpu_features = CPU_FTRS_40X,
1053 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1054 .icache_bsize = 32,
1055 .dcache_bsize = 32,
1056 .platform = "ppc405",
1057 },
1058 { /* Xilinx Virtex-II Pro */
1059 .pvr_mask = 0xfffff000,
1060 .pvr_value = 0x20010000,
1061 .cpu_name = "Virtex-II Pro",
1062 .cpu_features = CPU_FTRS_40X,
1063 .cpu_user_features = PPC_FEATURE_32 |
1064 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1065 .icache_bsize = 32,
1066 .dcache_bsize = 32,
1067 .platform = "ppc405",
1068 },
1069 { /* Xilinx Virtex-4 FX */
1070 .pvr_mask = 0xfffff000,
1071 .pvr_value = 0x20011000,
1072 .cpu_name = "Virtex-4 FX",
1073 .cpu_features = CPU_FTRS_40X,
1074 .cpu_user_features = PPC_FEATURE_32 |
1075 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1076 .icache_bsize = 32,
1077 .dcache_bsize = 32,
1078 .platform = "ppc405",
1079 },
1080 { /* 405EP */
1081 .pvr_mask = 0xffff0000,
1082 .pvr_value = 0x51210000,
1083 .cpu_name = "405EP",
1084 .cpu_features = CPU_FTRS_40X,
1085 .cpu_user_features = PPC_FEATURE_32 |
1086 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1087 .icache_bsize = 32,
1088 .dcache_bsize = 32,
1089 .platform = "ppc405",
1090 },
1091
1092 #endif /* CONFIG_40x */
1093 #ifdef CONFIG_44x
1094 {
1095 .pvr_mask = 0xf0000fff,
1096 .pvr_value = 0x40000850,
1097 .cpu_name = "440EP Rev. A",
1098 .cpu_features = CPU_FTRS_44X,
1099 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1100 .icache_bsize = 32,
1101 .dcache_bsize = 32,
1102 .platform = "ppc440",
1103 },
1104 {
1105 .pvr_mask = 0xf0000fff,
1106 .pvr_value = 0x400008d3,
1107 .cpu_name = "440EP Rev. B",
1108 .cpu_features = CPU_FTRS_44X,
1109 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1110 .icache_bsize = 32,
1111 .dcache_bsize = 32,
1112 .platform = "ppc440",
1113 },
1114 { /* 440GP Rev. B */
1115 .pvr_mask = 0xf0000fff,
1116 .pvr_value = 0x40000440,
1117 .cpu_name = "440GP Rev. B",
1118 .cpu_features = CPU_FTRS_44X,
1119 .cpu_user_features = COMMON_USER_BOOKE,
1120 .icache_bsize = 32,
1121 .dcache_bsize = 32,
1122 .platform = "ppc440gp",
1123 },
1124 { /* 440GP Rev. C */
1125 .pvr_mask = 0xf0000fff,
1126 .pvr_value = 0x40000481,
1127 .cpu_name = "440GP Rev. C",
1128 .cpu_features = CPU_FTRS_44X,
1129 .cpu_user_features = COMMON_USER_BOOKE,
1130 .icache_bsize = 32,
1131 .dcache_bsize = 32,
1132 .platform = "ppc440gp",
1133 },
1134 { /* 440GX Rev. A */
1135 .pvr_mask = 0xf0000fff,
1136 .pvr_value = 0x50000850,
1137 .cpu_name = "440GX Rev. A",
1138 .cpu_features = CPU_FTRS_44X,
1139 .cpu_user_features = COMMON_USER_BOOKE,
1140 .icache_bsize = 32,
1141 .dcache_bsize = 32,
1142 .platform = "ppc440",
1143 },
1144 { /* 440GX Rev. B */
1145 .pvr_mask = 0xf0000fff,
1146 .pvr_value = 0x50000851,
1147 .cpu_name = "440GX Rev. B",
1148 .cpu_features = CPU_FTRS_44X,
1149 .cpu_user_features = COMMON_USER_BOOKE,
1150 .icache_bsize = 32,
1151 .dcache_bsize = 32,
1152 .platform = "ppc440",
1153 },
1154 { /* 440GX Rev. C */
1155 .pvr_mask = 0xf0000fff,
1156 .pvr_value = 0x50000892,
1157 .cpu_name = "440GX Rev. C",
1158 .cpu_features = CPU_FTRS_44X,
1159 .cpu_user_features = COMMON_USER_BOOKE,
1160 .icache_bsize = 32,
1161 .dcache_bsize = 32,
1162 .platform = "ppc440",
1163 },
1164 { /* 440GX Rev. F */
1165 .pvr_mask = 0xf0000fff,
1166 .pvr_value = 0x50000894,
1167 .cpu_name = "440GX Rev. F",
1168 .cpu_features = CPU_FTRS_44X,
1169 .cpu_user_features = COMMON_USER_BOOKE,
1170 .icache_bsize = 32,
1171 .dcache_bsize = 32,
1172 .platform = "ppc440",
1173 },
1174 { /* 440SP Rev. A */
1175 .pvr_mask = 0xff000fff,
1176 .pvr_value = 0x53000891,
1177 .cpu_name = "440SP Rev. A",
1178 .cpu_features = CPU_FTRS_44X,
1179 .cpu_user_features = COMMON_USER_BOOKE,
1180 .icache_bsize = 32,
1181 .dcache_bsize = 32,
1182 .platform = "ppc440",
1183 },
1184 { /* 440SPe Rev. A */
1185 .pvr_mask = 0xff000fff,
1186 .pvr_value = 0x53000890,
1187 .cpu_name = "440SPe Rev. A",
1188 .cpu_features = CPU_FTRS_44X,
1189 .cpu_user_features = COMMON_USER_BOOKE,
1190 .icache_bsize = 32,
1191 .dcache_bsize = 32,
1192 .platform = "ppc440",
1193 },
1194 #endif /* CONFIG_44x */
1195 #ifdef CONFIG_FSL_BOOKE
1196 { /* e200z5 */
1197 .pvr_mask = 0xfff00000,
1198 .pvr_value = 0x81000000,
1199 .cpu_name = "e200z5",
1200 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1201 .cpu_features = CPU_FTRS_E200,
1202 .cpu_user_features = COMMON_USER_BOOKE |
1203 PPC_FEATURE_HAS_EFP_SINGLE |
1204 PPC_FEATURE_UNIFIED_CACHE,
1205 .dcache_bsize = 32,
1206 .platform = "ppc5554",
1207 },
1208 { /* e200z6 */
1209 .pvr_mask = 0xfff00000,
1210 .pvr_value = 0x81100000,
1211 .cpu_name = "e200z6",
1212 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1213 .cpu_features = CPU_FTRS_E200,
1214 .cpu_user_features = COMMON_USER_BOOKE |
1215 PPC_FEATURE_SPE_COMP |
1216 PPC_FEATURE_HAS_EFP_SINGLE |
1217 PPC_FEATURE_UNIFIED_CACHE,
1218 .dcache_bsize = 32,
1219 .platform = "ppc5554",
1220 },
1221 { /* e500 */
1222 .pvr_mask = 0xffff0000,
1223 .pvr_value = 0x80200000,
1224 .cpu_name = "e500",
1225 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1226 .cpu_features = CPU_FTRS_E500,
1227 .cpu_user_features = COMMON_USER_BOOKE |
1228 PPC_FEATURE_SPE_COMP |
1229 PPC_FEATURE_HAS_EFP_SINGLE,
1230 .icache_bsize = 32,
1231 .dcache_bsize = 32,
1232 .num_pmcs = 4,
1233 .oprofile_cpu_type = "ppc/e500",
1234 .oprofile_type = PPC_OPROFILE_BOOKE,
1235 .platform = "ppc8540",
1236 },
1237 { /* e500v2 */
1238 .pvr_mask = 0xffff0000,
1239 .pvr_value = 0x80210000,
1240 .cpu_name = "e500v2",
1241 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1242 .cpu_features = CPU_FTRS_E500_2,
1243 .cpu_user_features = COMMON_USER_BOOKE |
1244 PPC_FEATURE_SPE_COMP |
1245 PPC_FEATURE_HAS_EFP_SINGLE |
1246 PPC_FEATURE_HAS_EFP_DOUBLE,
1247 .icache_bsize = 32,
1248 .dcache_bsize = 32,
1249 .num_pmcs = 4,
1250 .oprofile_cpu_type = "ppc/e500",
1251 .oprofile_type = PPC_OPROFILE_BOOKE,
1252 .platform = "ppc8548",
1253 },
1254 #endif
1255 #if !CLASSIC_PPC
1256 { /* default match */
1257 .pvr_mask = 0x00000000,
1258 .pvr_value = 0x00000000,
1259 .cpu_name = "(generic PPC)",
1260 .cpu_features = CPU_FTRS_GENERIC_32,
1261 .cpu_user_features = PPC_FEATURE_32,
1262 .icache_bsize = 32,
1263 .dcache_bsize = 32,
1264 .platform = "powerpc",
1265 }
1266 #endif /* !CLASSIC_PPC */
1267 #endif /* CONFIG_PPC32 */
1268 };
1269
1270 struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
1271 {
1272 struct cpu_spec *s = cpu_specs;
1273 struct cpu_spec **cur = &cur_cpu_spec;
1274 int i;
1275
1276 s = PTRRELOC(s);
1277 cur = PTRRELOC(cur);
1278
1279 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1280 if ((pvr & s->pvr_mask) == s->pvr_value) {
1281 *cur = cpu_specs + i;
1282 #ifdef CONFIG_PPC64
1283 /* ppc64 expects identify_cpu to also call setup_cpu
1284 * for that processor. I will consolidate that at a
1285 * later time, for now, just use our friend #ifdef.
1286 * we also don't need to PTRRELOC the function pointer
1287 * on ppc64 as we are running at 0 in real mode.
1288 */
1289 if (s->cpu_setup) {
1290 s->cpu_setup(offset, s);
1291 }
1292 #endif /* CONFIG_PPC64 */
1293 return s;
1294 }
1295 BUG();
1296 return NULL;
1297 }
1298
1299 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
1300 {
1301 struct fixup_entry {
1302 unsigned long mask;
1303 unsigned long value;
1304 long start_off;
1305 long end_off;
1306 } *fcur, *fend;
1307
1308 fcur = fixup_start;
1309 fend = fixup_end;
1310
1311 for (; fcur < fend; fcur++) {
1312 unsigned int *pstart, *pend, *p;
1313
1314 if ((value & fcur->mask) == fcur->value)
1315 continue;
1316
1317 /* These PTRRELOCs will disappear once the new scheme for
1318 * modules and vdso is implemented
1319 */
1320 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
1321 pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
1322
1323 for (p = pstart; p < pend; p++) {
1324 *p = 0x60000000u;
1325 asm volatile ("dcbst 0, %0" : : "r" (p));
1326 }
1327 asm volatile ("sync" : : : "memory");
1328 for (p = pstart; p < pend; p++)
1329 asm volatile ("icbi 0,%0" : : "r" (p));
1330 asm volatile ("sync; isync" : : : "memory");
1331 }
1332 }
Linux kernel - Deliverables
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