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[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23
24 struct cpu_spec* cur_cpu_spec = NULL;
25 EXPORT_SYMBOL(cur_cpu_spec);
26
27 /* The platform string corresponding to the real PVR */
28 const char *powerpc_base_platform;
29
30 /* NOTE:
31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
32 * the responsibility of the appropriate CPU save/restore functions to
33 * eventually copy these settings over. Those save/restore aren't yet
34 * part of the cputable though. That has to be fixed for both ppc32
35 * and ppc64
36 */
37 #ifdef CONFIG_PPC32
38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
51 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
52 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
59 #endif /* CONFIG_PPC32 */
60 #ifdef CONFIG_PPC64
61 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
62 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
63 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
64 extern void __restore_cpu_pa6t(void);
65 extern void __restore_cpu_ppc970(void);
66 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_power7(void);
68 #endif /* CONFIG_PPC64 */
69
70 /* This table only contains "desktop" CPUs, it need to be filled with embedded
71 * ones as well...
72 */
73 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
74 PPC_FEATURE_HAS_MMU)
75 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
76 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
77 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
78 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
79 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
80 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
81 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
82 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
83 PPC_FEATURE_TRUE_LE | \
84 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
85 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
87 PPC_FEATURE_TRUE_LE | \
88 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
89 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
90 PPC_FEATURE_TRUE_LE | \
91 PPC_FEATURE_HAS_ALTIVEC_COMP)
92 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
93 PPC_FEATURE_BOOKE)
94
95 static struct cpu_spec __initdata cpu_specs[] = {
96 #ifdef CONFIG_PPC64
97 { /* Power3 */
98 .pvr_mask = 0xffff0000,
99 .pvr_value = 0x00400000,
100 .cpu_name = "POWER3 (630)",
101 .cpu_features = CPU_FTRS_POWER3,
102 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
103 .mmu_features = MMU_FTR_HPTE_TABLE,
104 .icache_bsize = 128,
105 .dcache_bsize = 128,
106 .num_pmcs = 8,
107 .pmc_type = PPC_PMC_IBM,
108 .oprofile_cpu_type = "ppc64/power3",
109 .oprofile_type = PPC_OPROFILE_RS64,
110 .machine_check = machine_check_generic,
111 .platform = "power3",
112 },
113 { /* Power3+ */
114 .pvr_mask = 0xffff0000,
115 .pvr_value = 0x00410000,
116 .cpu_name = "POWER3 (630+)",
117 .cpu_features = CPU_FTRS_POWER3,
118 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
119 .mmu_features = MMU_FTR_HPTE_TABLE,
120 .icache_bsize = 128,
121 .dcache_bsize = 128,
122 .num_pmcs = 8,
123 .pmc_type = PPC_PMC_IBM,
124 .oprofile_cpu_type = "ppc64/power3",
125 .oprofile_type = PPC_OPROFILE_RS64,
126 .machine_check = machine_check_generic,
127 .platform = "power3",
128 },
129 { /* Northstar */
130 .pvr_mask = 0xffff0000,
131 .pvr_value = 0x00330000,
132 .cpu_name = "RS64-II (northstar)",
133 .cpu_features = CPU_FTRS_RS64,
134 .cpu_user_features = COMMON_USER_PPC64,
135 .mmu_features = MMU_FTR_HPTE_TABLE,
136 .icache_bsize = 128,
137 .dcache_bsize = 128,
138 .num_pmcs = 8,
139 .pmc_type = PPC_PMC_IBM,
140 .oprofile_cpu_type = "ppc64/rs64",
141 .oprofile_type = PPC_OPROFILE_RS64,
142 .machine_check = machine_check_generic,
143 .platform = "rs64",
144 },
145 { /* Pulsar */
146 .pvr_mask = 0xffff0000,
147 .pvr_value = 0x00340000,
148 .cpu_name = "RS64-III (pulsar)",
149 .cpu_features = CPU_FTRS_RS64,
150 .cpu_user_features = COMMON_USER_PPC64,
151 .mmu_features = MMU_FTR_HPTE_TABLE,
152 .icache_bsize = 128,
153 .dcache_bsize = 128,
154 .num_pmcs = 8,
155 .pmc_type = PPC_PMC_IBM,
156 .oprofile_cpu_type = "ppc64/rs64",
157 .oprofile_type = PPC_OPROFILE_RS64,
158 .machine_check = machine_check_generic,
159 .platform = "rs64",
160 },
161 { /* I-star */
162 .pvr_mask = 0xffff0000,
163 .pvr_value = 0x00360000,
164 .cpu_name = "RS64-III (icestar)",
165 .cpu_features = CPU_FTRS_RS64,
166 .cpu_user_features = COMMON_USER_PPC64,
167 .mmu_features = MMU_FTR_HPTE_TABLE,
168 .icache_bsize = 128,
169 .dcache_bsize = 128,
170 .num_pmcs = 8,
171 .pmc_type = PPC_PMC_IBM,
172 .oprofile_cpu_type = "ppc64/rs64",
173 .oprofile_type = PPC_OPROFILE_RS64,
174 .machine_check = machine_check_generic,
175 .platform = "rs64",
176 },
177 { /* S-star */
178 .pvr_mask = 0xffff0000,
179 .pvr_value = 0x00370000,
180 .cpu_name = "RS64-IV (sstar)",
181 .cpu_features = CPU_FTRS_RS64,
182 .cpu_user_features = COMMON_USER_PPC64,
183 .mmu_features = MMU_FTR_HPTE_TABLE,
184 .icache_bsize = 128,
185 .dcache_bsize = 128,
186 .num_pmcs = 8,
187 .pmc_type = PPC_PMC_IBM,
188 .oprofile_cpu_type = "ppc64/rs64",
189 .oprofile_type = PPC_OPROFILE_RS64,
190 .machine_check = machine_check_generic,
191 .platform = "rs64",
192 },
193 { /* Power4 */
194 .pvr_mask = 0xffff0000,
195 .pvr_value = 0x00350000,
196 .cpu_name = "POWER4 (gp)",
197 .cpu_features = CPU_FTRS_POWER4,
198 .cpu_user_features = COMMON_USER_POWER4,
199 .mmu_features = MMU_FTR_HPTE_TABLE,
200 .icache_bsize = 128,
201 .dcache_bsize = 128,
202 .num_pmcs = 8,
203 .pmc_type = PPC_PMC_IBM,
204 .oprofile_cpu_type = "ppc64/power4",
205 .oprofile_type = PPC_OPROFILE_POWER4,
206 .machine_check = machine_check_generic,
207 .platform = "power4",
208 },
209 { /* Power4+ */
210 .pvr_mask = 0xffff0000,
211 .pvr_value = 0x00380000,
212 .cpu_name = "POWER4+ (gq)",
213 .cpu_features = CPU_FTRS_POWER4,
214 .cpu_user_features = COMMON_USER_POWER4,
215 .mmu_features = MMU_FTR_HPTE_TABLE,
216 .icache_bsize = 128,
217 .dcache_bsize = 128,
218 .num_pmcs = 8,
219 .pmc_type = PPC_PMC_IBM,
220 .oprofile_cpu_type = "ppc64/power4",
221 .oprofile_type = PPC_OPROFILE_POWER4,
222 .machine_check = machine_check_generic,
223 .platform = "power4",
224 },
225 { /* PPC970 */
226 .pvr_mask = 0xffff0000,
227 .pvr_value = 0x00390000,
228 .cpu_name = "PPC970",
229 .cpu_features = CPU_FTRS_PPC970,
230 .cpu_user_features = COMMON_USER_POWER4 |
231 PPC_FEATURE_HAS_ALTIVEC_COMP,
232 .mmu_features = MMU_FTR_HPTE_TABLE,
233 .icache_bsize = 128,
234 .dcache_bsize = 128,
235 .num_pmcs = 8,
236 .pmc_type = PPC_PMC_IBM,
237 .cpu_setup = __setup_cpu_ppc970,
238 .cpu_restore = __restore_cpu_ppc970,
239 .oprofile_cpu_type = "ppc64/970",
240 .oprofile_type = PPC_OPROFILE_POWER4,
241 .machine_check = machine_check_generic,
242 .platform = "ppc970",
243 },
244 { /* PPC970FX */
245 .pvr_mask = 0xffff0000,
246 .pvr_value = 0x003c0000,
247 .cpu_name = "PPC970FX",
248 .cpu_features = CPU_FTRS_PPC970,
249 .cpu_user_features = COMMON_USER_POWER4 |
250 PPC_FEATURE_HAS_ALTIVEC_COMP,
251 .mmu_features = MMU_FTR_HPTE_TABLE,
252 .icache_bsize = 128,
253 .dcache_bsize = 128,
254 .num_pmcs = 8,
255 .pmc_type = PPC_PMC_IBM,
256 .cpu_setup = __setup_cpu_ppc970,
257 .cpu_restore = __restore_cpu_ppc970,
258 .oprofile_cpu_type = "ppc64/970",
259 .oprofile_type = PPC_OPROFILE_POWER4,
260 .machine_check = machine_check_generic,
261 .platform = "ppc970",
262 },
263 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
264 .pvr_mask = 0xffffffff,
265 .pvr_value = 0x00440100,
266 .cpu_name = "PPC970MP",
267 .cpu_features = CPU_FTRS_PPC970,
268 .cpu_user_features = COMMON_USER_POWER4 |
269 PPC_FEATURE_HAS_ALTIVEC_COMP,
270 .mmu_features = MMU_FTR_HPTE_TABLE,
271 .icache_bsize = 128,
272 .dcache_bsize = 128,
273 .num_pmcs = 8,
274 .pmc_type = PPC_PMC_IBM,
275 .cpu_setup = __setup_cpu_ppc970,
276 .cpu_restore = __restore_cpu_ppc970,
277 .oprofile_cpu_type = "ppc64/970MP",
278 .oprofile_type = PPC_OPROFILE_POWER4,
279 .machine_check = machine_check_generic,
280 .platform = "ppc970",
281 },
282 { /* PPC970MP */
283 .pvr_mask = 0xffff0000,
284 .pvr_value = 0x00440000,
285 .cpu_name = "PPC970MP",
286 .cpu_features = CPU_FTRS_PPC970,
287 .cpu_user_features = COMMON_USER_POWER4 |
288 PPC_FEATURE_HAS_ALTIVEC_COMP,
289 .mmu_features = MMU_FTR_HPTE_TABLE,
290 .icache_bsize = 128,
291 .dcache_bsize = 128,
292 .num_pmcs = 8,
293 .pmc_type = PPC_PMC_IBM,
294 .cpu_setup = __setup_cpu_ppc970MP,
295 .cpu_restore = __restore_cpu_ppc970,
296 .oprofile_cpu_type = "ppc64/970MP",
297 .oprofile_type = PPC_OPROFILE_POWER4,
298 .machine_check = machine_check_generic,
299 .platform = "ppc970",
300 },
301 { /* PPC970GX */
302 .pvr_mask = 0xffff0000,
303 .pvr_value = 0x00450000,
304 .cpu_name = "PPC970GX",
305 .cpu_features = CPU_FTRS_PPC970,
306 .cpu_user_features = COMMON_USER_POWER4 |
307 PPC_FEATURE_HAS_ALTIVEC_COMP,
308 .mmu_features = MMU_FTR_HPTE_TABLE,
309 .icache_bsize = 128,
310 .dcache_bsize = 128,
311 .num_pmcs = 8,
312 .pmc_type = PPC_PMC_IBM,
313 .cpu_setup = __setup_cpu_ppc970,
314 .oprofile_cpu_type = "ppc64/970",
315 .oprofile_type = PPC_OPROFILE_POWER4,
316 .machine_check = machine_check_generic,
317 .platform = "ppc970",
318 },
319 { /* Power5 GR */
320 .pvr_mask = 0xffff0000,
321 .pvr_value = 0x003a0000,
322 .cpu_name = "POWER5 (gr)",
323 .cpu_features = CPU_FTRS_POWER5,
324 .cpu_user_features = COMMON_USER_POWER5,
325 .mmu_features = MMU_FTR_HPTE_TABLE,
326 .icache_bsize = 128,
327 .dcache_bsize = 128,
328 .num_pmcs = 6,
329 .pmc_type = PPC_PMC_IBM,
330 .oprofile_cpu_type = "ppc64/power5",
331 .oprofile_type = PPC_OPROFILE_POWER4,
332 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
333 * and above but only works on POWER5 and above
334 */
335 .oprofile_mmcra_sihv = MMCRA_SIHV,
336 .oprofile_mmcra_sipr = MMCRA_SIPR,
337 .machine_check = machine_check_generic,
338 .platform = "power5",
339 },
340 { /* Power5++ */
341 .pvr_mask = 0xffffff00,
342 .pvr_value = 0x003b0300,
343 .cpu_name = "POWER5+ (gs)",
344 .cpu_features = CPU_FTRS_POWER5,
345 .cpu_user_features = COMMON_USER_POWER5_PLUS,
346 .mmu_features = MMU_FTR_HPTE_TABLE,
347 .icache_bsize = 128,
348 .dcache_bsize = 128,
349 .num_pmcs = 6,
350 .oprofile_cpu_type = "ppc64/power5++",
351 .oprofile_type = PPC_OPROFILE_POWER4,
352 .oprofile_mmcra_sihv = MMCRA_SIHV,
353 .oprofile_mmcra_sipr = MMCRA_SIPR,
354 .machine_check = machine_check_generic,
355 .platform = "power5+",
356 },
357 { /* Power5 GS */
358 .pvr_mask = 0xffff0000,
359 .pvr_value = 0x003b0000,
360 .cpu_name = "POWER5+ (gs)",
361 .cpu_features = CPU_FTRS_POWER5,
362 .cpu_user_features = COMMON_USER_POWER5_PLUS,
363 .mmu_features = MMU_FTR_HPTE_TABLE,
364 .icache_bsize = 128,
365 .dcache_bsize = 128,
366 .num_pmcs = 6,
367 .pmc_type = PPC_PMC_IBM,
368 .oprofile_cpu_type = "ppc64/power5+",
369 .oprofile_type = PPC_OPROFILE_POWER4,
370 .oprofile_mmcra_sihv = MMCRA_SIHV,
371 .oprofile_mmcra_sipr = MMCRA_SIPR,
372 .machine_check = machine_check_generic,
373 .platform = "power5+",
374 },
375 { /* POWER6 in P5+ mode; 2.04-compliant processor */
376 .pvr_mask = 0xffffffff,
377 .pvr_value = 0x0f000001,
378 .cpu_name = "POWER5+",
379 .cpu_features = CPU_FTRS_POWER5,
380 .cpu_user_features = COMMON_USER_POWER5_PLUS,
381 .mmu_features = MMU_FTR_HPTE_TABLE,
382 .icache_bsize = 128,
383 .dcache_bsize = 128,
384 .machine_check = machine_check_generic,
385 .oprofile_cpu_type = "ppc64/compat-power5+",
386 .platform = "power5+",
387 },
388 { /* Power6 */
389 .pvr_mask = 0xffff0000,
390 .pvr_value = 0x003e0000,
391 .cpu_name = "POWER6 (raw)",
392 .cpu_features = CPU_FTRS_POWER6,
393 .cpu_user_features = COMMON_USER_POWER6 |
394 PPC_FEATURE_POWER6_EXT,
395 .mmu_features = MMU_FTR_HPTE_TABLE,
396 .icache_bsize = 128,
397 .dcache_bsize = 128,
398 .num_pmcs = 6,
399 .pmc_type = PPC_PMC_IBM,
400 .oprofile_cpu_type = "ppc64/power6",
401 .oprofile_type = PPC_OPROFILE_POWER4,
402 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
403 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
404 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
405 POWER6_MMCRA_OTHER,
406 .machine_check = machine_check_generic,
407 .platform = "power6x",
408 },
409 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
410 .pvr_mask = 0xffffffff,
411 .pvr_value = 0x0f000002,
412 .cpu_name = "POWER6 (architected)",
413 .cpu_features = CPU_FTRS_POWER6,
414 .cpu_user_features = COMMON_USER_POWER6,
415 .mmu_features = MMU_FTR_HPTE_TABLE,
416 .icache_bsize = 128,
417 .dcache_bsize = 128,
418 .machine_check = machine_check_generic,
419 .oprofile_cpu_type = "ppc64/compat-power6",
420 .platform = "power6",
421 },
422 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
423 .pvr_mask = 0xffffffff,
424 .pvr_value = 0x0f000003,
425 .cpu_name = "POWER7 (architected)",
426 .cpu_features = CPU_FTRS_POWER7,
427 .cpu_user_features = COMMON_USER_POWER7,
428 .mmu_features = MMU_FTR_HPTE_TABLE,
429 .icache_bsize = 128,
430 .dcache_bsize = 128,
431 .machine_check = machine_check_generic,
432 .oprofile_cpu_type = "ppc64/compat-power7",
433 .platform = "power7",
434 },
435 { /* Power7 */
436 .pvr_mask = 0xffff0000,
437 .pvr_value = 0x003f0000,
438 .cpu_name = "POWER7 (raw)",
439 .cpu_features = CPU_FTRS_POWER7,
440 .cpu_user_features = COMMON_USER_POWER7,
441 .mmu_features = MMU_FTR_HPTE_TABLE,
442 .icache_bsize = 128,
443 .dcache_bsize = 128,
444 .num_pmcs = 6,
445 .pmc_type = PPC_PMC_IBM,
446 .cpu_setup = __setup_cpu_power7,
447 .cpu_restore = __restore_cpu_power7,
448 .oprofile_cpu_type = "ppc64/power7",
449 .oprofile_type = PPC_OPROFILE_POWER4,
450 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
451 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
452 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
453 POWER6_MMCRA_OTHER,
454 .platform = "power7",
455 },
456 { /* Cell Broadband Engine */
457 .pvr_mask = 0xffff0000,
458 .pvr_value = 0x00700000,
459 .cpu_name = "Cell Broadband Engine",
460 .cpu_features = CPU_FTRS_CELL,
461 .cpu_user_features = COMMON_USER_PPC64 |
462 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
463 PPC_FEATURE_SMT,
464 .mmu_features = MMU_FTR_HPTE_TABLE,
465 .icache_bsize = 128,
466 .dcache_bsize = 128,
467 .num_pmcs = 4,
468 .pmc_type = PPC_PMC_IBM,
469 .oprofile_cpu_type = "ppc64/cell-be",
470 .oprofile_type = PPC_OPROFILE_CELL,
471 .machine_check = machine_check_generic,
472 .platform = "ppc-cell-be",
473 },
474 { /* PA Semi PA6T */
475 .pvr_mask = 0x7fff0000,
476 .pvr_value = 0x00900000,
477 .cpu_name = "PA6T",
478 .cpu_features = CPU_FTRS_PA6T,
479 .cpu_user_features = COMMON_USER_PA6T,
480 .mmu_features = MMU_FTR_HPTE_TABLE,
481 .icache_bsize = 64,
482 .dcache_bsize = 64,
483 .num_pmcs = 6,
484 .pmc_type = PPC_PMC_PA6T,
485 .cpu_setup = __setup_cpu_pa6t,
486 .cpu_restore = __restore_cpu_pa6t,
487 .oprofile_cpu_type = "ppc64/pa6t",
488 .oprofile_type = PPC_OPROFILE_PA6T,
489 .machine_check = machine_check_generic,
490 .platform = "pa6t",
491 },
492 { /* default match */
493 .pvr_mask = 0x00000000,
494 .pvr_value = 0x00000000,
495 .cpu_name = "POWER4 (compatible)",
496 .cpu_features = CPU_FTRS_COMPATIBLE,
497 .cpu_user_features = COMMON_USER_PPC64,
498 .mmu_features = MMU_FTR_HPTE_TABLE,
499 .icache_bsize = 128,
500 .dcache_bsize = 128,
501 .num_pmcs = 6,
502 .pmc_type = PPC_PMC_IBM,
503 .machine_check = machine_check_generic,
504 .platform = "power4",
505 }
506 #endif /* CONFIG_PPC64 */
507 #ifdef CONFIG_PPC32
508 #if CLASSIC_PPC
509 { /* 601 */
510 .pvr_mask = 0xffff0000,
511 .pvr_value = 0x00010000,
512 .cpu_name = "601",
513 .cpu_features = CPU_FTRS_PPC601,
514 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
515 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
516 .mmu_features = MMU_FTR_HPTE_TABLE,
517 .icache_bsize = 32,
518 .dcache_bsize = 32,
519 .machine_check = machine_check_generic,
520 .platform = "ppc601",
521 },
522 { /* 603 */
523 .pvr_mask = 0xffff0000,
524 .pvr_value = 0x00030000,
525 .cpu_name = "603",
526 .cpu_features = CPU_FTRS_603,
527 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
528 .mmu_features = 0,
529 .icache_bsize = 32,
530 .dcache_bsize = 32,
531 .cpu_setup = __setup_cpu_603,
532 .machine_check = machine_check_generic,
533 .platform = "ppc603",
534 },
535 { /* 603e */
536 .pvr_mask = 0xffff0000,
537 .pvr_value = 0x00060000,
538 .cpu_name = "603e",
539 .cpu_features = CPU_FTRS_603,
540 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
541 .mmu_features = 0,
542 .icache_bsize = 32,
543 .dcache_bsize = 32,
544 .cpu_setup = __setup_cpu_603,
545 .machine_check = machine_check_generic,
546 .platform = "ppc603",
547 },
548 { /* 603ev */
549 .pvr_mask = 0xffff0000,
550 .pvr_value = 0x00070000,
551 .cpu_name = "603ev",
552 .cpu_features = CPU_FTRS_603,
553 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
554 .mmu_features = 0,
555 .icache_bsize = 32,
556 .dcache_bsize = 32,
557 .cpu_setup = __setup_cpu_603,
558 .machine_check = machine_check_generic,
559 .platform = "ppc603",
560 },
561 { /* 604 */
562 .pvr_mask = 0xffff0000,
563 .pvr_value = 0x00040000,
564 .cpu_name = "604",
565 .cpu_features = CPU_FTRS_604,
566 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
567 .mmu_features = MMU_FTR_HPTE_TABLE,
568 .icache_bsize = 32,
569 .dcache_bsize = 32,
570 .num_pmcs = 2,
571 .cpu_setup = __setup_cpu_604,
572 .machine_check = machine_check_generic,
573 .platform = "ppc604",
574 },
575 { /* 604e */
576 .pvr_mask = 0xfffff000,
577 .pvr_value = 0x00090000,
578 .cpu_name = "604e",
579 .cpu_features = CPU_FTRS_604,
580 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
581 .mmu_features = MMU_FTR_HPTE_TABLE,
582 .icache_bsize = 32,
583 .dcache_bsize = 32,
584 .num_pmcs = 4,
585 .cpu_setup = __setup_cpu_604,
586 .machine_check = machine_check_generic,
587 .platform = "ppc604",
588 },
589 { /* 604r */
590 .pvr_mask = 0xffff0000,
591 .pvr_value = 0x00090000,
592 .cpu_name = "604r",
593 .cpu_features = CPU_FTRS_604,
594 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
595 .mmu_features = MMU_FTR_HPTE_TABLE,
596 .icache_bsize = 32,
597 .dcache_bsize = 32,
598 .num_pmcs = 4,
599 .cpu_setup = __setup_cpu_604,
600 .machine_check = machine_check_generic,
601 .platform = "ppc604",
602 },
603 { /* 604ev */
604 .pvr_mask = 0xffff0000,
605 .pvr_value = 0x000a0000,
606 .cpu_name = "604ev",
607 .cpu_features = CPU_FTRS_604,
608 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
609 .mmu_features = MMU_FTR_HPTE_TABLE,
610 .icache_bsize = 32,
611 .dcache_bsize = 32,
612 .num_pmcs = 4,
613 .cpu_setup = __setup_cpu_604,
614 .machine_check = machine_check_generic,
615 .platform = "ppc604",
616 },
617 { /* 740/750 (0x4202, don't support TAU ?) */
618 .pvr_mask = 0xffffffff,
619 .pvr_value = 0x00084202,
620 .cpu_name = "740/750",
621 .cpu_features = CPU_FTRS_740_NOTAU,
622 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
623 .mmu_features = MMU_FTR_HPTE_TABLE,
624 .icache_bsize = 32,
625 .dcache_bsize = 32,
626 .num_pmcs = 4,
627 .cpu_setup = __setup_cpu_750,
628 .machine_check = machine_check_generic,
629 .platform = "ppc750",
630 },
631 { /* 750CX (80100 and 8010x?) */
632 .pvr_mask = 0xfffffff0,
633 .pvr_value = 0x00080100,
634 .cpu_name = "750CX",
635 .cpu_features = CPU_FTRS_750,
636 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
637 .mmu_features = MMU_FTR_HPTE_TABLE,
638 .icache_bsize = 32,
639 .dcache_bsize = 32,
640 .num_pmcs = 4,
641 .cpu_setup = __setup_cpu_750cx,
642 .machine_check = machine_check_generic,
643 .platform = "ppc750",
644 },
645 { /* 750CX (82201 and 82202) */
646 .pvr_mask = 0xfffffff0,
647 .pvr_value = 0x00082200,
648 .cpu_name = "750CX",
649 .cpu_features = CPU_FTRS_750,
650 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
651 .mmu_features = MMU_FTR_HPTE_TABLE,
652 .icache_bsize = 32,
653 .dcache_bsize = 32,
654 .num_pmcs = 4,
655 .pmc_type = PPC_PMC_IBM,
656 .cpu_setup = __setup_cpu_750cx,
657 .machine_check = machine_check_generic,
658 .platform = "ppc750",
659 },
660 { /* 750CXe (82214) */
661 .pvr_mask = 0xfffffff0,
662 .pvr_value = 0x00082210,
663 .cpu_name = "750CXe",
664 .cpu_features = CPU_FTRS_750,
665 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
666 .mmu_features = MMU_FTR_HPTE_TABLE,
667 .icache_bsize = 32,
668 .dcache_bsize = 32,
669 .num_pmcs = 4,
670 .pmc_type = PPC_PMC_IBM,
671 .cpu_setup = __setup_cpu_750cx,
672 .machine_check = machine_check_generic,
673 .platform = "ppc750",
674 },
675 { /* 750CXe "Gekko" (83214) */
676 .pvr_mask = 0xffffffff,
677 .pvr_value = 0x00083214,
678 .cpu_name = "750CXe",
679 .cpu_features = CPU_FTRS_750,
680 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
681 .mmu_features = MMU_FTR_HPTE_TABLE,
682 .icache_bsize = 32,
683 .dcache_bsize = 32,
684 .num_pmcs = 4,
685 .pmc_type = PPC_PMC_IBM,
686 .cpu_setup = __setup_cpu_750cx,
687 .machine_check = machine_check_generic,
688 .platform = "ppc750",
689 },
690 { /* 750CL */
691 .pvr_mask = 0xfffff0f0,
692 .pvr_value = 0x00087010,
693 .cpu_name = "750CL",
694 .cpu_features = CPU_FTRS_750CL,
695 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
696 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
697 .icache_bsize = 32,
698 .dcache_bsize = 32,
699 .num_pmcs = 4,
700 .pmc_type = PPC_PMC_IBM,
701 .cpu_setup = __setup_cpu_750,
702 .machine_check = machine_check_generic,
703 .platform = "ppc750",
704 },
705 { /* 745/755 */
706 .pvr_mask = 0xfffff000,
707 .pvr_value = 0x00083000,
708 .cpu_name = "745/755",
709 .cpu_features = CPU_FTRS_750,
710 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
711 .mmu_features = MMU_FTR_HPTE_TABLE,
712 .icache_bsize = 32,
713 .dcache_bsize = 32,
714 .num_pmcs = 4,
715 .pmc_type = PPC_PMC_IBM,
716 .cpu_setup = __setup_cpu_750,
717 .machine_check = machine_check_generic,
718 .platform = "ppc750",
719 },
720 { /* 750FX rev 1.x */
721 .pvr_mask = 0xffffff00,
722 .pvr_value = 0x70000100,
723 .cpu_name = "750FX",
724 .cpu_features = CPU_FTRS_750FX1,
725 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
726 .mmu_features = MMU_FTR_HPTE_TABLE,
727 .icache_bsize = 32,
728 .dcache_bsize = 32,
729 .num_pmcs = 4,
730 .pmc_type = PPC_PMC_IBM,
731 .cpu_setup = __setup_cpu_750,
732 .machine_check = machine_check_generic,
733 .platform = "ppc750",
734 },
735 { /* 750FX rev 2.0 must disable HID0[DPM] */
736 .pvr_mask = 0xffffffff,
737 .pvr_value = 0x70000200,
738 .cpu_name = "750FX",
739 .cpu_features = CPU_FTRS_750FX2,
740 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
741 .mmu_features = MMU_FTR_HPTE_TABLE,
742 .icache_bsize = 32,
743 .dcache_bsize = 32,
744 .num_pmcs = 4,
745 .pmc_type = PPC_PMC_IBM,
746 .cpu_setup = __setup_cpu_750,
747 .machine_check = machine_check_generic,
748 .platform = "ppc750",
749 },
750 { /* 750FX (All revs except 2.0) */
751 .pvr_mask = 0xffff0000,
752 .pvr_value = 0x70000000,
753 .cpu_name = "750FX",
754 .cpu_features = CPU_FTRS_750FX,
755 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
756 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
757 .icache_bsize = 32,
758 .dcache_bsize = 32,
759 .num_pmcs = 4,
760 .pmc_type = PPC_PMC_IBM,
761 .cpu_setup = __setup_cpu_750fx,
762 .machine_check = machine_check_generic,
763 .platform = "ppc750",
764 },
765 { /* 750GX */
766 .pvr_mask = 0xffff0000,
767 .pvr_value = 0x70020000,
768 .cpu_name = "750GX",
769 .cpu_features = CPU_FTRS_750GX,
770 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
771 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
772 .icache_bsize = 32,
773 .dcache_bsize = 32,
774 .num_pmcs = 4,
775 .pmc_type = PPC_PMC_IBM,
776 .cpu_setup = __setup_cpu_750fx,
777 .machine_check = machine_check_generic,
778 .platform = "ppc750",
779 },
780 { /* 740/750 (L2CR bit need fixup for 740) */
781 .pvr_mask = 0xffff0000,
782 .pvr_value = 0x00080000,
783 .cpu_name = "740/750",
784 .cpu_features = CPU_FTRS_740,
785 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
786 .mmu_features = MMU_FTR_HPTE_TABLE,
787 .icache_bsize = 32,
788 .dcache_bsize = 32,
789 .num_pmcs = 4,
790 .pmc_type = PPC_PMC_IBM,
791 .cpu_setup = __setup_cpu_750,
792 .machine_check = machine_check_generic,
793 .platform = "ppc750",
794 },
795 { /* 7400 rev 1.1 ? (no TAU) */
796 .pvr_mask = 0xffffffff,
797 .pvr_value = 0x000c1101,
798 .cpu_name = "7400 (1.1)",
799 .cpu_features = CPU_FTRS_7400_NOTAU,
800 .cpu_user_features = COMMON_USER |
801 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
802 .mmu_features = MMU_FTR_HPTE_TABLE,
803 .icache_bsize = 32,
804 .dcache_bsize = 32,
805 .num_pmcs = 4,
806 .pmc_type = PPC_PMC_G4,
807 .cpu_setup = __setup_cpu_7400,
808 .machine_check = machine_check_generic,
809 .platform = "ppc7400",
810 },
811 { /* 7400 */
812 .pvr_mask = 0xffff0000,
813 .pvr_value = 0x000c0000,
814 .cpu_name = "7400",
815 .cpu_features = CPU_FTRS_7400,
816 .cpu_user_features = COMMON_USER |
817 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
818 .mmu_features = MMU_FTR_HPTE_TABLE,
819 .icache_bsize = 32,
820 .dcache_bsize = 32,
821 .num_pmcs = 4,
822 .pmc_type = PPC_PMC_G4,
823 .cpu_setup = __setup_cpu_7400,
824 .machine_check = machine_check_generic,
825 .platform = "ppc7400",
826 },
827 { /* 7410 */
828 .pvr_mask = 0xffff0000,
829 .pvr_value = 0x800c0000,
830 .cpu_name = "7410",
831 .cpu_features = CPU_FTRS_7400,
832 .cpu_user_features = COMMON_USER |
833 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
834 .mmu_features = MMU_FTR_HPTE_TABLE,
835 .icache_bsize = 32,
836 .dcache_bsize = 32,
837 .num_pmcs = 4,
838 .pmc_type = PPC_PMC_G4,
839 .cpu_setup = __setup_cpu_7410,
840 .machine_check = machine_check_generic,
841 .platform = "ppc7400",
842 },
843 { /* 7450 2.0 - no doze/nap */
844 .pvr_mask = 0xffffffff,
845 .pvr_value = 0x80000200,
846 .cpu_name = "7450",
847 .cpu_features = CPU_FTRS_7450_20,
848 .cpu_user_features = COMMON_USER |
849 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
850 .mmu_features = MMU_FTR_HPTE_TABLE,
851 .icache_bsize = 32,
852 .dcache_bsize = 32,
853 .num_pmcs = 6,
854 .pmc_type = PPC_PMC_G4,
855 .cpu_setup = __setup_cpu_745x,
856 .oprofile_cpu_type = "ppc/7450",
857 .oprofile_type = PPC_OPROFILE_G4,
858 .machine_check = machine_check_generic,
859 .platform = "ppc7450",
860 },
861 { /* 7450 2.1 */
862 .pvr_mask = 0xffffffff,
863 .pvr_value = 0x80000201,
864 .cpu_name = "7450",
865 .cpu_features = CPU_FTRS_7450_21,
866 .cpu_user_features = COMMON_USER |
867 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
868 .mmu_features = MMU_FTR_HPTE_TABLE,
869 .icache_bsize = 32,
870 .dcache_bsize = 32,
871 .num_pmcs = 6,
872 .pmc_type = PPC_PMC_G4,
873 .cpu_setup = __setup_cpu_745x,
874 .oprofile_cpu_type = "ppc/7450",
875 .oprofile_type = PPC_OPROFILE_G4,
876 .machine_check = machine_check_generic,
877 .platform = "ppc7450",
878 },
879 { /* 7450 2.3 and newer */
880 .pvr_mask = 0xffff0000,
881 .pvr_value = 0x80000000,
882 .cpu_name = "7450",
883 .cpu_features = CPU_FTRS_7450_23,
884 .cpu_user_features = COMMON_USER |
885 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
886 .mmu_features = MMU_FTR_HPTE_TABLE,
887 .icache_bsize = 32,
888 .dcache_bsize = 32,
889 .num_pmcs = 6,
890 .pmc_type = PPC_PMC_G4,
891 .cpu_setup = __setup_cpu_745x,
892 .oprofile_cpu_type = "ppc/7450",
893 .oprofile_type = PPC_OPROFILE_G4,
894 .machine_check = machine_check_generic,
895 .platform = "ppc7450",
896 },
897 { /* 7455 rev 1.x */
898 .pvr_mask = 0xffffff00,
899 .pvr_value = 0x80010100,
900 .cpu_name = "7455",
901 .cpu_features = CPU_FTRS_7455_1,
902 .cpu_user_features = COMMON_USER |
903 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
904 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
905 .icache_bsize = 32,
906 .dcache_bsize = 32,
907 .num_pmcs = 6,
908 .pmc_type = PPC_PMC_G4,
909 .cpu_setup = __setup_cpu_745x,
910 .oprofile_cpu_type = "ppc/7450",
911 .oprofile_type = PPC_OPROFILE_G4,
912 .machine_check = machine_check_generic,
913 .platform = "ppc7450",
914 },
915 { /* 7455 rev 2.0 */
916 .pvr_mask = 0xffffffff,
917 .pvr_value = 0x80010200,
918 .cpu_name = "7455",
919 .cpu_features = CPU_FTRS_7455_20,
920 .cpu_user_features = COMMON_USER |
921 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
922 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
923 .icache_bsize = 32,
924 .dcache_bsize = 32,
925 .num_pmcs = 6,
926 .pmc_type = PPC_PMC_G4,
927 .cpu_setup = __setup_cpu_745x,
928 .oprofile_cpu_type = "ppc/7450",
929 .oprofile_type = PPC_OPROFILE_G4,
930 .machine_check = machine_check_generic,
931 .platform = "ppc7450",
932 },
933 { /* 7455 others */
934 .pvr_mask = 0xffff0000,
935 .pvr_value = 0x80010000,
936 .cpu_name = "7455",
937 .cpu_features = CPU_FTRS_7455,
938 .cpu_user_features = COMMON_USER |
939 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
940 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
941 .icache_bsize = 32,
942 .dcache_bsize = 32,
943 .num_pmcs = 6,
944 .pmc_type = PPC_PMC_G4,
945 .cpu_setup = __setup_cpu_745x,
946 .oprofile_cpu_type = "ppc/7450",
947 .oprofile_type = PPC_OPROFILE_G4,
948 .machine_check = machine_check_generic,
949 .platform = "ppc7450",
950 },
951 { /* 7447/7457 Rev 1.0 */
952 .pvr_mask = 0xffffffff,
953 .pvr_value = 0x80020100,
954 .cpu_name = "7447/7457",
955 .cpu_features = CPU_FTRS_7447_10,
956 .cpu_user_features = COMMON_USER |
957 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
958 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
959 .icache_bsize = 32,
960 .dcache_bsize = 32,
961 .num_pmcs = 6,
962 .pmc_type = PPC_PMC_G4,
963 .cpu_setup = __setup_cpu_745x,
964 .oprofile_cpu_type = "ppc/7450",
965 .oprofile_type = PPC_OPROFILE_G4,
966 .machine_check = machine_check_generic,
967 .platform = "ppc7450",
968 },
969 { /* 7447/7457 Rev 1.1 */
970 .pvr_mask = 0xffffffff,
971 .pvr_value = 0x80020101,
972 .cpu_name = "7447/7457",
973 .cpu_features = CPU_FTRS_7447_10,
974 .cpu_user_features = COMMON_USER |
975 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
976 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
977 .icache_bsize = 32,
978 .dcache_bsize = 32,
979 .num_pmcs = 6,
980 .pmc_type = PPC_PMC_G4,
981 .cpu_setup = __setup_cpu_745x,
982 .oprofile_cpu_type = "ppc/7450",
983 .oprofile_type = PPC_OPROFILE_G4,
984 .machine_check = machine_check_generic,
985 .platform = "ppc7450",
986 },
987 { /* 7447/7457 Rev 1.2 and later */
988 .pvr_mask = 0xffff0000,
989 .pvr_value = 0x80020000,
990 .cpu_name = "7447/7457",
991 .cpu_features = CPU_FTRS_7447,
992 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
993 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
994 .icache_bsize = 32,
995 .dcache_bsize = 32,
996 .num_pmcs = 6,
997 .pmc_type = PPC_PMC_G4,
998 .cpu_setup = __setup_cpu_745x,
999 .oprofile_cpu_type = "ppc/7450",
1000 .oprofile_type = PPC_OPROFILE_G4,
1001 .machine_check = machine_check_generic,
1002 .platform = "ppc7450",
1003 },
1004 { /* 7447A */
1005 .pvr_mask = 0xffff0000,
1006 .pvr_value = 0x80030000,
1007 .cpu_name = "7447A",
1008 .cpu_features = CPU_FTRS_7447A,
1009 .cpu_user_features = COMMON_USER |
1010 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1011 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1012 .icache_bsize = 32,
1013 .dcache_bsize = 32,
1014 .num_pmcs = 6,
1015 .pmc_type = PPC_PMC_G4,
1016 .cpu_setup = __setup_cpu_745x,
1017 .oprofile_cpu_type = "ppc/7450",
1018 .oprofile_type = PPC_OPROFILE_G4,
1019 .machine_check = machine_check_generic,
1020 .platform = "ppc7450",
1021 },
1022 { /* 7448 */
1023 .pvr_mask = 0xffff0000,
1024 .pvr_value = 0x80040000,
1025 .cpu_name = "7448",
1026 .cpu_features = CPU_FTRS_7448,
1027 .cpu_user_features = COMMON_USER |
1028 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1029 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1030 .icache_bsize = 32,
1031 .dcache_bsize = 32,
1032 .num_pmcs = 6,
1033 .pmc_type = PPC_PMC_G4,
1034 .cpu_setup = __setup_cpu_745x,
1035 .oprofile_cpu_type = "ppc/7450",
1036 .oprofile_type = PPC_OPROFILE_G4,
1037 .machine_check = machine_check_generic,
1038 .platform = "ppc7450",
1039 },
1040 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1041 .pvr_mask = 0x7fff0000,
1042 .pvr_value = 0x00810000,
1043 .cpu_name = "82xx",
1044 .cpu_features = CPU_FTRS_82XX,
1045 .cpu_user_features = COMMON_USER,
1046 .mmu_features = 0,
1047 .icache_bsize = 32,
1048 .dcache_bsize = 32,
1049 .cpu_setup = __setup_cpu_603,
1050 .machine_check = machine_check_generic,
1051 .platform = "ppc603",
1052 },
1053 { /* All G2_LE (603e core, plus some) have the same pvr */
1054 .pvr_mask = 0x7fff0000,
1055 .pvr_value = 0x00820000,
1056 .cpu_name = "G2_LE",
1057 .cpu_features = CPU_FTRS_G2_LE,
1058 .cpu_user_features = COMMON_USER,
1059 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1060 .icache_bsize = 32,
1061 .dcache_bsize = 32,
1062 .cpu_setup = __setup_cpu_603,
1063 .machine_check = machine_check_generic,
1064 .platform = "ppc603",
1065 },
1066 { /* e300c1 (a 603e core, plus some) on 83xx */
1067 .pvr_mask = 0x7fff0000,
1068 .pvr_value = 0x00830000,
1069 .cpu_name = "e300c1",
1070 .cpu_features = CPU_FTRS_E300,
1071 .cpu_user_features = COMMON_USER,
1072 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1073 .icache_bsize = 32,
1074 .dcache_bsize = 32,
1075 .cpu_setup = __setup_cpu_603,
1076 .machine_check = machine_check_generic,
1077 .platform = "ppc603",
1078 },
1079 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1080 .pvr_mask = 0x7fff0000,
1081 .pvr_value = 0x00840000,
1082 .cpu_name = "e300c2",
1083 .cpu_features = CPU_FTRS_E300C2,
1084 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1085 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1086 .icache_bsize = 32,
1087 .dcache_bsize = 32,
1088 .cpu_setup = __setup_cpu_603,
1089 .machine_check = machine_check_generic,
1090 .platform = "ppc603",
1091 },
1092 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1093 .pvr_mask = 0x7fff0000,
1094 .pvr_value = 0x00850000,
1095 .cpu_name = "e300c3",
1096 .cpu_features = CPU_FTRS_E300,
1097 .cpu_user_features = COMMON_USER,
1098 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1099 .icache_bsize = 32,
1100 .dcache_bsize = 32,
1101 .cpu_setup = __setup_cpu_603,
1102 .num_pmcs = 4,
1103 .oprofile_cpu_type = "ppc/e300",
1104 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1105 .platform = "ppc603",
1106 },
1107 { /* e300c4 (e300c1, plus one IU) */
1108 .pvr_mask = 0x7fff0000,
1109 .pvr_value = 0x00860000,
1110 .cpu_name = "e300c4",
1111 .cpu_features = CPU_FTRS_E300,
1112 .cpu_user_features = COMMON_USER,
1113 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1114 .icache_bsize = 32,
1115 .dcache_bsize = 32,
1116 .cpu_setup = __setup_cpu_603,
1117 .machine_check = machine_check_generic,
1118 .num_pmcs = 4,
1119 .oprofile_cpu_type = "ppc/e300",
1120 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1121 .platform = "ppc603",
1122 },
1123 { /* default match, we assume split I/D cache & TB (non-601)... */
1124 .pvr_mask = 0x00000000,
1125 .pvr_value = 0x00000000,
1126 .cpu_name = "(generic PPC)",
1127 .cpu_features = CPU_FTRS_CLASSIC32,
1128 .cpu_user_features = COMMON_USER,
1129 .mmu_features = MMU_FTR_HPTE_TABLE,
1130 .icache_bsize = 32,
1131 .dcache_bsize = 32,
1132 .machine_check = machine_check_generic,
1133 .platform = "ppc603",
1134 },
1135 #endif /* CLASSIC_PPC */
1136 #ifdef CONFIG_8xx
1137 { /* 8xx */
1138 .pvr_mask = 0xffff0000,
1139 .pvr_value = 0x00500000,
1140 .cpu_name = "8xx",
1141 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1142 * if the 8xx code is there.... */
1143 .cpu_features = CPU_FTRS_8XX,
1144 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1145 .mmu_features = MMU_FTR_TYPE_8xx,
1146 .icache_bsize = 16,
1147 .dcache_bsize = 16,
1148 .platform = "ppc823",
1149 },
1150 #endif /* CONFIG_8xx */
1151 #ifdef CONFIG_40x
1152 { /* 403GC */
1153 .pvr_mask = 0xffffff00,
1154 .pvr_value = 0x00200200,
1155 .cpu_name = "403GC",
1156 .cpu_features = CPU_FTRS_40X,
1157 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1158 .mmu_features = MMU_FTR_TYPE_40x,
1159 .icache_bsize = 16,
1160 .dcache_bsize = 16,
1161 .machine_check = machine_check_4xx,
1162 .platform = "ppc403",
1163 },
1164 { /* 403GCX */
1165 .pvr_mask = 0xffffff00,
1166 .pvr_value = 0x00201400,
1167 .cpu_name = "403GCX",
1168 .cpu_features = CPU_FTRS_40X,
1169 .cpu_user_features = PPC_FEATURE_32 |
1170 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1171 .mmu_features = MMU_FTR_TYPE_40x,
1172 .icache_bsize = 16,
1173 .dcache_bsize = 16,
1174 .machine_check = machine_check_4xx,
1175 .platform = "ppc403",
1176 },
1177 { /* 403G ?? */
1178 .pvr_mask = 0xffff0000,
1179 .pvr_value = 0x00200000,
1180 .cpu_name = "403G ??",
1181 .cpu_features = CPU_FTRS_40X,
1182 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1183 .mmu_features = MMU_FTR_TYPE_40x,
1184 .icache_bsize = 16,
1185 .dcache_bsize = 16,
1186 .machine_check = machine_check_4xx,
1187 .platform = "ppc403",
1188 },
1189 { /* 405GP */
1190 .pvr_mask = 0xffff0000,
1191 .pvr_value = 0x40110000,
1192 .cpu_name = "405GP",
1193 .cpu_features = CPU_FTRS_40X,
1194 .cpu_user_features = PPC_FEATURE_32 |
1195 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1196 .mmu_features = MMU_FTR_TYPE_40x,
1197 .icache_bsize = 32,
1198 .dcache_bsize = 32,
1199 .machine_check = machine_check_4xx,
1200 .platform = "ppc405",
1201 },
1202 { /* STB 03xxx */
1203 .pvr_mask = 0xffff0000,
1204 .pvr_value = 0x40130000,
1205 .cpu_name = "STB03xxx",
1206 .cpu_features = CPU_FTRS_40X,
1207 .cpu_user_features = PPC_FEATURE_32 |
1208 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1209 .mmu_features = MMU_FTR_TYPE_40x,
1210 .icache_bsize = 32,
1211 .dcache_bsize = 32,
1212 .machine_check = machine_check_4xx,
1213 .platform = "ppc405",
1214 },
1215 { /* STB 04xxx */
1216 .pvr_mask = 0xffff0000,
1217 .pvr_value = 0x41810000,
1218 .cpu_name = "STB04xxx",
1219 .cpu_features = CPU_FTRS_40X,
1220 .cpu_user_features = PPC_FEATURE_32 |
1221 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1222 .mmu_features = MMU_FTR_TYPE_40x,
1223 .icache_bsize = 32,
1224 .dcache_bsize = 32,
1225 .machine_check = machine_check_4xx,
1226 .platform = "ppc405",
1227 },
1228 { /* NP405L */
1229 .pvr_mask = 0xffff0000,
1230 .pvr_value = 0x41610000,
1231 .cpu_name = "NP405L",
1232 .cpu_features = CPU_FTRS_40X,
1233 .cpu_user_features = PPC_FEATURE_32 |
1234 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1235 .mmu_features = MMU_FTR_TYPE_40x,
1236 .icache_bsize = 32,
1237 .dcache_bsize = 32,
1238 .machine_check = machine_check_4xx,
1239 .platform = "ppc405",
1240 },
1241 { /* NP4GS3 */
1242 .pvr_mask = 0xffff0000,
1243 .pvr_value = 0x40B10000,
1244 .cpu_name = "NP4GS3",
1245 .cpu_features = CPU_FTRS_40X,
1246 .cpu_user_features = PPC_FEATURE_32 |
1247 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1248 .mmu_features = MMU_FTR_TYPE_40x,
1249 .icache_bsize = 32,
1250 .dcache_bsize = 32,
1251 .machine_check = machine_check_4xx,
1252 .platform = "ppc405",
1253 },
1254 { /* NP405H */
1255 .pvr_mask = 0xffff0000,
1256 .pvr_value = 0x41410000,
1257 .cpu_name = "NP405H",
1258 .cpu_features = CPU_FTRS_40X,
1259 .cpu_user_features = PPC_FEATURE_32 |
1260 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1261 .mmu_features = MMU_FTR_TYPE_40x,
1262 .icache_bsize = 32,
1263 .dcache_bsize = 32,
1264 .machine_check = machine_check_4xx,
1265 .platform = "ppc405",
1266 },
1267 { /* 405GPr */
1268 .pvr_mask = 0xffff0000,
1269 .pvr_value = 0x50910000,
1270 .cpu_name = "405GPr",
1271 .cpu_features = CPU_FTRS_40X,
1272 .cpu_user_features = PPC_FEATURE_32 |
1273 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1274 .mmu_features = MMU_FTR_TYPE_40x,
1275 .icache_bsize = 32,
1276 .dcache_bsize = 32,
1277 .machine_check = machine_check_4xx,
1278 .platform = "ppc405",
1279 },
1280 { /* STBx25xx */
1281 .pvr_mask = 0xffff0000,
1282 .pvr_value = 0x51510000,
1283 .cpu_name = "STBx25xx",
1284 .cpu_features = CPU_FTRS_40X,
1285 .cpu_user_features = PPC_FEATURE_32 |
1286 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1287 .mmu_features = MMU_FTR_TYPE_40x,
1288 .icache_bsize = 32,
1289 .dcache_bsize = 32,
1290 .machine_check = machine_check_4xx,
1291 .platform = "ppc405",
1292 },
1293 { /* 405LP */
1294 .pvr_mask = 0xffff0000,
1295 .pvr_value = 0x41F10000,
1296 .cpu_name = "405LP",
1297 .cpu_features = CPU_FTRS_40X,
1298 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1299 .mmu_features = MMU_FTR_TYPE_40x,
1300 .icache_bsize = 32,
1301 .dcache_bsize = 32,
1302 .machine_check = machine_check_4xx,
1303 .platform = "ppc405",
1304 },
1305 { /* Xilinx Virtex-II Pro */
1306 .pvr_mask = 0xfffff000,
1307 .pvr_value = 0x20010000,
1308 .cpu_name = "Virtex-II Pro",
1309 .cpu_features = CPU_FTRS_40X,
1310 .cpu_user_features = PPC_FEATURE_32 |
1311 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1312 .mmu_features = MMU_FTR_TYPE_40x,
1313 .icache_bsize = 32,
1314 .dcache_bsize = 32,
1315 .machine_check = machine_check_4xx,
1316 .platform = "ppc405",
1317 },
1318 { /* Xilinx Virtex-4 FX */
1319 .pvr_mask = 0xfffff000,
1320 .pvr_value = 0x20011000,
1321 .cpu_name = "Virtex-4 FX",
1322 .cpu_features = CPU_FTRS_40X,
1323 .cpu_user_features = PPC_FEATURE_32 |
1324 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1325 .mmu_features = MMU_FTR_TYPE_40x,
1326 .icache_bsize = 32,
1327 .dcache_bsize = 32,
1328 .machine_check = machine_check_4xx,
1329 .platform = "ppc405",
1330 },
1331 { /* 405EP */
1332 .pvr_mask = 0xffff0000,
1333 .pvr_value = 0x51210000,
1334 .cpu_name = "405EP",
1335 .cpu_features = CPU_FTRS_40X,
1336 .cpu_user_features = PPC_FEATURE_32 |
1337 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1338 .mmu_features = MMU_FTR_TYPE_40x,
1339 .icache_bsize = 32,
1340 .dcache_bsize = 32,
1341 .machine_check = machine_check_4xx,
1342 .platform = "ppc405",
1343 },
1344 { /* 405EX */
1345 .pvr_mask = 0xffff0004,
1346 .pvr_value = 0x12910004,
1347 .cpu_name = "405EX",
1348 .cpu_features = CPU_FTRS_40X,
1349 .cpu_user_features = PPC_FEATURE_32 |
1350 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1351 .mmu_features = MMU_FTR_TYPE_40x,
1352 .icache_bsize = 32,
1353 .dcache_bsize = 32,
1354 .machine_check = machine_check_4xx,
1355 .platform = "ppc405",
1356 },
1357 { /* 405EXr */
1358 .pvr_mask = 0xffff0004,
1359 .pvr_value = 0x12910000,
1360 .cpu_name = "405EXr",
1361 .cpu_features = CPU_FTRS_40X,
1362 .cpu_user_features = PPC_FEATURE_32 |
1363 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1364 .mmu_features = MMU_FTR_TYPE_40x,
1365 .icache_bsize = 32,
1366 .dcache_bsize = 32,
1367 .machine_check = machine_check_4xx,
1368 .platform = "ppc405",
1369 },
1370 {
1371 /* 405EZ */
1372 .pvr_mask = 0xffff0000,
1373 .pvr_value = 0x41510000,
1374 .cpu_name = "405EZ",
1375 .cpu_features = CPU_FTRS_40X,
1376 .cpu_user_features = PPC_FEATURE_32 |
1377 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1378 .mmu_features = MMU_FTR_TYPE_40x,
1379 .icache_bsize = 32,
1380 .dcache_bsize = 32,
1381 .machine_check = machine_check_4xx,
1382 .platform = "ppc405",
1383 },
1384 { /* default match */
1385 .pvr_mask = 0x00000000,
1386 .pvr_value = 0x00000000,
1387 .cpu_name = "(generic 40x PPC)",
1388 .cpu_features = CPU_FTRS_40X,
1389 .cpu_user_features = PPC_FEATURE_32 |
1390 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1391 .mmu_features = MMU_FTR_TYPE_40x,
1392 .icache_bsize = 32,
1393 .dcache_bsize = 32,
1394 .machine_check = machine_check_4xx,
1395 .platform = "ppc405",
1396 }
1397
1398 #endif /* CONFIG_40x */
1399 #ifdef CONFIG_44x
1400 {
1401 .pvr_mask = 0xf0000fff,
1402 .pvr_value = 0x40000850,
1403 .cpu_name = "440GR Rev. A",
1404 .cpu_features = CPU_FTRS_44X,
1405 .cpu_user_features = COMMON_USER_BOOKE,
1406 .mmu_features = MMU_FTR_TYPE_44x,
1407 .icache_bsize = 32,
1408 .dcache_bsize = 32,
1409 .machine_check = machine_check_4xx,
1410 .platform = "ppc440",
1411 },
1412 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1413 .pvr_mask = 0xf0000fff,
1414 .pvr_value = 0x40000858,
1415 .cpu_name = "440EP Rev. A",
1416 .cpu_features = CPU_FTRS_44X,
1417 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1418 .mmu_features = MMU_FTR_TYPE_44x,
1419 .icache_bsize = 32,
1420 .dcache_bsize = 32,
1421 .cpu_setup = __setup_cpu_440ep,
1422 .machine_check = machine_check_4xx,
1423 .platform = "ppc440",
1424 },
1425 {
1426 .pvr_mask = 0xf0000fff,
1427 .pvr_value = 0x400008d3,
1428 .cpu_name = "440GR Rev. B",
1429 .cpu_features = CPU_FTRS_44X,
1430 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1431 .mmu_features = MMU_FTR_TYPE_44x,
1432 .icache_bsize = 32,
1433 .dcache_bsize = 32,
1434 .machine_check = machine_check_4xx,
1435 .platform = "ppc440",
1436 },
1437 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1438 .pvr_mask = 0xf0000ff7,
1439 .pvr_value = 0x400008d4,
1440 .cpu_name = "440EP Rev. C",
1441 .cpu_features = CPU_FTRS_44X,
1442 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1443 .mmu_features = MMU_FTR_TYPE_44x,
1444 .icache_bsize = 32,
1445 .dcache_bsize = 32,
1446 .cpu_setup = __setup_cpu_440ep,
1447 .machine_check = machine_check_4xx,
1448 .platform = "ppc440",
1449 },
1450 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1451 .pvr_mask = 0xf0000fff,
1452 .pvr_value = 0x400008db,
1453 .cpu_name = "440EP Rev. B",
1454 .cpu_features = CPU_FTRS_44X,
1455 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1456 .mmu_features = MMU_FTR_TYPE_44x,
1457 .icache_bsize = 32,
1458 .dcache_bsize = 32,
1459 .cpu_setup = __setup_cpu_440ep,
1460 .machine_check = machine_check_4xx,
1461 .platform = "ppc440",
1462 },
1463 { /* 440GRX */
1464 .pvr_mask = 0xf0000ffb,
1465 .pvr_value = 0x200008D0,
1466 .cpu_name = "440GRX",
1467 .cpu_features = CPU_FTRS_44X,
1468 .cpu_user_features = COMMON_USER_BOOKE,
1469 .mmu_features = MMU_FTR_TYPE_44x,
1470 .icache_bsize = 32,
1471 .dcache_bsize = 32,
1472 .cpu_setup = __setup_cpu_440grx,
1473 .machine_check = machine_check_440A,
1474 .platform = "ppc440",
1475 },
1476 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1477 .pvr_mask = 0xf0000ffb,
1478 .pvr_value = 0x200008D8,
1479 .cpu_name = "440EPX",
1480 .cpu_features = CPU_FTRS_44X,
1481 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1482 .mmu_features = MMU_FTR_TYPE_44x,
1483 .icache_bsize = 32,
1484 .dcache_bsize = 32,
1485 .cpu_setup = __setup_cpu_440epx,
1486 .machine_check = machine_check_440A,
1487 .platform = "ppc440",
1488 },
1489 { /* 440GP Rev. B */
1490 .pvr_mask = 0xf0000fff,
1491 .pvr_value = 0x40000440,
1492 .cpu_name = "440GP Rev. B",
1493 .cpu_features = CPU_FTRS_44X,
1494 .cpu_user_features = COMMON_USER_BOOKE,
1495 .mmu_features = MMU_FTR_TYPE_44x,
1496 .icache_bsize = 32,
1497 .dcache_bsize = 32,
1498 .machine_check = machine_check_4xx,
1499 .platform = "ppc440gp",
1500 },
1501 { /* 440GP Rev. C */
1502 .pvr_mask = 0xf0000fff,
1503 .pvr_value = 0x40000481,
1504 .cpu_name = "440GP Rev. C",
1505 .cpu_features = CPU_FTRS_44X,
1506 .cpu_user_features = COMMON_USER_BOOKE,
1507 .mmu_features = MMU_FTR_TYPE_44x,
1508 .icache_bsize = 32,
1509 .dcache_bsize = 32,
1510 .machine_check = machine_check_4xx,
1511 .platform = "ppc440gp",
1512 },
1513 { /* 440GX Rev. A */
1514 .pvr_mask = 0xf0000fff,
1515 .pvr_value = 0x50000850,
1516 .cpu_name = "440GX Rev. A",
1517 .cpu_features = CPU_FTRS_44X,
1518 .cpu_user_features = COMMON_USER_BOOKE,
1519 .mmu_features = MMU_FTR_TYPE_44x,
1520 .icache_bsize = 32,
1521 .dcache_bsize = 32,
1522 .cpu_setup = __setup_cpu_440gx,
1523 .machine_check = machine_check_440A,
1524 .platform = "ppc440",
1525 },
1526 { /* 440GX Rev. B */
1527 .pvr_mask = 0xf0000fff,
1528 .pvr_value = 0x50000851,
1529 .cpu_name = "440GX Rev. B",
1530 .cpu_features = CPU_FTRS_44X,
1531 .cpu_user_features = COMMON_USER_BOOKE,
1532 .mmu_features = MMU_FTR_TYPE_44x,
1533 .icache_bsize = 32,
1534 .dcache_bsize = 32,
1535 .cpu_setup = __setup_cpu_440gx,
1536 .machine_check = machine_check_440A,
1537 .platform = "ppc440",
1538 },
1539 { /* 440GX Rev. C */
1540 .pvr_mask = 0xf0000fff,
1541 .pvr_value = 0x50000892,
1542 .cpu_name = "440GX Rev. C",
1543 .cpu_features = CPU_FTRS_44X,
1544 .cpu_user_features = COMMON_USER_BOOKE,
1545 .mmu_features = MMU_FTR_TYPE_44x,
1546 .icache_bsize = 32,
1547 .dcache_bsize = 32,
1548 .cpu_setup = __setup_cpu_440gx,
1549 .machine_check = machine_check_440A,
1550 .platform = "ppc440",
1551 },
1552 { /* 440GX Rev. F */
1553 .pvr_mask = 0xf0000fff,
1554 .pvr_value = 0x50000894,
1555 .cpu_name = "440GX Rev. F",
1556 .cpu_features = CPU_FTRS_44X,
1557 .cpu_user_features = COMMON_USER_BOOKE,
1558 .mmu_features = MMU_FTR_TYPE_44x,
1559 .icache_bsize = 32,
1560 .dcache_bsize = 32,
1561 .cpu_setup = __setup_cpu_440gx,
1562 .machine_check = machine_check_440A,
1563 .platform = "ppc440",
1564 },
1565 { /* 440SP Rev. A */
1566 .pvr_mask = 0xfff00fff,
1567 .pvr_value = 0x53200891,
1568 .cpu_name = "440SP Rev. A",
1569 .cpu_features = CPU_FTRS_44X,
1570 .cpu_user_features = COMMON_USER_BOOKE,
1571 .mmu_features = MMU_FTR_TYPE_44x,
1572 .icache_bsize = 32,
1573 .dcache_bsize = 32,
1574 .machine_check = machine_check_4xx,
1575 .platform = "ppc440",
1576 },
1577 { /* 440SPe Rev. A */
1578 .pvr_mask = 0xfff00fff,
1579 .pvr_value = 0x53400890,
1580 .cpu_name = "440SPe Rev. A",
1581 .cpu_features = CPU_FTRS_44X,
1582 .cpu_user_features = COMMON_USER_BOOKE,
1583 .mmu_features = MMU_FTR_TYPE_44x,
1584 .icache_bsize = 32,
1585 .dcache_bsize = 32,
1586 .cpu_setup = __setup_cpu_440spe,
1587 .machine_check = machine_check_440A,
1588 .platform = "ppc440",
1589 },
1590 { /* 440SPe Rev. B */
1591 .pvr_mask = 0xfff00fff,
1592 .pvr_value = 0x53400891,
1593 .cpu_name = "440SPe Rev. B",
1594 .cpu_features = CPU_FTRS_44X,
1595 .cpu_user_features = COMMON_USER_BOOKE,
1596 .mmu_features = MMU_FTR_TYPE_44x,
1597 .icache_bsize = 32,
1598 .dcache_bsize = 32,
1599 .cpu_setup = __setup_cpu_440spe,
1600 .machine_check = machine_check_440A,
1601 .platform = "ppc440",
1602 },
1603 { /* 440 in Xilinx Virtex-5 FXT */
1604 .pvr_mask = 0xfffffff0,
1605 .pvr_value = 0x7ff21910,
1606 .cpu_name = "440 in Virtex-5 FXT",
1607 .cpu_features = CPU_FTRS_44X,
1608 .cpu_user_features = COMMON_USER_BOOKE,
1609 .mmu_features = MMU_FTR_TYPE_44x,
1610 .icache_bsize = 32,
1611 .dcache_bsize = 32,
1612 .cpu_setup = __setup_cpu_440x5,
1613 .machine_check = machine_check_440A,
1614 .platform = "ppc440",
1615 },
1616 { /* 460EX */
1617 .pvr_mask = 0xffff0002,
1618 .pvr_value = 0x13020002,
1619 .cpu_name = "460EX",
1620 .cpu_features = CPU_FTRS_440x6,
1621 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1622 .mmu_features = MMU_FTR_TYPE_44x,
1623 .icache_bsize = 32,
1624 .dcache_bsize = 32,
1625 .cpu_setup = __setup_cpu_460ex,
1626 .machine_check = machine_check_440A,
1627 .platform = "ppc440",
1628 },
1629 { /* 460GT */
1630 .pvr_mask = 0xffff0002,
1631 .pvr_value = 0x13020000,
1632 .cpu_name = "460GT",
1633 .cpu_features = CPU_FTRS_440x6,
1634 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1635 .mmu_features = MMU_FTR_TYPE_44x,
1636 .icache_bsize = 32,
1637 .dcache_bsize = 32,
1638 .cpu_setup = __setup_cpu_460gt,
1639 .machine_check = machine_check_440A,
1640 .platform = "ppc440",
1641 },
1642 { /* 460SX */
1643 .pvr_mask = 0xffffff00,
1644 .pvr_value = 0x13541800,
1645 .cpu_name = "460SX",
1646 .cpu_features = CPU_FTRS_44X,
1647 .cpu_user_features = COMMON_USER_BOOKE,
1648 .mmu_features = MMU_FTR_TYPE_44x,
1649 .icache_bsize = 32,
1650 .dcache_bsize = 32,
1651 .cpu_setup = __setup_cpu_460sx,
1652 .machine_check = machine_check_440A,
1653 .platform = "ppc440",
1654 },
1655 { /* default match */
1656 .pvr_mask = 0x00000000,
1657 .pvr_value = 0x00000000,
1658 .cpu_name = "(generic 44x PPC)",
1659 .cpu_features = CPU_FTRS_44X,
1660 .cpu_user_features = COMMON_USER_BOOKE,
1661 .mmu_features = MMU_FTR_TYPE_44x,
1662 .icache_bsize = 32,
1663 .dcache_bsize = 32,
1664 .machine_check = machine_check_4xx,
1665 .platform = "ppc440",
1666 }
1667 #endif /* CONFIG_44x */
1668 #ifdef CONFIG_E200
1669 { /* e200z5 */
1670 .pvr_mask = 0xfff00000,
1671 .pvr_value = 0x81000000,
1672 .cpu_name = "e200z5",
1673 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1674 .cpu_features = CPU_FTRS_E200,
1675 .cpu_user_features = COMMON_USER_BOOKE |
1676 PPC_FEATURE_HAS_EFP_SINGLE |
1677 PPC_FEATURE_UNIFIED_CACHE,
1678 .mmu_features = MMU_FTR_TYPE_FSL_E,
1679 .dcache_bsize = 32,
1680 .machine_check = machine_check_e200,
1681 .platform = "ppc5554",
1682 },
1683 { /* e200z6 */
1684 .pvr_mask = 0xfff00000,
1685 .pvr_value = 0x81100000,
1686 .cpu_name = "e200z6",
1687 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1688 .cpu_features = CPU_FTRS_E200,
1689 .cpu_user_features = COMMON_USER_BOOKE |
1690 PPC_FEATURE_HAS_SPE_COMP |
1691 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1692 PPC_FEATURE_UNIFIED_CACHE,
1693 .mmu_features = MMU_FTR_TYPE_FSL_E,
1694 .dcache_bsize = 32,
1695 .machine_check = machine_check_e200,
1696 .platform = "ppc5554",
1697 },
1698 { /* default match */
1699 .pvr_mask = 0x00000000,
1700 .pvr_value = 0x00000000,
1701 .cpu_name = "(generic E200 PPC)",
1702 .cpu_features = CPU_FTRS_E200,
1703 .cpu_user_features = COMMON_USER_BOOKE |
1704 PPC_FEATURE_HAS_EFP_SINGLE |
1705 PPC_FEATURE_UNIFIED_CACHE,
1706 .mmu_features = MMU_FTR_TYPE_FSL_E,
1707 .dcache_bsize = 32,
1708 .cpu_setup = __setup_cpu_e200,
1709 .machine_check = machine_check_e200,
1710 .platform = "ppc5554",
1711 }
1712 #endif /* CONFIG_E200 */
1713 #ifdef CONFIG_E500
1714 { /* e500 */
1715 .pvr_mask = 0xffff0000,
1716 .pvr_value = 0x80200000,
1717 .cpu_name = "e500",
1718 .cpu_features = CPU_FTRS_E500,
1719 .cpu_user_features = COMMON_USER_BOOKE |
1720 PPC_FEATURE_HAS_SPE_COMP |
1721 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1722 .mmu_features = MMU_FTR_TYPE_FSL_E,
1723 .icache_bsize = 32,
1724 .dcache_bsize = 32,
1725 .num_pmcs = 4,
1726 .oprofile_cpu_type = "ppc/e500",
1727 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1728 .cpu_setup = __setup_cpu_e500v1,
1729 .machine_check = machine_check_e500,
1730 .platform = "ppc8540",
1731 },
1732 { /* e500v2 */
1733 .pvr_mask = 0xffff0000,
1734 .pvr_value = 0x80210000,
1735 .cpu_name = "e500v2",
1736 .cpu_features = CPU_FTRS_E500_2,
1737 .cpu_user_features = COMMON_USER_BOOKE |
1738 PPC_FEATURE_HAS_SPE_COMP |
1739 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1740 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1741 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1742 .icache_bsize = 32,
1743 .dcache_bsize = 32,
1744 .num_pmcs = 4,
1745 .oprofile_cpu_type = "ppc/e500",
1746 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1747 .cpu_setup = __setup_cpu_e500v2,
1748 .machine_check = machine_check_e500,
1749 .platform = "ppc8548",
1750 },
1751 { /* e500mc */
1752 .pvr_mask = 0xffff0000,
1753 .pvr_value = 0x80230000,
1754 .cpu_name = "e500mc",
1755 .cpu_features = CPU_FTRS_E500MC,
1756 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1757 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1758 MMU_FTR_USE_TLBILX,
1759 .icache_bsize = 64,
1760 .dcache_bsize = 64,
1761 .num_pmcs = 4,
1762 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
1763 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1764 .cpu_setup = __setup_cpu_e500mc,
1765 .machine_check = machine_check_e500,
1766 .platform = "ppce500mc",
1767 },
1768 { /* default match */
1769 .pvr_mask = 0x00000000,
1770 .pvr_value = 0x00000000,
1771 .cpu_name = "(generic E500 PPC)",
1772 .cpu_features = CPU_FTRS_E500,
1773 .cpu_user_features = COMMON_USER_BOOKE |
1774 PPC_FEATURE_HAS_SPE_COMP |
1775 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1776 .mmu_features = MMU_FTR_TYPE_FSL_E,
1777 .icache_bsize = 32,
1778 .dcache_bsize = 32,
1779 .machine_check = machine_check_e500,
1780 .platform = "powerpc",
1781 }
1782 #endif /* CONFIG_E500 */
1783 #endif /* CONFIG_PPC32 */
1784 };
1785
1786 static struct cpu_spec the_cpu_spec;
1787
1788 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
1789 {
1790 struct cpu_spec *s = cpu_specs;
1791 struct cpu_spec *t = &the_cpu_spec;
1792 int i;
1793
1794 s = PTRRELOC(s);
1795 t = PTRRELOC(t);
1796
1797 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1798 if ((pvr & s->pvr_mask) == s->pvr_value) {
1799 /*
1800 * If we are overriding a previous value derived
1801 * from the real PVR with a new value obtained
1802 * using a logical PVR value, don't modify the
1803 * performance monitor fields.
1804 */
1805 if (t->num_pmcs && !s->num_pmcs) {
1806 t->cpu_name = s->cpu_name;
1807 t->cpu_features = s->cpu_features;
1808 t->cpu_user_features = s->cpu_user_features;
1809 t->icache_bsize = s->icache_bsize;
1810 t->dcache_bsize = s->dcache_bsize;
1811 t->cpu_setup = s->cpu_setup;
1812 t->cpu_restore = s->cpu_restore;
1813 t->platform = s->platform;
1814 /*
1815 * If we have passed through this logic once
1816 * before and have pulled the default case
1817 * because the real PVR was not found inside
1818 * cpu_specs[], then we are possibly running in
1819 * compatibility mode. In that case, let the
1820 * oprofiler know which set of compatibility
1821 * counters to pull from by making sure the
1822 * oprofile_cpu_type string is set to that of
1823 * compatibility mode. If the oprofile_cpu_type
1824 * already has a value, then we are possibly
1825 * overriding a real PVR with a logical one, and,
1826 * in that case, keep the current value for
1827 * oprofile_cpu_type.
1828 */
1829 if (t->oprofile_cpu_type == NULL)
1830 t->oprofile_cpu_type = s->oprofile_cpu_type;
1831 } else
1832 *t = *s;
1833 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
1834
1835 /*
1836 * Set the base platform string once; assumes
1837 * we're called with real pvr first.
1838 */
1839 if (*PTRRELOC(&powerpc_base_platform) == NULL)
1840 *PTRRELOC(&powerpc_base_platform) = t->platform;
1841
1842 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
1843 /* ppc64 and booke expect identify_cpu to also call
1844 * setup_cpu for that processor. I will consolidate
1845 * that at a later time, for now, just use #ifdef.
1846 * we also don't need to PTRRELOC the function pointer
1847 * on ppc64 and booke as we are running at 0 in real
1848 * mode on ppc64 and reloc_offset is always 0 on booke.
1849 */
1850 if (s->cpu_setup) {
1851 s->cpu_setup(offset, s);
1852 }
1853 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
1854 return s;
1855 }
1856 BUG();
1857 return NULL;
1858 }
Linux kernel - Deliverables
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