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powerpc/fsl-booke: Add support for FSL 64-bit e5500 core
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23
24 struct cpu_spec* cur_cpu_spec = NULL;
25 EXPORT_SYMBOL(cur_cpu_spec);
26
27 /* The platform string corresponding to the real PVR */
28 const char *powerpc_base_platform;
29
30 /* NOTE:
31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
32 * the responsibility of the appropriate CPU save/restore functions to
33 * eventually copy these settings over. Those save/restore aren't yet
34 * part of the cputable though. That has to be fixed for both ppc32
35 * and ppc64
36 */
37 #ifdef CONFIG_PPC32
38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
51 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
52 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
59 #endif /* CONFIG_PPC32 */
60 #ifdef CONFIG_PPC64
61 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
62 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
63 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
64 extern void __restore_cpu_pa6t(void);
65 extern void __restore_cpu_ppc970(void);
66 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_power7(void);
68 #endif /* CONFIG_PPC64 */
69 #if defined(CONFIG_E500)
70 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
71 extern void __restore_cpu_e5500(void);
72 #endif /* CONFIG_E500 */
73
74 /* This table only contains "desktop" CPUs, it need to be filled with embedded
75 * ones as well...
76 */
77 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
78 PPC_FEATURE_HAS_MMU)
79 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
80 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
81 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
82 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
83 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
84 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
85 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
87 PPC_FEATURE_TRUE_LE | \
88 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
89 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
91 PPC_FEATURE_TRUE_LE | \
92 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
93 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
94 PPC_FEATURE_TRUE_LE | \
95 PPC_FEATURE_HAS_ALTIVEC_COMP)
96 #ifdef CONFIG_PPC_BOOK3E_64
97 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
98 #else
99 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
100 PPC_FEATURE_BOOKE)
101 #endif
102
103 static struct cpu_spec __initdata cpu_specs[] = {
104 #ifdef CONFIG_PPC_BOOK3S_64
105 { /* Power3 */
106 .pvr_mask = 0xffff0000,
107 .pvr_value = 0x00400000,
108 .cpu_name = "POWER3 (630)",
109 .cpu_features = CPU_FTRS_POWER3,
110 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
111 .mmu_features = MMU_FTR_HPTE_TABLE,
112 .icache_bsize = 128,
113 .dcache_bsize = 128,
114 .num_pmcs = 8,
115 .pmc_type = PPC_PMC_IBM,
116 .oprofile_cpu_type = "ppc64/power3",
117 .oprofile_type = PPC_OPROFILE_RS64,
118 .machine_check = machine_check_generic,
119 .platform = "power3",
120 },
121 { /* Power3+ */
122 .pvr_mask = 0xffff0000,
123 .pvr_value = 0x00410000,
124 .cpu_name = "POWER3 (630+)",
125 .cpu_features = CPU_FTRS_POWER3,
126 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
127 .mmu_features = MMU_FTR_HPTE_TABLE,
128 .icache_bsize = 128,
129 .dcache_bsize = 128,
130 .num_pmcs = 8,
131 .pmc_type = PPC_PMC_IBM,
132 .oprofile_cpu_type = "ppc64/power3",
133 .oprofile_type = PPC_OPROFILE_RS64,
134 .machine_check = machine_check_generic,
135 .platform = "power3",
136 },
137 { /* Northstar */
138 .pvr_mask = 0xffff0000,
139 .pvr_value = 0x00330000,
140 .cpu_name = "RS64-II (northstar)",
141 .cpu_features = CPU_FTRS_RS64,
142 .cpu_user_features = COMMON_USER_PPC64,
143 .mmu_features = MMU_FTR_HPTE_TABLE,
144 .icache_bsize = 128,
145 .dcache_bsize = 128,
146 .num_pmcs = 8,
147 .pmc_type = PPC_PMC_IBM,
148 .oprofile_cpu_type = "ppc64/rs64",
149 .oprofile_type = PPC_OPROFILE_RS64,
150 .machine_check = machine_check_generic,
151 .platform = "rs64",
152 },
153 { /* Pulsar */
154 .pvr_mask = 0xffff0000,
155 .pvr_value = 0x00340000,
156 .cpu_name = "RS64-III (pulsar)",
157 .cpu_features = CPU_FTRS_RS64,
158 .cpu_user_features = COMMON_USER_PPC64,
159 .mmu_features = MMU_FTR_HPTE_TABLE,
160 .icache_bsize = 128,
161 .dcache_bsize = 128,
162 .num_pmcs = 8,
163 .pmc_type = PPC_PMC_IBM,
164 .oprofile_cpu_type = "ppc64/rs64",
165 .oprofile_type = PPC_OPROFILE_RS64,
166 .machine_check = machine_check_generic,
167 .platform = "rs64",
168 },
169 { /* I-star */
170 .pvr_mask = 0xffff0000,
171 .pvr_value = 0x00360000,
172 .cpu_name = "RS64-III (icestar)",
173 .cpu_features = CPU_FTRS_RS64,
174 .cpu_user_features = COMMON_USER_PPC64,
175 .mmu_features = MMU_FTR_HPTE_TABLE,
176 .icache_bsize = 128,
177 .dcache_bsize = 128,
178 .num_pmcs = 8,
179 .pmc_type = PPC_PMC_IBM,
180 .oprofile_cpu_type = "ppc64/rs64",
181 .oprofile_type = PPC_OPROFILE_RS64,
182 .machine_check = machine_check_generic,
183 .platform = "rs64",
184 },
185 { /* S-star */
186 .pvr_mask = 0xffff0000,
187 .pvr_value = 0x00370000,
188 .cpu_name = "RS64-IV (sstar)",
189 .cpu_features = CPU_FTRS_RS64,
190 .cpu_user_features = COMMON_USER_PPC64,
191 .mmu_features = MMU_FTR_HPTE_TABLE,
192 .icache_bsize = 128,
193 .dcache_bsize = 128,
194 .num_pmcs = 8,
195 .pmc_type = PPC_PMC_IBM,
196 .oprofile_cpu_type = "ppc64/rs64",
197 .oprofile_type = PPC_OPROFILE_RS64,
198 .machine_check = machine_check_generic,
199 .platform = "rs64",
200 },
201 { /* Power4 */
202 .pvr_mask = 0xffff0000,
203 .pvr_value = 0x00350000,
204 .cpu_name = "POWER4 (gp)",
205 .cpu_features = CPU_FTRS_POWER4,
206 .cpu_user_features = COMMON_USER_POWER4,
207 .mmu_features = MMU_FTR_HPTE_TABLE,
208 .icache_bsize = 128,
209 .dcache_bsize = 128,
210 .num_pmcs = 8,
211 .pmc_type = PPC_PMC_IBM,
212 .oprofile_cpu_type = "ppc64/power4",
213 .oprofile_type = PPC_OPROFILE_POWER4,
214 .machine_check = machine_check_generic,
215 .platform = "power4",
216 },
217 { /* Power4+ */
218 .pvr_mask = 0xffff0000,
219 .pvr_value = 0x00380000,
220 .cpu_name = "POWER4+ (gq)",
221 .cpu_features = CPU_FTRS_POWER4,
222 .cpu_user_features = COMMON_USER_POWER4,
223 .mmu_features = MMU_FTR_HPTE_TABLE,
224 .icache_bsize = 128,
225 .dcache_bsize = 128,
226 .num_pmcs = 8,
227 .pmc_type = PPC_PMC_IBM,
228 .oprofile_cpu_type = "ppc64/power4",
229 .oprofile_type = PPC_OPROFILE_POWER4,
230 .machine_check = machine_check_generic,
231 .platform = "power4",
232 },
233 { /* PPC970 */
234 .pvr_mask = 0xffff0000,
235 .pvr_value = 0x00390000,
236 .cpu_name = "PPC970",
237 .cpu_features = CPU_FTRS_PPC970,
238 .cpu_user_features = COMMON_USER_POWER4 |
239 PPC_FEATURE_HAS_ALTIVEC_COMP,
240 .mmu_features = MMU_FTR_HPTE_TABLE,
241 .icache_bsize = 128,
242 .dcache_bsize = 128,
243 .num_pmcs = 8,
244 .pmc_type = PPC_PMC_IBM,
245 .cpu_setup = __setup_cpu_ppc970,
246 .cpu_restore = __restore_cpu_ppc970,
247 .oprofile_cpu_type = "ppc64/970",
248 .oprofile_type = PPC_OPROFILE_POWER4,
249 .machine_check = machine_check_generic,
250 .platform = "ppc970",
251 },
252 { /* PPC970FX */
253 .pvr_mask = 0xffff0000,
254 .pvr_value = 0x003c0000,
255 .cpu_name = "PPC970FX",
256 .cpu_features = CPU_FTRS_PPC970,
257 .cpu_user_features = COMMON_USER_POWER4 |
258 PPC_FEATURE_HAS_ALTIVEC_COMP,
259 .mmu_features = MMU_FTR_HPTE_TABLE,
260 .icache_bsize = 128,
261 .dcache_bsize = 128,
262 .num_pmcs = 8,
263 .pmc_type = PPC_PMC_IBM,
264 .cpu_setup = __setup_cpu_ppc970,
265 .cpu_restore = __restore_cpu_ppc970,
266 .oprofile_cpu_type = "ppc64/970",
267 .oprofile_type = PPC_OPROFILE_POWER4,
268 .machine_check = machine_check_generic,
269 .platform = "ppc970",
270 },
271 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
272 .pvr_mask = 0xffffffff,
273 .pvr_value = 0x00440100,
274 .cpu_name = "PPC970MP",
275 .cpu_features = CPU_FTRS_PPC970,
276 .cpu_user_features = COMMON_USER_POWER4 |
277 PPC_FEATURE_HAS_ALTIVEC_COMP,
278 .mmu_features = MMU_FTR_HPTE_TABLE,
279 .icache_bsize = 128,
280 .dcache_bsize = 128,
281 .num_pmcs = 8,
282 .pmc_type = PPC_PMC_IBM,
283 .cpu_setup = __setup_cpu_ppc970,
284 .cpu_restore = __restore_cpu_ppc970,
285 .oprofile_cpu_type = "ppc64/970MP",
286 .oprofile_type = PPC_OPROFILE_POWER4,
287 .machine_check = machine_check_generic,
288 .platform = "ppc970",
289 },
290 { /* PPC970MP */
291 .pvr_mask = 0xffff0000,
292 .pvr_value = 0x00440000,
293 .cpu_name = "PPC970MP",
294 .cpu_features = CPU_FTRS_PPC970,
295 .cpu_user_features = COMMON_USER_POWER4 |
296 PPC_FEATURE_HAS_ALTIVEC_COMP,
297 .mmu_features = MMU_FTR_HPTE_TABLE,
298 .icache_bsize = 128,
299 .dcache_bsize = 128,
300 .num_pmcs = 8,
301 .pmc_type = PPC_PMC_IBM,
302 .cpu_setup = __setup_cpu_ppc970MP,
303 .cpu_restore = __restore_cpu_ppc970,
304 .oprofile_cpu_type = "ppc64/970MP",
305 .oprofile_type = PPC_OPROFILE_POWER4,
306 .machine_check = machine_check_generic,
307 .platform = "ppc970",
308 },
309 { /* PPC970GX */
310 .pvr_mask = 0xffff0000,
311 .pvr_value = 0x00450000,
312 .cpu_name = "PPC970GX",
313 .cpu_features = CPU_FTRS_PPC970,
314 .cpu_user_features = COMMON_USER_POWER4 |
315 PPC_FEATURE_HAS_ALTIVEC_COMP,
316 .mmu_features = MMU_FTR_HPTE_TABLE,
317 .icache_bsize = 128,
318 .dcache_bsize = 128,
319 .num_pmcs = 8,
320 .pmc_type = PPC_PMC_IBM,
321 .cpu_setup = __setup_cpu_ppc970,
322 .oprofile_cpu_type = "ppc64/970",
323 .oprofile_type = PPC_OPROFILE_POWER4,
324 .machine_check = machine_check_generic,
325 .platform = "ppc970",
326 },
327 { /* Power5 GR */
328 .pvr_mask = 0xffff0000,
329 .pvr_value = 0x003a0000,
330 .cpu_name = "POWER5 (gr)",
331 .cpu_features = CPU_FTRS_POWER5,
332 .cpu_user_features = COMMON_USER_POWER5,
333 .mmu_features = MMU_FTR_HPTE_TABLE,
334 .icache_bsize = 128,
335 .dcache_bsize = 128,
336 .num_pmcs = 6,
337 .pmc_type = PPC_PMC_IBM,
338 .oprofile_cpu_type = "ppc64/power5",
339 .oprofile_type = PPC_OPROFILE_POWER4,
340 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
341 * and above but only works on POWER5 and above
342 */
343 .oprofile_mmcra_sihv = MMCRA_SIHV,
344 .oprofile_mmcra_sipr = MMCRA_SIPR,
345 .machine_check = machine_check_generic,
346 .platform = "power5",
347 },
348 { /* Power5++ */
349 .pvr_mask = 0xffffff00,
350 .pvr_value = 0x003b0300,
351 .cpu_name = "POWER5+ (gs)",
352 .cpu_features = CPU_FTRS_POWER5,
353 .cpu_user_features = COMMON_USER_POWER5_PLUS,
354 .mmu_features = MMU_FTR_HPTE_TABLE,
355 .icache_bsize = 128,
356 .dcache_bsize = 128,
357 .num_pmcs = 6,
358 .oprofile_cpu_type = "ppc64/power5++",
359 .oprofile_type = PPC_OPROFILE_POWER4,
360 .oprofile_mmcra_sihv = MMCRA_SIHV,
361 .oprofile_mmcra_sipr = MMCRA_SIPR,
362 .machine_check = machine_check_generic,
363 .platform = "power5+",
364 },
365 { /* Power5 GS */
366 .pvr_mask = 0xffff0000,
367 .pvr_value = 0x003b0000,
368 .cpu_name = "POWER5+ (gs)",
369 .cpu_features = CPU_FTRS_POWER5,
370 .cpu_user_features = COMMON_USER_POWER5_PLUS,
371 .mmu_features = MMU_FTR_HPTE_TABLE,
372 .icache_bsize = 128,
373 .dcache_bsize = 128,
374 .num_pmcs = 6,
375 .pmc_type = PPC_PMC_IBM,
376 .oprofile_cpu_type = "ppc64/power5+",
377 .oprofile_type = PPC_OPROFILE_POWER4,
378 .oprofile_mmcra_sihv = MMCRA_SIHV,
379 .oprofile_mmcra_sipr = MMCRA_SIPR,
380 .machine_check = machine_check_generic,
381 .platform = "power5+",
382 },
383 { /* POWER6 in P5+ mode; 2.04-compliant processor */
384 .pvr_mask = 0xffffffff,
385 .pvr_value = 0x0f000001,
386 .cpu_name = "POWER5+",
387 .cpu_features = CPU_FTRS_POWER5,
388 .cpu_user_features = COMMON_USER_POWER5_PLUS,
389 .mmu_features = MMU_FTR_HPTE_TABLE,
390 .icache_bsize = 128,
391 .dcache_bsize = 128,
392 .machine_check = machine_check_generic,
393 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
394 .oprofile_type = PPC_OPROFILE_POWER4,
395 .platform = "power5+",
396 },
397 { /* Power6 */
398 .pvr_mask = 0xffff0000,
399 .pvr_value = 0x003e0000,
400 .cpu_name = "POWER6 (raw)",
401 .cpu_features = CPU_FTRS_POWER6,
402 .cpu_user_features = COMMON_USER_POWER6 |
403 PPC_FEATURE_POWER6_EXT,
404 .mmu_features = MMU_FTR_HPTE_TABLE,
405 .icache_bsize = 128,
406 .dcache_bsize = 128,
407 .num_pmcs = 6,
408 .pmc_type = PPC_PMC_IBM,
409 .oprofile_cpu_type = "ppc64/power6",
410 .oprofile_type = PPC_OPROFILE_POWER4,
411 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
412 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
413 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
414 POWER6_MMCRA_OTHER,
415 .machine_check = machine_check_generic,
416 .platform = "power6x",
417 },
418 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
419 .pvr_mask = 0xffffffff,
420 .pvr_value = 0x0f000002,
421 .cpu_name = "POWER6 (architected)",
422 .cpu_features = CPU_FTRS_POWER6,
423 .cpu_user_features = COMMON_USER_POWER6,
424 .mmu_features = MMU_FTR_HPTE_TABLE,
425 .icache_bsize = 128,
426 .dcache_bsize = 128,
427 .machine_check = machine_check_generic,
428 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
429 .oprofile_type = PPC_OPROFILE_POWER4,
430 .platform = "power6",
431 },
432 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
433 .pvr_mask = 0xffffffff,
434 .pvr_value = 0x0f000003,
435 .cpu_name = "POWER7 (architected)",
436 .cpu_features = CPU_FTRS_POWER7,
437 .cpu_user_features = COMMON_USER_POWER7,
438 .mmu_features = MMU_FTR_HPTE_TABLE |
439 MMU_FTR_TLBIE_206,
440 .icache_bsize = 128,
441 .dcache_bsize = 128,
442 .machine_check = machine_check_generic,
443 .oprofile_type = PPC_OPROFILE_POWER4,
444 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
445 .platform = "power7",
446 },
447 { /* Power7 */
448 .pvr_mask = 0xffff0000,
449 .pvr_value = 0x003f0000,
450 .cpu_name = "POWER7 (raw)",
451 .cpu_features = CPU_FTRS_POWER7,
452 .cpu_user_features = COMMON_USER_POWER7,
453 .mmu_features = MMU_FTR_HPTE_TABLE |
454 MMU_FTR_TLBIE_206,
455 .icache_bsize = 128,
456 .dcache_bsize = 128,
457 .num_pmcs = 6,
458 .pmc_type = PPC_PMC_IBM,
459 .cpu_setup = __setup_cpu_power7,
460 .cpu_restore = __restore_cpu_power7,
461 .oprofile_cpu_type = "ppc64/power7",
462 .oprofile_type = PPC_OPROFILE_POWER4,
463 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
464 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
465 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
466 POWER6_MMCRA_OTHER,
467 .platform = "power7",
468 },
469 { /* Cell Broadband Engine */
470 .pvr_mask = 0xffff0000,
471 .pvr_value = 0x00700000,
472 .cpu_name = "Cell Broadband Engine",
473 .cpu_features = CPU_FTRS_CELL,
474 .cpu_user_features = COMMON_USER_PPC64 |
475 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
476 PPC_FEATURE_SMT,
477 .mmu_features = MMU_FTR_HPTE_TABLE,
478 .icache_bsize = 128,
479 .dcache_bsize = 128,
480 .num_pmcs = 4,
481 .pmc_type = PPC_PMC_IBM,
482 .oprofile_cpu_type = "ppc64/cell-be",
483 .oprofile_type = PPC_OPROFILE_CELL,
484 .machine_check = machine_check_generic,
485 .platform = "ppc-cell-be",
486 },
487 { /* PA Semi PA6T */
488 .pvr_mask = 0x7fff0000,
489 .pvr_value = 0x00900000,
490 .cpu_name = "PA6T",
491 .cpu_features = CPU_FTRS_PA6T,
492 .cpu_user_features = COMMON_USER_PA6T,
493 .mmu_features = MMU_FTR_HPTE_TABLE,
494 .icache_bsize = 64,
495 .dcache_bsize = 64,
496 .num_pmcs = 6,
497 .pmc_type = PPC_PMC_PA6T,
498 .cpu_setup = __setup_cpu_pa6t,
499 .cpu_restore = __restore_cpu_pa6t,
500 .oprofile_cpu_type = "ppc64/pa6t",
501 .oprofile_type = PPC_OPROFILE_PA6T,
502 .machine_check = machine_check_generic,
503 .platform = "pa6t",
504 },
505 { /* default match */
506 .pvr_mask = 0x00000000,
507 .pvr_value = 0x00000000,
508 .cpu_name = "POWER4 (compatible)",
509 .cpu_features = CPU_FTRS_COMPATIBLE,
510 .cpu_user_features = COMMON_USER_PPC64,
511 .mmu_features = MMU_FTR_HPTE_TABLE,
512 .icache_bsize = 128,
513 .dcache_bsize = 128,
514 .num_pmcs = 6,
515 .pmc_type = PPC_PMC_IBM,
516 .machine_check = machine_check_generic,
517 .platform = "power4",
518 }
519 #endif /* CONFIG_PPC_BOOK3S_64 */
520
521 #ifdef CONFIG_PPC32
522 #if CLASSIC_PPC
523 { /* 601 */
524 .pvr_mask = 0xffff0000,
525 .pvr_value = 0x00010000,
526 .cpu_name = "601",
527 .cpu_features = CPU_FTRS_PPC601,
528 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
529 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
530 .mmu_features = MMU_FTR_HPTE_TABLE,
531 .icache_bsize = 32,
532 .dcache_bsize = 32,
533 .machine_check = machine_check_generic,
534 .platform = "ppc601",
535 },
536 { /* 603 */
537 .pvr_mask = 0xffff0000,
538 .pvr_value = 0x00030000,
539 .cpu_name = "603",
540 .cpu_features = CPU_FTRS_603,
541 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
542 .mmu_features = 0,
543 .icache_bsize = 32,
544 .dcache_bsize = 32,
545 .cpu_setup = __setup_cpu_603,
546 .machine_check = machine_check_generic,
547 .platform = "ppc603",
548 },
549 { /* 603e */
550 .pvr_mask = 0xffff0000,
551 .pvr_value = 0x00060000,
552 .cpu_name = "603e",
553 .cpu_features = CPU_FTRS_603,
554 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
555 .mmu_features = 0,
556 .icache_bsize = 32,
557 .dcache_bsize = 32,
558 .cpu_setup = __setup_cpu_603,
559 .machine_check = machine_check_generic,
560 .platform = "ppc603",
561 },
562 { /* 603ev */
563 .pvr_mask = 0xffff0000,
564 .pvr_value = 0x00070000,
565 .cpu_name = "603ev",
566 .cpu_features = CPU_FTRS_603,
567 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
568 .mmu_features = 0,
569 .icache_bsize = 32,
570 .dcache_bsize = 32,
571 .cpu_setup = __setup_cpu_603,
572 .machine_check = machine_check_generic,
573 .platform = "ppc603",
574 },
575 { /* 604 */
576 .pvr_mask = 0xffff0000,
577 .pvr_value = 0x00040000,
578 .cpu_name = "604",
579 .cpu_features = CPU_FTRS_604,
580 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
581 .mmu_features = MMU_FTR_HPTE_TABLE,
582 .icache_bsize = 32,
583 .dcache_bsize = 32,
584 .num_pmcs = 2,
585 .cpu_setup = __setup_cpu_604,
586 .machine_check = machine_check_generic,
587 .platform = "ppc604",
588 },
589 { /* 604e */
590 .pvr_mask = 0xfffff000,
591 .pvr_value = 0x00090000,
592 .cpu_name = "604e",
593 .cpu_features = CPU_FTRS_604,
594 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
595 .mmu_features = MMU_FTR_HPTE_TABLE,
596 .icache_bsize = 32,
597 .dcache_bsize = 32,
598 .num_pmcs = 4,
599 .cpu_setup = __setup_cpu_604,
600 .machine_check = machine_check_generic,
601 .platform = "ppc604",
602 },
603 { /* 604r */
604 .pvr_mask = 0xffff0000,
605 .pvr_value = 0x00090000,
606 .cpu_name = "604r",
607 .cpu_features = CPU_FTRS_604,
608 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
609 .mmu_features = MMU_FTR_HPTE_TABLE,
610 .icache_bsize = 32,
611 .dcache_bsize = 32,
612 .num_pmcs = 4,
613 .cpu_setup = __setup_cpu_604,
614 .machine_check = machine_check_generic,
615 .platform = "ppc604",
616 },
617 { /* 604ev */
618 .pvr_mask = 0xffff0000,
619 .pvr_value = 0x000a0000,
620 .cpu_name = "604ev",
621 .cpu_features = CPU_FTRS_604,
622 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
623 .mmu_features = MMU_FTR_HPTE_TABLE,
624 .icache_bsize = 32,
625 .dcache_bsize = 32,
626 .num_pmcs = 4,
627 .cpu_setup = __setup_cpu_604,
628 .machine_check = machine_check_generic,
629 .platform = "ppc604",
630 },
631 { /* 740/750 (0x4202, don't support TAU ?) */
632 .pvr_mask = 0xffffffff,
633 .pvr_value = 0x00084202,
634 .cpu_name = "740/750",
635 .cpu_features = CPU_FTRS_740_NOTAU,
636 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
637 .mmu_features = MMU_FTR_HPTE_TABLE,
638 .icache_bsize = 32,
639 .dcache_bsize = 32,
640 .num_pmcs = 4,
641 .cpu_setup = __setup_cpu_750,
642 .machine_check = machine_check_generic,
643 .platform = "ppc750",
644 },
645 { /* 750CX (80100 and 8010x?) */
646 .pvr_mask = 0xfffffff0,
647 .pvr_value = 0x00080100,
648 .cpu_name = "750CX",
649 .cpu_features = CPU_FTRS_750,
650 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
651 .mmu_features = MMU_FTR_HPTE_TABLE,
652 .icache_bsize = 32,
653 .dcache_bsize = 32,
654 .num_pmcs = 4,
655 .cpu_setup = __setup_cpu_750cx,
656 .machine_check = machine_check_generic,
657 .platform = "ppc750",
658 },
659 { /* 750CX (82201 and 82202) */
660 .pvr_mask = 0xfffffff0,
661 .pvr_value = 0x00082200,
662 .cpu_name = "750CX",
663 .cpu_features = CPU_FTRS_750,
664 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
665 .mmu_features = MMU_FTR_HPTE_TABLE,
666 .icache_bsize = 32,
667 .dcache_bsize = 32,
668 .num_pmcs = 4,
669 .pmc_type = PPC_PMC_IBM,
670 .cpu_setup = __setup_cpu_750cx,
671 .machine_check = machine_check_generic,
672 .platform = "ppc750",
673 },
674 { /* 750CXe (82214) */
675 .pvr_mask = 0xfffffff0,
676 .pvr_value = 0x00082210,
677 .cpu_name = "750CXe",
678 .cpu_features = CPU_FTRS_750,
679 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
680 .mmu_features = MMU_FTR_HPTE_TABLE,
681 .icache_bsize = 32,
682 .dcache_bsize = 32,
683 .num_pmcs = 4,
684 .pmc_type = PPC_PMC_IBM,
685 .cpu_setup = __setup_cpu_750cx,
686 .machine_check = machine_check_generic,
687 .platform = "ppc750",
688 },
689 { /* 750CXe "Gekko" (83214) */
690 .pvr_mask = 0xffffffff,
691 .pvr_value = 0x00083214,
692 .cpu_name = "750CXe",
693 .cpu_features = CPU_FTRS_750,
694 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
695 .mmu_features = MMU_FTR_HPTE_TABLE,
696 .icache_bsize = 32,
697 .dcache_bsize = 32,
698 .num_pmcs = 4,
699 .pmc_type = PPC_PMC_IBM,
700 .cpu_setup = __setup_cpu_750cx,
701 .machine_check = machine_check_generic,
702 .platform = "ppc750",
703 },
704 { /* 750CL (and "Broadway") */
705 .pvr_mask = 0xfffff0e0,
706 .pvr_value = 0x00087000,
707 .cpu_name = "750CL",
708 .cpu_features = CPU_FTRS_750CL,
709 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
710 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
711 .icache_bsize = 32,
712 .dcache_bsize = 32,
713 .num_pmcs = 4,
714 .pmc_type = PPC_PMC_IBM,
715 .cpu_setup = __setup_cpu_750,
716 .machine_check = machine_check_generic,
717 .platform = "ppc750",
718 .oprofile_cpu_type = "ppc/750",
719 .oprofile_type = PPC_OPROFILE_G4,
720 },
721 { /* 745/755 */
722 .pvr_mask = 0xfffff000,
723 .pvr_value = 0x00083000,
724 .cpu_name = "745/755",
725 .cpu_features = CPU_FTRS_750,
726 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
727 .mmu_features = MMU_FTR_HPTE_TABLE,
728 .icache_bsize = 32,
729 .dcache_bsize = 32,
730 .num_pmcs = 4,
731 .pmc_type = PPC_PMC_IBM,
732 .cpu_setup = __setup_cpu_750,
733 .machine_check = machine_check_generic,
734 .platform = "ppc750",
735 },
736 { /* 750FX rev 1.x */
737 .pvr_mask = 0xffffff00,
738 .pvr_value = 0x70000100,
739 .cpu_name = "750FX",
740 .cpu_features = CPU_FTRS_750FX1,
741 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
742 .mmu_features = MMU_FTR_HPTE_TABLE,
743 .icache_bsize = 32,
744 .dcache_bsize = 32,
745 .num_pmcs = 4,
746 .pmc_type = PPC_PMC_IBM,
747 .cpu_setup = __setup_cpu_750,
748 .machine_check = machine_check_generic,
749 .platform = "ppc750",
750 .oprofile_cpu_type = "ppc/750",
751 .oprofile_type = PPC_OPROFILE_G4,
752 },
753 { /* 750FX rev 2.0 must disable HID0[DPM] */
754 .pvr_mask = 0xffffffff,
755 .pvr_value = 0x70000200,
756 .cpu_name = "750FX",
757 .cpu_features = CPU_FTRS_750FX2,
758 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
759 .mmu_features = MMU_FTR_HPTE_TABLE,
760 .icache_bsize = 32,
761 .dcache_bsize = 32,
762 .num_pmcs = 4,
763 .pmc_type = PPC_PMC_IBM,
764 .cpu_setup = __setup_cpu_750,
765 .machine_check = machine_check_generic,
766 .platform = "ppc750",
767 .oprofile_cpu_type = "ppc/750",
768 .oprofile_type = PPC_OPROFILE_G4,
769 },
770 { /* 750FX (All revs except 2.0) */
771 .pvr_mask = 0xffff0000,
772 .pvr_value = 0x70000000,
773 .cpu_name = "750FX",
774 .cpu_features = CPU_FTRS_750FX,
775 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
776 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
777 .icache_bsize = 32,
778 .dcache_bsize = 32,
779 .num_pmcs = 4,
780 .pmc_type = PPC_PMC_IBM,
781 .cpu_setup = __setup_cpu_750fx,
782 .machine_check = machine_check_generic,
783 .platform = "ppc750",
784 .oprofile_cpu_type = "ppc/750",
785 .oprofile_type = PPC_OPROFILE_G4,
786 },
787 { /* 750GX */
788 .pvr_mask = 0xffff0000,
789 .pvr_value = 0x70020000,
790 .cpu_name = "750GX",
791 .cpu_features = CPU_FTRS_750GX,
792 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
793 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
794 .icache_bsize = 32,
795 .dcache_bsize = 32,
796 .num_pmcs = 4,
797 .pmc_type = PPC_PMC_IBM,
798 .cpu_setup = __setup_cpu_750fx,
799 .machine_check = machine_check_generic,
800 .platform = "ppc750",
801 .oprofile_cpu_type = "ppc/750",
802 .oprofile_type = PPC_OPROFILE_G4,
803 },
804 { /* 740/750 (L2CR bit need fixup for 740) */
805 .pvr_mask = 0xffff0000,
806 .pvr_value = 0x00080000,
807 .cpu_name = "740/750",
808 .cpu_features = CPU_FTRS_740,
809 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
810 .mmu_features = MMU_FTR_HPTE_TABLE,
811 .icache_bsize = 32,
812 .dcache_bsize = 32,
813 .num_pmcs = 4,
814 .pmc_type = PPC_PMC_IBM,
815 .cpu_setup = __setup_cpu_750,
816 .machine_check = machine_check_generic,
817 .platform = "ppc750",
818 },
819 { /* 7400 rev 1.1 ? (no TAU) */
820 .pvr_mask = 0xffffffff,
821 .pvr_value = 0x000c1101,
822 .cpu_name = "7400 (1.1)",
823 .cpu_features = CPU_FTRS_7400_NOTAU,
824 .cpu_user_features = COMMON_USER |
825 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
826 .mmu_features = MMU_FTR_HPTE_TABLE,
827 .icache_bsize = 32,
828 .dcache_bsize = 32,
829 .num_pmcs = 4,
830 .pmc_type = PPC_PMC_G4,
831 .cpu_setup = __setup_cpu_7400,
832 .machine_check = machine_check_generic,
833 .platform = "ppc7400",
834 },
835 { /* 7400 */
836 .pvr_mask = 0xffff0000,
837 .pvr_value = 0x000c0000,
838 .cpu_name = "7400",
839 .cpu_features = CPU_FTRS_7400,
840 .cpu_user_features = COMMON_USER |
841 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
842 .mmu_features = MMU_FTR_HPTE_TABLE,
843 .icache_bsize = 32,
844 .dcache_bsize = 32,
845 .num_pmcs = 4,
846 .pmc_type = PPC_PMC_G4,
847 .cpu_setup = __setup_cpu_7400,
848 .machine_check = machine_check_generic,
849 .platform = "ppc7400",
850 },
851 { /* 7410 */
852 .pvr_mask = 0xffff0000,
853 .pvr_value = 0x800c0000,
854 .cpu_name = "7410",
855 .cpu_features = CPU_FTRS_7400,
856 .cpu_user_features = COMMON_USER |
857 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
858 .mmu_features = MMU_FTR_HPTE_TABLE,
859 .icache_bsize = 32,
860 .dcache_bsize = 32,
861 .num_pmcs = 4,
862 .pmc_type = PPC_PMC_G4,
863 .cpu_setup = __setup_cpu_7410,
864 .machine_check = machine_check_generic,
865 .platform = "ppc7400",
866 },
867 { /* 7450 2.0 - no doze/nap */
868 .pvr_mask = 0xffffffff,
869 .pvr_value = 0x80000200,
870 .cpu_name = "7450",
871 .cpu_features = CPU_FTRS_7450_20,
872 .cpu_user_features = COMMON_USER |
873 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
874 .mmu_features = MMU_FTR_HPTE_TABLE,
875 .icache_bsize = 32,
876 .dcache_bsize = 32,
877 .num_pmcs = 6,
878 .pmc_type = PPC_PMC_G4,
879 .cpu_setup = __setup_cpu_745x,
880 .oprofile_cpu_type = "ppc/7450",
881 .oprofile_type = PPC_OPROFILE_G4,
882 .machine_check = machine_check_generic,
883 .platform = "ppc7450",
884 },
885 { /* 7450 2.1 */
886 .pvr_mask = 0xffffffff,
887 .pvr_value = 0x80000201,
888 .cpu_name = "7450",
889 .cpu_features = CPU_FTRS_7450_21,
890 .cpu_user_features = COMMON_USER |
891 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
892 .mmu_features = MMU_FTR_HPTE_TABLE,
893 .icache_bsize = 32,
894 .dcache_bsize = 32,
895 .num_pmcs = 6,
896 .pmc_type = PPC_PMC_G4,
897 .cpu_setup = __setup_cpu_745x,
898 .oprofile_cpu_type = "ppc/7450",
899 .oprofile_type = PPC_OPROFILE_G4,
900 .machine_check = machine_check_generic,
901 .platform = "ppc7450",
902 },
903 { /* 7450 2.3 and newer */
904 .pvr_mask = 0xffff0000,
905 .pvr_value = 0x80000000,
906 .cpu_name = "7450",
907 .cpu_features = CPU_FTRS_7450_23,
908 .cpu_user_features = COMMON_USER |
909 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
910 .mmu_features = MMU_FTR_HPTE_TABLE,
911 .icache_bsize = 32,
912 .dcache_bsize = 32,
913 .num_pmcs = 6,
914 .pmc_type = PPC_PMC_G4,
915 .cpu_setup = __setup_cpu_745x,
916 .oprofile_cpu_type = "ppc/7450",
917 .oprofile_type = PPC_OPROFILE_G4,
918 .machine_check = machine_check_generic,
919 .platform = "ppc7450",
920 },
921 { /* 7455 rev 1.x */
922 .pvr_mask = 0xffffff00,
923 .pvr_value = 0x80010100,
924 .cpu_name = "7455",
925 .cpu_features = CPU_FTRS_7455_1,
926 .cpu_user_features = COMMON_USER |
927 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
928 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
929 .icache_bsize = 32,
930 .dcache_bsize = 32,
931 .num_pmcs = 6,
932 .pmc_type = PPC_PMC_G4,
933 .cpu_setup = __setup_cpu_745x,
934 .oprofile_cpu_type = "ppc/7450",
935 .oprofile_type = PPC_OPROFILE_G4,
936 .machine_check = machine_check_generic,
937 .platform = "ppc7450",
938 },
939 { /* 7455 rev 2.0 */
940 .pvr_mask = 0xffffffff,
941 .pvr_value = 0x80010200,
942 .cpu_name = "7455",
943 .cpu_features = CPU_FTRS_7455_20,
944 .cpu_user_features = COMMON_USER |
945 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
946 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
947 .icache_bsize = 32,
948 .dcache_bsize = 32,
949 .num_pmcs = 6,
950 .pmc_type = PPC_PMC_G4,
951 .cpu_setup = __setup_cpu_745x,
952 .oprofile_cpu_type = "ppc/7450",
953 .oprofile_type = PPC_OPROFILE_G4,
954 .machine_check = machine_check_generic,
955 .platform = "ppc7450",
956 },
957 { /* 7455 others */
958 .pvr_mask = 0xffff0000,
959 .pvr_value = 0x80010000,
960 .cpu_name = "7455",
961 .cpu_features = CPU_FTRS_7455,
962 .cpu_user_features = COMMON_USER |
963 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
964 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
965 .icache_bsize = 32,
966 .dcache_bsize = 32,
967 .num_pmcs = 6,
968 .pmc_type = PPC_PMC_G4,
969 .cpu_setup = __setup_cpu_745x,
970 .oprofile_cpu_type = "ppc/7450",
971 .oprofile_type = PPC_OPROFILE_G4,
972 .machine_check = machine_check_generic,
973 .platform = "ppc7450",
974 },
975 { /* 7447/7457 Rev 1.0 */
976 .pvr_mask = 0xffffffff,
977 .pvr_value = 0x80020100,
978 .cpu_name = "7447/7457",
979 .cpu_features = CPU_FTRS_7447_10,
980 .cpu_user_features = COMMON_USER |
981 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
982 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
983 .icache_bsize = 32,
984 .dcache_bsize = 32,
985 .num_pmcs = 6,
986 .pmc_type = PPC_PMC_G4,
987 .cpu_setup = __setup_cpu_745x,
988 .oprofile_cpu_type = "ppc/7450",
989 .oprofile_type = PPC_OPROFILE_G4,
990 .machine_check = machine_check_generic,
991 .platform = "ppc7450",
992 },
993 { /* 7447/7457 Rev 1.1 */
994 .pvr_mask = 0xffffffff,
995 .pvr_value = 0x80020101,
996 .cpu_name = "7447/7457",
997 .cpu_features = CPU_FTRS_7447_10,
998 .cpu_user_features = COMMON_USER |
999 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1000 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1001 .icache_bsize = 32,
1002 .dcache_bsize = 32,
1003 .num_pmcs = 6,
1004 .pmc_type = PPC_PMC_G4,
1005 .cpu_setup = __setup_cpu_745x,
1006 .oprofile_cpu_type = "ppc/7450",
1007 .oprofile_type = PPC_OPROFILE_G4,
1008 .machine_check = machine_check_generic,
1009 .platform = "ppc7450",
1010 },
1011 { /* 7447/7457 Rev 1.2 and later */
1012 .pvr_mask = 0xffff0000,
1013 .pvr_value = 0x80020000,
1014 .cpu_name = "7447/7457",
1015 .cpu_features = CPU_FTRS_7447,
1016 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1017 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1018 .icache_bsize = 32,
1019 .dcache_bsize = 32,
1020 .num_pmcs = 6,
1021 .pmc_type = PPC_PMC_G4,
1022 .cpu_setup = __setup_cpu_745x,
1023 .oprofile_cpu_type = "ppc/7450",
1024 .oprofile_type = PPC_OPROFILE_G4,
1025 .machine_check = machine_check_generic,
1026 .platform = "ppc7450",
1027 },
1028 { /* 7447A */
1029 .pvr_mask = 0xffff0000,
1030 .pvr_value = 0x80030000,
1031 .cpu_name = "7447A",
1032 .cpu_features = CPU_FTRS_7447A,
1033 .cpu_user_features = COMMON_USER |
1034 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1035 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1036 .icache_bsize = 32,
1037 .dcache_bsize = 32,
1038 .num_pmcs = 6,
1039 .pmc_type = PPC_PMC_G4,
1040 .cpu_setup = __setup_cpu_745x,
1041 .oprofile_cpu_type = "ppc/7450",
1042 .oprofile_type = PPC_OPROFILE_G4,
1043 .machine_check = machine_check_generic,
1044 .platform = "ppc7450",
1045 },
1046 { /* 7448 */
1047 .pvr_mask = 0xffff0000,
1048 .pvr_value = 0x80040000,
1049 .cpu_name = "7448",
1050 .cpu_features = CPU_FTRS_7448,
1051 .cpu_user_features = COMMON_USER |
1052 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1053 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1054 .icache_bsize = 32,
1055 .dcache_bsize = 32,
1056 .num_pmcs = 6,
1057 .pmc_type = PPC_PMC_G4,
1058 .cpu_setup = __setup_cpu_745x,
1059 .oprofile_cpu_type = "ppc/7450",
1060 .oprofile_type = PPC_OPROFILE_G4,
1061 .machine_check = machine_check_generic,
1062 .platform = "ppc7450",
1063 },
1064 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1065 .pvr_mask = 0x7fff0000,
1066 .pvr_value = 0x00810000,
1067 .cpu_name = "82xx",
1068 .cpu_features = CPU_FTRS_82XX,
1069 .cpu_user_features = COMMON_USER,
1070 .mmu_features = 0,
1071 .icache_bsize = 32,
1072 .dcache_bsize = 32,
1073 .cpu_setup = __setup_cpu_603,
1074 .machine_check = machine_check_generic,
1075 .platform = "ppc603",
1076 },
1077 { /* All G2_LE (603e core, plus some) have the same pvr */
1078 .pvr_mask = 0x7fff0000,
1079 .pvr_value = 0x00820000,
1080 .cpu_name = "G2_LE",
1081 .cpu_features = CPU_FTRS_G2_LE,
1082 .cpu_user_features = COMMON_USER,
1083 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1084 .icache_bsize = 32,
1085 .dcache_bsize = 32,
1086 .cpu_setup = __setup_cpu_603,
1087 .machine_check = machine_check_generic,
1088 .platform = "ppc603",
1089 },
1090 { /* e300c1 (a 603e core, plus some) on 83xx */
1091 .pvr_mask = 0x7fff0000,
1092 .pvr_value = 0x00830000,
1093 .cpu_name = "e300c1",
1094 .cpu_features = CPU_FTRS_E300,
1095 .cpu_user_features = COMMON_USER,
1096 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1097 .icache_bsize = 32,
1098 .dcache_bsize = 32,
1099 .cpu_setup = __setup_cpu_603,
1100 .machine_check = machine_check_generic,
1101 .platform = "ppc603",
1102 },
1103 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1104 .pvr_mask = 0x7fff0000,
1105 .pvr_value = 0x00840000,
1106 .cpu_name = "e300c2",
1107 .cpu_features = CPU_FTRS_E300C2,
1108 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1109 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1110 MMU_FTR_NEED_DTLB_SW_LRU,
1111 .icache_bsize = 32,
1112 .dcache_bsize = 32,
1113 .cpu_setup = __setup_cpu_603,
1114 .machine_check = machine_check_generic,
1115 .platform = "ppc603",
1116 },
1117 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1118 .pvr_mask = 0x7fff0000,
1119 .pvr_value = 0x00850000,
1120 .cpu_name = "e300c3",
1121 .cpu_features = CPU_FTRS_E300,
1122 .cpu_user_features = COMMON_USER,
1123 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1124 MMU_FTR_NEED_DTLB_SW_LRU,
1125 .icache_bsize = 32,
1126 .dcache_bsize = 32,
1127 .cpu_setup = __setup_cpu_603,
1128 .num_pmcs = 4,
1129 .oprofile_cpu_type = "ppc/e300",
1130 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1131 .platform = "ppc603",
1132 },
1133 { /* e300c4 (e300c1, plus one IU) */
1134 .pvr_mask = 0x7fff0000,
1135 .pvr_value = 0x00860000,
1136 .cpu_name = "e300c4",
1137 .cpu_features = CPU_FTRS_E300,
1138 .cpu_user_features = COMMON_USER,
1139 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1140 MMU_FTR_NEED_DTLB_SW_LRU,
1141 .icache_bsize = 32,
1142 .dcache_bsize = 32,
1143 .cpu_setup = __setup_cpu_603,
1144 .machine_check = machine_check_generic,
1145 .num_pmcs = 4,
1146 .oprofile_cpu_type = "ppc/e300",
1147 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1148 .platform = "ppc603",
1149 },
1150 { /* default match, we assume split I/D cache & TB (non-601)... */
1151 .pvr_mask = 0x00000000,
1152 .pvr_value = 0x00000000,
1153 .cpu_name = "(generic PPC)",
1154 .cpu_features = CPU_FTRS_CLASSIC32,
1155 .cpu_user_features = COMMON_USER,
1156 .mmu_features = MMU_FTR_HPTE_TABLE,
1157 .icache_bsize = 32,
1158 .dcache_bsize = 32,
1159 .machine_check = machine_check_generic,
1160 .platform = "ppc603",
1161 },
1162 #endif /* CLASSIC_PPC */
1163 #ifdef CONFIG_8xx
1164 { /* 8xx */
1165 .pvr_mask = 0xffff0000,
1166 .pvr_value = 0x00500000,
1167 .cpu_name = "8xx",
1168 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1169 * if the 8xx code is there.... */
1170 .cpu_features = CPU_FTRS_8XX,
1171 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1172 .mmu_features = MMU_FTR_TYPE_8xx,
1173 .icache_bsize = 16,
1174 .dcache_bsize = 16,
1175 .platform = "ppc823",
1176 },
1177 #endif /* CONFIG_8xx */
1178 #ifdef CONFIG_40x
1179 { /* 403GC */
1180 .pvr_mask = 0xffffff00,
1181 .pvr_value = 0x00200200,
1182 .cpu_name = "403GC",
1183 .cpu_features = CPU_FTRS_40X,
1184 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1185 .mmu_features = MMU_FTR_TYPE_40x,
1186 .icache_bsize = 16,
1187 .dcache_bsize = 16,
1188 .machine_check = machine_check_4xx,
1189 .platform = "ppc403",
1190 },
1191 { /* 403GCX */
1192 .pvr_mask = 0xffffff00,
1193 .pvr_value = 0x00201400,
1194 .cpu_name = "403GCX",
1195 .cpu_features = CPU_FTRS_40X,
1196 .cpu_user_features = PPC_FEATURE_32 |
1197 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1198 .mmu_features = MMU_FTR_TYPE_40x,
1199 .icache_bsize = 16,
1200 .dcache_bsize = 16,
1201 .machine_check = machine_check_4xx,
1202 .platform = "ppc403",
1203 },
1204 { /* 403G ?? */
1205 .pvr_mask = 0xffff0000,
1206 .pvr_value = 0x00200000,
1207 .cpu_name = "403G ??",
1208 .cpu_features = CPU_FTRS_40X,
1209 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1210 .mmu_features = MMU_FTR_TYPE_40x,
1211 .icache_bsize = 16,
1212 .dcache_bsize = 16,
1213 .machine_check = machine_check_4xx,
1214 .platform = "ppc403",
1215 },
1216 { /* 405GP */
1217 .pvr_mask = 0xffff0000,
1218 .pvr_value = 0x40110000,
1219 .cpu_name = "405GP",
1220 .cpu_features = CPU_FTRS_40X,
1221 .cpu_user_features = PPC_FEATURE_32 |
1222 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1223 .mmu_features = MMU_FTR_TYPE_40x,
1224 .icache_bsize = 32,
1225 .dcache_bsize = 32,
1226 .machine_check = machine_check_4xx,
1227 .platform = "ppc405",
1228 },
1229 { /* STB 03xxx */
1230 .pvr_mask = 0xffff0000,
1231 .pvr_value = 0x40130000,
1232 .cpu_name = "STB03xxx",
1233 .cpu_features = CPU_FTRS_40X,
1234 .cpu_user_features = PPC_FEATURE_32 |
1235 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1236 .mmu_features = MMU_FTR_TYPE_40x,
1237 .icache_bsize = 32,
1238 .dcache_bsize = 32,
1239 .machine_check = machine_check_4xx,
1240 .platform = "ppc405",
1241 },
1242 { /* STB 04xxx */
1243 .pvr_mask = 0xffff0000,
1244 .pvr_value = 0x41810000,
1245 .cpu_name = "STB04xxx",
1246 .cpu_features = CPU_FTRS_40X,
1247 .cpu_user_features = PPC_FEATURE_32 |
1248 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1249 .mmu_features = MMU_FTR_TYPE_40x,
1250 .icache_bsize = 32,
1251 .dcache_bsize = 32,
1252 .machine_check = machine_check_4xx,
1253 .platform = "ppc405",
1254 },
1255 { /* NP405L */
1256 .pvr_mask = 0xffff0000,
1257 .pvr_value = 0x41610000,
1258 .cpu_name = "NP405L",
1259 .cpu_features = CPU_FTRS_40X,
1260 .cpu_user_features = PPC_FEATURE_32 |
1261 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1262 .mmu_features = MMU_FTR_TYPE_40x,
1263 .icache_bsize = 32,
1264 .dcache_bsize = 32,
1265 .machine_check = machine_check_4xx,
1266 .platform = "ppc405",
1267 },
1268 { /* NP4GS3 */
1269 .pvr_mask = 0xffff0000,
1270 .pvr_value = 0x40B10000,
1271 .cpu_name = "NP4GS3",
1272 .cpu_features = CPU_FTRS_40X,
1273 .cpu_user_features = PPC_FEATURE_32 |
1274 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1275 .mmu_features = MMU_FTR_TYPE_40x,
1276 .icache_bsize = 32,
1277 .dcache_bsize = 32,
1278 .machine_check = machine_check_4xx,
1279 .platform = "ppc405",
1280 },
1281 { /* NP405H */
1282 .pvr_mask = 0xffff0000,
1283 .pvr_value = 0x41410000,
1284 .cpu_name = "NP405H",
1285 .cpu_features = CPU_FTRS_40X,
1286 .cpu_user_features = PPC_FEATURE_32 |
1287 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1288 .mmu_features = MMU_FTR_TYPE_40x,
1289 .icache_bsize = 32,
1290 .dcache_bsize = 32,
1291 .machine_check = machine_check_4xx,
1292 .platform = "ppc405",
1293 },
1294 { /* 405GPr */
1295 .pvr_mask = 0xffff0000,
1296 .pvr_value = 0x50910000,
1297 .cpu_name = "405GPr",
1298 .cpu_features = CPU_FTRS_40X,
1299 .cpu_user_features = PPC_FEATURE_32 |
1300 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1301 .mmu_features = MMU_FTR_TYPE_40x,
1302 .icache_bsize = 32,
1303 .dcache_bsize = 32,
1304 .machine_check = machine_check_4xx,
1305 .platform = "ppc405",
1306 },
1307 { /* STBx25xx */
1308 .pvr_mask = 0xffff0000,
1309 .pvr_value = 0x51510000,
1310 .cpu_name = "STBx25xx",
1311 .cpu_features = CPU_FTRS_40X,
1312 .cpu_user_features = PPC_FEATURE_32 |
1313 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1314 .mmu_features = MMU_FTR_TYPE_40x,
1315 .icache_bsize = 32,
1316 .dcache_bsize = 32,
1317 .machine_check = machine_check_4xx,
1318 .platform = "ppc405",
1319 },
1320 { /* 405LP */
1321 .pvr_mask = 0xffff0000,
1322 .pvr_value = 0x41F10000,
1323 .cpu_name = "405LP",
1324 .cpu_features = CPU_FTRS_40X,
1325 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1326 .mmu_features = MMU_FTR_TYPE_40x,
1327 .icache_bsize = 32,
1328 .dcache_bsize = 32,
1329 .machine_check = machine_check_4xx,
1330 .platform = "ppc405",
1331 },
1332 { /* Xilinx Virtex-II Pro */
1333 .pvr_mask = 0xfffff000,
1334 .pvr_value = 0x20010000,
1335 .cpu_name = "Virtex-II Pro",
1336 .cpu_features = CPU_FTRS_40X,
1337 .cpu_user_features = PPC_FEATURE_32 |
1338 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1339 .mmu_features = MMU_FTR_TYPE_40x,
1340 .icache_bsize = 32,
1341 .dcache_bsize = 32,
1342 .machine_check = machine_check_4xx,
1343 .platform = "ppc405",
1344 },
1345 { /* Xilinx Virtex-4 FX */
1346 .pvr_mask = 0xfffff000,
1347 .pvr_value = 0x20011000,
1348 .cpu_name = "Virtex-4 FX",
1349 .cpu_features = CPU_FTRS_40X,
1350 .cpu_user_features = PPC_FEATURE_32 |
1351 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1352 .mmu_features = MMU_FTR_TYPE_40x,
1353 .icache_bsize = 32,
1354 .dcache_bsize = 32,
1355 .machine_check = machine_check_4xx,
1356 .platform = "ppc405",
1357 },
1358 { /* 405EP */
1359 .pvr_mask = 0xffff0000,
1360 .pvr_value = 0x51210000,
1361 .cpu_name = "405EP",
1362 .cpu_features = CPU_FTRS_40X,
1363 .cpu_user_features = PPC_FEATURE_32 |
1364 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1365 .mmu_features = MMU_FTR_TYPE_40x,
1366 .icache_bsize = 32,
1367 .dcache_bsize = 32,
1368 .machine_check = machine_check_4xx,
1369 .platform = "ppc405",
1370 },
1371 { /* 405EX Rev. A/B with Security */
1372 .pvr_mask = 0xffff000f,
1373 .pvr_value = 0x12910007,
1374 .cpu_name = "405EX Rev. A/B",
1375 .cpu_features = CPU_FTRS_40X,
1376 .cpu_user_features = PPC_FEATURE_32 |
1377 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1378 .mmu_features = MMU_FTR_TYPE_40x,
1379 .icache_bsize = 32,
1380 .dcache_bsize = 32,
1381 .machine_check = machine_check_4xx,
1382 .platform = "ppc405",
1383 },
1384 { /* 405EX Rev. C without Security */
1385 .pvr_mask = 0xffff000f,
1386 .pvr_value = 0x1291000d,
1387 .cpu_name = "405EX Rev. C",
1388 .cpu_features = CPU_FTRS_40X,
1389 .cpu_user_features = PPC_FEATURE_32 |
1390 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1391 .mmu_features = MMU_FTR_TYPE_40x,
1392 .icache_bsize = 32,
1393 .dcache_bsize = 32,
1394 .machine_check = machine_check_4xx,
1395 .platform = "ppc405",
1396 },
1397 { /* 405EX Rev. C with Security */
1398 .pvr_mask = 0xffff000f,
1399 .pvr_value = 0x1291000f,
1400 .cpu_name = "405EX Rev. C",
1401 .cpu_features = CPU_FTRS_40X,
1402 .cpu_user_features = PPC_FEATURE_32 |
1403 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1404 .mmu_features = MMU_FTR_TYPE_40x,
1405 .icache_bsize = 32,
1406 .dcache_bsize = 32,
1407 .machine_check = machine_check_4xx,
1408 .platform = "ppc405",
1409 },
1410 { /* 405EX Rev. D without Security */
1411 .pvr_mask = 0xffff000f,
1412 .pvr_value = 0x12910003,
1413 .cpu_name = "405EX Rev. D",
1414 .cpu_features = CPU_FTRS_40X,
1415 .cpu_user_features = PPC_FEATURE_32 |
1416 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1417 .mmu_features = MMU_FTR_TYPE_40x,
1418 .icache_bsize = 32,
1419 .dcache_bsize = 32,
1420 .machine_check = machine_check_4xx,
1421 .platform = "ppc405",
1422 },
1423 { /* 405EX Rev. D with Security */
1424 .pvr_mask = 0xffff000f,
1425 .pvr_value = 0x12910005,
1426 .cpu_name = "405EX Rev. D",
1427 .cpu_features = CPU_FTRS_40X,
1428 .cpu_user_features = PPC_FEATURE_32 |
1429 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1430 .mmu_features = MMU_FTR_TYPE_40x,
1431 .icache_bsize = 32,
1432 .dcache_bsize = 32,
1433 .machine_check = machine_check_4xx,
1434 .platform = "ppc405",
1435 },
1436 { /* 405EXr Rev. A/B without Security */
1437 .pvr_mask = 0xffff000f,
1438 .pvr_value = 0x12910001,
1439 .cpu_name = "405EXr Rev. A/B",
1440 .cpu_features = CPU_FTRS_40X,
1441 .cpu_user_features = PPC_FEATURE_32 |
1442 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1443 .mmu_features = MMU_FTR_TYPE_40x,
1444 .icache_bsize = 32,
1445 .dcache_bsize = 32,
1446 .machine_check = machine_check_4xx,
1447 .platform = "ppc405",
1448 },
1449 { /* 405EXr Rev. C without Security */
1450 .pvr_mask = 0xffff000f,
1451 .pvr_value = 0x12910009,
1452 .cpu_name = "405EXr Rev. C",
1453 .cpu_features = CPU_FTRS_40X,
1454 .cpu_user_features = PPC_FEATURE_32 |
1455 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1456 .mmu_features = MMU_FTR_TYPE_40x,
1457 .icache_bsize = 32,
1458 .dcache_bsize = 32,
1459 .machine_check = machine_check_4xx,
1460 .platform = "ppc405",
1461 },
1462 { /* 405EXr Rev. C with Security */
1463 .pvr_mask = 0xffff000f,
1464 .pvr_value = 0x1291000b,
1465 .cpu_name = "405EXr Rev. C",
1466 .cpu_features = CPU_FTRS_40X,
1467 .cpu_user_features = PPC_FEATURE_32 |
1468 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1469 .mmu_features = MMU_FTR_TYPE_40x,
1470 .icache_bsize = 32,
1471 .dcache_bsize = 32,
1472 .machine_check = machine_check_4xx,
1473 .platform = "ppc405",
1474 },
1475 { /* 405EXr Rev. D without Security */
1476 .pvr_mask = 0xffff000f,
1477 .pvr_value = 0x12910000,
1478 .cpu_name = "405EXr Rev. D",
1479 .cpu_features = CPU_FTRS_40X,
1480 .cpu_user_features = PPC_FEATURE_32 |
1481 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1482 .mmu_features = MMU_FTR_TYPE_40x,
1483 .icache_bsize = 32,
1484 .dcache_bsize = 32,
1485 .machine_check = machine_check_4xx,
1486 .platform = "ppc405",
1487 },
1488 { /* 405EXr Rev. D with Security */
1489 .pvr_mask = 0xffff000f,
1490 .pvr_value = 0x12910002,
1491 .cpu_name = "405EXr Rev. D",
1492 .cpu_features = CPU_FTRS_40X,
1493 .cpu_user_features = PPC_FEATURE_32 |
1494 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1495 .mmu_features = MMU_FTR_TYPE_40x,
1496 .icache_bsize = 32,
1497 .dcache_bsize = 32,
1498 .machine_check = machine_check_4xx,
1499 .platform = "ppc405",
1500 },
1501 {
1502 /* 405EZ */
1503 .pvr_mask = 0xffff0000,
1504 .pvr_value = 0x41510000,
1505 .cpu_name = "405EZ",
1506 .cpu_features = CPU_FTRS_40X,
1507 .cpu_user_features = PPC_FEATURE_32 |
1508 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1509 .mmu_features = MMU_FTR_TYPE_40x,
1510 .icache_bsize = 32,
1511 .dcache_bsize = 32,
1512 .machine_check = machine_check_4xx,
1513 .platform = "ppc405",
1514 },
1515 { /* default match */
1516 .pvr_mask = 0x00000000,
1517 .pvr_value = 0x00000000,
1518 .cpu_name = "(generic 40x PPC)",
1519 .cpu_features = CPU_FTRS_40X,
1520 .cpu_user_features = PPC_FEATURE_32 |
1521 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1522 .mmu_features = MMU_FTR_TYPE_40x,
1523 .icache_bsize = 32,
1524 .dcache_bsize = 32,
1525 .machine_check = machine_check_4xx,
1526 .platform = "ppc405",
1527 }
1528
1529 #endif /* CONFIG_40x */
1530 #ifdef CONFIG_44x
1531 {
1532 .pvr_mask = 0xf0000fff,
1533 .pvr_value = 0x40000850,
1534 .cpu_name = "440GR Rev. A",
1535 .cpu_features = CPU_FTRS_44X,
1536 .cpu_user_features = COMMON_USER_BOOKE,
1537 .mmu_features = MMU_FTR_TYPE_44x,
1538 .icache_bsize = 32,
1539 .dcache_bsize = 32,
1540 .machine_check = machine_check_4xx,
1541 .platform = "ppc440",
1542 },
1543 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1544 .pvr_mask = 0xf0000fff,
1545 .pvr_value = 0x40000858,
1546 .cpu_name = "440EP Rev. A",
1547 .cpu_features = CPU_FTRS_44X,
1548 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1549 .mmu_features = MMU_FTR_TYPE_44x,
1550 .icache_bsize = 32,
1551 .dcache_bsize = 32,
1552 .cpu_setup = __setup_cpu_440ep,
1553 .machine_check = machine_check_4xx,
1554 .platform = "ppc440",
1555 },
1556 {
1557 .pvr_mask = 0xf0000fff,
1558 .pvr_value = 0x400008d3,
1559 .cpu_name = "440GR Rev. B",
1560 .cpu_features = CPU_FTRS_44X,
1561 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1562 .mmu_features = MMU_FTR_TYPE_44x,
1563 .icache_bsize = 32,
1564 .dcache_bsize = 32,
1565 .machine_check = machine_check_4xx,
1566 .platform = "ppc440",
1567 },
1568 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1569 .pvr_mask = 0xf0000ff7,
1570 .pvr_value = 0x400008d4,
1571 .cpu_name = "440EP Rev. C",
1572 .cpu_features = CPU_FTRS_44X,
1573 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1574 .mmu_features = MMU_FTR_TYPE_44x,
1575 .icache_bsize = 32,
1576 .dcache_bsize = 32,
1577 .cpu_setup = __setup_cpu_440ep,
1578 .machine_check = machine_check_4xx,
1579 .platform = "ppc440",
1580 },
1581 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1582 .pvr_mask = 0xf0000fff,
1583 .pvr_value = 0x400008db,
1584 .cpu_name = "440EP Rev. B",
1585 .cpu_features = CPU_FTRS_44X,
1586 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1587 .mmu_features = MMU_FTR_TYPE_44x,
1588 .icache_bsize = 32,
1589 .dcache_bsize = 32,
1590 .cpu_setup = __setup_cpu_440ep,
1591 .machine_check = machine_check_4xx,
1592 .platform = "ppc440",
1593 },
1594 { /* 440GRX */
1595 .pvr_mask = 0xf0000ffb,
1596 .pvr_value = 0x200008D0,
1597 .cpu_name = "440GRX",
1598 .cpu_features = CPU_FTRS_44X,
1599 .cpu_user_features = COMMON_USER_BOOKE,
1600 .mmu_features = MMU_FTR_TYPE_44x,
1601 .icache_bsize = 32,
1602 .dcache_bsize = 32,
1603 .cpu_setup = __setup_cpu_440grx,
1604 .machine_check = machine_check_440A,
1605 .platform = "ppc440",
1606 },
1607 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1608 .pvr_mask = 0xf0000ffb,
1609 .pvr_value = 0x200008D8,
1610 .cpu_name = "440EPX",
1611 .cpu_features = CPU_FTRS_44X,
1612 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1613 .mmu_features = MMU_FTR_TYPE_44x,
1614 .icache_bsize = 32,
1615 .dcache_bsize = 32,
1616 .cpu_setup = __setup_cpu_440epx,
1617 .machine_check = machine_check_440A,
1618 .platform = "ppc440",
1619 },
1620 { /* 440GP Rev. B */
1621 .pvr_mask = 0xf0000fff,
1622 .pvr_value = 0x40000440,
1623 .cpu_name = "440GP Rev. B",
1624 .cpu_features = CPU_FTRS_44X,
1625 .cpu_user_features = COMMON_USER_BOOKE,
1626 .mmu_features = MMU_FTR_TYPE_44x,
1627 .icache_bsize = 32,
1628 .dcache_bsize = 32,
1629 .machine_check = machine_check_4xx,
1630 .platform = "ppc440gp",
1631 },
1632 { /* 440GP Rev. C */
1633 .pvr_mask = 0xf0000fff,
1634 .pvr_value = 0x40000481,
1635 .cpu_name = "440GP Rev. C",
1636 .cpu_features = CPU_FTRS_44X,
1637 .cpu_user_features = COMMON_USER_BOOKE,
1638 .mmu_features = MMU_FTR_TYPE_44x,
1639 .icache_bsize = 32,
1640 .dcache_bsize = 32,
1641 .machine_check = machine_check_4xx,
1642 .platform = "ppc440gp",
1643 },
1644 { /* 440GX Rev. A */
1645 .pvr_mask = 0xf0000fff,
1646 .pvr_value = 0x50000850,
1647 .cpu_name = "440GX Rev. A",
1648 .cpu_features = CPU_FTRS_44X,
1649 .cpu_user_features = COMMON_USER_BOOKE,
1650 .mmu_features = MMU_FTR_TYPE_44x,
1651 .icache_bsize = 32,
1652 .dcache_bsize = 32,
1653 .cpu_setup = __setup_cpu_440gx,
1654 .machine_check = machine_check_440A,
1655 .platform = "ppc440",
1656 },
1657 { /* 440GX Rev. B */
1658 .pvr_mask = 0xf0000fff,
1659 .pvr_value = 0x50000851,
1660 .cpu_name = "440GX Rev. B",
1661 .cpu_features = CPU_FTRS_44X,
1662 .cpu_user_features = COMMON_USER_BOOKE,
1663 .mmu_features = MMU_FTR_TYPE_44x,
1664 .icache_bsize = 32,
1665 .dcache_bsize = 32,
1666 .cpu_setup = __setup_cpu_440gx,
1667 .machine_check = machine_check_440A,
1668 .platform = "ppc440",
1669 },
1670 { /* 440GX Rev. C */
1671 .pvr_mask = 0xf0000fff,
1672 .pvr_value = 0x50000892,
1673 .cpu_name = "440GX Rev. C",
1674 .cpu_features = CPU_FTRS_44X,
1675 .cpu_user_features = COMMON_USER_BOOKE,
1676 .mmu_features = MMU_FTR_TYPE_44x,
1677 .icache_bsize = 32,
1678 .dcache_bsize = 32,
1679 .cpu_setup = __setup_cpu_440gx,
1680 .machine_check = machine_check_440A,
1681 .platform = "ppc440",
1682 },
1683 { /* 440GX Rev. F */
1684 .pvr_mask = 0xf0000fff,
1685 .pvr_value = 0x50000894,
1686 .cpu_name = "440GX Rev. F",
1687 .cpu_features = CPU_FTRS_44X,
1688 .cpu_user_features = COMMON_USER_BOOKE,
1689 .mmu_features = MMU_FTR_TYPE_44x,
1690 .icache_bsize = 32,
1691 .dcache_bsize = 32,
1692 .cpu_setup = __setup_cpu_440gx,
1693 .machine_check = machine_check_440A,
1694 .platform = "ppc440",
1695 },
1696 { /* 440SP Rev. A */
1697 .pvr_mask = 0xfff00fff,
1698 .pvr_value = 0x53200891,
1699 .cpu_name = "440SP Rev. A",
1700 .cpu_features = CPU_FTRS_44X,
1701 .cpu_user_features = COMMON_USER_BOOKE,
1702 .mmu_features = MMU_FTR_TYPE_44x,
1703 .icache_bsize = 32,
1704 .dcache_bsize = 32,
1705 .machine_check = machine_check_4xx,
1706 .platform = "ppc440",
1707 },
1708 { /* 440SPe Rev. A */
1709 .pvr_mask = 0xfff00fff,
1710 .pvr_value = 0x53400890,
1711 .cpu_name = "440SPe Rev. A",
1712 .cpu_features = CPU_FTRS_44X,
1713 .cpu_user_features = COMMON_USER_BOOKE,
1714 .mmu_features = MMU_FTR_TYPE_44x,
1715 .icache_bsize = 32,
1716 .dcache_bsize = 32,
1717 .cpu_setup = __setup_cpu_440spe,
1718 .machine_check = machine_check_440A,
1719 .platform = "ppc440",
1720 },
1721 { /* 440SPe Rev. B */
1722 .pvr_mask = 0xfff00fff,
1723 .pvr_value = 0x53400891,
1724 .cpu_name = "440SPe Rev. B",
1725 .cpu_features = CPU_FTRS_44X,
1726 .cpu_user_features = COMMON_USER_BOOKE,
1727 .mmu_features = MMU_FTR_TYPE_44x,
1728 .icache_bsize = 32,
1729 .dcache_bsize = 32,
1730 .cpu_setup = __setup_cpu_440spe,
1731 .machine_check = machine_check_440A,
1732 .platform = "ppc440",
1733 },
1734 { /* 440 in Xilinx Virtex-5 FXT */
1735 .pvr_mask = 0xfffffff0,
1736 .pvr_value = 0x7ff21910,
1737 .cpu_name = "440 in Virtex-5 FXT",
1738 .cpu_features = CPU_FTRS_44X,
1739 .cpu_user_features = COMMON_USER_BOOKE,
1740 .mmu_features = MMU_FTR_TYPE_44x,
1741 .icache_bsize = 32,
1742 .dcache_bsize = 32,
1743 .cpu_setup = __setup_cpu_440x5,
1744 .machine_check = machine_check_440A,
1745 .platform = "ppc440",
1746 },
1747 { /* 460EX */
1748 .pvr_mask = 0xffff0006,
1749 .pvr_value = 0x13020002,
1750 .cpu_name = "460EX",
1751 .cpu_features = CPU_FTRS_440x6,
1752 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1753 .mmu_features = MMU_FTR_TYPE_44x,
1754 .icache_bsize = 32,
1755 .dcache_bsize = 32,
1756 .cpu_setup = __setup_cpu_460ex,
1757 .machine_check = machine_check_440A,
1758 .platform = "ppc440",
1759 },
1760 { /* 460EX Rev B */
1761 .pvr_mask = 0xffff0007,
1762 .pvr_value = 0x13020004,
1763 .cpu_name = "460EX Rev. B",
1764 .cpu_features = CPU_FTRS_440x6,
1765 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1766 .mmu_features = MMU_FTR_TYPE_44x,
1767 .icache_bsize = 32,
1768 .dcache_bsize = 32,
1769 .cpu_setup = __setup_cpu_460ex,
1770 .machine_check = machine_check_440A,
1771 .platform = "ppc440",
1772 },
1773 { /* 460GT */
1774 .pvr_mask = 0xffff0006,
1775 .pvr_value = 0x13020000,
1776 .cpu_name = "460GT",
1777 .cpu_features = CPU_FTRS_440x6,
1778 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1779 .mmu_features = MMU_FTR_TYPE_44x,
1780 .icache_bsize = 32,
1781 .dcache_bsize = 32,
1782 .cpu_setup = __setup_cpu_460gt,
1783 .machine_check = machine_check_440A,
1784 .platform = "ppc440",
1785 },
1786 { /* 460GT Rev B */
1787 .pvr_mask = 0xffff0007,
1788 .pvr_value = 0x13020005,
1789 .cpu_name = "460GT Rev. B",
1790 .cpu_features = CPU_FTRS_440x6,
1791 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1792 .mmu_features = MMU_FTR_TYPE_44x,
1793 .icache_bsize = 32,
1794 .dcache_bsize = 32,
1795 .cpu_setup = __setup_cpu_460gt,
1796 .machine_check = machine_check_440A,
1797 .platform = "ppc440",
1798 },
1799 { /* 460SX */
1800 .pvr_mask = 0xffffff00,
1801 .pvr_value = 0x13541800,
1802 .cpu_name = "460SX",
1803 .cpu_features = CPU_FTRS_44X,
1804 .cpu_user_features = COMMON_USER_BOOKE,
1805 .mmu_features = MMU_FTR_TYPE_44x,
1806 .icache_bsize = 32,
1807 .dcache_bsize = 32,
1808 .cpu_setup = __setup_cpu_460sx,
1809 .machine_check = machine_check_440A,
1810 .platform = "ppc440",
1811 },
1812 { /* 476 core */
1813 .pvr_mask = 0xffff0000,
1814 .pvr_value = 0x11a50000,
1815 .cpu_name = "476",
1816 .cpu_features = CPU_FTRS_47X,
1817 .cpu_user_features = COMMON_USER_BOOKE |
1818 PPC_FEATURE_HAS_FPU,
1819 .mmu_features = MMU_FTR_TYPE_47x |
1820 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1821 .icache_bsize = 32,
1822 .dcache_bsize = 128,
1823 .machine_check = machine_check_47x,
1824 .platform = "ppc470",
1825 },
1826 { /* 476 iss */
1827 .pvr_mask = 0xffff0000,
1828 .pvr_value = 0x00050000,
1829 .cpu_name = "476",
1830 .cpu_features = CPU_FTRS_47X,
1831 .cpu_user_features = COMMON_USER_BOOKE |
1832 PPC_FEATURE_HAS_FPU,
1833 .mmu_features = MMU_FTR_TYPE_47x |
1834 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1835 .icache_bsize = 32,
1836 .dcache_bsize = 128,
1837 .machine_check = machine_check_47x,
1838 .platform = "ppc470",
1839 },
1840 { /* default match */
1841 .pvr_mask = 0x00000000,
1842 .pvr_value = 0x00000000,
1843 .cpu_name = "(generic 44x PPC)",
1844 .cpu_features = CPU_FTRS_44X,
1845 .cpu_user_features = COMMON_USER_BOOKE,
1846 .mmu_features = MMU_FTR_TYPE_44x,
1847 .icache_bsize = 32,
1848 .dcache_bsize = 32,
1849 .machine_check = machine_check_4xx,
1850 .platform = "ppc440",
1851 }
1852 #endif /* CONFIG_44x */
1853 #ifdef CONFIG_E200
1854 { /* e200z5 */
1855 .pvr_mask = 0xfff00000,
1856 .pvr_value = 0x81000000,
1857 .cpu_name = "e200z5",
1858 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1859 .cpu_features = CPU_FTRS_E200,
1860 .cpu_user_features = COMMON_USER_BOOKE |
1861 PPC_FEATURE_HAS_EFP_SINGLE |
1862 PPC_FEATURE_UNIFIED_CACHE,
1863 .mmu_features = MMU_FTR_TYPE_FSL_E,
1864 .dcache_bsize = 32,
1865 .machine_check = machine_check_e200,
1866 .platform = "ppc5554",
1867 },
1868 { /* e200z6 */
1869 .pvr_mask = 0xfff00000,
1870 .pvr_value = 0x81100000,
1871 .cpu_name = "e200z6",
1872 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1873 .cpu_features = CPU_FTRS_E200,
1874 .cpu_user_features = COMMON_USER_BOOKE |
1875 PPC_FEATURE_HAS_SPE_COMP |
1876 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1877 PPC_FEATURE_UNIFIED_CACHE,
1878 .mmu_features = MMU_FTR_TYPE_FSL_E,
1879 .dcache_bsize = 32,
1880 .machine_check = machine_check_e200,
1881 .platform = "ppc5554",
1882 },
1883 { /* default match */
1884 .pvr_mask = 0x00000000,
1885 .pvr_value = 0x00000000,
1886 .cpu_name = "(generic E200 PPC)",
1887 .cpu_features = CPU_FTRS_E200,
1888 .cpu_user_features = COMMON_USER_BOOKE |
1889 PPC_FEATURE_HAS_EFP_SINGLE |
1890 PPC_FEATURE_UNIFIED_CACHE,
1891 .mmu_features = MMU_FTR_TYPE_FSL_E,
1892 .dcache_bsize = 32,
1893 .cpu_setup = __setup_cpu_e200,
1894 .machine_check = machine_check_e200,
1895 .platform = "ppc5554",
1896 }
1897 #endif /* CONFIG_E200 */
1898 #endif /* CONFIG_PPC32 */
1899 #ifdef CONFIG_E500
1900 #ifdef CONFIG_PPC32
1901 { /* e500 */
1902 .pvr_mask = 0xffff0000,
1903 .pvr_value = 0x80200000,
1904 .cpu_name = "e500",
1905 .cpu_features = CPU_FTRS_E500,
1906 .cpu_user_features = COMMON_USER_BOOKE |
1907 PPC_FEATURE_HAS_SPE_COMP |
1908 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1909 .mmu_features = MMU_FTR_TYPE_FSL_E,
1910 .icache_bsize = 32,
1911 .dcache_bsize = 32,
1912 .num_pmcs = 4,
1913 .oprofile_cpu_type = "ppc/e500",
1914 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1915 .cpu_setup = __setup_cpu_e500v1,
1916 .machine_check = machine_check_e500,
1917 .platform = "ppc8540",
1918 },
1919 { /* e500v2 */
1920 .pvr_mask = 0xffff0000,
1921 .pvr_value = 0x80210000,
1922 .cpu_name = "e500v2",
1923 .cpu_features = CPU_FTRS_E500_2,
1924 .cpu_user_features = COMMON_USER_BOOKE |
1925 PPC_FEATURE_HAS_SPE_COMP |
1926 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1927 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1928 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1929 .icache_bsize = 32,
1930 .dcache_bsize = 32,
1931 .num_pmcs = 4,
1932 .oprofile_cpu_type = "ppc/e500",
1933 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1934 .cpu_setup = __setup_cpu_e500v2,
1935 .machine_check = machine_check_e500,
1936 .platform = "ppc8548",
1937 },
1938 { /* e500mc */
1939 .pvr_mask = 0xffff0000,
1940 .pvr_value = 0x80230000,
1941 .cpu_name = "e500mc",
1942 .cpu_features = CPU_FTRS_E500MC,
1943 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1944 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1945 MMU_FTR_USE_TLBILX,
1946 .icache_bsize = 64,
1947 .dcache_bsize = 64,
1948 .num_pmcs = 4,
1949 .oprofile_cpu_type = "ppc/e500mc",
1950 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1951 .cpu_setup = __setup_cpu_e500mc,
1952 .machine_check = machine_check_e500mc,
1953 .platform = "ppce500mc",
1954 },
1955 #endif /* CONFIG_PPC32 */
1956 { /* e5500 */
1957 .pvr_mask = 0xffff0000,
1958 .pvr_value = 0x80240000,
1959 .cpu_name = "e5500",
1960 .cpu_features = CPU_FTRS_E500MC,
1961 .cpu_user_features = COMMON_USER_BOOKE,
1962 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1963 MMU_FTR_USE_TLBILX,
1964 .icache_bsize = 64,
1965 .dcache_bsize = 64,
1966 .num_pmcs = 4,
1967 .oprofile_cpu_type = "ppc/e500mc",
1968 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1969 .cpu_setup = __setup_cpu_e5500,
1970 .cpu_restore = __restore_cpu_e5500,
1971 .machine_check = machine_check_e500mc,
1972 .platform = "ppce5500",
1973 },
1974 #ifdef CONFIG_PPC32
1975 { /* default match */
1976 .pvr_mask = 0x00000000,
1977 .pvr_value = 0x00000000,
1978 .cpu_name = "(generic E500 PPC)",
1979 .cpu_features = CPU_FTRS_E500,
1980 .cpu_user_features = COMMON_USER_BOOKE |
1981 PPC_FEATURE_HAS_SPE_COMP |
1982 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1983 .mmu_features = MMU_FTR_TYPE_FSL_E,
1984 .icache_bsize = 32,
1985 .dcache_bsize = 32,
1986 .machine_check = machine_check_e500,
1987 .platform = "powerpc",
1988 }
1989 #endif /* CONFIG_PPC32 */
1990 #endif /* CONFIG_E500 */
1991
1992 #ifdef CONFIG_PPC_BOOK3E_64
1993 { /* This is a default entry to get going, to be replaced by
1994 * a real one at some stage
1995 */
1996 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
1997 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
1998 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
1999 .pvr_mask = 0x00000000,
2000 .pvr_value = 0x00000000,
2001 .cpu_name = "Book3E",
2002 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2003 .cpu_user_features = COMMON_USER_PPC64,
2004 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2005 MMU_FTR_USE_TLBIVAX_BCAST |
2006 MMU_FTR_LOCK_BCAST_INVAL,
2007 .icache_bsize = 64,
2008 .dcache_bsize = 64,
2009 .num_pmcs = 0,
2010 .machine_check = machine_check_generic,
2011 .platform = "power6",
2012 },
2013 #endif
2014 };
2015
2016 static struct cpu_spec the_cpu_spec;
2017
2018 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
2019 {
2020 struct cpu_spec *t = &the_cpu_spec;
2021 struct cpu_spec old;
2022
2023 t = PTRRELOC(t);
2024 old = *t;
2025
2026 /* Copy everything, then do fixups */
2027 *t = *s;
2028
2029 /*
2030 * If we are overriding a previous value derived from the real
2031 * PVR with a new value obtained using a logical PVR value,
2032 * don't modify the performance monitor fields.
2033 */
2034 if (old.num_pmcs && !s->num_pmcs) {
2035 t->num_pmcs = old.num_pmcs;
2036 t->pmc_type = old.pmc_type;
2037 t->oprofile_type = old.oprofile_type;
2038 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2039 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2040 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2041
2042 /*
2043 * If we have passed through this logic once before and
2044 * have pulled the default case because the real PVR was
2045 * not found inside cpu_specs[], then we are possibly
2046 * running in compatibility mode. In that case, let the
2047 * oprofiler know which set of compatibility counters to
2048 * pull from by making sure the oprofile_cpu_type string
2049 * is set to that of compatibility mode. If the
2050 * oprofile_cpu_type already has a value, then we are
2051 * possibly overriding a real PVR with a logical one,
2052 * and, in that case, keep the current value for
2053 * oprofile_cpu_type.
2054 */
2055 if (old.oprofile_cpu_type != NULL) {
2056 t->oprofile_cpu_type = old.oprofile_cpu_type;
2057 t->oprofile_type = old.oprofile_type;
2058 }
2059 }
2060
2061 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2062
2063 /*
2064 * Set the base platform string once; assumes
2065 * we're called with real pvr first.
2066 */
2067 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2068 *PTRRELOC(&powerpc_base_platform) = t->platform;
2069
2070 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2071 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2072 * that processor. I will consolidate that at a later time, for now,
2073 * just use #ifdef. We also don't need to PTRRELOC the function
2074 * pointer on ppc64 and booke as we are running at 0 in real mode
2075 * on ppc64 and reloc_offset is always 0 on booke.
2076 */
2077 if (s->cpu_setup) {
2078 s->cpu_setup(offset, s);
2079 }
2080 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2081 }
2082
2083 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2084 {
2085 struct cpu_spec *s = cpu_specs;
2086 int i;
2087
2088 s = PTRRELOC(s);
2089
2090 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2091 if ((pvr & s->pvr_mask) == s->pvr_value) {
2092 setup_cpu_spec(offset, s);
2093 return s;
2094 }
2095 }
2096
2097 BUG();
2098
2099 return NULL;
2100 }
Linux kernel - Deliverables
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