Merge branch 'merge'
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/config.h>
14 #include <linux/string.h>
15 #include <linux/sched.h>
16 #include <linux/threads.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25
26 /* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33 #ifdef CONFIG_PPC32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
43 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
44
45 /* This table only contains "desktop" CPUs, it need to be filled with embedded
46 * ones as well...
47 */
48 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
49 PPC_FEATURE_HAS_MMU)
50 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
51 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
52 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
53 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
54 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
55 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
56 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
58 PPC_FEATURE_TRUE_LE)
59 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
60 PPC_FEATURE_BOOKE)
61
62 /* We only set the spe features if the kernel was compiled with
63 * spe support
64 */
65 #ifdef CONFIG_SPE
66 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
67 #else
68 #define PPC_FEATURE_SPE_COMP 0
69 #endif
70
71 struct cpu_spec cpu_specs[] = {
72 #ifdef CONFIG_PPC64
73 { /* Power3 */
74 .pvr_mask = 0xffff0000,
75 .pvr_value = 0x00400000,
76 .cpu_name = "POWER3 (630)",
77 .cpu_features = CPU_FTRS_POWER3,
78 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
79 .icache_bsize = 128,
80 .dcache_bsize = 128,
81 .num_pmcs = 8,
82 .oprofile_cpu_type = "ppc64/power3",
83 .oprofile_type = PPC_OPROFILE_RS64,
84 .platform = "power3",
85 },
86 { /* Power3+ */
87 .pvr_mask = 0xffff0000,
88 .pvr_value = 0x00410000,
89 .cpu_name = "POWER3 (630+)",
90 .cpu_features = CPU_FTRS_POWER3,
91 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
92 .icache_bsize = 128,
93 .dcache_bsize = 128,
94 .num_pmcs = 8,
95 .oprofile_cpu_type = "ppc64/power3",
96 .oprofile_type = PPC_OPROFILE_RS64,
97 .platform = "power3",
98 },
99 { /* Northstar */
100 .pvr_mask = 0xffff0000,
101 .pvr_value = 0x00330000,
102 .cpu_name = "RS64-II (northstar)",
103 .cpu_features = CPU_FTRS_RS64,
104 .cpu_user_features = COMMON_USER_PPC64,
105 .icache_bsize = 128,
106 .dcache_bsize = 128,
107 .num_pmcs = 8,
108 .oprofile_cpu_type = "ppc64/rs64",
109 .oprofile_type = PPC_OPROFILE_RS64,
110 .platform = "rs64",
111 },
112 { /* Pulsar */
113 .pvr_mask = 0xffff0000,
114 .pvr_value = 0x00340000,
115 .cpu_name = "RS64-III (pulsar)",
116 .cpu_features = CPU_FTRS_RS64,
117 .cpu_user_features = COMMON_USER_PPC64,
118 .icache_bsize = 128,
119 .dcache_bsize = 128,
120 .num_pmcs = 8,
121 .oprofile_cpu_type = "ppc64/rs64",
122 .oprofile_type = PPC_OPROFILE_RS64,
123 .platform = "rs64",
124 },
125 { /* I-star */
126 .pvr_mask = 0xffff0000,
127 .pvr_value = 0x00360000,
128 .cpu_name = "RS64-III (icestar)",
129 .cpu_features = CPU_FTRS_RS64,
130 .cpu_user_features = COMMON_USER_PPC64,
131 .icache_bsize = 128,
132 .dcache_bsize = 128,
133 .num_pmcs = 8,
134 .oprofile_cpu_type = "ppc64/rs64",
135 .oprofile_type = PPC_OPROFILE_RS64,
136 .platform = "rs64",
137 },
138 { /* S-star */
139 .pvr_mask = 0xffff0000,
140 .pvr_value = 0x00370000,
141 .cpu_name = "RS64-IV (sstar)",
142 .cpu_features = CPU_FTRS_RS64,
143 .cpu_user_features = COMMON_USER_PPC64,
144 .icache_bsize = 128,
145 .dcache_bsize = 128,
146 .num_pmcs = 8,
147 .oprofile_cpu_type = "ppc64/rs64",
148 .oprofile_type = PPC_OPROFILE_RS64,
149 .platform = "rs64",
150 },
151 { /* Power4 */
152 .pvr_mask = 0xffff0000,
153 .pvr_value = 0x00350000,
154 .cpu_name = "POWER4 (gp)",
155 .cpu_features = CPU_FTRS_POWER4,
156 .cpu_user_features = COMMON_USER_POWER4,
157 .icache_bsize = 128,
158 .dcache_bsize = 128,
159 .num_pmcs = 8,
160 .oprofile_cpu_type = "ppc64/power4",
161 .oprofile_type = PPC_OPROFILE_POWER4,
162 .platform = "power4",
163 },
164 { /* Power4+ */
165 .pvr_mask = 0xffff0000,
166 .pvr_value = 0x00380000,
167 .cpu_name = "POWER4+ (gq)",
168 .cpu_features = CPU_FTRS_POWER4,
169 .cpu_user_features = COMMON_USER_POWER4,
170 .icache_bsize = 128,
171 .dcache_bsize = 128,
172 .num_pmcs = 8,
173 .oprofile_cpu_type = "ppc64/power4",
174 .oprofile_type = PPC_OPROFILE_POWER4,
175 .platform = "power4",
176 },
177 { /* PPC970 */
178 .pvr_mask = 0xffff0000,
179 .pvr_value = 0x00390000,
180 .cpu_name = "PPC970",
181 .cpu_features = CPU_FTRS_PPC970,
182 .cpu_user_features = COMMON_USER_POWER4 |
183 PPC_FEATURE_HAS_ALTIVEC_COMP,
184 .icache_bsize = 128,
185 .dcache_bsize = 128,
186 .num_pmcs = 8,
187 .cpu_setup = __setup_cpu_ppc970,
188 .oprofile_cpu_type = "ppc64/970",
189 .oprofile_type = PPC_OPROFILE_POWER4,
190 .platform = "ppc970",
191 },
192 #endif /* CONFIG_PPC64 */
193 #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
194 { /* PPC970FX */
195 .pvr_mask = 0xffff0000,
196 .pvr_value = 0x003c0000,
197 .cpu_name = "PPC970FX",
198 #ifdef CONFIG_PPC32
199 .cpu_features = CPU_FTRS_970_32,
200 #else
201 .cpu_features = CPU_FTRS_PPC970,
202 #endif
203 .cpu_user_features = COMMON_USER_POWER4 |
204 PPC_FEATURE_HAS_ALTIVEC_COMP,
205 .icache_bsize = 128,
206 .dcache_bsize = 128,
207 .num_pmcs = 8,
208 .cpu_setup = __setup_cpu_ppc970,
209 .oprofile_cpu_type = "ppc64/970",
210 .oprofile_type = PPC_OPROFILE_POWER4,
211 .platform = "ppc970",
212 },
213 #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
214 #ifdef CONFIG_PPC64
215 { /* PPC970MP */
216 .pvr_mask = 0xffff0000,
217 .pvr_value = 0x00440000,
218 .cpu_name = "PPC970MP",
219 .cpu_features = CPU_FTRS_PPC970,
220 .cpu_user_features = COMMON_USER_POWER4 |
221 PPC_FEATURE_HAS_ALTIVEC_COMP,
222 .icache_bsize = 128,
223 .dcache_bsize = 128,
224 .num_pmcs = 8,
225 .cpu_setup = __setup_cpu_ppc970,
226 .oprofile_cpu_type = "ppc64/970",
227 .oprofile_type = PPC_OPROFILE_POWER4,
228 .platform = "ppc970",
229 },
230 { /* Power5 GR */
231 .pvr_mask = 0xffff0000,
232 .pvr_value = 0x003a0000,
233 .cpu_name = "POWER5 (gr)",
234 .cpu_features = CPU_FTRS_POWER5,
235 .cpu_user_features = COMMON_USER_POWER5,
236 .icache_bsize = 128,
237 .dcache_bsize = 128,
238 .num_pmcs = 6,
239 .oprofile_cpu_type = "ppc64/power5",
240 .oprofile_type = PPC_OPROFILE_POWER4,
241 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
242 * and above but only works on POWER5 and above
243 */
244 .oprofile_mmcra_sihv = MMCRA_SIHV,
245 .oprofile_mmcra_sipr = MMCRA_SIPR,
246 .platform = "power5",
247 },
248 { /* Power5 GS */
249 .pvr_mask = 0xffff0000,
250 .pvr_value = 0x003b0000,
251 .cpu_name = "POWER5+ (gs)",
252 .cpu_features = CPU_FTRS_POWER5,
253 .cpu_user_features = COMMON_USER_POWER5_PLUS,
254 .icache_bsize = 128,
255 .dcache_bsize = 128,
256 .num_pmcs = 6,
257 .oprofile_cpu_type = "ppc64/power5+",
258 .oprofile_type = PPC_OPROFILE_POWER4,
259 .oprofile_mmcra_sihv = MMCRA_SIHV,
260 .oprofile_mmcra_sipr = MMCRA_SIPR,
261 .platform = "power5+",
262 },
263 { /* Power6 */
264 .pvr_mask = 0xffff0000,
265 .pvr_value = 0x003e0000,
266 .cpu_name = "POWER6",
267 .cpu_features = CPU_FTRS_POWER6,
268 .cpu_user_features = COMMON_USER_POWER6,
269 .icache_bsize = 128,
270 .dcache_bsize = 128,
271 .num_pmcs = 8,
272 .oprofile_cpu_type = "ppc64/power6",
273 .oprofile_type = PPC_OPROFILE_POWER4,
274 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
275 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
276 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
277 POWER6_MMCRA_OTHER,
278 .platform = "power6",
279 },
280 { /* Cell Broadband Engine */
281 .pvr_mask = 0xffff0000,
282 .pvr_value = 0x00700000,
283 .cpu_name = "Cell Broadband Engine",
284 .cpu_features = CPU_FTRS_CELL,
285 .cpu_user_features = COMMON_USER_PPC64 |
286 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
287 PPC_FEATURE_SMT,
288 .icache_bsize = 128,
289 .dcache_bsize = 128,
290 .platform = "ppc-cell-be",
291 },
292 { /* default match */
293 .pvr_mask = 0x00000000,
294 .pvr_value = 0x00000000,
295 .cpu_name = "POWER4 (compatible)",
296 .cpu_features = CPU_FTRS_COMPATIBLE,
297 .cpu_user_features = COMMON_USER_PPC64,
298 .icache_bsize = 128,
299 .dcache_bsize = 128,
300 .num_pmcs = 6,
301 .platform = "power4",
302 }
303 #endif /* CONFIG_PPC64 */
304 #ifdef CONFIG_PPC32
305 #if CLASSIC_PPC
306 { /* 601 */
307 .pvr_mask = 0xffff0000,
308 .pvr_value = 0x00010000,
309 .cpu_name = "601",
310 .cpu_features = CPU_FTRS_PPC601,
311 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
312 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
313 .icache_bsize = 32,
314 .dcache_bsize = 32,
315 .platform = "ppc601",
316 },
317 { /* 603 */
318 .pvr_mask = 0xffff0000,
319 .pvr_value = 0x00030000,
320 .cpu_name = "603",
321 .cpu_features = CPU_FTRS_603,
322 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
323 .icache_bsize = 32,
324 .dcache_bsize = 32,
325 .cpu_setup = __setup_cpu_603,
326 .platform = "ppc603",
327 },
328 { /* 603e */
329 .pvr_mask = 0xffff0000,
330 .pvr_value = 0x00060000,
331 .cpu_name = "603e",
332 .cpu_features = CPU_FTRS_603,
333 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
334 .icache_bsize = 32,
335 .dcache_bsize = 32,
336 .cpu_setup = __setup_cpu_603,
337 .platform = "ppc603",
338 },
339 { /* 603ev */
340 .pvr_mask = 0xffff0000,
341 .pvr_value = 0x00070000,
342 .cpu_name = "603ev",
343 .cpu_features = CPU_FTRS_603,
344 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
345 .icache_bsize = 32,
346 .dcache_bsize = 32,
347 .cpu_setup = __setup_cpu_603,
348 .platform = "ppc603",
349 },
350 { /* 604 */
351 .pvr_mask = 0xffff0000,
352 .pvr_value = 0x00040000,
353 .cpu_name = "604",
354 .cpu_features = CPU_FTRS_604,
355 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
356 .icache_bsize = 32,
357 .dcache_bsize = 32,
358 .num_pmcs = 2,
359 .cpu_setup = __setup_cpu_604,
360 .platform = "ppc604",
361 },
362 { /* 604e */
363 .pvr_mask = 0xfffff000,
364 .pvr_value = 0x00090000,
365 .cpu_name = "604e",
366 .cpu_features = CPU_FTRS_604,
367 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
368 .icache_bsize = 32,
369 .dcache_bsize = 32,
370 .num_pmcs = 4,
371 .cpu_setup = __setup_cpu_604,
372 .platform = "ppc604",
373 },
374 { /* 604r */
375 .pvr_mask = 0xffff0000,
376 .pvr_value = 0x00090000,
377 .cpu_name = "604r",
378 .cpu_features = CPU_FTRS_604,
379 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
380 .icache_bsize = 32,
381 .dcache_bsize = 32,
382 .num_pmcs = 4,
383 .cpu_setup = __setup_cpu_604,
384 .platform = "ppc604",
385 },
386 { /* 604ev */
387 .pvr_mask = 0xffff0000,
388 .pvr_value = 0x000a0000,
389 .cpu_name = "604ev",
390 .cpu_features = CPU_FTRS_604,
391 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
392 .icache_bsize = 32,
393 .dcache_bsize = 32,
394 .num_pmcs = 4,
395 .cpu_setup = __setup_cpu_604,
396 .platform = "ppc604",
397 },
398 { /* 740/750 (0x4202, don't support TAU ?) */
399 .pvr_mask = 0xffffffff,
400 .pvr_value = 0x00084202,
401 .cpu_name = "740/750",
402 .cpu_features = CPU_FTRS_740_NOTAU,
403 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
404 .icache_bsize = 32,
405 .dcache_bsize = 32,
406 .num_pmcs = 4,
407 .cpu_setup = __setup_cpu_750,
408 .platform = "ppc750",
409 },
410 { /* 750CX (80100 and 8010x?) */
411 .pvr_mask = 0xfffffff0,
412 .pvr_value = 0x00080100,
413 .cpu_name = "750CX",
414 .cpu_features = CPU_FTRS_750,
415 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
416 .icache_bsize = 32,
417 .dcache_bsize = 32,
418 .num_pmcs = 4,
419 .cpu_setup = __setup_cpu_750cx,
420 .platform = "ppc750",
421 },
422 { /* 750CX (82201 and 82202) */
423 .pvr_mask = 0xfffffff0,
424 .pvr_value = 0x00082200,
425 .cpu_name = "750CX",
426 .cpu_features = CPU_FTRS_750,
427 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
428 .icache_bsize = 32,
429 .dcache_bsize = 32,
430 .num_pmcs = 4,
431 .cpu_setup = __setup_cpu_750cx,
432 .platform = "ppc750",
433 },
434 { /* 750CXe (82214) */
435 .pvr_mask = 0xfffffff0,
436 .pvr_value = 0x00082210,
437 .cpu_name = "750CXe",
438 .cpu_features = CPU_FTRS_750,
439 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
440 .icache_bsize = 32,
441 .dcache_bsize = 32,
442 .num_pmcs = 4,
443 .cpu_setup = __setup_cpu_750cx,
444 .platform = "ppc750",
445 },
446 { /* 750CXe "Gekko" (83214) */
447 .pvr_mask = 0xffffffff,
448 .pvr_value = 0x00083214,
449 .cpu_name = "750CXe",
450 .cpu_features = CPU_FTRS_750,
451 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
452 .icache_bsize = 32,
453 .dcache_bsize = 32,
454 .num_pmcs = 4,
455 .cpu_setup = __setup_cpu_750cx,
456 .platform = "ppc750",
457 },
458 { /* 745/755 */
459 .pvr_mask = 0xfffff000,
460 .pvr_value = 0x00083000,
461 .cpu_name = "745/755",
462 .cpu_features = CPU_FTRS_750,
463 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
464 .icache_bsize = 32,
465 .dcache_bsize = 32,
466 .num_pmcs = 4,
467 .cpu_setup = __setup_cpu_750,
468 .platform = "ppc750",
469 },
470 { /* 750FX rev 1.x */
471 .pvr_mask = 0xffffff00,
472 .pvr_value = 0x70000100,
473 .cpu_name = "750FX",
474 .cpu_features = CPU_FTRS_750FX1,
475 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
476 .icache_bsize = 32,
477 .dcache_bsize = 32,
478 .num_pmcs = 4,
479 .cpu_setup = __setup_cpu_750,
480 .platform = "ppc750",
481 },
482 { /* 750FX rev 2.0 must disable HID0[DPM] */
483 .pvr_mask = 0xffffffff,
484 .pvr_value = 0x70000200,
485 .cpu_name = "750FX",
486 .cpu_features = CPU_FTRS_750FX2,
487 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
488 .icache_bsize = 32,
489 .dcache_bsize = 32,
490 .num_pmcs = 4,
491 .cpu_setup = __setup_cpu_750,
492 .platform = "ppc750",
493 },
494 { /* 750FX (All revs except 2.0) */
495 .pvr_mask = 0xffff0000,
496 .pvr_value = 0x70000000,
497 .cpu_name = "750FX",
498 .cpu_features = CPU_FTRS_750FX,
499 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
500 .icache_bsize = 32,
501 .dcache_bsize = 32,
502 .num_pmcs = 4,
503 .cpu_setup = __setup_cpu_750fx,
504 .platform = "ppc750",
505 },
506 { /* 750GX */
507 .pvr_mask = 0xffff0000,
508 .pvr_value = 0x70020000,
509 .cpu_name = "750GX",
510 .cpu_features = CPU_FTRS_750GX,
511 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
512 .icache_bsize = 32,
513 .dcache_bsize = 32,
514 .num_pmcs = 4,
515 .cpu_setup = __setup_cpu_750fx,
516 .platform = "ppc750",
517 },
518 { /* 740/750 (L2CR bit need fixup for 740) */
519 .pvr_mask = 0xffff0000,
520 .pvr_value = 0x00080000,
521 .cpu_name = "740/750",
522 .cpu_features = CPU_FTRS_740,
523 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
524 .icache_bsize = 32,
525 .dcache_bsize = 32,
526 .num_pmcs = 4,
527 .cpu_setup = __setup_cpu_750,
528 .platform = "ppc750",
529 },
530 { /* 7400 rev 1.1 ? (no TAU) */
531 .pvr_mask = 0xffffffff,
532 .pvr_value = 0x000c1101,
533 .cpu_name = "7400 (1.1)",
534 .cpu_features = CPU_FTRS_7400_NOTAU,
535 .cpu_user_features = COMMON_USER |
536 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
537 .icache_bsize = 32,
538 .dcache_bsize = 32,
539 .num_pmcs = 4,
540 .cpu_setup = __setup_cpu_7400,
541 .platform = "ppc7400",
542 },
543 { /* 7400 */
544 .pvr_mask = 0xffff0000,
545 .pvr_value = 0x000c0000,
546 .cpu_name = "7400",
547 .cpu_features = CPU_FTRS_7400,
548 .cpu_user_features = COMMON_USER |
549 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
550 .icache_bsize = 32,
551 .dcache_bsize = 32,
552 .num_pmcs = 4,
553 .cpu_setup = __setup_cpu_7400,
554 .platform = "ppc7400",
555 },
556 { /* 7410 */
557 .pvr_mask = 0xffff0000,
558 .pvr_value = 0x800c0000,
559 .cpu_name = "7410",
560 .cpu_features = CPU_FTRS_7400,
561 .cpu_user_features = COMMON_USER |
562 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
563 .icache_bsize = 32,
564 .dcache_bsize = 32,
565 .num_pmcs = 4,
566 .cpu_setup = __setup_cpu_7410,
567 .platform = "ppc7400",
568 },
569 { /* 7450 2.0 - no doze/nap */
570 .pvr_mask = 0xffffffff,
571 .pvr_value = 0x80000200,
572 .cpu_name = "7450",
573 .cpu_features = CPU_FTRS_7450_20,
574 .cpu_user_features = COMMON_USER |
575 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
576 .icache_bsize = 32,
577 .dcache_bsize = 32,
578 .num_pmcs = 6,
579 .cpu_setup = __setup_cpu_745x,
580 .oprofile_cpu_type = "ppc/7450",
581 .oprofile_type = PPC_OPROFILE_G4,
582 .platform = "ppc7450",
583 },
584 { /* 7450 2.1 */
585 .pvr_mask = 0xffffffff,
586 .pvr_value = 0x80000201,
587 .cpu_name = "7450",
588 .cpu_features = CPU_FTRS_7450_21,
589 .cpu_user_features = COMMON_USER |
590 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
591 .icache_bsize = 32,
592 .dcache_bsize = 32,
593 .num_pmcs = 6,
594 .cpu_setup = __setup_cpu_745x,
595 .oprofile_cpu_type = "ppc/7450",
596 .oprofile_type = PPC_OPROFILE_G4,
597 .platform = "ppc7450",
598 },
599 { /* 7450 2.3 and newer */
600 .pvr_mask = 0xffff0000,
601 .pvr_value = 0x80000000,
602 .cpu_name = "7450",
603 .cpu_features = CPU_FTRS_7450_23,
604 .cpu_user_features = COMMON_USER |
605 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
606 .icache_bsize = 32,
607 .dcache_bsize = 32,
608 .num_pmcs = 6,
609 .cpu_setup = __setup_cpu_745x,
610 .oprofile_cpu_type = "ppc/7450",
611 .oprofile_type = PPC_OPROFILE_G4,
612 .platform = "ppc7450",
613 },
614 { /* 7455 rev 1.x */
615 .pvr_mask = 0xffffff00,
616 .pvr_value = 0x80010100,
617 .cpu_name = "7455",
618 .cpu_features = CPU_FTRS_7455_1,
619 .cpu_user_features = COMMON_USER |
620 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
621 .icache_bsize = 32,
622 .dcache_bsize = 32,
623 .num_pmcs = 6,
624 .cpu_setup = __setup_cpu_745x,
625 .oprofile_cpu_type = "ppc/7450",
626 .oprofile_type = PPC_OPROFILE_G4,
627 .platform = "ppc7450",
628 },
629 { /* 7455 rev 2.0 */
630 .pvr_mask = 0xffffffff,
631 .pvr_value = 0x80010200,
632 .cpu_name = "7455",
633 .cpu_features = CPU_FTRS_7455_20,
634 .cpu_user_features = COMMON_USER |
635 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
636 .icache_bsize = 32,
637 .dcache_bsize = 32,
638 .num_pmcs = 6,
639 .cpu_setup = __setup_cpu_745x,
640 .oprofile_cpu_type = "ppc/7450",
641 .oprofile_type = PPC_OPROFILE_G4,
642 .platform = "ppc7450",
643 },
644 { /* 7455 others */
645 .pvr_mask = 0xffff0000,
646 .pvr_value = 0x80010000,
647 .cpu_name = "7455",
648 .cpu_features = CPU_FTRS_7455,
649 .cpu_user_features = COMMON_USER |
650 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
651 .icache_bsize = 32,
652 .dcache_bsize = 32,
653 .num_pmcs = 6,
654 .cpu_setup = __setup_cpu_745x,
655 .oprofile_cpu_type = "ppc/7450",
656 .oprofile_type = PPC_OPROFILE_G4,
657 .platform = "ppc7450",
658 },
659 { /* 7447/7457 Rev 1.0 */
660 .pvr_mask = 0xffffffff,
661 .pvr_value = 0x80020100,
662 .cpu_name = "7447/7457",
663 .cpu_features = CPU_FTRS_7447_10,
664 .cpu_user_features = COMMON_USER |
665 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
666 .icache_bsize = 32,
667 .dcache_bsize = 32,
668 .num_pmcs = 6,
669 .cpu_setup = __setup_cpu_745x,
670 .oprofile_cpu_type = "ppc/7450",
671 .oprofile_type = PPC_OPROFILE_G4,
672 .platform = "ppc7450",
673 },
674 { /* 7447/7457 Rev 1.1 */
675 .pvr_mask = 0xffffffff,
676 .pvr_value = 0x80020101,
677 .cpu_name = "7447/7457",
678 .cpu_features = CPU_FTRS_7447_10,
679 .cpu_user_features = COMMON_USER |
680 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
681 .icache_bsize = 32,
682 .dcache_bsize = 32,
683 .num_pmcs = 6,
684 .cpu_setup = __setup_cpu_745x,
685 .oprofile_cpu_type = "ppc/7450",
686 .oprofile_type = PPC_OPROFILE_G4,
687 .platform = "ppc7450",
688 },
689 { /* 7447/7457 Rev 1.2 and later */
690 .pvr_mask = 0xffff0000,
691 .pvr_value = 0x80020000,
692 .cpu_name = "7447/7457",
693 .cpu_features = CPU_FTRS_7447,
694 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
695 .icache_bsize = 32,
696 .dcache_bsize = 32,
697 .num_pmcs = 6,
698 .cpu_setup = __setup_cpu_745x,
699 .oprofile_cpu_type = "ppc/7450",
700 .oprofile_type = PPC_OPROFILE_G4,
701 .platform = "ppc7450",
702 },
703 { /* 7447A */
704 .pvr_mask = 0xffff0000,
705 .pvr_value = 0x80030000,
706 .cpu_name = "7447A",
707 .cpu_features = CPU_FTRS_7447A,
708 .cpu_user_features = COMMON_USER |
709 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
710 .icache_bsize = 32,
711 .dcache_bsize = 32,
712 .num_pmcs = 6,
713 .cpu_setup = __setup_cpu_745x,
714 .oprofile_cpu_type = "ppc/7450",
715 .oprofile_type = PPC_OPROFILE_G4,
716 .platform = "ppc7450",
717 },
718 { /* 7448 */
719 .pvr_mask = 0xffff0000,
720 .pvr_value = 0x80040000,
721 .cpu_name = "7448",
722 .cpu_features = CPU_FTRS_7447A,
723 .cpu_user_features = COMMON_USER |
724 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
725 .icache_bsize = 32,
726 .dcache_bsize = 32,
727 .num_pmcs = 6,
728 .cpu_setup = __setup_cpu_745x,
729 .oprofile_cpu_type = "ppc/7450",
730 .oprofile_type = PPC_OPROFILE_G4,
731 .platform = "ppc7450",
732 },
733 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
734 .pvr_mask = 0x7fff0000,
735 .pvr_value = 0x00810000,
736 .cpu_name = "82xx",
737 .cpu_features = CPU_FTRS_82XX,
738 .cpu_user_features = COMMON_USER,
739 .icache_bsize = 32,
740 .dcache_bsize = 32,
741 .cpu_setup = __setup_cpu_603,
742 .platform = "ppc603",
743 },
744 { /* All G2_LE (603e core, plus some) have the same pvr */
745 .pvr_mask = 0x7fff0000,
746 .pvr_value = 0x00820000,
747 .cpu_name = "G2_LE",
748 .cpu_features = CPU_FTRS_G2_LE,
749 .cpu_user_features = COMMON_USER,
750 .icache_bsize = 32,
751 .dcache_bsize = 32,
752 .cpu_setup = __setup_cpu_603,
753 .platform = "ppc603",
754 },
755 { /* e300 (a 603e core, plus some) on 83xx */
756 .pvr_mask = 0x7fff0000,
757 .pvr_value = 0x00830000,
758 .cpu_name = "e300",
759 .cpu_features = CPU_FTRS_E300,
760 .cpu_user_features = COMMON_USER,
761 .icache_bsize = 32,
762 .dcache_bsize = 32,
763 .cpu_setup = __setup_cpu_603,
764 .platform = "ppc603",
765 },
766 { /* default match, we assume split I/D cache & TB (non-601)... */
767 .pvr_mask = 0x00000000,
768 .pvr_value = 0x00000000,
769 .cpu_name = "(generic PPC)",
770 .cpu_features = CPU_FTRS_CLASSIC32,
771 .cpu_user_features = COMMON_USER,
772 .icache_bsize = 32,
773 .dcache_bsize = 32,
774 .platform = "ppc603",
775 },
776 #endif /* CLASSIC_PPC */
777 #ifdef CONFIG_8xx
778 { /* 8xx */
779 .pvr_mask = 0xffff0000,
780 .pvr_value = 0x00500000,
781 .cpu_name = "8xx",
782 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
783 * if the 8xx code is there.... */
784 .cpu_features = CPU_FTRS_8XX,
785 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
786 .icache_bsize = 16,
787 .dcache_bsize = 16,
788 .platform = "ppc823",
789 },
790 #endif /* CONFIG_8xx */
791 #ifdef CONFIG_40x
792 { /* 403GC */
793 .pvr_mask = 0xffffff00,
794 .pvr_value = 0x00200200,
795 .cpu_name = "403GC",
796 .cpu_features = CPU_FTRS_40X,
797 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
798 .icache_bsize = 16,
799 .dcache_bsize = 16,
800 .platform = "ppc403",
801 },
802 { /* 403GCX */
803 .pvr_mask = 0xffffff00,
804 .pvr_value = 0x00201400,
805 .cpu_name = "403GCX",
806 .cpu_features = CPU_FTRS_40X,
807 .cpu_user_features = PPC_FEATURE_32 |
808 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
809 .icache_bsize = 16,
810 .dcache_bsize = 16,
811 .platform = "ppc403",
812 },
813 { /* 403G ?? */
814 .pvr_mask = 0xffff0000,
815 .pvr_value = 0x00200000,
816 .cpu_name = "403G ??",
817 .cpu_features = CPU_FTRS_40X,
818 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
819 .icache_bsize = 16,
820 .dcache_bsize = 16,
821 .platform = "ppc403",
822 },
823 { /* 405GP */
824 .pvr_mask = 0xffff0000,
825 .pvr_value = 0x40110000,
826 .cpu_name = "405GP",
827 .cpu_features = CPU_FTRS_40X,
828 .cpu_user_features = PPC_FEATURE_32 |
829 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
830 .icache_bsize = 32,
831 .dcache_bsize = 32,
832 .platform = "ppc405",
833 },
834 { /* STB 03xxx */
835 .pvr_mask = 0xffff0000,
836 .pvr_value = 0x40130000,
837 .cpu_name = "STB03xxx",
838 .cpu_features = CPU_FTRS_40X,
839 .cpu_user_features = PPC_FEATURE_32 |
840 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
841 .icache_bsize = 32,
842 .dcache_bsize = 32,
843 .platform = "ppc405",
844 },
845 { /* STB 04xxx */
846 .pvr_mask = 0xffff0000,
847 .pvr_value = 0x41810000,
848 .cpu_name = "STB04xxx",
849 .cpu_features = CPU_FTRS_40X,
850 .cpu_user_features = PPC_FEATURE_32 |
851 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
852 .icache_bsize = 32,
853 .dcache_bsize = 32,
854 .platform = "ppc405",
855 },
856 { /* NP405L */
857 .pvr_mask = 0xffff0000,
858 .pvr_value = 0x41610000,
859 .cpu_name = "NP405L",
860 .cpu_features = CPU_FTRS_40X,
861 .cpu_user_features = PPC_FEATURE_32 |
862 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
863 .icache_bsize = 32,
864 .dcache_bsize = 32,
865 .platform = "ppc405",
866 },
867 { /* NP4GS3 */
868 .pvr_mask = 0xffff0000,
869 .pvr_value = 0x40B10000,
870 .cpu_name = "NP4GS3",
871 .cpu_features = CPU_FTRS_40X,
872 .cpu_user_features = PPC_FEATURE_32 |
873 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
874 .icache_bsize = 32,
875 .dcache_bsize = 32,
876 .platform = "ppc405",
877 },
878 { /* NP405H */
879 .pvr_mask = 0xffff0000,
880 .pvr_value = 0x41410000,
881 .cpu_name = "NP405H",
882 .cpu_features = CPU_FTRS_40X,
883 .cpu_user_features = PPC_FEATURE_32 |
884 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
885 .icache_bsize = 32,
886 .dcache_bsize = 32,
887 .platform = "ppc405",
888 },
889 { /* 405GPr */
890 .pvr_mask = 0xffff0000,
891 .pvr_value = 0x50910000,
892 .cpu_name = "405GPr",
893 .cpu_features = CPU_FTRS_40X,
894 .cpu_user_features = PPC_FEATURE_32 |
895 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
896 .icache_bsize = 32,
897 .dcache_bsize = 32,
898 .platform = "ppc405",
899 },
900 { /* STBx25xx */
901 .pvr_mask = 0xffff0000,
902 .pvr_value = 0x51510000,
903 .cpu_name = "STBx25xx",
904 .cpu_features = CPU_FTRS_40X,
905 .cpu_user_features = PPC_FEATURE_32 |
906 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
907 .icache_bsize = 32,
908 .dcache_bsize = 32,
909 .platform = "ppc405",
910 },
911 { /* 405LP */
912 .pvr_mask = 0xffff0000,
913 .pvr_value = 0x41F10000,
914 .cpu_name = "405LP",
915 .cpu_features = CPU_FTRS_40X,
916 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
917 .icache_bsize = 32,
918 .dcache_bsize = 32,
919 .platform = "ppc405",
920 },
921 { /* Xilinx Virtex-II Pro */
922 .pvr_mask = 0xfffff000,
923 .pvr_value = 0x20010000,
924 .cpu_name = "Virtex-II Pro",
925 .cpu_features = CPU_FTRS_40X,
926 .cpu_user_features = PPC_FEATURE_32 |
927 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
928 .icache_bsize = 32,
929 .dcache_bsize = 32,
930 .platform = "ppc405",
931 },
932 { /* Xilinx Virtex-4 FX */
933 .pvr_mask = 0xfffff000,
934 .pvr_value = 0x20011000,
935 .cpu_name = "Virtex-4 FX",
936 .cpu_features = CPU_FTRS_40X,
937 .cpu_user_features = PPC_FEATURE_32 |
938 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
939 .icache_bsize = 32,
940 .dcache_bsize = 32,
941 },
942 { /* 405EP */
943 .pvr_mask = 0xffff0000,
944 .pvr_value = 0x51210000,
945 .cpu_name = "405EP",
946 .cpu_features = CPU_FTRS_40X,
947 .cpu_user_features = PPC_FEATURE_32 |
948 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
949 .icache_bsize = 32,
950 .dcache_bsize = 32,
951 .platform = "ppc405",
952 },
953
954 #endif /* CONFIG_40x */
955 #ifdef CONFIG_44x
956 {
957 .pvr_mask = 0xf0000fff,
958 .pvr_value = 0x40000850,
959 .cpu_name = "440EP Rev. A",
960 .cpu_features = CPU_FTRS_44X,
961 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
962 .icache_bsize = 32,
963 .dcache_bsize = 32,
964 .platform = "ppc440",
965 },
966 {
967 .pvr_mask = 0xf0000fff,
968 .pvr_value = 0x400008d3,
969 .cpu_name = "440EP Rev. B",
970 .cpu_features = CPU_FTRS_44X,
971 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
972 .icache_bsize = 32,
973 .dcache_bsize = 32,
974 .platform = "ppc440",
975 },
976 { /* 440GP Rev. B */
977 .pvr_mask = 0xf0000fff,
978 .pvr_value = 0x40000440,
979 .cpu_name = "440GP Rev. B",
980 .cpu_features = CPU_FTRS_44X,
981 .cpu_user_features = COMMON_USER_BOOKE,
982 .icache_bsize = 32,
983 .dcache_bsize = 32,
984 .platform = "ppc440gp",
985 },
986 { /* 440GP Rev. C */
987 .pvr_mask = 0xf0000fff,
988 .pvr_value = 0x40000481,
989 .cpu_name = "440GP Rev. C",
990 .cpu_features = CPU_FTRS_44X,
991 .cpu_user_features = COMMON_USER_BOOKE,
992 .icache_bsize = 32,
993 .dcache_bsize = 32,
994 .platform = "ppc440gp",
995 },
996 { /* 440GX Rev. A */
997 .pvr_mask = 0xf0000fff,
998 .pvr_value = 0x50000850,
999 .cpu_name = "440GX Rev. A",
1000 .cpu_features = CPU_FTRS_44X,
1001 .cpu_user_features = COMMON_USER_BOOKE,
1002 .icache_bsize = 32,
1003 .dcache_bsize = 32,
1004 .platform = "ppc440",
1005 },
1006 { /* 440GX Rev. B */
1007 .pvr_mask = 0xf0000fff,
1008 .pvr_value = 0x50000851,
1009 .cpu_name = "440GX Rev. B",
1010 .cpu_features = CPU_FTRS_44X,
1011 .cpu_user_features = COMMON_USER_BOOKE,
1012 .icache_bsize = 32,
1013 .dcache_bsize = 32,
1014 .platform = "ppc440",
1015 },
1016 { /* 440GX Rev. C */
1017 .pvr_mask = 0xf0000fff,
1018 .pvr_value = 0x50000892,
1019 .cpu_name = "440GX Rev. C",
1020 .cpu_features = CPU_FTRS_44X,
1021 .cpu_user_features = COMMON_USER_BOOKE,
1022 .icache_bsize = 32,
1023 .dcache_bsize = 32,
1024 .platform = "ppc440",
1025 },
1026 { /* 440GX Rev. F */
1027 .pvr_mask = 0xf0000fff,
1028 .pvr_value = 0x50000894,
1029 .cpu_name = "440GX Rev. F",
1030 .cpu_features = CPU_FTRS_44X,
1031 .cpu_user_features = COMMON_USER_BOOKE,
1032 .icache_bsize = 32,
1033 .dcache_bsize = 32,
1034 .platform = "ppc440",
1035 },
1036 { /* 440SP Rev. A */
1037 .pvr_mask = 0xff000fff,
1038 .pvr_value = 0x53000891,
1039 .cpu_name = "440SP Rev. A",
1040 .cpu_features = CPU_FTRS_44X,
1041 .cpu_user_features = COMMON_USER_BOOKE,
1042 .icache_bsize = 32,
1043 .dcache_bsize = 32,
1044 .platform = "ppc440",
1045 },
1046 { /* 440SPe Rev. A */
1047 .pvr_mask = 0xff000fff,
1048 .pvr_value = 0x53000890,
1049 .cpu_name = "440SPe Rev. A",
1050 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1051 CPU_FTR_USE_TB,
1052 .cpu_user_features = COMMON_USER_BOOKE,
1053 .icache_bsize = 32,
1054 .dcache_bsize = 32,
1055 .platform = "ppc440",
1056 },
1057 #endif /* CONFIG_44x */
1058 #ifdef CONFIG_FSL_BOOKE
1059 { /* e200z5 */
1060 .pvr_mask = 0xfff00000,
1061 .pvr_value = 0x81000000,
1062 .cpu_name = "e200z5",
1063 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1064 .cpu_features = CPU_FTRS_E200,
1065 .cpu_user_features = COMMON_USER_BOOKE |
1066 PPC_FEATURE_HAS_EFP_SINGLE |
1067 PPC_FEATURE_UNIFIED_CACHE,
1068 .dcache_bsize = 32,
1069 .platform = "ppc5554",
1070 },
1071 { /* e200z6 */
1072 .pvr_mask = 0xfff00000,
1073 .pvr_value = 0x81100000,
1074 .cpu_name = "e200z6",
1075 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1076 .cpu_features = CPU_FTRS_E200,
1077 .cpu_user_features = COMMON_USER_BOOKE |
1078 PPC_FEATURE_SPE_COMP |
1079 PPC_FEATURE_HAS_EFP_SINGLE |
1080 PPC_FEATURE_UNIFIED_CACHE,
1081 .dcache_bsize = 32,
1082 .platform = "ppc5554",
1083 },
1084 { /* e500 */
1085 .pvr_mask = 0xffff0000,
1086 .pvr_value = 0x80200000,
1087 .cpu_name = "e500",
1088 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1089 .cpu_features = CPU_FTRS_E500,
1090 .cpu_user_features = COMMON_USER_BOOKE |
1091 PPC_FEATURE_SPE_COMP |
1092 PPC_FEATURE_HAS_EFP_SINGLE,
1093 .icache_bsize = 32,
1094 .dcache_bsize = 32,
1095 .num_pmcs = 4,
1096 .oprofile_cpu_type = "ppc/e500",
1097 .oprofile_type = PPC_OPROFILE_BOOKE,
1098 .platform = "ppc8540",
1099 },
1100 { /* e500v2 */
1101 .pvr_mask = 0xffff0000,
1102 .pvr_value = 0x80210000,
1103 .cpu_name = "e500v2",
1104 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1105 .cpu_features = CPU_FTRS_E500_2,
1106 .cpu_user_features = COMMON_USER_BOOKE |
1107 PPC_FEATURE_SPE_COMP |
1108 PPC_FEATURE_HAS_EFP_SINGLE |
1109 PPC_FEATURE_HAS_EFP_DOUBLE,
1110 .icache_bsize = 32,
1111 .dcache_bsize = 32,
1112 .num_pmcs = 4,
1113 .oprofile_cpu_type = "ppc/e500",
1114 .oprofile_type = PPC_OPROFILE_BOOKE,
1115 .platform = "ppc8548",
1116 },
1117 #endif
1118 #if !CLASSIC_PPC
1119 { /* default match */
1120 .pvr_mask = 0x00000000,
1121 .pvr_value = 0x00000000,
1122 .cpu_name = "(generic PPC)",
1123 .cpu_features = CPU_FTRS_GENERIC_32,
1124 .cpu_user_features = PPC_FEATURE_32,
1125 .icache_bsize = 32,
1126 .dcache_bsize = 32,
1127 .platform = "powerpc",
1128 }
1129 #endif /* !CLASSIC_PPC */
1130 #endif /* CONFIG_PPC32 */
1131 };
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