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Merge tag 'for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux...
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23 #include <asm/setup.h>
24
25 struct cpu_spec* cur_cpu_spec = NULL;
26 EXPORT_SYMBOL(cur_cpu_spec);
27
28 /* The platform string corresponding to the real PVR */
29 const char *powerpc_base_platform;
30
31 /* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38 #ifdef CONFIG_PPC32
39 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61 #endif /* CONFIG_PPC32 */
62 #ifdef CONFIG_PPC64
63 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67 extern void __restore_cpu_pa6t(void);
68 extern void __restore_cpu_ppc970(void);
69 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70 extern void __restore_cpu_power7(void);
71 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power8(void);
73 extern void __restore_cpu_a2(void);
74 extern void __flush_tlb_power7(unsigned long inval_selector);
75 extern void __flush_tlb_power8(unsigned long inval_selector);
76 extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
77 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
78 #endif /* CONFIG_PPC64 */
79 #if defined(CONFIG_E500)
80 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
81 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
82 extern void __restore_cpu_e5500(void);
83 extern void __restore_cpu_e6500(void);
84 #endif /* CONFIG_E500 */
85
86 /* This table only contains "desktop" CPUs, it need to be filled with embedded
87 * ones as well...
88 */
89 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
90 PPC_FEATURE_HAS_MMU)
91 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
92 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
93 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
95 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
97 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
99 PPC_FEATURE_TRUE_LE | \
100 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
101 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
102 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
103 PPC_FEATURE_TRUE_LE | \
104 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
105 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
106 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
108 PPC_FEATURE_TRUE_LE | \
109 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
110 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
111 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \
112 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
113 PPC_FEATURE2_VEC_CRYPTO)
114 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
115 PPC_FEATURE_TRUE_LE | \
116 PPC_FEATURE_HAS_ALTIVEC_COMP)
117 #ifdef CONFIG_PPC_BOOK3E_64
118 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
119 #else
120 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
121 PPC_FEATURE_BOOKE)
122 #endif
123
124 static struct cpu_spec __initdata cpu_specs[] = {
125 #ifdef CONFIG_PPC_BOOK3S_64
126 { /* Power4 */
127 .pvr_mask = 0xffff0000,
128 .pvr_value = 0x00350000,
129 .cpu_name = "POWER4 (gp)",
130 .cpu_features = CPU_FTRS_POWER4,
131 .cpu_user_features = COMMON_USER_POWER4,
132 .mmu_features = MMU_FTRS_POWER4,
133 .icache_bsize = 128,
134 .dcache_bsize = 128,
135 .num_pmcs = 8,
136 .pmc_type = PPC_PMC_IBM,
137 .oprofile_cpu_type = "ppc64/power4",
138 .oprofile_type = PPC_OPROFILE_POWER4,
139 .platform = "power4",
140 },
141 { /* Power4+ */
142 .pvr_mask = 0xffff0000,
143 .pvr_value = 0x00380000,
144 .cpu_name = "POWER4+ (gq)",
145 .cpu_features = CPU_FTRS_POWER4,
146 .cpu_user_features = COMMON_USER_POWER4,
147 .mmu_features = MMU_FTRS_POWER4,
148 .icache_bsize = 128,
149 .dcache_bsize = 128,
150 .num_pmcs = 8,
151 .pmc_type = PPC_PMC_IBM,
152 .oprofile_cpu_type = "ppc64/power4",
153 .oprofile_type = PPC_OPROFILE_POWER4,
154 .platform = "power4",
155 },
156 { /* PPC970 */
157 .pvr_mask = 0xffff0000,
158 .pvr_value = 0x00390000,
159 .cpu_name = "PPC970",
160 .cpu_features = CPU_FTRS_PPC970,
161 .cpu_user_features = COMMON_USER_POWER4 |
162 PPC_FEATURE_HAS_ALTIVEC_COMP,
163 .mmu_features = MMU_FTRS_PPC970,
164 .icache_bsize = 128,
165 .dcache_bsize = 128,
166 .num_pmcs = 8,
167 .pmc_type = PPC_PMC_IBM,
168 .cpu_setup = __setup_cpu_ppc970,
169 .cpu_restore = __restore_cpu_ppc970,
170 .oprofile_cpu_type = "ppc64/970",
171 .oprofile_type = PPC_OPROFILE_POWER4,
172 .platform = "ppc970",
173 },
174 { /* PPC970FX */
175 .pvr_mask = 0xffff0000,
176 .pvr_value = 0x003c0000,
177 .cpu_name = "PPC970FX",
178 .cpu_features = CPU_FTRS_PPC970,
179 .cpu_user_features = COMMON_USER_POWER4 |
180 PPC_FEATURE_HAS_ALTIVEC_COMP,
181 .mmu_features = MMU_FTRS_PPC970,
182 .icache_bsize = 128,
183 .dcache_bsize = 128,
184 .num_pmcs = 8,
185 .pmc_type = PPC_PMC_IBM,
186 .cpu_setup = __setup_cpu_ppc970,
187 .cpu_restore = __restore_cpu_ppc970,
188 .oprofile_cpu_type = "ppc64/970",
189 .oprofile_type = PPC_OPROFILE_POWER4,
190 .platform = "ppc970",
191 },
192 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
193 .pvr_mask = 0xffffffff,
194 .pvr_value = 0x00440100,
195 .cpu_name = "PPC970MP",
196 .cpu_features = CPU_FTRS_PPC970,
197 .cpu_user_features = COMMON_USER_POWER4 |
198 PPC_FEATURE_HAS_ALTIVEC_COMP,
199 .mmu_features = MMU_FTRS_PPC970,
200 .icache_bsize = 128,
201 .dcache_bsize = 128,
202 .num_pmcs = 8,
203 .pmc_type = PPC_PMC_IBM,
204 .cpu_setup = __setup_cpu_ppc970,
205 .cpu_restore = __restore_cpu_ppc970,
206 .oprofile_cpu_type = "ppc64/970MP",
207 .oprofile_type = PPC_OPROFILE_POWER4,
208 .platform = "ppc970",
209 },
210 { /* PPC970MP */
211 .pvr_mask = 0xffff0000,
212 .pvr_value = 0x00440000,
213 .cpu_name = "PPC970MP",
214 .cpu_features = CPU_FTRS_PPC970,
215 .cpu_user_features = COMMON_USER_POWER4 |
216 PPC_FEATURE_HAS_ALTIVEC_COMP,
217 .mmu_features = MMU_FTRS_PPC970,
218 .icache_bsize = 128,
219 .dcache_bsize = 128,
220 .num_pmcs = 8,
221 .pmc_type = PPC_PMC_IBM,
222 .cpu_setup = __setup_cpu_ppc970MP,
223 .cpu_restore = __restore_cpu_ppc970,
224 .oprofile_cpu_type = "ppc64/970MP",
225 .oprofile_type = PPC_OPROFILE_POWER4,
226 .platform = "ppc970",
227 },
228 { /* PPC970GX */
229 .pvr_mask = 0xffff0000,
230 .pvr_value = 0x00450000,
231 .cpu_name = "PPC970GX",
232 .cpu_features = CPU_FTRS_PPC970,
233 .cpu_user_features = COMMON_USER_POWER4 |
234 PPC_FEATURE_HAS_ALTIVEC_COMP,
235 .mmu_features = MMU_FTRS_PPC970,
236 .icache_bsize = 128,
237 .dcache_bsize = 128,
238 .num_pmcs = 8,
239 .pmc_type = PPC_PMC_IBM,
240 .cpu_setup = __setup_cpu_ppc970,
241 .oprofile_cpu_type = "ppc64/970",
242 .oprofile_type = PPC_OPROFILE_POWER4,
243 .platform = "ppc970",
244 },
245 { /* Power5 GR */
246 .pvr_mask = 0xffff0000,
247 .pvr_value = 0x003a0000,
248 .cpu_name = "POWER5 (gr)",
249 .cpu_features = CPU_FTRS_POWER5,
250 .cpu_user_features = COMMON_USER_POWER5,
251 .mmu_features = MMU_FTRS_POWER5,
252 .icache_bsize = 128,
253 .dcache_bsize = 128,
254 .num_pmcs = 6,
255 .pmc_type = PPC_PMC_IBM,
256 .oprofile_cpu_type = "ppc64/power5",
257 .oprofile_type = PPC_OPROFILE_POWER4,
258 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
259 * and above but only works on POWER5 and above
260 */
261 .oprofile_mmcra_sihv = MMCRA_SIHV,
262 .oprofile_mmcra_sipr = MMCRA_SIPR,
263 .platform = "power5",
264 },
265 { /* Power5++ */
266 .pvr_mask = 0xffffff00,
267 .pvr_value = 0x003b0300,
268 .cpu_name = "POWER5+ (gs)",
269 .cpu_features = CPU_FTRS_POWER5,
270 .cpu_user_features = COMMON_USER_POWER5_PLUS,
271 .mmu_features = MMU_FTRS_POWER5,
272 .icache_bsize = 128,
273 .dcache_bsize = 128,
274 .num_pmcs = 6,
275 .oprofile_cpu_type = "ppc64/power5++",
276 .oprofile_type = PPC_OPROFILE_POWER4,
277 .oprofile_mmcra_sihv = MMCRA_SIHV,
278 .oprofile_mmcra_sipr = MMCRA_SIPR,
279 .platform = "power5+",
280 },
281 { /* Power5 GS */
282 .pvr_mask = 0xffff0000,
283 .pvr_value = 0x003b0000,
284 .cpu_name = "POWER5+ (gs)",
285 .cpu_features = CPU_FTRS_POWER5,
286 .cpu_user_features = COMMON_USER_POWER5_PLUS,
287 .mmu_features = MMU_FTRS_POWER5,
288 .icache_bsize = 128,
289 .dcache_bsize = 128,
290 .num_pmcs = 6,
291 .pmc_type = PPC_PMC_IBM,
292 .oprofile_cpu_type = "ppc64/power5+",
293 .oprofile_type = PPC_OPROFILE_POWER4,
294 .oprofile_mmcra_sihv = MMCRA_SIHV,
295 .oprofile_mmcra_sipr = MMCRA_SIPR,
296 .platform = "power5+",
297 },
298 { /* POWER6 in P5+ mode; 2.04-compliant processor */
299 .pvr_mask = 0xffffffff,
300 .pvr_value = 0x0f000001,
301 .cpu_name = "POWER5+",
302 .cpu_features = CPU_FTRS_POWER5,
303 .cpu_user_features = COMMON_USER_POWER5_PLUS,
304 .mmu_features = MMU_FTRS_POWER5,
305 .icache_bsize = 128,
306 .dcache_bsize = 128,
307 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
308 .oprofile_type = PPC_OPROFILE_POWER4,
309 .platform = "power5+",
310 },
311 { /* Power6 */
312 .pvr_mask = 0xffff0000,
313 .pvr_value = 0x003e0000,
314 .cpu_name = "POWER6 (raw)",
315 .cpu_features = CPU_FTRS_POWER6,
316 .cpu_user_features = COMMON_USER_POWER6 |
317 PPC_FEATURE_POWER6_EXT,
318 .mmu_features = MMU_FTRS_POWER6,
319 .icache_bsize = 128,
320 .dcache_bsize = 128,
321 .num_pmcs = 6,
322 .pmc_type = PPC_PMC_IBM,
323 .oprofile_cpu_type = "ppc64/power6",
324 .oprofile_type = PPC_OPROFILE_POWER4,
325 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
326 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
327 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
328 POWER6_MMCRA_OTHER,
329 .platform = "power6x",
330 },
331 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
332 .pvr_mask = 0xffffffff,
333 .pvr_value = 0x0f000002,
334 .cpu_name = "POWER6 (architected)",
335 .cpu_features = CPU_FTRS_POWER6,
336 .cpu_user_features = COMMON_USER_POWER6,
337 .mmu_features = MMU_FTRS_POWER6,
338 .icache_bsize = 128,
339 .dcache_bsize = 128,
340 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
341 .oprofile_type = PPC_OPROFILE_POWER4,
342 .platform = "power6",
343 },
344 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
345 .pvr_mask = 0xffffffff,
346 .pvr_value = 0x0f000003,
347 .cpu_name = "POWER7 (architected)",
348 .cpu_features = CPU_FTRS_POWER7,
349 .cpu_user_features = COMMON_USER_POWER7,
350 .cpu_user_features2 = COMMON_USER2_POWER7,
351 .mmu_features = MMU_FTRS_POWER7,
352 .icache_bsize = 128,
353 .dcache_bsize = 128,
354 .oprofile_type = PPC_OPROFILE_POWER4,
355 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
356 .cpu_setup = __setup_cpu_power7,
357 .cpu_restore = __restore_cpu_power7,
358 .flush_tlb = __flush_tlb_power7,
359 .machine_check_early = __machine_check_early_realmode_p7,
360 .platform = "power7",
361 },
362 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
363 .pvr_mask = 0xffffffff,
364 .pvr_value = 0x0f000004,
365 .cpu_name = "POWER8 (architected)",
366 .cpu_features = CPU_FTRS_POWER8,
367 .cpu_user_features = COMMON_USER_POWER8,
368 .cpu_user_features2 = COMMON_USER2_POWER8,
369 .mmu_features = MMU_FTRS_POWER8,
370 .icache_bsize = 128,
371 .dcache_bsize = 128,
372 .oprofile_type = PPC_OPROFILE_INVALID,
373 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
374 .cpu_setup = __setup_cpu_power8,
375 .cpu_restore = __restore_cpu_power8,
376 .flush_tlb = __flush_tlb_power8,
377 .machine_check_early = __machine_check_early_realmode_p8,
378 .platform = "power8",
379 },
380 { /* Power7 */
381 .pvr_mask = 0xffff0000,
382 .pvr_value = 0x003f0000,
383 .cpu_name = "POWER7 (raw)",
384 .cpu_features = CPU_FTRS_POWER7,
385 .cpu_user_features = COMMON_USER_POWER7,
386 .cpu_user_features2 = COMMON_USER2_POWER7,
387 .mmu_features = MMU_FTRS_POWER7,
388 .icache_bsize = 128,
389 .dcache_bsize = 128,
390 .num_pmcs = 6,
391 .pmc_type = PPC_PMC_IBM,
392 .oprofile_cpu_type = "ppc64/power7",
393 .oprofile_type = PPC_OPROFILE_POWER4,
394 .cpu_setup = __setup_cpu_power7,
395 .cpu_restore = __restore_cpu_power7,
396 .flush_tlb = __flush_tlb_power7,
397 .machine_check_early = __machine_check_early_realmode_p7,
398 .platform = "power7",
399 },
400 { /* Power7+ */
401 .pvr_mask = 0xffff0000,
402 .pvr_value = 0x004A0000,
403 .cpu_name = "POWER7+ (raw)",
404 .cpu_features = CPU_FTRS_POWER7,
405 .cpu_user_features = COMMON_USER_POWER7,
406 .cpu_user_features2 = COMMON_USER2_POWER7,
407 .mmu_features = MMU_FTRS_POWER7,
408 .icache_bsize = 128,
409 .dcache_bsize = 128,
410 .num_pmcs = 6,
411 .pmc_type = PPC_PMC_IBM,
412 .oprofile_cpu_type = "ppc64/power7",
413 .oprofile_type = PPC_OPROFILE_POWER4,
414 .cpu_setup = __setup_cpu_power7,
415 .cpu_restore = __restore_cpu_power7,
416 .flush_tlb = __flush_tlb_power7,
417 .machine_check_early = __machine_check_early_realmode_p7,
418 .platform = "power7+",
419 },
420 { /* Power8E */
421 .pvr_mask = 0xffff0000,
422 .pvr_value = 0x004b0000,
423 .cpu_name = "POWER8E (raw)",
424 .cpu_features = CPU_FTRS_POWER8E,
425 .cpu_user_features = COMMON_USER_POWER8,
426 .cpu_user_features2 = COMMON_USER2_POWER8,
427 .mmu_features = MMU_FTRS_POWER8,
428 .icache_bsize = 128,
429 .dcache_bsize = 128,
430 .num_pmcs = 6,
431 .pmc_type = PPC_PMC_IBM,
432 .oprofile_cpu_type = "ppc64/power8",
433 .oprofile_type = PPC_OPROFILE_INVALID,
434 .cpu_setup = __setup_cpu_power8,
435 .cpu_restore = __restore_cpu_power8,
436 .flush_tlb = __flush_tlb_power8,
437 .machine_check_early = __machine_check_early_realmode_p8,
438 .platform = "power8",
439 },
440 { /* Power8NVL */
441 .pvr_mask = 0xffff0000,
442 .pvr_value = 0x004c0000,
443 .cpu_name = "POWER8NVL (raw)",
444 .cpu_features = CPU_FTRS_POWER8,
445 .cpu_user_features = COMMON_USER_POWER8,
446 .cpu_user_features2 = COMMON_USER2_POWER8,
447 .mmu_features = MMU_FTRS_POWER8,
448 .icache_bsize = 128,
449 .dcache_bsize = 128,
450 .num_pmcs = 6,
451 .pmc_type = PPC_PMC_IBM,
452 .oprofile_cpu_type = "ppc64/power8",
453 .oprofile_type = PPC_OPROFILE_INVALID,
454 .cpu_setup = __setup_cpu_power8,
455 .cpu_restore = __restore_cpu_power8,
456 .flush_tlb = __flush_tlb_power8,
457 .machine_check_early = __machine_check_early_realmode_p8,
458 .platform = "power8",
459 },
460 { /* Power8 DD1: Does not support doorbell IPIs */
461 .pvr_mask = 0xffffff00,
462 .pvr_value = 0x004d0100,
463 .cpu_name = "POWER8 (raw)",
464 .cpu_features = CPU_FTRS_POWER8_DD1,
465 .cpu_user_features = COMMON_USER_POWER8,
466 .cpu_user_features2 = COMMON_USER2_POWER8,
467 .mmu_features = MMU_FTRS_POWER8,
468 .icache_bsize = 128,
469 .dcache_bsize = 128,
470 .num_pmcs = 6,
471 .pmc_type = PPC_PMC_IBM,
472 .oprofile_cpu_type = "ppc64/power8",
473 .oprofile_type = PPC_OPROFILE_INVALID,
474 .cpu_setup = __setup_cpu_power8,
475 .cpu_restore = __restore_cpu_power8,
476 .flush_tlb = __flush_tlb_power8,
477 .machine_check_early = __machine_check_early_realmode_p8,
478 .platform = "power8",
479 },
480 { /* Power8 */
481 .pvr_mask = 0xffff0000,
482 .pvr_value = 0x004d0000,
483 .cpu_name = "POWER8 (raw)",
484 .cpu_features = CPU_FTRS_POWER8,
485 .cpu_user_features = COMMON_USER_POWER8,
486 .cpu_user_features2 = COMMON_USER2_POWER8,
487 .mmu_features = MMU_FTRS_POWER8,
488 .icache_bsize = 128,
489 .dcache_bsize = 128,
490 .num_pmcs = 6,
491 .pmc_type = PPC_PMC_IBM,
492 .oprofile_cpu_type = "ppc64/power8",
493 .oprofile_type = PPC_OPROFILE_INVALID,
494 .cpu_setup = __setup_cpu_power8,
495 .cpu_restore = __restore_cpu_power8,
496 .flush_tlb = __flush_tlb_power8,
497 .machine_check_early = __machine_check_early_realmode_p8,
498 .platform = "power8",
499 },
500 { /* Cell Broadband Engine */
501 .pvr_mask = 0xffff0000,
502 .pvr_value = 0x00700000,
503 .cpu_name = "Cell Broadband Engine",
504 .cpu_features = CPU_FTRS_CELL,
505 .cpu_user_features = COMMON_USER_PPC64 |
506 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
507 PPC_FEATURE_SMT,
508 .mmu_features = MMU_FTRS_CELL,
509 .icache_bsize = 128,
510 .dcache_bsize = 128,
511 .num_pmcs = 4,
512 .pmc_type = PPC_PMC_IBM,
513 .oprofile_cpu_type = "ppc64/cell-be",
514 .oprofile_type = PPC_OPROFILE_CELL,
515 .platform = "ppc-cell-be",
516 },
517 { /* PA Semi PA6T */
518 .pvr_mask = 0x7fff0000,
519 .pvr_value = 0x00900000,
520 .cpu_name = "PA6T",
521 .cpu_features = CPU_FTRS_PA6T,
522 .cpu_user_features = COMMON_USER_PA6T,
523 .mmu_features = MMU_FTRS_PA6T,
524 .icache_bsize = 64,
525 .dcache_bsize = 64,
526 .num_pmcs = 6,
527 .pmc_type = PPC_PMC_PA6T,
528 .cpu_setup = __setup_cpu_pa6t,
529 .cpu_restore = __restore_cpu_pa6t,
530 .oprofile_cpu_type = "ppc64/pa6t",
531 .oprofile_type = PPC_OPROFILE_PA6T,
532 .platform = "pa6t",
533 },
534 { /* default match */
535 .pvr_mask = 0x00000000,
536 .pvr_value = 0x00000000,
537 .cpu_name = "POWER4 (compatible)",
538 .cpu_features = CPU_FTRS_COMPATIBLE,
539 .cpu_user_features = COMMON_USER_PPC64,
540 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
541 .icache_bsize = 128,
542 .dcache_bsize = 128,
543 .num_pmcs = 6,
544 .pmc_type = PPC_PMC_IBM,
545 .platform = "power4",
546 }
547 #endif /* CONFIG_PPC_BOOK3S_64 */
548
549 #ifdef CONFIG_PPC32
550 #ifdef CONFIG_PPC_BOOK3S_32
551 { /* 601 */
552 .pvr_mask = 0xffff0000,
553 .pvr_value = 0x00010000,
554 .cpu_name = "601",
555 .cpu_features = CPU_FTRS_PPC601,
556 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
557 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
558 .mmu_features = MMU_FTR_HPTE_TABLE,
559 .icache_bsize = 32,
560 .dcache_bsize = 32,
561 .machine_check = machine_check_generic,
562 .platform = "ppc601",
563 },
564 { /* 603 */
565 .pvr_mask = 0xffff0000,
566 .pvr_value = 0x00030000,
567 .cpu_name = "603",
568 .cpu_features = CPU_FTRS_603,
569 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
570 .mmu_features = 0,
571 .icache_bsize = 32,
572 .dcache_bsize = 32,
573 .cpu_setup = __setup_cpu_603,
574 .machine_check = machine_check_generic,
575 .platform = "ppc603",
576 },
577 { /* 603e */
578 .pvr_mask = 0xffff0000,
579 .pvr_value = 0x00060000,
580 .cpu_name = "603e",
581 .cpu_features = CPU_FTRS_603,
582 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
583 .mmu_features = 0,
584 .icache_bsize = 32,
585 .dcache_bsize = 32,
586 .cpu_setup = __setup_cpu_603,
587 .machine_check = machine_check_generic,
588 .platform = "ppc603",
589 },
590 { /* 603ev */
591 .pvr_mask = 0xffff0000,
592 .pvr_value = 0x00070000,
593 .cpu_name = "603ev",
594 .cpu_features = CPU_FTRS_603,
595 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
596 .mmu_features = 0,
597 .icache_bsize = 32,
598 .dcache_bsize = 32,
599 .cpu_setup = __setup_cpu_603,
600 .machine_check = machine_check_generic,
601 .platform = "ppc603",
602 },
603 { /* 604 */
604 .pvr_mask = 0xffff0000,
605 .pvr_value = 0x00040000,
606 .cpu_name = "604",
607 .cpu_features = CPU_FTRS_604,
608 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
609 .mmu_features = MMU_FTR_HPTE_TABLE,
610 .icache_bsize = 32,
611 .dcache_bsize = 32,
612 .num_pmcs = 2,
613 .cpu_setup = __setup_cpu_604,
614 .machine_check = machine_check_generic,
615 .platform = "ppc604",
616 },
617 { /* 604e */
618 .pvr_mask = 0xfffff000,
619 .pvr_value = 0x00090000,
620 .cpu_name = "604e",
621 .cpu_features = CPU_FTRS_604,
622 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
623 .mmu_features = MMU_FTR_HPTE_TABLE,
624 .icache_bsize = 32,
625 .dcache_bsize = 32,
626 .num_pmcs = 4,
627 .cpu_setup = __setup_cpu_604,
628 .machine_check = machine_check_generic,
629 .platform = "ppc604",
630 },
631 { /* 604r */
632 .pvr_mask = 0xffff0000,
633 .pvr_value = 0x00090000,
634 .cpu_name = "604r",
635 .cpu_features = CPU_FTRS_604,
636 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
637 .mmu_features = MMU_FTR_HPTE_TABLE,
638 .icache_bsize = 32,
639 .dcache_bsize = 32,
640 .num_pmcs = 4,
641 .cpu_setup = __setup_cpu_604,
642 .machine_check = machine_check_generic,
643 .platform = "ppc604",
644 },
645 { /* 604ev */
646 .pvr_mask = 0xffff0000,
647 .pvr_value = 0x000a0000,
648 .cpu_name = "604ev",
649 .cpu_features = CPU_FTRS_604,
650 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
651 .mmu_features = MMU_FTR_HPTE_TABLE,
652 .icache_bsize = 32,
653 .dcache_bsize = 32,
654 .num_pmcs = 4,
655 .cpu_setup = __setup_cpu_604,
656 .machine_check = machine_check_generic,
657 .platform = "ppc604",
658 },
659 { /* 740/750 (0x4202, don't support TAU ?) */
660 .pvr_mask = 0xffffffff,
661 .pvr_value = 0x00084202,
662 .cpu_name = "740/750",
663 .cpu_features = CPU_FTRS_740_NOTAU,
664 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
665 .mmu_features = MMU_FTR_HPTE_TABLE,
666 .icache_bsize = 32,
667 .dcache_bsize = 32,
668 .num_pmcs = 4,
669 .cpu_setup = __setup_cpu_750,
670 .machine_check = machine_check_generic,
671 .platform = "ppc750",
672 },
673 { /* 750CX (80100 and 8010x?) */
674 .pvr_mask = 0xfffffff0,
675 .pvr_value = 0x00080100,
676 .cpu_name = "750CX",
677 .cpu_features = CPU_FTRS_750,
678 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
679 .mmu_features = MMU_FTR_HPTE_TABLE,
680 .icache_bsize = 32,
681 .dcache_bsize = 32,
682 .num_pmcs = 4,
683 .cpu_setup = __setup_cpu_750cx,
684 .machine_check = machine_check_generic,
685 .platform = "ppc750",
686 },
687 { /* 750CX (82201 and 82202) */
688 .pvr_mask = 0xfffffff0,
689 .pvr_value = 0x00082200,
690 .cpu_name = "750CX",
691 .cpu_features = CPU_FTRS_750,
692 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
693 .mmu_features = MMU_FTR_HPTE_TABLE,
694 .icache_bsize = 32,
695 .dcache_bsize = 32,
696 .num_pmcs = 4,
697 .pmc_type = PPC_PMC_IBM,
698 .cpu_setup = __setup_cpu_750cx,
699 .machine_check = machine_check_generic,
700 .platform = "ppc750",
701 },
702 { /* 750CXe (82214) */
703 .pvr_mask = 0xfffffff0,
704 .pvr_value = 0x00082210,
705 .cpu_name = "750CXe",
706 .cpu_features = CPU_FTRS_750,
707 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
708 .mmu_features = MMU_FTR_HPTE_TABLE,
709 .icache_bsize = 32,
710 .dcache_bsize = 32,
711 .num_pmcs = 4,
712 .pmc_type = PPC_PMC_IBM,
713 .cpu_setup = __setup_cpu_750cx,
714 .machine_check = machine_check_generic,
715 .platform = "ppc750",
716 },
717 { /* 750CXe "Gekko" (83214) */
718 .pvr_mask = 0xffffffff,
719 .pvr_value = 0x00083214,
720 .cpu_name = "750CXe",
721 .cpu_features = CPU_FTRS_750,
722 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
723 .mmu_features = MMU_FTR_HPTE_TABLE,
724 .icache_bsize = 32,
725 .dcache_bsize = 32,
726 .num_pmcs = 4,
727 .pmc_type = PPC_PMC_IBM,
728 .cpu_setup = __setup_cpu_750cx,
729 .machine_check = machine_check_generic,
730 .platform = "ppc750",
731 },
732 { /* 750CL (and "Broadway") */
733 .pvr_mask = 0xfffff0e0,
734 .pvr_value = 0x00087000,
735 .cpu_name = "750CL",
736 .cpu_features = CPU_FTRS_750CL,
737 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
738 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
739 .icache_bsize = 32,
740 .dcache_bsize = 32,
741 .num_pmcs = 4,
742 .pmc_type = PPC_PMC_IBM,
743 .cpu_setup = __setup_cpu_750,
744 .machine_check = machine_check_generic,
745 .platform = "ppc750",
746 .oprofile_cpu_type = "ppc/750",
747 .oprofile_type = PPC_OPROFILE_G4,
748 },
749 { /* 745/755 */
750 .pvr_mask = 0xfffff000,
751 .pvr_value = 0x00083000,
752 .cpu_name = "745/755",
753 .cpu_features = CPU_FTRS_750,
754 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
755 .mmu_features = MMU_FTR_HPTE_TABLE,
756 .icache_bsize = 32,
757 .dcache_bsize = 32,
758 .num_pmcs = 4,
759 .pmc_type = PPC_PMC_IBM,
760 .cpu_setup = __setup_cpu_750,
761 .machine_check = machine_check_generic,
762 .platform = "ppc750",
763 },
764 { /* 750FX rev 1.x */
765 .pvr_mask = 0xffffff00,
766 .pvr_value = 0x70000100,
767 .cpu_name = "750FX",
768 .cpu_features = CPU_FTRS_750FX1,
769 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
770 .mmu_features = MMU_FTR_HPTE_TABLE,
771 .icache_bsize = 32,
772 .dcache_bsize = 32,
773 .num_pmcs = 4,
774 .pmc_type = PPC_PMC_IBM,
775 .cpu_setup = __setup_cpu_750,
776 .machine_check = machine_check_generic,
777 .platform = "ppc750",
778 .oprofile_cpu_type = "ppc/750",
779 .oprofile_type = PPC_OPROFILE_G4,
780 },
781 { /* 750FX rev 2.0 must disable HID0[DPM] */
782 .pvr_mask = 0xffffffff,
783 .pvr_value = 0x70000200,
784 .cpu_name = "750FX",
785 .cpu_features = CPU_FTRS_750FX2,
786 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
787 .mmu_features = MMU_FTR_HPTE_TABLE,
788 .icache_bsize = 32,
789 .dcache_bsize = 32,
790 .num_pmcs = 4,
791 .pmc_type = PPC_PMC_IBM,
792 .cpu_setup = __setup_cpu_750,
793 .machine_check = machine_check_generic,
794 .platform = "ppc750",
795 .oprofile_cpu_type = "ppc/750",
796 .oprofile_type = PPC_OPROFILE_G4,
797 },
798 { /* 750FX (All revs except 2.0) */
799 .pvr_mask = 0xffff0000,
800 .pvr_value = 0x70000000,
801 .cpu_name = "750FX",
802 .cpu_features = CPU_FTRS_750FX,
803 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
804 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
805 .icache_bsize = 32,
806 .dcache_bsize = 32,
807 .num_pmcs = 4,
808 .pmc_type = PPC_PMC_IBM,
809 .cpu_setup = __setup_cpu_750fx,
810 .machine_check = machine_check_generic,
811 .platform = "ppc750",
812 .oprofile_cpu_type = "ppc/750",
813 .oprofile_type = PPC_OPROFILE_G4,
814 },
815 { /* 750GX */
816 .pvr_mask = 0xffff0000,
817 .pvr_value = 0x70020000,
818 .cpu_name = "750GX",
819 .cpu_features = CPU_FTRS_750GX,
820 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
821 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
822 .icache_bsize = 32,
823 .dcache_bsize = 32,
824 .num_pmcs = 4,
825 .pmc_type = PPC_PMC_IBM,
826 .cpu_setup = __setup_cpu_750fx,
827 .machine_check = machine_check_generic,
828 .platform = "ppc750",
829 .oprofile_cpu_type = "ppc/750",
830 .oprofile_type = PPC_OPROFILE_G4,
831 },
832 { /* 740/750 (L2CR bit need fixup for 740) */
833 .pvr_mask = 0xffff0000,
834 .pvr_value = 0x00080000,
835 .cpu_name = "740/750",
836 .cpu_features = CPU_FTRS_740,
837 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
838 .mmu_features = MMU_FTR_HPTE_TABLE,
839 .icache_bsize = 32,
840 .dcache_bsize = 32,
841 .num_pmcs = 4,
842 .pmc_type = PPC_PMC_IBM,
843 .cpu_setup = __setup_cpu_750,
844 .machine_check = machine_check_generic,
845 .platform = "ppc750",
846 },
847 { /* 7400 rev 1.1 ? (no TAU) */
848 .pvr_mask = 0xffffffff,
849 .pvr_value = 0x000c1101,
850 .cpu_name = "7400 (1.1)",
851 .cpu_features = CPU_FTRS_7400_NOTAU,
852 .cpu_user_features = COMMON_USER |
853 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
854 .mmu_features = MMU_FTR_HPTE_TABLE,
855 .icache_bsize = 32,
856 .dcache_bsize = 32,
857 .num_pmcs = 4,
858 .pmc_type = PPC_PMC_G4,
859 .cpu_setup = __setup_cpu_7400,
860 .machine_check = machine_check_generic,
861 .platform = "ppc7400",
862 },
863 { /* 7400 */
864 .pvr_mask = 0xffff0000,
865 .pvr_value = 0x000c0000,
866 .cpu_name = "7400",
867 .cpu_features = CPU_FTRS_7400,
868 .cpu_user_features = COMMON_USER |
869 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
870 .mmu_features = MMU_FTR_HPTE_TABLE,
871 .icache_bsize = 32,
872 .dcache_bsize = 32,
873 .num_pmcs = 4,
874 .pmc_type = PPC_PMC_G4,
875 .cpu_setup = __setup_cpu_7400,
876 .machine_check = machine_check_generic,
877 .platform = "ppc7400",
878 },
879 { /* 7410 */
880 .pvr_mask = 0xffff0000,
881 .pvr_value = 0x800c0000,
882 .cpu_name = "7410",
883 .cpu_features = CPU_FTRS_7400,
884 .cpu_user_features = COMMON_USER |
885 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
886 .mmu_features = MMU_FTR_HPTE_TABLE,
887 .icache_bsize = 32,
888 .dcache_bsize = 32,
889 .num_pmcs = 4,
890 .pmc_type = PPC_PMC_G4,
891 .cpu_setup = __setup_cpu_7410,
892 .machine_check = machine_check_generic,
893 .platform = "ppc7400",
894 },
895 { /* 7450 2.0 - no doze/nap */
896 .pvr_mask = 0xffffffff,
897 .pvr_value = 0x80000200,
898 .cpu_name = "7450",
899 .cpu_features = CPU_FTRS_7450_20,
900 .cpu_user_features = COMMON_USER |
901 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
902 .mmu_features = MMU_FTR_HPTE_TABLE,
903 .icache_bsize = 32,
904 .dcache_bsize = 32,
905 .num_pmcs = 6,
906 .pmc_type = PPC_PMC_G4,
907 .cpu_setup = __setup_cpu_745x,
908 .oprofile_cpu_type = "ppc/7450",
909 .oprofile_type = PPC_OPROFILE_G4,
910 .machine_check = machine_check_generic,
911 .platform = "ppc7450",
912 },
913 { /* 7450 2.1 */
914 .pvr_mask = 0xffffffff,
915 .pvr_value = 0x80000201,
916 .cpu_name = "7450",
917 .cpu_features = CPU_FTRS_7450_21,
918 .cpu_user_features = COMMON_USER |
919 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
920 .mmu_features = MMU_FTR_HPTE_TABLE,
921 .icache_bsize = 32,
922 .dcache_bsize = 32,
923 .num_pmcs = 6,
924 .pmc_type = PPC_PMC_G4,
925 .cpu_setup = __setup_cpu_745x,
926 .oprofile_cpu_type = "ppc/7450",
927 .oprofile_type = PPC_OPROFILE_G4,
928 .machine_check = machine_check_generic,
929 .platform = "ppc7450",
930 },
931 { /* 7450 2.3 and newer */
932 .pvr_mask = 0xffff0000,
933 .pvr_value = 0x80000000,
934 .cpu_name = "7450",
935 .cpu_features = CPU_FTRS_7450_23,
936 .cpu_user_features = COMMON_USER |
937 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
938 .mmu_features = MMU_FTR_HPTE_TABLE,
939 .icache_bsize = 32,
940 .dcache_bsize = 32,
941 .num_pmcs = 6,
942 .pmc_type = PPC_PMC_G4,
943 .cpu_setup = __setup_cpu_745x,
944 .oprofile_cpu_type = "ppc/7450",
945 .oprofile_type = PPC_OPROFILE_G4,
946 .machine_check = machine_check_generic,
947 .platform = "ppc7450",
948 },
949 { /* 7455 rev 1.x */
950 .pvr_mask = 0xffffff00,
951 .pvr_value = 0x80010100,
952 .cpu_name = "7455",
953 .cpu_features = CPU_FTRS_7455_1,
954 .cpu_user_features = COMMON_USER |
955 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
956 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
957 .icache_bsize = 32,
958 .dcache_bsize = 32,
959 .num_pmcs = 6,
960 .pmc_type = PPC_PMC_G4,
961 .cpu_setup = __setup_cpu_745x,
962 .oprofile_cpu_type = "ppc/7450",
963 .oprofile_type = PPC_OPROFILE_G4,
964 .machine_check = machine_check_generic,
965 .platform = "ppc7450",
966 },
967 { /* 7455 rev 2.0 */
968 .pvr_mask = 0xffffffff,
969 .pvr_value = 0x80010200,
970 .cpu_name = "7455",
971 .cpu_features = CPU_FTRS_7455_20,
972 .cpu_user_features = COMMON_USER |
973 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
974 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
975 .icache_bsize = 32,
976 .dcache_bsize = 32,
977 .num_pmcs = 6,
978 .pmc_type = PPC_PMC_G4,
979 .cpu_setup = __setup_cpu_745x,
980 .oprofile_cpu_type = "ppc/7450",
981 .oprofile_type = PPC_OPROFILE_G4,
982 .machine_check = machine_check_generic,
983 .platform = "ppc7450",
984 },
985 { /* 7455 others */
986 .pvr_mask = 0xffff0000,
987 .pvr_value = 0x80010000,
988 .cpu_name = "7455",
989 .cpu_features = CPU_FTRS_7455,
990 .cpu_user_features = COMMON_USER |
991 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
992 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
993 .icache_bsize = 32,
994 .dcache_bsize = 32,
995 .num_pmcs = 6,
996 .pmc_type = PPC_PMC_G4,
997 .cpu_setup = __setup_cpu_745x,
998 .oprofile_cpu_type = "ppc/7450",
999 .oprofile_type = PPC_OPROFILE_G4,
1000 .machine_check = machine_check_generic,
1001 .platform = "ppc7450",
1002 },
1003 { /* 7447/7457 Rev 1.0 */
1004 .pvr_mask = 0xffffffff,
1005 .pvr_value = 0x80020100,
1006 .cpu_name = "7447/7457",
1007 .cpu_features = CPU_FTRS_7447_10,
1008 .cpu_user_features = COMMON_USER |
1009 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1010 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1011 .icache_bsize = 32,
1012 .dcache_bsize = 32,
1013 .num_pmcs = 6,
1014 .pmc_type = PPC_PMC_G4,
1015 .cpu_setup = __setup_cpu_745x,
1016 .oprofile_cpu_type = "ppc/7450",
1017 .oprofile_type = PPC_OPROFILE_G4,
1018 .machine_check = machine_check_generic,
1019 .platform = "ppc7450",
1020 },
1021 { /* 7447/7457 Rev 1.1 */
1022 .pvr_mask = 0xffffffff,
1023 .pvr_value = 0x80020101,
1024 .cpu_name = "7447/7457",
1025 .cpu_features = CPU_FTRS_7447_10,
1026 .cpu_user_features = COMMON_USER |
1027 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1028 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1029 .icache_bsize = 32,
1030 .dcache_bsize = 32,
1031 .num_pmcs = 6,
1032 .pmc_type = PPC_PMC_G4,
1033 .cpu_setup = __setup_cpu_745x,
1034 .oprofile_cpu_type = "ppc/7450",
1035 .oprofile_type = PPC_OPROFILE_G4,
1036 .machine_check = machine_check_generic,
1037 .platform = "ppc7450",
1038 },
1039 { /* 7447/7457 Rev 1.2 and later */
1040 .pvr_mask = 0xffff0000,
1041 .pvr_value = 0x80020000,
1042 .cpu_name = "7447/7457",
1043 .cpu_features = CPU_FTRS_7447,
1044 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1045 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1046 .icache_bsize = 32,
1047 .dcache_bsize = 32,
1048 .num_pmcs = 6,
1049 .pmc_type = PPC_PMC_G4,
1050 .cpu_setup = __setup_cpu_745x,
1051 .oprofile_cpu_type = "ppc/7450",
1052 .oprofile_type = PPC_OPROFILE_G4,
1053 .machine_check = machine_check_generic,
1054 .platform = "ppc7450",
1055 },
1056 { /* 7447A */
1057 .pvr_mask = 0xffff0000,
1058 .pvr_value = 0x80030000,
1059 .cpu_name = "7447A",
1060 .cpu_features = CPU_FTRS_7447A,
1061 .cpu_user_features = COMMON_USER |
1062 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1063 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1064 .icache_bsize = 32,
1065 .dcache_bsize = 32,
1066 .num_pmcs = 6,
1067 .pmc_type = PPC_PMC_G4,
1068 .cpu_setup = __setup_cpu_745x,
1069 .oprofile_cpu_type = "ppc/7450",
1070 .oprofile_type = PPC_OPROFILE_G4,
1071 .machine_check = machine_check_generic,
1072 .platform = "ppc7450",
1073 },
1074 { /* 7448 */
1075 .pvr_mask = 0xffff0000,
1076 .pvr_value = 0x80040000,
1077 .cpu_name = "7448",
1078 .cpu_features = CPU_FTRS_7448,
1079 .cpu_user_features = COMMON_USER |
1080 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1081 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1082 .icache_bsize = 32,
1083 .dcache_bsize = 32,
1084 .num_pmcs = 6,
1085 .pmc_type = PPC_PMC_G4,
1086 .cpu_setup = __setup_cpu_745x,
1087 .oprofile_cpu_type = "ppc/7450",
1088 .oprofile_type = PPC_OPROFILE_G4,
1089 .machine_check = machine_check_generic,
1090 .platform = "ppc7450",
1091 },
1092 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1093 .pvr_mask = 0x7fff0000,
1094 .pvr_value = 0x00810000,
1095 .cpu_name = "82xx",
1096 .cpu_features = CPU_FTRS_82XX,
1097 .cpu_user_features = COMMON_USER,
1098 .mmu_features = 0,
1099 .icache_bsize = 32,
1100 .dcache_bsize = 32,
1101 .cpu_setup = __setup_cpu_603,
1102 .machine_check = machine_check_generic,
1103 .platform = "ppc603",
1104 },
1105 { /* All G2_LE (603e core, plus some) have the same pvr */
1106 .pvr_mask = 0x7fff0000,
1107 .pvr_value = 0x00820000,
1108 .cpu_name = "G2_LE",
1109 .cpu_features = CPU_FTRS_G2_LE,
1110 .cpu_user_features = COMMON_USER,
1111 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1112 .icache_bsize = 32,
1113 .dcache_bsize = 32,
1114 .cpu_setup = __setup_cpu_603,
1115 .machine_check = machine_check_generic,
1116 .platform = "ppc603",
1117 },
1118 { /* e300c1 (a 603e core, plus some) on 83xx */
1119 .pvr_mask = 0x7fff0000,
1120 .pvr_value = 0x00830000,
1121 .cpu_name = "e300c1",
1122 .cpu_features = CPU_FTRS_E300,
1123 .cpu_user_features = COMMON_USER,
1124 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1125 .icache_bsize = 32,
1126 .dcache_bsize = 32,
1127 .cpu_setup = __setup_cpu_603,
1128 .machine_check = machine_check_generic,
1129 .platform = "ppc603",
1130 },
1131 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1132 .pvr_mask = 0x7fff0000,
1133 .pvr_value = 0x00840000,
1134 .cpu_name = "e300c2",
1135 .cpu_features = CPU_FTRS_E300C2,
1136 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1137 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1138 MMU_FTR_NEED_DTLB_SW_LRU,
1139 .icache_bsize = 32,
1140 .dcache_bsize = 32,
1141 .cpu_setup = __setup_cpu_603,
1142 .machine_check = machine_check_generic,
1143 .platform = "ppc603",
1144 },
1145 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1146 .pvr_mask = 0x7fff0000,
1147 .pvr_value = 0x00850000,
1148 .cpu_name = "e300c3",
1149 .cpu_features = CPU_FTRS_E300,
1150 .cpu_user_features = COMMON_USER,
1151 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1152 MMU_FTR_NEED_DTLB_SW_LRU,
1153 .icache_bsize = 32,
1154 .dcache_bsize = 32,
1155 .cpu_setup = __setup_cpu_603,
1156 .machine_check = machine_check_generic,
1157 .num_pmcs = 4,
1158 .oprofile_cpu_type = "ppc/e300",
1159 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1160 .platform = "ppc603",
1161 },
1162 { /* e300c4 (e300c1, plus one IU) */
1163 .pvr_mask = 0x7fff0000,
1164 .pvr_value = 0x00860000,
1165 .cpu_name = "e300c4",
1166 .cpu_features = CPU_FTRS_E300,
1167 .cpu_user_features = COMMON_USER,
1168 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1169 MMU_FTR_NEED_DTLB_SW_LRU,
1170 .icache_bsize = 32,
1171 .dcache_bsize = 32,
1172 .cpu_setup = __setup_cpu_603,
1173 .machine_check = machine_check_generic,
1174 .num_pmcs = 4,
1175 .oprofile_cpu_type = "ppc/e300",
1176 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1177 .platform = "ppc603",
1178 },
1179 { /* default match, we assume split I/D cache & TB (non-601)... */
1180 .pvr_mask = 0x00000000,
1181 .pvr_value = 0x00000000,
1182 .cpu_name = "(generic PPC)",
1183 .cpu_features = CPU_FTRS_CLASSIC32,
1184 .cpu_user_features = COMMON_USER,
1185 .mmu_features = MMU_FTR_HPTE_TABLE,
1186 .icache_bsize = 32,
1187 .dcache_bsize = 32,
1188 .machine_check = machine_check_generic,
1189 .platform = "ppc603",
1190 },
1191 #endif /* CONFIG_PPC_BOOK3S_32 */
1192 #ifdef CONFIG_8xx
1193 { /* 8xx */
1194 .pvr_mask = 0xffff0000,
1195 .pvr_value = 0x00500000,
1196 .cpu_name = "8xx",
1197 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1198 * if the 8xx code is there.... */
1199 .cpu_features = CPU_FTRS_8XX,
1200 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1201 .mmu_features = MMU_FTR_TYPE_8xx,
1202 .icache_bsize = 16,
1203 .dcache_bsize = 16,
1204 .platform = "ppc823",
1205 },
1206 #endif /* CONFIG_8xx */
1207 #ifdef CONFIG_40x
1208 { /* 403GC */
1209 .pvr_mask = 0xffffff00,
1210 .pvr_value = 0x00200200,
1211 .cpu_name = "403GC",
1212 .cpu_features = CPU_FTRS_40X,
1213 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1214 .mmu_features = MMU_FTR_TYPE_40x,
1215 .icache_bsize = 16,
1216 .dcache_bsize = 16,
1217 .machine_check = machine_check_4xx,
1218 .platform = "ppc403",
1219 },
1220 { /* 403GCX */
1221 .pvr_mask = 0xffffff00,
1222 .pvr_value = 0x00201400,
1223 .cpu_name = "403GCX",
1224 .cpu_features = CPU_FTRS_40X,
1225 .cpu_user_features = PPC_FEATURE_32 |
1226 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1227 .mmu_features = MMU_FTR_TYPE_40x,
1228 .icache_bsize = 16,
1229 .dcache_bsize = 16,
1230 .machine_check = machine_check_4xx,
1231 .platform = "ppc403",
1232 },
1233 { /* 403G ?? */
1234 .pvr_mask = 0xffff0000,
1235 .pvr_value = 0x00200000,
1236 .cpu_name = "403G ??",
1237 .cpu_features = CPU_FTRS_40X,
1238 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1239 .mmu_features = MMU_FTR_TYPE_40x,
1240 .icache_bsize = 16,
1241 .dcache_bsize = 16,
1242 .machine_check = machine_check_4xx,
1243 .platform = "ppc403",
1244 },
1245 { /* 405GP */
1246 .pvr_mask = 0xffff0000,
1247 .pvr_value = 0x40110000,
1248 .cpu_name = "405GP",
1249 .cpu_features = CPU_FTRS_40X,
1250 .cpu_user_features = PPC_FEATURE_32 |
1251 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1252 .mmu_features = MMU_FTR_TYPE_40x,
1253 .icache_bsize = 32,
1254 .dcache_bsize = 32,
1255 .machine_check = machine_check_4xx,
1256 .platform = "ppc405",
1257 },
1258 { /* STB 03xxx */
1259 .pvr_mask = 0xffff0000,
1260 .pvr_value = 0x40130000,
1261 .cpu_name = "STB03xxx",
1262 .cpu_features = CPU_FTRS_40X,
1263 .cpu_user_features = PPC_FEATURE_32 |
1264 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1265 .mmu_features = MMU_FTR_TYPE_40x,
1266 .icache_bsize = 32,
1267 .dcache_bsize = 32,
1268 .machine_check = machine_check_4xx,
1269 .platform = "ppc405",
1270 },
1271 { /* STB 04xxx */
1272 .pvr_mask = 0xffff0000,
1273 .pvr_value = 0x41810000,
1274 .cpu_name = "STB04xxx",
1275 .cpu_features = CPU_FTRS_40X,
1276 .cpu_user_features = PPC_FEATURE_32 |
1277 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1278 .mmu_features = MMU_FTR_TYPE_40x,
1279 .icache_bsize = 32,
1280 .dcache_bsize = 32,
1281 .machine_check = machine_check_4xx,
1282 .platform = "ppc405",
1283 },
1284 { /* NP405L */
1285 .pvr_mask = 0xffff0000,
1286 .pvr_value = 0x41610000,
1287 .cpu_name = "NP405L",
1288 .cpu_features = CPU_FTRS_40X,
1289 .cpu_user_features = PPC_FEATURE_32 |
1290 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1291 .mmu_features = MMU_FTR_TYPE_40x,
1292 .icache_bsize = 32,
1293 .dcache_bsize = 32,
1294 .machine_check = machine_check_4xx,
1295 .platform = "ppc405",
1296 },
1297 { /* NP4GS3 */
1298 .pvr_mask = 0xffff0000,
1299 .pvr_value = 0x40B10000,
1300 .cpu_name = "NP4GS3",
1301 .cpu_features = CPU_FTRS_40X,
1302 .cpu_user_features = PPC_FEATURE_32 |
1303 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1304 .mmu_features = MMU_FTR_TYPE_40x,
1305 .icache_bsize = 32,
1306 .dcache_bsize = 32,
1307 .machine_check = machine_check_4xx,
1308 .platform = "ppc405",
1309 },
1310 { /* NP405H */
1311 .pvr_mask = 0xffff0000,
1312 .pvr_value = 0x41410000,
1313 .cpu_name = "NP405H",
1314 .cpu_features = CPU_FTRS_40X,
1315 .cpu_user_features = PPC_FEATURE_32 |
1316 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1317 .mmu_features = MMU_FTR_TYPE_40x,
1318 .icache_bsize = 32,
1319 .dcache_bsize = 32,
1320 .machine_check = machine_check_4xx,
1321 .platform = "ppc405",
1322 },
1323 { /* 405GPr */
1324 .pvr_mask = 0xffff0000,
1325 .pvr_value = 0x50910000,
1326 .cpu_name = "405GPr",
1327 .cpu_features = CPU_FTRS_40X,
1328 .cpu_user_features = PPC_FEATURE_32 |
1329 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1330 .mmu_features = MMU_FTR_TYPE_40x,
1331 .icache_bsize = 32,
1332 .dcache_bsize = 32,
1333 .machine_check = machine_check_4xx,
1334 .platform = "ppc405",
1335 },
1336 { /* STBx25xx */
1337 .pvr_mask = 0xffff0000,
1338 .pvr_value = 0x51510000,
1339 .cpu_name = "STBx25xx",
1340 .cpu_features = CPU_FTRS_40X,
1341 .cpu_user_features = PPC_FEATURE_32 |
1342 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1343 .mmu_features = MMU_FTR_TYPE_40x,
1344 .icache_bsize = 32,
1345 .dcache_bsize = 32,
1346 .machine_check = machine_check_4xx,
1347 .platform = "ppc405",
1348 },
1349 { /* 405LP */
1350 .pvr_mask = 0xffff0000,
1351 .pvr_value = 0x41F10000,
1352 .cpu_name = "405LP",
1353 .cpu_features = CPU_FTRS_40X,
1354 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1355 .mmu_features = MMU_FTR_TYPE_40x,
1356 .icache_bsize = 32,
1357 .dcache_bsize = 32,
1358 .machine_check = machine_check_4xx,
1359 .platform = "ppc405",
1360 },
1361 { /* Xilinx Virtex-II Pro */
1362 .pvr_mask = 0xfffff000,
1363 .pvr_value = 0x20010000,
1364 .cpu_name = "Virtex-II Pro",
1365 .cpu_features = CPU_FTRS_40X,
1366 .cpu_user_features = PPC_FEATURE_32 |
1367 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1368 .mmu_features = MMU_FTR_TYPE_40x,
1369 .icache_bsize = 32,
1370 .dcache_bsize = 32,
1371 .machine_check = machine_check_4xx,
1372 .platform = "ppc405",
1373 },
1374 { /* Xilinx Virtex-4 FX */
1375 .pvr_mask = 0xfffff000,
1376 .pvr_value = 0x20011000,
1377 .cpu_name = "Virtex-4 FX",
1378 .cpu_features = CPU_FTRS_40X,
1379 .cpu_user_features = PPC_FEATURE_32 |
1380 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1381 .mmu_features = MMU_FTR_TYPE_40x,
1382 .icache_bsize = 32,
1383 .dcache_bsize = 32,
1384 .machine_check = machine_check_4xx,
1385 .platform = "ppc405",
1386 },
1387 { /* 405EP */
1388 .pvr_mask = 0xffff0000,
1389 .pvr_value = 0x51210000,
1390 .cpu_name = "405EP",
1391 .cpu_features = CPU_FTRS_40X,
1392 .cpu_user_features = PPC_FEATURE_32 |
1393 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1394 .mmu_features = MMU_FTR_TYPE_40x,
1395 .icache_bsize = 32,
1396 .dcache_bsize = 32,
1397 .machine_check = machine_check_4xx,
1398 .platform = "ppc405",
1399 },
1400 { /* 405EX Rev. A/B with Security */
1401 .pvr_mask = 0xffff000f,
1402 .pvr_value = 0x12910007,
1403 .cpu_name = "405EX Rev. A/B",
1404 .cpu_features = CPU_FTRS_40X,
1405 .cpu_user_features = PPC_FEATURE_32 |
1406 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1407 .mmu_features = MMU_FTR_TYPE_40x,
1408 .icache_bsize = 32,
1409 .dcache_bsize = 32,
1410 .machine_check = machine_check_4xx,
1411 .platform = "ppc405",
1412 },
1413 { /* 405EX Rev. C without Security */
1414 .pvr_mask = 0xffff000f,
1415 .pvr_value = 0x1291000d,
1416 .cpu_name = "405EX Rev. C",
1417 .cpu_features = CPU_FTRS_40X,
1418 .cpu_user_features = PPC_FEATURE_32 |
1419 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1420 .mmu_features = MMU_FTR_TYPE_40x,
1421 .icache_bsize = 32,
1422 .dcache_bsize = 32,
1423 .machine_check = machine_check_4xx,
1424 .platform = "ppc405",
1425 },
1426 { /* 405EX Rev. C with Security */
1427 .pvr_mask = 0xffff000f,
1428 .pvr_value = 0x1291000f,
1429 .cpu_name = "405EX Rev. C",
1430 .cpu_features = CPU_FTRS_40X,
1431 .cpu_user_features = PPC_FEATURE_32 |
1432 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1433 .mmu_features = MMU_FTR_TYPE_40x,
1434 .icache_bsize = 32,
1435 .dcache_bsize = 32,
1436 .machine_check = machine_check_4xx,
1437 .platform = "ppc405",
1438 },
1439 { /* 405EX Rev. D without Security */
1440 .pvr_mask = 0xffff000f,
1441 .pvr_value = 0x12910003,
1442 .cpu_name = "405EX Rev. D",
1443 .cpu_features = CPU_FTRS_40X,
1444 .cpu_user_features = PPC_FEATURE_32 |
1445 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1446 .mmu_features = MMU_FTR_TYPE_40x,
1447 .icache_bsize = 32,
1448 .dcache_bsize = 32,
1449 .machine_check = machine_check_4xx,
1450 .platform = "ppc405",
1451 },
1452 { /* 405EX Rev. D with Security */
1453 .pvr_mask = 0xffff000f,
1454 .pvr_value = 0x12910005,
1455 .cpu_name = "405EX Rev. D",
1456 .cpu_features = CPU_FTRS_40X,
1457 .cpu_user_features = PPC_FEATURE_32 |
1458 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1459 .mmu_features = MMU_FTR_TYPE_40x,
1460 .icache_bsize = 32,
1461 .dcache_bsize = 32,
1462 .machine_check = machine_check_4xx,
1463 .platform = "ppc405",
1464 },
1465 { /* 405EXr Rev. A/B without Security */
1466 .pvr_mask = 0xffff000f,
1467 .pvr_value = 0x12910001,
1468 .cpu_name = "405EXr Rev. A/B",
1469 .cpu_features = CPU_FTRS_40X,
1470 .cpu_user_features = PPC_FEATURE_32 |
1471 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1472 .mmu_features = MMU_FTR_TYPE_40x,
1473 .icache_bsize = 32,
1474 .dcache_bsize = 32,
1475 .machine_check = machine_check_4xx,
1476 .platform = "ppc405",
1477 },
1478 { /* 405EXr Rev. C without Security */
1479 .pvr_mask = 0xffff000f,
1480 .pvr_value = 0x12910009,
1481 .cpu_name = "405EXr Rev. C",
1482 .cpu_features = CPU_FTRS_40X,
1483 .cpu_user_features = PPC_FEATURE_32 |
1484 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1485 .mmu_features = MMU_FTR_TYPE_40x,
1486 .icache_bsize = 32,
1487 .dcache_bsize = 32,
1488 .machine_check = machine_check_4xx,
1489 .platform = "ppc405",
1490 },
1491 { /* 405EXr Rev. C with Security */
1492 .pvr_mask = 0xffff000f,
1493 .pvr_value = 0x1291000b,
1494 .cpu_name = "405EXr Rev. C",
1495 .cpu_features = CPU_FTRS_40X,
1496 .cpu_user_features = PPC_FEATURE_32 |
1497 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1498 .mmu_features = MMU_FTR_TYPE_40x,
1499 .icache_bsize = 32,
1500 .dcache_bsize = 32,
1501 .machine_check = machine_check_4xx,
1502 .platform = "ppc405",
1503 },
1504 { /* 405EXr Rev. D without Security */
1505 .pvr_mask = 0xffff000f,
1506 .pvr_value = 0x12910000,
1507 .cpu_name = "405EXr Rev. D",
1508 .cpu_features = CPU_FTRS_40X,
1509 .cpu_user_features = PPC_FEATURE_32 |
1510 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1511 .mmu_features = MMU_FTR_TYPE_40x,
1512 .icache_bsize = 32,
1513 .dcache_bsize = 32,
1514 .machine_check = machine_check_4xx,
1515 .platform = "ppc405",
1516 },
1517 { /* 405EXr Rev. D with Security */
1518 .pvr_mask = 0xffff000f,
1519 .pvr_value = 0x12910002,
1520 .cpu_name = "405EXr Rev. D",
1521 .cpu_features = CPU_FTRS_40X,
1522 .cpu_user_features = PPC_FEATURE_32 |
1523 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1524 .mmu_features = MMU_FTR_TYPE_40x,
1525 .icache_bsize = 32,
1526 .dcache_bsize = 32,
1527 .machine_check = machine_check_4xx,
1528 .platform = "ppc405",
1529 },
1530 {
1531 /* 405EZ */
1532 .pvr_mask = 0xffff0000,
1533 .pvr_value = 0x41510000,
1534 .cpu_name = "405EZ",
1535 .cpu_features = CPU_FTRS_40X,
1536 .cpu_user_features = PPC_FEATURE_32 |
1537 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1538 .mmu_features = MMU_FTR_TYPE_40x,
1539 .icache_bsize = 32,
1540 .dcache_bsize = 32,
1541 .machine_check = machine_check_4xx,
1542 .platform = "ppc405",
1543 },
1544 { /* APM8018X */
1545 .pvr_mask = 0xffff0000,
1546 .pvr_value = 0x7ff11432,
1547 .cpu_name = "APM8018X",
1548 .cpu_features = CPU_FTRS_40X,
1549 .cpu_user_features = PPC_FEATURE_32 |
1550 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1551 .mmu_features = MMU_FTR_TYPE_40x,
1552 .icache_bsize = 32,
1553 .dcache_bsize = 32,
1554 .machine_check = machine_check_4xx,
1555 .platform = "ppc405",
1556 },
1557 { /* default match */
1558 .pvr_mask = 0x00000000,
1559 .pvr_value = 0x00000000,
1560 .cpu_name = "(generic 40x PPC)",
1561 .cpu_features = CPU_FTRS_40X,
1562 .cpu_user_features = PPC_FEATURE_32 |
1563 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1564 .mmu_features = MMU_FTR_TYPE_40x,
1565 .icache_bsize = 32,
1566 .dcache_bsize = 32,
1567 .machine_check = machine_check_4xx,
1568 .platform = "ppc405",
1569 }
1570
1571 #endif /* CONFIG_40x */
1572 #ifdef CONFIG_44x
1573 {
1574 .pvr_mask = 0xf0000fff,
1575 .pvr_value = 0x40000850,
1576 .cpu_name = "440GR Rev. A",
1577 .cpu_features = CPU_FTRS_44X,
1578 .cpu_user_features = COMMON_USER_BOOKE,
1579 .mmu_features = MMU_FTR_TYPE_44x,
1580 .icache_bsize = 32,
1581 .dcache_bsize = 32,
1582 .machine_check = machine_check_4xx,
1583 .platform = "ppc440",
1584 },
1585 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1586 .pvr_mask = 0xf0000fff,
1587 .pvr_value = 0x40000858,
1588 .cpu_name = "440EP Rev. A",
1589 .cpu_features = CPU_FTRS_44X,
1590 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1591 .mmu_features = MMU_FTR_TYPE_44x,
1592 .icache_bsize = 32,
1593 .dcache_bsize = 32,
1594 .cpu_setup = __setup_cpu_440ep,
1595 .machine_check = machine_check_4xx,
1596 .platform = "ppc440",
1597 },
1598 {
1599 .pvr_mask = 0xf0000fff,
1600 .pvr_value = 0x400008d3,
1601 .cpu_name = "440GR Rev. B",
1602 .cpu_features = CPU_FTRS_44X,
1603 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1604 .mmu_features = MMU_FTR_TYPE_44x,
1605 .icache_bsize = 32,
1606 .dcache_bsize = 32,
1607 .machine_check = machine_check_4xx,
1608 .platform = "ppc440",
1609 },
1610 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1611 .pvr_mask = 0xf0000ff7,
1612 .pvr_value = 0x400008d4,
1613 .cpu_name = "440EP Rev. C",
1614 .cpu_features = CPU_FTRS_44X,
1615 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1616 .mmu_features = MMU_FTR_TYPE_44x,
1617 .icache_bsize = 32,
1618 .dcache_bsize = 32,
1619 .cpu_setup = __setup_cpu_440ep,
1620 .machine_check = machine_check_4xx,
1621 .platform = "ppc440",
1622 },
1623 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1624 .pvr_mask = 0xf0000fff,
1625 .pvr_value = 0x400008db,
1626 .cpu_name = "440EP Rev. B",
1627 .cpu_features = CPU_FTRS_44X,
1628 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1629 .mmu_features = MMU_FTR_TYPE_44x,
1630 .icache_bsize = 32,
1631 .dcache_bsize = 32,
1632 .cpu_setup = __setup_cpu_440ep,
1633 .machine_check = machine_check_4xx,
1634 .platform = "ppc440",
1635 },
1636 { /* 440GRX */
1637 .pvr_mask = 0xf0000ffb,
1638 .pvr_value = 0x200008D0,
1639 .cpu_name = "440GRX",
1640 .cpu_features = CPU_FTRS_44X,
1641 .cpu_user_features = COMMON_USER_BOOKE,
1642 .mmu_features = MMU_FTR_TYPE_44x,
1643 .icache_bsize = 32,
1644 .dcache_bsize = 32,
1645 .cpu_setup = __setup_cpu_440grx,
1646 .machine_check = machine_check_440A,
1647 .platform = "ppc440",
1648 },
1649 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1650 .pvr_mask = 0xf0000ffb,
1651 .pvr_value = 0x200008D8,
1652 .cpu_name = "440EPX",
1653 .cpu_features = CPU_FTRS_44X,
1654 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1655 .mmu_features = MMU_FTR_TYPE_44x,
1656 .icache_bsize = 32,
1657 .dcache_bsize = 32,
1658 .cpu_setup = __setup_cpu_440epx,
1659 .machine_check = machine_check_440A,
1660 .platform = "ppc440",
1661 },
1662 { /* 440GP Rev. B */
1663 .pvr_mask = 0xf0000fff,
1664 .pvr_value = 0x40000440,
1665 .cpu_name = "440GP Rev. B",
1666 .cpu_features = CPU_FTRS_44X,
1667 .cpu_user_features = COMMON_USER_BOOKE,
1668 .mmu_features = MMU_FTR_TYPE_44x,
1669 .icache_bsize = 32,
1670 .dcache_bsize = 32,
1671 .machine_check = machine_check_4xx,
1672 .platform = "ppc440gp",
1673 },
1674 { /* 440GP Rev. C */
1675 .pvr_mask = 0xf0000fff,
1676 .pvr_value = 0x40000481,
1677 .cpu_name = "440GP Rev. C",
1678 .cpu_features = CPU_FTRS_44X,
1679 .cpu_user_features = COMMON_USER_BOOKE,
1680 .mmu_features = MMU_FTR_TYPE_44x,
1681 .icache_bsize = 32,
1682 .dcache_bsize = 32,
1683 .machine_check = machine_check_4xx,
1684 .platform = "ppc440gp",
1685 },
1686 { /* 440GX Rev. A */
1687 .pvr_mask = 0xf0000fff,
1688 .pvr_value = 0x50000850,
1689 .cpu_name = "440GX Rev. A",
1690 .cpu_features = CPU_FTRS_44X,
1691 .cpu_user_features = COMMON_USER_BOOKE,
1692 .mmu_features = MMU_FTR_TYPE_44x,
1693 .icache_bsize = 32,
1694 .dcache_bsize = 32,
1695 .cpu_setup = __setup_cpu_440gx,
1696 .machine_check = machine_check_440A,
1697 .platform = "ppc440",
1698 },
1699 { /* 440GX Rev. B */
1700 .pvr_mask = 0xf0000fff,
1701 .pvr_value = 0x50000851,
1702 .cpu_name = "440GX Rev. B",
1703 .cpu_features = CPU_FTRS_44X,
1704 .cpu_user_features = COMMON_USER_BOOKE,
1705 .mmu_features = MMU_FTR_TYPE_44x,
1706 .icache_bsize = 32,
1707 .dcache_bsize = 32,
1708 .cpu_setup = __setup_cpu_440gx,
1709 .machine_check = machine_check_440A,
1710 .platform = "ppc440",
1711 },
1712 { /* 440GX Rev. C */
1713 .pvr_mask = 0xf0000fff,
1714 .pvr_value = 0x50000892,
1715 .cpu_name = "440GX Rev. C",
1716 .cpu_features = CPU_FTRS_44X,
1717 .cpu_user_features = COMMON_USER_BOOKE,
1718 .mmu_features = MMU_FTR_TYPE_44x,
1719 .icache_bsize = 32,
1720 .dcache_bsize = 32,
1721 .cpu_setup = __setup_cpu_440gx,
1722 .machine_check = machine_check_440A,
1723 .platform = "ppc440",
1724 },
1725 { /* 440GX Rev. F */
1726 .pvr_mask = 0xf0000fff,
1727 .pvr_value = 0x50000894,
1728 .cpu_name = "440GX Rev. F",
1729 .cpu_features = CPU_FTRS_44X,
1730 .cpu_user_features = COMMON_USER_BOOKE,
1731 .mmu_features = MMU_FTR_TYPE_44x,
1732 .icache_bsize = 32,
1733 .dcache_bsize = 32,
1734 .cpu_setup = __setup_cpu_440gx,
1735 .machine_check = machine_check_440A,
1736 .platform = "ppc440",
1737 },
1738 { /* 440SP Rev. A */
1739 .pvr_mask = 0xfff00fff,
1740 .pvr_value = 0x53200891,
1741 .cpu_name = "440SP Rev. A",
1742 .cpu_features = CPU_FTRS_44X,
1743 .cpu_user_features = COMMON_USER_BOOKE,
1744 .mmu_features = MMU_FTR_TYPE_44x,
1745 .icache_bsize = 32,
1746 .dcache_bsize = 32,
1747 .machine_check = machine_check_4xx,
1748 .platform = "ppc440",
1749 },
1750 { /* 440SPe Rev. A */
1751 .pvr_mask = 0xfff00fff,
1752 .pvr_value = 0x53400890,
1753 .cpu_name = "440SPe Rev. A",
1754 .cpu_features = CPU_FTRS_44X,
1755 .cpu_user_features = COMMON_USER_BOOKE,
1756 .mmu_features = MMU_FTR_TYPE_44x,
1757 .icache_bsize = 32,
1758 .dcache_bsize = 32,
1759 .cpu_setup = __setup_cpu_440spe,
1760 .machine_check = machine_check_440A,
1761 .platform = "ppc440",
1762 },
1763 { /* 440SPe Rev. B */
1764 .pvr_mask = 0xfff00fff,
1765 .pvr_value = 0x53400891,
1766 .cpu_name = "440SPe Rev. B",
1767 .cpu_features = CPU_FTRS_44X,
1768 .cpu_user_features = COMMON_USER_BOOKE,
1769 .mmu_features = MMU_FTR_TYPE_44x,
1770 .icache_bsize = 32,
1771 .dcache_bsize = 32,
1772 .cpu_setup = __setup_cpu_440spe,
1773 .machine_check = machine_check_440A,
1774 .platform = "ppc440",
1775 },
1776 { /* 440 in Xilinx Virtex-5 FXT */
1777 .pvr_mask = 0xfffffff0,
1778 .pvr_value = 0x7ff21910,
1779 .cpu_name = "440 in Virtex-5 FXT",
1780 .cpu_features = CPU_FTRS_44X,
1781 .cpu_user_features = COMMON_USER_BOOKE,
1782 .mmu_features = MMU_FTR_TYPE_44x,
1783 .icache_bsize = 32,
1784 .dcache_bsize = 32,
1785 .cpu_setup = __setup_cpu_440x5,
1786 .machine_check = machine_check_440A,
1787 .platform = "ppc440",
1788 },
1789 { /* 460EX */
1790 .pvr_mask = 0xffff0006,
1791 .pvr_value = 0x13020002,
1792 .cpu_name = "460EX",
1793 .cpu_features = CPU_FTRS_440x6,
1794 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1795 .mmu_features = MMU_FTR_TYPE_44x,
1796 .icache_bsize = 32,
1797 .dcache_bsize = 32,
1798 .cpu_setup = __setup_cpu_460ex,
1799 .machine_check = machine_check_440A,
1800 .platform = "ppc440",
1801 },
1802 { /* 460EX Rev B */
1803 .pvr_mask = 0xffff0007,
1804 .pvr_value = 0x13020004,
1805 .cpu_name = "460EX Rev. B",
1806 .cpu_features = CPU_FTRS_440x6,
1807 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1808 .mmu_features = MMU_FTR_TYPE_44x,
1809 .icache_bsize = 32,
1810 .dcache_bsize = 32,
1811 .cpu_setup = __setup_cpu_460ex,
1812 .machine_check = machine_check_440A,
1813 .platform = "ppc440",
1814 },
1815 { /* 460GT */
1816 .pvr_mask = 0xffff0006,
1817 .pvr_value = 0x13020000,
1818 .cpu_name = "460GT",
1819 .cpu_features = CPU_FTRS_440x6,
1820 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1821 .mmu_features = MMU_FTR_TYPE_44x,
1822 .icache_bsize = 32,
1823 .dcache_bsize = 32,
1824 .cpu_setup = __setup_cpu_460gt,
1825 .machine_check = machine_check_440A,
1826 .platform = "ppc440",
1827 },
1828 { /* 460GT Rev B */
1829 .pvr_mask = 0xffff0007,
1830 .pvr_value = 0x13020005,
1831 .cpu_name = "460GT Rev. B",
1832 .cpu_features = CPU_FTRS_440x6,
1833 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1834 .mmu_features = MMU_FTR_TYPE_44x,
1835 .icache_bsize = 32,
1836 .dcache_bsize = 32,
1837 .cpu_setup = __setup_cpu_460gt,
1838 .machine_check = machine_check_440A,
1839 .platform = "ppc440",
1840 },
1841 { /* 460SX */
1842 .pvr_mask = 0xffffff00,
1843 .pvr_value = 0x13541800,
1844 .cpu_name = "460SX",
1845 .cpu_features = CPU_FTRS_44X,
1846 .cpu_user_features = COMMON_USER_BOOKE,
1847 .mmu_features = MMU_FTR_TYPE_44x,
1848 .icache_bsize = 32,
1849 .dcache_bsize = 32,
1850 .cpu_setup = __setup_cpu_460sx,
1851 .machine_check = machine_check_440A,
1852 .platform = "ppc440",
1853 },
1854 { /* 464 in APM821xx */
1855 .pvr_mask = 0xfffffff0,
1856 .pvr_value = 0x12C41C80,
1857 .cpu_name = "APM821XX",
1858 .cpu_features = CPU_FTRS_44X,
1859 .cpu_user_features = COMMON_USER_BOOKE |
1860 PPC_FEATURE_HAS_FPU,
1861 .mmu_features = MMU_FTR_TYPE_44x,
1862 .icache_bsize = 32,
1863 .dcache_bsize = 32,
1864 .cpu_setup = __setup_cpu_apm821xx,
1865 .machine_check = machine_check_440A,
1866 .platform = "ppc440",
1867 },
1868 { /* 476 DD2 core */
1869 .pvr_mask = 0xffffffff,
1870 .pvr_value = 0x11a52080,
1871 .cpu_name = "476",
1872 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1873 .cpu_user_features = COMMON_USER_BOOKE |
1874 PPC_FEATURE_HAS_FPU,
1875 .mmu_features = MMU_FTR_TYPE_47x |
1876 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1877 .icache_bsize = 32,
1878 .dcache_bsize = 128,
1879 .machine_check = machine_check_47x,
1880 .platform = "ppc470",
1881 },
1882 { /* 476fpe */
1883 .pvr_mask = 0xffff0000,
1884 .pvr_value = 0x7ff50000,
1885 .cpu_name = "476fpe",
1886 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1887 .cpu_user_features = COMMON_USER_BOOKE |
1888 PPC_FEATURE_HAS_FPU,
1889 .mmu_features = MMU_FTR_TYPE_47x |
1890 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1891 .icache_bsize = 32,
1892 .dcache_bsize = 128,
1893 .machine_check = machine_check_47x,
1894 .platform = "ppc470",
1895 },
1896 { /* 476 iss */
1897 .pvr_mask = 0xffff0000,
1898 .pvr_value = 0x00050000,
1899 .cpu_name = "476",
1900 .cpu_features = CPU_FTRS_47X,
1901 .cpu_user_features = COMMON_USER_BOOKE |
1902 PPC_FEATURE_HAS_FPU,
1903 .mmu_features = MMU_FTR_TYPE_47x |
1904 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1905 .icache_bsize = 32,
1906 .dcache_bsize = 128,
1907 .machine_check = machine_check_47x,
1908 .platform = "ppc470",
1909 },
1910 { /* 476 others */
1911 .pvr_mask = 0xffff0000,
1912 .pvr_value = 0x11a50000,
1913 .cpu_name = "476",
1914 .cpu_features = CPU_FTRS_47X,
1915 .cpu_user_features = COMMON_USER_BOOKE |
1916 PPC_FEATURE_HAS_FPU,
1917 .mmu_features = MMU_FTR_TYPE_47x |
1918 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1919 .icache_bsize = 32,
1920 .dcache_bsize = 128,
1921 .machine_check = machine_check_47x,
1922 .platform = "ppc470",
1923 },
1924 { /* default match */
1925 .pvr_mask = 0x00000000,
1926 .pvr_value = 0x00000000,
1927 .cpu_name = "(generic 44x PPC)",
1928 .cpu_features = CPU_FTRS_44X,
1929 .cpu_user_features = COMMON_USER_BOOKE,
1930 .mmu_features = MMU_FTR_TYPE_44x,
1931 .icache_bsize = 32,
1932 .dcache_bsize = 32,
1933 .machine_check = machine_check_4xx,
1934 .platform = "ppc440",
1935 }
1936 #endif /* CONFIG_44x */
1937 #ifdef CONFIG_E200
1938 { /* e200z5 */
1939 .pvr_mask = 0xfff00000,
1940 .pvr_value = 0x81000000,
1941 .cpu_name = "e200z5",
1942 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1943 .cpu_features = CPU_FTRS_E200,
1944 .cpu_user_features = COMMON_USER_BOOKE |
1945 PPC_FEATURE_HAS_EFP_SINGLE |
1946 PPC_FEATURE_UNIFIED_CACHE,
1947 .mmu_features = MMU_FTR_TYPE_FSL_E,
1948 .dcache_bsize = 32,
1949 .machine_check = machine_check_e200,
1950 .platform = "ppc5554",
1951 },
1952 { /* e200z6 */
1953 .pvr_mask = 0xfff00000,
1954 .pvr_value = 0x81100000,
1955 .cpu_name = "e200z6",
1956 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1957 .cpu_features = CPU_FTRS_E200,
1958 .cpu_user_features = COMMON_USER_BOOKE |
1959 PPC_FEATURE_HAS_SPE_COMP |
1960 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1961 PPC_FEATURE_UNIFIED_CACHE,
1962 .mmu_features = MMU_FTR_TYPE_FSL_E,
1963 .dcache_bsize = 32,
1964 .machine_check = machine_check_e200,
1965 .platform = "ppc5554",
1966 },
1967 { /* default match */
1968 .pvr_mask = 0x00000000,
1969 .pvr_value = 0x00000000,
1970 .cpu_name = "(generic E200 PPC)",
1971 .cpu_features = CPU_FTRS_E200,
1972 .cpu_user_features = COMMON_USER_BOOKE |
1973 PPC_FEATURE_HAS_EFP_SINGLE |
1974 PPC_FEATURE_UNIFIED_CACHE,
1975 .mmu_features = MMU_FTR_TYPE_FSL_E,
1976 .dcache_bsize = 32,
1977 .cpu_setup = __setup_cpu_e200,
1978 .machine_check = machine_check_e200,
1979 .platform = "ppc5554",
1980 }
1981 #endif /* CONFIG_E200 */
1982 #endif /* CONFIG_PPC32 */
1983 #ifdef CONFIG_E500
1984 #ifdef CONFIG_PPC32
1985 #ifndef CONFIG_PPC_E500MC
1986 { /* e500 */
1987 .pvr_mask = 0xffff0000,
1988 .pvr_value = 0x80200000,
1989 .cpu_name = "e500",
1990 .cpu_features = CPU_FTRS_E500,
1991 .cpu_user_features = COMMON_USER_BOOKE |
1992 PPC_FEATURE_HAS_SPE_COMP |
1993 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1994 .cpu_user_features2 = PPC_FEATURE2_ISEL,
1995 .mmu_features = MMU_FTR_TYPE_FSL_E,
1996 .icache_bsize = 32,
1997 .dcache_bsize = 32,
1998 .num_pmcs = 4,
1999 .oprofile_cpu_type = "ppc/e500",
2000 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2001 .cpu_setup = __setup_cpu_e500v1,
2002 .machine_check = machine_check_e500,
2003 .platform = "ppc8540",
2004 },
2005 { /* e500v2 */
2006 .pvr_mask = 0xffff0000,
2007 .pvr_value = 0x80210000,
2008 .cpu_name = "e500v2",
2009 .cpu_features = CPU_FTRS_E500_2,
2010 .cpu_user_features = COMMON_USER_BOOKE |
2011 PPC_FEATURE_HAS_SPE_COMP |
2012 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2013 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2014 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2015 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2016 .icache_bsize = 32,
2017 .dcache_bsize = 32,
2018 .num_pmcs = 4,
2019 .oprofile_cpu_type = "ppc/e500",
2020 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2021 .cpu_setup = __setup_cpu_e500v2,
2022 .machine_check = machine_check_e500,
2023 .platform = "ppc8548",
2024 },
2025 #else
2026 { /* e500mc */
2027 .pvr_mask = 0xffff0000,
2028 .pvr_value = 0x80230000,
2029 .cpu_name = "e500mc",
2030 .cpu_features = CPU_FTRS_E500MC,
2031 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2032 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2033 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2034 MMU_FTR_USE_TLBILX,
2035 .icache_bsize = 64,
2036 .dcache_bsize = 64,
2037 .num_pmcs = 4,
2038 .oprofile_cpu_type = "ppc/e500mc",
2039 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2040 .cpu_setup = __setup_cpu_e500mc,
2041 .machine_check = machine_check_e500mc,
2042 .platform = "ppce500mc",
2043 },
2044 #endif /* CONFIG_PPC_E500MC */
2045 #endif /* CONFIG_PPC32 */
2046 #ifdef CONFIG_PPC_E500MC
2047 { /* e5500 */
2048 .pvr_mask = 0xffff0000,
2049 .pvr_value = 0x80240000,
2050 .cpu_name = "e5500",
2051 .cpu_features = CPU_FTRS_E5500,
2052 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2053 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2054 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2055 MMU_FTR_USE_TLBILX,
2056 .icache_bsize = 64,
2057 .dcache_bsize = 64,
2058 .num_pmcs = 4,
2059 .oprofile_cpu_type = "ppc/e500mc",
2060 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2061 .cpu_setup = __setup_cpu_e5500,
2062 #ifndef CONFIG_PPC32
2063 .cpu_restore = __restore_cpu_e5500,
2064 #endif
2065 .machine_check = machine_check_e500mc,
2066 .platform = "ppce5500",
2067 },
2068 { /* e6500 */
2069 .pvr_mask = 0xffff0000,
2070 .pvr_value = 0x80400000,
2071 .cpu_name = "e6500",
2072 .cpu_features = CPU_FTRS_E6500,
2073 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2074 PPC_FEATURE_HAS_ALTIVEC_COMP,
2075 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2076 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2077 MMU_FTR_USE_TLBILX,
2078 .icache_bsize = 64,
2079 .dcache_bsize = 64,
2080 .num_pmcs = 6,
2081 .oprofile_cpu_type = "ppc/e6500",
2082 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2083 .cpu_setup = __setup_cpu_e6500,
2084 #ifndef CONFIG_PPC32
2085 .cpu_restore = __restore_cpu_e6500,
2086 #endif
2087 .machine_check = machine_check_e500mc,
2088 .platform = "ppce6500",
2089 },
2090 #endif /* CONFIG_PPC_E500MC */
2091 #ifdef CONFIG_PPC32
2092 { /* default match */
2093 .pvr_mask = 0x00000000,
2094 .pvr_value = 0x00000000,
2095 .cpu_name = "(generic E500 PPC)",
2096 .cpu_features = CPU_FTRS_E500,
2097 .cpu_user_features = COMMON_USER_BOOKE |
2098 PPC_FEATURE_HAS_SPE_COMP |
2099 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2100 .mmu_features = MMU_FTR_TYPE_FSL_E,
2101 .icache_bsize = 32,
2102 .dcache_bsize = 32,
2103 .machine_check = machine_check_e500,
2104 .platform = "powerpc",
2105 }
2106 #endif /* CONFIG_PPC32 */
2107 #endif /* CONFIG_E500 */
2108 };
2109
2110 static struct cpu_spec the_cpu_spec;
2111
2112 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2113 struct cpu_spec *s)
2114 {
2115 struct cpu_spec *t = &the_cpu_spec;
2116 struct cpu_spec old;
2117
2118 t = PTRRELOC(t);
2119 old = *t;
2120
2121 /* Copy everything, then do fixups */
2122 *t = *s;
2123
2124 /*
2125 * If we are overriding a previous value derived from the real
2126 * PVR with a new value obtained using a logical PVR value,
2127 * don't modify the performance monitor fields.
2128 */
2129 if (old.num_pmcs && !s->num_pmcs) {
2130 t->num_pmcs = old.num_pmcs;
2131 t->pmc_type = old.pmc_type;
2132 t->oprofile_type = old.oprofile_type;
2133 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2134 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2135 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2136
2137 /*
2138 * If we have passed through this logic once before and
2139 * have pulled the default case because the real PVR was
2140 * not found inside cpu_specs[], then we are possibly
2141 * running in compatibility mode. In that case, let the
2142 * oprofiler know which set of compatibility counters to
2143 * pull from by making sure the oprofile_cpu_type string
2144 * is set to that of compatibility mode. If the
2145 * oprofile_cpu_type already has a value, then we are
2146 * possibly overriding a real PVR with a logical one,
2147 * and, in that case, keep the current value for
2148 * oprofile_cpu_type.
2149 */
2150 if (old.oprofile_cpu_type != NULL) {
2151 t->oprofile_cpu_type = old.oprofile_cpu_type;
2152 t->oprofile_type = old.oprofile_type;
2153 }
2154 }
2155
2156 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2157
2158 /*
2159 * Set the base platform string once; assumes
2160 * we're called with real pvr first.
2161 */
2162 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2163 *PTRRELOC(&powerpc_base_platform) = t->platform;
2164
2165 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2166 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2167 * that processor. I will consolidate that at a later time, for now,
2168 * just use #ifdef. We also don't need to PTRRELOC the function
2169 * pointer on ppc64 and booke as we are running at 0 in real mode
2170 * on ppc64 and reloc_offset is always 0 on booke.
2171 */
2172 if (t->cpu_setup) {
2173 t->cpu_setup(offset, t);
2174 }
2175 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2176
2177 return t;
2178 }
2179
2180 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2181 {
2182 struct cpu_spec *s = cpu_specs;
2183 int i;
2184
2185 s = PTRRELOC(s);
2186
2187 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2188 if ((pvr & s->pvr_mask) == s->pvr_value)
2189 return setup_cpu_spec(offset, s);
2190 }
2191
2192 BUG();
2193
2194 return NULL;
2195 }
Linux kernel - Deliverables
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