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[PATCH] Add a prctl to change the endianness of a process.
[deliverable/linux.git] / arch / powerpc / kernel / cputable.c
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/config.h>
14 #include <linux/string.h>
15 #include <linux/sched.h>
16 #include <linux/threads.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25
26 /* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33 #ifdef CONFIG_PPC32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
43 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
44
45 /* This table only contains "desktop" CPUs, it need to be filled with embedded
46 * ones as well...
47 */
48 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
49 PPC_FEATURE_HAS_MMU)
50 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
51 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
52 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
53 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
54 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
55 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
56 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
58 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
59 PPC_FEATURE_BOOKE)
60
61 /* We only set the spe features if the kernel was compiled with
62 * spe support
63 */
64 #ifdef CONFIG_SPE
65 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
66 #else
67 #define PPC_FEATURE_SPE_COMP 0
68 #endif
69
70 struct cpu_spec cpu_specs[] = {
71 #ifdef CONFIG_PPC64
72 { /* Power3 */
73 .pvr_mask = 0xffff0000,
74 .pvr_value = 0x00400000,
75 .cpu_name = "POWER3 (630)",
76 .cpu_features = CPU_FTRS_POWER3,
77 .cpu_user_features = COMMON_USER_PPC64,
78 .icache_bsize = 128,
79 .dcache_bsize = 128,
80 .num_pmcs = 8,
81 .oprofile_cpu_type = "ppc64/power3",
82 .oprofile_type = PPC_OPROFILE_RS64,
83 .platform = "power3",
84 },
85 { /* Power3+ */
86 .pvr_mask = 0xffff0000,
87 .pvr_value = 0x00410000,
88 .cpu_name = "POWER3 (630+)",
89 .cpu_features = CPU_FTRS_POWER3,
90 .cpu_user_features = COMMON_USER_PPC64,
91 .icache_bsize = 128,
92 .dcache_bsize = 128,
93 .num_pmcs = 8,
94 .oprofile_cpu_type = "ppc64/power3",
95 .oprofile_type = PPC_OPROFILE_RS64,
96 .platform = "power3",
97 },
98 { /* Northstar */
99 .pvr_mask = 0xffff0000,
100 .pvr_value = 0x00330000,
101 .cpu_name = "RS64-II (northstar)",
102 .cpu_features = CPU_FTRS_RS64,
103 .cpu_user_features = COMMON_USER_PPC64,
104 .icache_bsize = 128,
105 .dcache_bsize = 128,
106 .num_pmcs = 8,
107 .oprofile_cpu_type = "ppc64/rs64",
108 .oprofile_type = PPC_OPROFILE_RS64,
109 .platform = "rs64",
110 },
111 { /* Pulsar */
112 .pvr_mask = 0xffff0000,
113 .pvr_value = 0x00340000,
114 .cpu_name = "RS64-III (pulsar)",
115 .cpu_features = CPU_FTRS_RS64,
116 .cpu_user_features = COMMON_USER_PPC64,
117 .icache_bsize = 128,
118 .dcache_bsize = 128,
119 .num_pmcs = 8,
120 .oprofile_cpu_type = "ppc64/rs64",
121 .oprofile_type = PPC_OPROFILE_RS64,
122 .platform = "rs64",
123 },
124 { /* I-star */
125 .pvr_mask = 0xffff0000,
126 .pvr_value = 0x00360000,
127 .cpu_name = "RS64-III (icestar)",
128 .cpu_features = CPU_FTRS_RS64,
129 .cpu_user_features = COMMON_USER_PPC64,
130 .icache_bsize = 128,
131 .dcache_bsize = 128,
132 .num_pmcs = 8,
133 .oprofile_cpu_type = "ppc64/rs64",
134 .oprofile_type = PPC_OPROFILE_RS64,
135 .platform = "rs64",
136 },
137 { /* S-star */
138 .pvr_mask = 0xffff0000,
139 .pvr_value = 0x00370000,
140 .cpu_name = "RS64-IV (sstar)",
141 .cpu_features = CPU_FTRS_RS64,
142 .cpu_user_features = COMMON_USER_PPC64,
143 .icache_bsize = 128,
144 .dcache_bsize = 128,
145 .num_pmcs = 8,
146 .oprofile_cpu_type = "ppc64/rs64",
147 .oprofile_type = PPC_OPROFILE_RS64,
148 .platform = "rs64",
149 },
150 { /* Power4 */
151 .pvr_mask = 0xffff0000,
152 .pvr_value = 0x00350000,
153 .cpu_name = "POWER4 (gp)",
154 .cpu_features = CPU_FTRS_POWER4,
155 .cpu_user_features = COMMON_USER_POWER4,
156 .icache_bsize = 128,
157 .dcache_bsize = 128,
158 .num_pmcs = 8,
159 .oprofile_cpu_type = "ppc64/power4",
160 .oprofile_type = PPC_OPROFILE_POWER4,
161 .platform = "power4",
162 },
163 { /* Power4+ */
164 .pvr_mask = 0xffff0000,
165 .pvr_value = 0x00380000,
166 .cpu_name = "POWER4+ (gq)",
167 .cpu_features = CPU_FTRS_POWER4,
168 .cpu_user_features = COMMON_USER_POWER4,
169 .icache_bsize = 128,
170 .dcache_bsize = 128,
171 .num_pmcs = 8,
172 .oprofile_cpu_type = "ppc64/power4",
173 .oprofile_type = PPC_OPROFILE_POWER4,
174 .platform = "power4",
175 },
176 { /* PPC970 */
177 .pvr_mask = 0xffff0000,
178 .pvr_value = 0x00390000,
179 .cpu_name = "PPC970",
180 .cpu_features = CPU_FTRS_PPC970,
181 .cpu_user_features = COMMON_USER_POWER4 |
182 PPC_FEATURE_HAS_ALTIVEC_COMP,
183 .icache_bsize = 128,
184 .dcache_bsize = 128,
185 .num_pmcs = 8,
186 .cpu_setup = __setup_cpu_ppc970,
187 .oprofile_cpu_type = "ppc64/970",
188 .oprofile_type = PPC_OPROFILE_POWER4,
189 .platform = "ppc970",
190 },
191 #endif /* CONFIG_PPC64 */
192 #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
193 { /* PPC970FX */
194 .pvr_mask = 0xffff0000,
195 .pvr_value = 0x003c0000,
196 .cpu_name = "PPC970FX",
197 #ifdef CONFIG_PPC32
198 .cpu_features = CPU_FTRS_970_32,
199 #else
200 .cpu_features = CPU_FTRS_PPC970,
201 #endif
202 .cpu_user_features = COMMON_USER_POWER4 |
203 PPC_FEATURE_HAS_ALTIVEC_COMP,
204 .icache_bsize = 128,
205 .dcache_bsize = 128,
206 .num_pmcs = 8,
207 .cpu_setup = __setup_cpu_ppc970,
208 .oprofile_cpu_type = "ppc64/970",
209 .oprofile_type = PPC_OPROFILE_POWER4,
210 .platform = "ppc970",
211 },
212 #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
213 #ifdef CONFIG_PPC64
214 { /* PPC970MP */
215 .pvr_mask = 0xffff0000,
216 .pvr_value = 0x00440000,
217 .cpu_name = "PPC970MP",
218 .cpu_features = CPU_FTRS_PPC970,
219 .cpu_user_features = COMMON_USER_POWER4 |
220 PPC_FEATURE_HAS_ALTIVEC_COMP,
221 .icache_bsize = 128,
222 .dcache_bsize = 128,
223 .num_pmcs = 8,
224 .cpu_setup = __setup_cpu_ppc970,
225 .oprofile_cpu_type = "ppc64/970",
226 .oprofile_type = PPC_OPROFILE_POWER4,
227 .platform = "ppc970",
228 },
229 { /* Power5 GR */
230 .pvr_mask = 0xffff0000,
231 .pvr_value = 0x003a0000,
232 .cpu_name = "POWER5 (gr)",
233 .cpu_features = CPU_FTRS_POWER5,
234 .cpu_user_features = COMMON_USER_POWER5,
235 .icache_bsize = 128,
236 .dcache_bsize = 128,
237 .num_pmcs = 6,
238 .oprofile_cpu_type = "ppc64/power5",
239 .oprofile_type = PPC_OPROFILE_POWER4,
240 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
241 * and above but only works on POWER5 and above
242 */
243 .oprofile_mmcra_sihv = MMCRA_SIHV,
244 .oprofile_mmcra_sipr = MMCRA_SIPR,
245 .platform = "power5",
246 },
247 { /* Power5 GS */
248 .pvr_mask = 0xffff0000,
249 .pvr_value = 0x003b0000,
250 .cpu_name = "POWER5+ (gs)",
251 .cpu_features = CPU_FTRS_POWER5,
252 .cpu_user_features = COMMON_USER_POWER5_PLUS,
253 .icache_bsize = 128,
254 .dcache_bsize = 128,
255 .num_pmcs = 6,
256 .oprofile_cpu_type = "ppc64/power5+",
257 .oprofile_type = PPC_OPROFILE_POWER4,
258 .oprofile_mmcra_sihv = MMCRA_SIHV,
259 .oprofile_mmcra_sipr = MMCRA_SIPR,
260 .platform = "power5+",
261 },
262 { /* Power6 */
263 .pvr_mask = 0xffff0000,
264 .pvr_value = 0x003e0000,
265 .cpu_name = "POWER6",
266 .cpu_features = CPU_FTRS_POWER6,
267 .cpu_user_features = COMMON_USER_POWER6,
268 .icache_bsize = 128,
269 .dcache_bsize = 128,
270 .num_pmcs = 8,
271 .oprofile_cpu_type = "ppc64/power6",
272 .oprofile_type = PPC_OPROFILE_POWER4,
273 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
274 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
275 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
276 POWER6_MMCRA_OTHER,
277 .platform = "power6",
278 },
279 { /* Cell Broadband Engine */
280 .pvr_mask = 0xffff0000,
281 .pvr_value = 0x00700000,
282 .cpu_name = "Cell Broadband Engine",
283 .cpu_features = CPU_FTRS_CELL,
284 .cpu_user_features = COMMON_USER_PPC64 |
285 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
286 PPC_FEATURE_SMT,
287 .icache_bsize = 128,
288 .dcache_bsize = 128,
289 .platform = "ppc-cell-be",
290 },
291 { /* default match */
292 .pvr_mask = 0x00000000,
293 .pvr_value = 0x00000000,
294 .cpu_name = "POWER4 (compatible)",
295 .cpu_features = CPU_FTRS_COMPATIBLE,
296 .cpu_user_features = COMMON_USER_PPC64,
297 .icache_bsize = 128,
298 .dcache_bsize = 128,
299 .num_pmcs = 6,
300 .platform = "power4",
301 }
302 #endif /* CONFIG_PPC64 */
303 #ifdef CONFIG_PPC32
304 #if CLASSIC_PPC
305 { /* 601 */
306 .pvr_mask = 0xffff0000,
307 .pvr_value = 0x00010000,
308 .cpu_name = "601",
309 .cpu_features = CPU_FTRS_PPC601,
310 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
311 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
312 .icache_bsize = 32,
313 .dcache_bsize = 32,
314 .platform = "ppc601",
315 },
316 { /* 603 */
317 .pvr_mask = 0xffff0000,
318 .pvr_value = 0x00030000,
319 .cpu_name = "603",
320 .cpu_features = CPU_FTRS_603,
321 .cpu_user_features = COMMON_USER,
322 .icache_bsize = 32,
323 .dcache_bsize = 32,
324 .cpu_setup = __setup_cpu_603,
325 .platform = "ppc603",
326 },
327 { /* 603e */
328 .pvr_mask = 0xffff0000,
329 .pvr_value = 0x00060000,
330 .cpu_name = "603e",
331 .cpu_features = CPU_FTRS_603,
332 .cpu_user_features = COMMON_USER,
333 .icache_bsize = 32,
334 .dcache_bsize = 32,
335 .cpu_setup = __setup_cpu_603,
336 .platform = "ppc603",
337 },
338 { /* 603ev */
339 .pvr_mask = 0xffff0000,
340 .pvr_value = 0x00070000,
341 .cpu_name = "603ev",
342 .cpu_features = CPU_FTRS_603,
343 .cpu_user_features = COMMON_USER,
344 .icache_bsize = 32,
345 .dcache_bsize = 32,
346 .cpu_setup = __setup_cpu_603,
347 .platform = "ppc603",
348 },
349 { /* 604 */
350 .pvr_mask = 0xffff0000,
351 .pvr_value = 0x00040000,
352 .cpu_name = "604",
353 .cpu_features = CPU_FTRS_604,
354 .cpu_user_features = COMMON_USER,
355 .icache_bsize = 32,
356 .dcache_bsize = 32,
357 .num_pmcs = 2,
358 .cpu_setup = __setup_cpu_604,
359 .platform = "ppc604",
360 },
361 { /* 604e */
362 .pvr_mask = 0xfffff000,
363 .pvr_value = 0x00090000,
364 .cpu_name = "604e",
365 .cpu_features = CPU_FTRS_604,
366 .cpu_user_features = COMMON_USER,
367 .icache_bsize = 32,
368 .dcache_bsize = 32,
369 .num_pmcs = 4,
370 .cpu_setup = __setup_cpu_604,
371 .platform = "ppc604",
372 },
373 { /* 604r */
374 .pvr_mask = 0xffff0000,
375 .pvr_value = 0x00090000,
376 .cpu_name = "604r",
377 .cpu_features = CPU_FTRS_604,
378 .cpu_user_features = COMMON_USER,
379 .icache_bsize = 32,
380 .dcache_bsize = 32,
381 .num_pmcs = 4,
382 .cpu_setup = __setup_cpu_604,
383 .platform = "ppc604",
384 },
385 { /* 604ev */
386 .pvr_mask = 0xffff0000,
387 .pvr_value = 0x000a0000,
388 .cpu_name = "604ev",
389 .cpu_features = CPU_FTRS_604,
390 .cpu_user_features = COMMON_USER,
391 .icache_bsize = 32,
392 .dcache_bsize = 32,
393 .num_pmcs = 4,
394 .cpu_setup = __setup_cpu_604,
395 .platform = "ppc604",
396 },
397 { /* 740/750 (0x4202, don't support TAU ?) */
398 .pvr_mask = 0xffffffff,
399 .pvr_value = 0x00084202,
400 .cpu_name = "740/750",
401 .cpu_features = CPU_FTRS_740_NOTAU,
402 .cpu_user_features = COMMON_USER,
403 .icache_bsize = 32,
404 .dcache_bsize = 32,
405 .num_pmcs = 4,
406 .cpu_setup = __setup_cpu_750,
407 .platform = "ppc750",
408 },
409 { /* 750CX (80100 and 8010x?) */
410 .pvr_mask = 0xfffffff0,
411 .pvr_value = 0x00080100,
412 .cpu_name = "750CX",
413 .cpu_features = CPU_FTRS_750,
414 .cpu_user_features = COMMON_USER,
415 .icache_bsize = 32,
416 .dcache_bsize = 32,
417 .num_pmcs = 4,
418 .cpu_setup = __setup_cpu_750cx,
419 .platform = "ppc750",
420 },
421 { /* 750CX (82201 and 82202) */
422 .pvr_mask = 0xfffffff0,
423 .pvr_value = 0x00082200,
424 .cpu_name = "750CX",
425 .cpu_features = CPU_FTRS_750,
426 .cpu_user_features = COMMON_USER,
427 .icache_bsize = 32,
428 .dcache_bsize = 32,
429 .num_pmcs = 4,
430 .cpu_setup = __setup_cpu_750cx,
431 .platform = "ppc750",
432 },
433 { /* 750CXe (82214) */
434 .pvr_mask = 0xfffffff0,
435 .pvr_value = 0x00082210,
436 .cpu_name = "750CXe",
437 .cpu_features = CPU_FTRS_750,
438 .cpu_user_features = COMMON_USER,
439 .icache_bsize = 32,
440 .dcache_bsize = 32,
441 .num_pmcs = 4,
442 .cpu_setup = __setup_cpu_750cx,
443 .platform = "ppc750",
444 },
445 { /* 750CXe "Gekko" (83214) */
446 .pvr_mask = 0xffffffff,
447 .pvr_value = 0x00083214,
448 .cpu_name = "750CXe",
449 .cpu_features = CPU_FTRS_750,
450 .cpu_user_features = COMMON_USER,
451 .icache_bsize = 32,
452 .dcache_bsize = 32,
453 .num_pmcs = 4,
454 .cpu_setup = __setup_cpu_750cx,
455 .platform = "ppc750",
456 },
457 { /* 745/755 */
458 .pvr_mask = 0xfffff000,
459 .pvr_value = 0x00083000,
460 .cpu_name = "745/755",
461 .cpu_features = CPU_FTRS_750,
462 .cpu_user_features = COMMON_USER,
463 .icache_bsize = 32,
464 .dcache_bsize = 32,
465 .num_pmcs = 4,
466 .cpu_setup = __setup_cpu_750,
467 .platform = "ppc750",
468 },
469 { /* 750FX rev 1.x */
470 .pvr_mask = 0xffffff00,
471 .pvr_value = 0x70000100,
472 .cpu_name = "750FX",
473 .cpu_features = CPU_FTRS_750FX1,
474 .cpu_user_features = COMMON_USER,
475 .icache_bsize = 32,
476 .dcache_bsize = 32,
477 .num_pmcs = 4,
478 .cpu_setup = __setup_cpu_750,
479 .platform = "ppc750",
480 },
481 { /* 750FX rev 2.0 must disable HID0[DPM] */
482 .pvr_mask = 0xffffffff,
483 .pvr_value = 0x70000200,
484 .cpu_name = "750FX",
485 .cpu_features = CPU_FTRS_750FX2,
486 .cpu_user_features = COMMON_USER,
487 .icache_bsize = 32,
488 .dcache_bsize = 32,
489 .num_pmcs = 4,
490 .cpu_setup = __setup_cpu_750,
491 .platform = "ppc750",
492 },
493 { /* 750FX (All revs except 2.0) */
494 .pvr_mask = 0xffff0000,
495 .pvr_value = 0x70000000,
496 .cpu_name = "750FX",
497 .cpu_features = CPU_FTRS_750FX,
498 .cpu_user_features = COMMON_USER,
499 .icache_bsize = 32,
500 .dcache_bsize = 32,
501 .num_pmcs = 4,
502 .cpu_setup = __setup_cpu_750fx,
503 .platform = "ppc750",
504 },
505 { /* 750GX */
506 .pvr_mask = 0xffff0000,
507 .pvr_value = 0x70020000,
508 .cpu_name = "750GX",
509 .cpu_features = CPU_FTRS_750GX,
510 .cpu_user_features = COMMON_USER,
511 .icache_bsize = 32,
512 .dcache_bsize = 32,
513 .num_pmcs = 4,
514 .cpu_setup = __setup_cpu_750fx,
515 .platform = "ppc750",
516 },
517 { /* 740/750 (L2CR bit need fixup for 740) */
518 .pvr_mask = 0xffff0000,
519 .pvr_value = 0x00080000,
520 .cpu_name = "740/750",
521 .cpu_features = CPU_FTRS_740,
522 .cpu_user_features = COMMON_USER,
523 .icache_bsize = 32,
524 .dcache_bsize = 32,
525 .num_pmcs = 4,
526 .cpu_setup = __setup_cpu_750,
527 .platform = "ppc750",
528 },
529 { /* 7400 rev 1.1 ? (no TAU) */
530 .pvr_mask = 0xffffffff,
531 .pvr_value = 0x000c1101,
532 .cpu_name = "7400 (1.1)",
533 .cpu_features = CPU_FTRS_7400_NOTAU,
534 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
535 .icache_bsize = 32,
536 .dcache_bsize = 32,
537 .num_pmcs = 4,
538 .cpu_setup = __setup_cpu_7400,
539 .platform = "ppc7400",
540 },
541 { /* 7400 */
542 .pvr_mask = 0xffff0000,
543 .pvr_value = 0x000c0000,
544 .cpu_name = "7400",
545 .cpu_features = CPU_FTRS_7400,
546 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
547 .icache_bsize = 32,
548 .dcache_bsize = 32,
549 .num_pmcs = 4,
550 .cpu_setup = __setup_cpu_7400,
551 .platform = "ppc7400",
552 },
553 { /* 7410 */
554 .pvr_mask = 0xffff0000,
555 .pvr_value = 0x800c0000,
556 .cpu_name = "7410",
557 .cpu_features = CPU_FTRS_7400,
558 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
559 .icache_bsize = 32,
560 .dcache_bsize = 32,
561 .num_pmcs = 4,
562 .cpu_setup = __setup_cpu_7410,
563 .platform = "ppc7400",
564 },
565 { /* 7450 2.0 - no doze/nap */
566 .pvr_mask = 0xffffffff,
567 .pvr_value = 0x80000200,
568 .cpu_name = "7450",
569 .cpu_features = CPU_FTRS_7450_20,
570 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
571 .icache_bsize = 32,
572 .dcache_bsize = 32,
573 .num_pmcs = 6,
574 .cpu_setup = __setup_cpu_745x,
575 .oprofile_cpu_type = "ppc/7450",
576 .oprofile_type = PPC_OPROFILE_G4,
577 .platform = "ppc7450",
578 },
579 { /* 7450 2.1 */
580 .pvr_mask = 0xffffffff,
581 .pvr_value = 0x80000201,
582 .cpu_name = "7450",
583 .cpu_features = CPU_FTRS_7450_21,
584 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
585 .icache_bsize = 32,
586 .dcache_bsize = 32,
587 .num_pmcs = 6,
588 .cpu_setup = __setup_cpu_745x,
589 .oprofile_cpu_type = "ppc/7450",
590 .oprofile_type = PPC_OPROFILE_G4,
591 .platform = "ppc7450",
592 },
593 { /* 7450 2.3 and newer */
594 .pvr_mask = 0xffff0000,
595 .pvr_value = 0x80000000,
596 .cpu_name = "7450",
597 .cpu_features = CPU_FTRS_7450_23,
598 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
599 .icache_bsize = 32,
600 .dcache_bsize = 32,
601 .num_pmcs = 6,
602 .cpu_setup = __setup_cpu_745x,
603 .oprofile_cpu_type = "ppc/7450",
604 .oprofile_type = PPC_OPROFILE_G4,
605 .platform = "ppc7450",
606 },
607 { /* 7455 rev 1.x */
608 .pvr_mask = 0xffffff00,
609 .pvr_value = 0x80010100,
610 .cpu_name = "7455",
611 .cpu_features = CPU_FTRS_7455_1,
612 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
613 .icache_bsize = 32,
614 .dcache_bsize = 32,
615 .num_pmcs = 6,
616 .cpu_setup = __setup_cpu_745x,
617 .oprofile_cpu_type = "ppc/7450",
618 .oprofile_type = PPC_OPROFILE_G4,
619 .platform = "ppc7450",
620 },
621 { /* 7455 rev 2.0 */
622 .pvr_mask = 0xffffffff,
623 .pvr_value = 0x80010200,
624 .cpu_name = "7455",
625 .cpu_features = CPU_FTRS_7455_20,
626 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
627 .icache_bsize = 32,
628 .dcache_bsize = 32,
629 .num_pmcs = 6,
630 .cpu_setup = __setup_cpu_745x,
631 .oprofile_cpu_type = "ppc/7450",
632 .oprofile_type = PPC_OPROFILE_G4,
633 .platform = "ppc7450",
634 },
635 { /* 7455 others */
636 .pvr_mask = 0xffff0000,
637 .pvr_value = 0x80010000,
638 .cpu_name = "7455",
639 .cpu_features = CPU_FTRS_7455,
640 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
641 .icache_bsize = 32,
642 .dcache_bsize = 32,
643 .num_pmcs = 6,
644 .cpu_setup = __setup_cpu_745x,
645 .oprofile_cpu_type = "ppc/7450",
646 .oprofile_type = PPC_OPROFILE_G4,
647 .platform = "ppc7450",
648 },
649 { /* 7447/7457 Rev 1.0 */
650 .pvr_mask = 0xffffffff,
651 .pvr_value = 0x80020100,
652 .cpu_name = "7447/7457",
653 .cpu_features = CPU_FTRS_7447_10,
654 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
655 .icache_bsize = 32,
656 .dcache_bsize = 32,
657 .num_pmcs = 6,
658 .cpu_setup = __setup_cpu_745x,
659 .oprofile_cpu_type = "ppc/7450",
660 .oprofile_type = PPC_OPROFILE_G4,
661 .platform = "ppc7450",
662 },
663 { /* 7447/7457 Rev 1.1 */
664 .pvr_mask = 0xffffffff,
665 .pvr_value = 0x80020101,
666 .cpu_name = "7447/7457",
667 .cpu_features = CPU_FTRS_7447_10,
668 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
669 .icache_bsize = 32,
670 .dcache_bsize = 32,
671 .num_pmcs = 6,
672 .cpu_setup = __setup_cpu_745x,
673 .oprofile_cpu_type = "ppc/7450",
674 .oprofile_type = PPC_OPROFILE_G4,
675 .platform = "ppc7450",
676 },
677 { /* 7447/7457 Rev 1.2 and later */
678 .pvr_mask = 0xffff0000,
679 .pvr_value = 0x80020000,
680 .cpu_name = "7447/7457",
681 .cpu_features = CPU_FTRS_7447,
682 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
683 .icache_bsize = 32,
684 .dcache_bsize = 32,
685 .num_pmcs = 6,
686 .cpu_setup = __setup_cpu_745x,
687 .oprofile_cpu_type = "ppc/7450",
688 .oprofile_type = PPC_OPROFILE_G4,
689 .platform = "ppc7450",
690 },
691 { /* 7447A */
692 .pvr_mask = 0xffff0000,
693 .pvr_value = 0x80030000,
694 .cpu_name = "7447A",
695 .cpu_features = CPU_FTRS_7447A,
696 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
697 .icache_bsize = 32,
698 .dcache_bsize = 32,
699 .num_pmcs = 6,
700 .cpu_setup = __setup_cpu_745x,
701 .oprofile_cpu_type = "ppc/7450",
702 .oprofile_type = PPC_OPROFILE_G4,
703 .platform = "ppc7450",
704 },
705 { /* 7448 */
706 .pvr_mask = 0xffff0000,
707 .pvr_value = 0x80040000,
708 .cpu_name = "7448",
709 .cpu_features = CPU_FTRS_7447A,
710 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP,
711 .icache_bsize = 32,
712 .dcache_bsize = 32,
713 .num_pmcs = 6,
714 .cpu_setup = __setup_cpu_745x,
715 .oprofile_cpu_type = "ppc/7450",
716 .oprofile_type = PPC_OPROFILE_G4,
717 .platform = "ppc7450",
718 },
719 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
720 .pvr_mask = 0x7fff0000,
721 .pvr_value = 0x00810000,
722 .cpu_name = "82xx",
723 .cpu_features = CPU_FTRS_82XX,
724 .cpu_user_features = COMMON_USER,
725 .icache_bsize = 32,
726 .dcache_bsize = 32,
727 .cpu_setup = __setup_cpu_603,
728 .platform = "ppc603",
729 },
730 { /* All G2_LE (603e core, plus some) have the same pvr */
731 .pvr_mask = 0x7fff0000,
732 .pvr_value = 0x00820000,
733 .cpu_name = "G2_LE",
734 .cpu_features = CPU_FTRS_G2_LE,
735 .cpu_user_features = COMMON_USER,
736 .icache_bsize = 32,
737 .dcache_bsize = 32,
738 .cpu_setup = __setup_cpu_603,
739 .platform = "ppc603",
740 },
741 { /* e300 (a 603e core, plus some) on 83xx */
742 .pvr_mask = 0x7fff0000,
743 .pvr_value = 0x00830000,
744 .cpu_name = "e300",
745 .cpu_features = CPU_FTRS_E300,
746 .cpu_user_features = COMMON_USER,
747 .icache_bsize = 32,
748 .dcache_bsize = 32,
749 .cpu_setup = __setup_cpu_603,
750 .platform = "ppc603",
751 },
752 { /* default match, we assume split I/D cache & TB (non-601)... */
753 .pvr_mask = 0x00000000,
754 .pvr_value = 0x00000000,
755 .cpu_name = "(generic PPC)",
756 .cpu_features = CPU_FTRS_CLASSIC32,
757 .cpu_user_features = COMMON_USER,
758 .icache_bsize = 32,
759 .dcache_bsize = 32,
760 .platform = "ppc603",
761 },
762 #endif /* CLASSIC_PPC */
763 #ifdef CONFIG_8xx
764 { /* 8xx */
765 .pvr_mask = 0xffff0000,
766 .pvr_value = 0x00500000,
767 .cpu_name = "8xx",
768 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
769 * if the 8xx code is there.... */
770 .cpu_features = CPU_FTRS_8XX,
771 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
772 .icache_bsize = 16,
773 .dcache_bsize = 16,
774 .platform = "ppc823",
775 },
776 #endif /* CONFIG_8xx */
777 #ifdef CONFIG_40x
778 { /* 403GC */
779 .pvr_mask = 0xffffff00,
780 .pvr_value = 0x00200200,
781 .cpu_name = "403GC",
782 .cpu_features = CPU_FTRS_40X,
783 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
784 .icache_bsize = 16,
785 .dcache_bsize = 16,
786 .platform = "ppc403",
787 },
788 { /* 403GCX */
789 .pvr_mask = 0xffffff00,
790 .pvr_value = 0x00201400,
791 .cpu_name = "403GCX",
792 .cpu_features = CPU_FTRS_40X,
793 .cpu_user_features = PPC_FEATURE_32 |
794 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
795 .icache_bsize = 16,
796 .dcache_bsize = 16,
797 .platform = "ppc403",
798 },
799 { /* 403G ?? */
800 .pvr_mask = 0xffff0000,
801 .pvr_value = 0x00200000,
802 .cpu_name = "403G ??",
803 .cpu_features = CPU_FTRS_40X,
804 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
805 .icache_bsize = 16,
806 .dcache_bsize = 16,
807 .platform = "ppc403",
808 },
809 { /* 405GP */
810 .pvr_mask = 0xffff0000,
811 .pvr_value = 0x40110000,
812 .cpu_name = "405GP",
813 .cpu_features = CPU_FTRS_40X,
814 .cpu_user_features = PPC_FEATURE_32 |
815 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
816 .icache_bsize = 32,
817 .dcache_bsize = 32,
818 .platform = "ppc405",
819 },
820 { /* STB 03xxx */
821 .pvr_mask = 0xffff0000,
822 .pvr_value = 0x40130000,
823 .cpu_name = "STB03xxx",
824 .cpu_features = CPU_FTRS_40X,
825 .cpu_user_features = PPC_FEATURE_32 |
826 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
827 .icache_bsize = 32,
828 .dcache_bsize = 32,
829 .platform = "ppc405",
830 },
831 { /* STB 04xxx */
832 .pvr_mask = 0xffff0000,
833 .pvr_value = 0x41810000,
834 .cpu_name = "STB04xxx",
835 .cpu_features = CPU_FTRS_40X,
836 .cpu_user_features = PPC_FEATURE_32 |
837 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
838 .icache_bsize = 32,
839 .dcache_bsize = 32,
840 .platform = "ppc405",
841 },
842 { /* NP405L */
843 .pvr_mask = 0xffff0000,
844 .pvr_value = 0x41610000,
845 .cpu_name = "NP405L",
846 .cpu_features = CPU_FTRS_40X,
847 .cpu_user_features = PPC_FEATURE_32 |
848 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
849 .icache_bsize = 32,
850 .dcache_bsize = 32,
851 .platform = "ppc405",
852 },
853 { /* NP4GS3 */
854 .pvr_mask = 0xffff0000,
855 .pvr_value = 0x40B10000,
856 .cpu_name = "NP4GS3",
857 .cpu_features = CPU_FTRS_40X,
858 .cpu_user_features = PPC_FEATURE_32 |
859 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
860 .icache_bsize = 32,
861 .dcache_bsize = 32,
862 .platform = "ppc405",
863 },
864 { /* NP405H */
865 .pvr_mask = 0xffff0000,
866 .pvr_value = 0x41410000,
867 .cpu_name = "NP405H",
868 .cpu_features = CPU_FTRS_40X,
869 .cpu_user_features = PPC_FEATURE_32 |
870 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
871 .icache_bsize = 32,
872 .dcache_bsize = 32,
873 .platform = "ppc405",
874 },
875 { /* 405GPr */
876 .pvr_mask = 0xffff0000,
877 .pvr_value = 0x50910000,
878 .cpu_name = "405GPr",
879 .cpu_features = CPU_FTRS_40X,
880 .cpu_user_features = PPC_FEATURE_32 |
881 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
882 .icache_bsize = 32,
883 .dcache_bsize = 32,
884 .platform = "ppc405",
885 },
886 { /* STBx25xx */
887 .pvr_mask = 0xffff0000,
888 .pvr_value = 0x51510000,
889 .cpu_name = "STBx25xx",
890 .cpu_features = CPU_FTRS_40X,
891 .cpu_user_features = PPC_FEATURE_32 |
892 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
893 .icache_bsize = 32,
894 .dcache_bsize = 32,
895 .platform = "ppc405",
896 },
897 { /* 405LP */
898 .pvr_mask = 0xffff0000,
899 .pvr_value = 0x41F10000,
900 .cpu_name = "405LP",
901 .cpu_features = CPU_FTRS_40X,
902 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
903 .icache_bsize = 32,
904 .dcache_bsize = 32,
905 .platform = "ppc405",
906 },
907 { /* Xilinx Virtex-II Pro */
908 .pvr_mask = 0xfffff000,
909 .pvr_value = 0x20010000,
910 .cpu_name = "Virtex-II Pro",
911 .cpu_features = CPU_FTRS_40X,
912 .cpu_user_features = PPC_FEATURE_32 |
913 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
914 .icache_bsize = 32,
915 .dcache_bsize = 32,
916 .platform = "ppc405",
917 },
918 { /* Xilinx Virtex-4 FX */
919 .pvr_mask = 0xfffff000,
920 .pvr_value = 0x20011000,
921 .cpu_name = "Virtex-4 FX",
922 .cpu_features = CPU_FTRS_40X,
923 .cpu_user_features = PPC_FEATURE_32 |
924 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
925 .icache_bsize = 32,
926 .dcache_bsize = 32,
927 },
928 { /* 405EP */
929 .pvr_mask = 0xffff0000,
930 .pvr_value = 0x51210000,
931 .cpu_name = "405EP",
932 .cpu_features = CPU_FTRS_40X,
933 .cpu_user_features = PPC_FEATURE_32 |
934 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
935 .icache_bsize = 32,
936 .dcache_bsize = 32,
937 .platform = "ppc405",
938 },
939
940 #endif /* CONFIG_40x */
941 #ifdef CONFIG_44x
942 {
943 .pvr_mask = 0xf0000fff,
944 .pvr_value = 0x40000850,
945 .cpu_name = "440EP Rev. A",
946 .cpu_features = CPU_FTRS_44X,
947 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
948 .icache_bsize = 32,
949 .dcache_bsize = 32,
950 .platform = "ppc440",
951 },
952 {
953 .pvr_mask = 0xf0000fff,
954 .pvr_value = 0x400008d3,
955 .cpu_name = "440EP Rev. B",
956 .cpu_features = CPU_FTRS_44X,
957 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
958 .icache_bsize = 32,
959 .dcache_bsize = 32,
960 .platform = "ppc440",
961 },
962 { /* 440GP Rev. B */
963 .pvr_mask = 0xf0000fff,
964 .pvr_value = 0x40000440,
965 .cpu_name = "440GP Rev. B",
966 .cpu_features = CPU_FTRS_44X,
967 .cpu_user_features = COMMON_USER_BOOKE,
968 .icache_bsize = 32,
969 .dcache_bsize = 32,
970 .platform = "ppc440gp",
971 },
972 { /* 440GP Rev. C */
973 .pvr_mask = 0xf0000fff,
974 .pvr_value = 0x40000481,
975 .cpu_name = "440GP Rev. C",
976 .cpu_features = CPU_FTRS_44X,
977 .cpu_user_features = COMMON_USER_BOOKE,
978 .icache_bsize = 32,
979 .dcache_bsize = 32,
980 .platform = "ppc440gp",
981 },
982 { /* 440GX Rev. A */
983 .pvr_mask = 0xf0000fff,
984 .pvr_value = 0x50000850,
985 .cpu_name = "440GX Rev. A",
986 .cpu_features = CPU_FTRS_44X,
987 .cpu_user_features = COMMON_USER_BOOKE,
988 .icache_bsize = 32,
989 .dcache_bsize = 32,
990 .platform = "ppc440",
991 },
992 { /* 440GX Rev. B */
993 .pvr_mask = 0xf0000fff,
994 .pvr_value = 0x50000851,
995 .cpu_name = "440GX Rev. B",
996 .cpu_features = CPU_FTRS_44X,
997 .cpu_user_features = COMMON_USER_BOOKE,
998 .icache_bsize = 32,
999 .dcache_bsize = 32,
1000 .platform = "ppc440",
1001 },
1002 { /* 440GX Rev. C */
1003 .pvr_mask = 0xf0000fff,
1004 .pvr_value = 0x50000892,
1005 .cpu_name = "440GX Rev. C",
1006 .cpu_features = CPU_FTRS_44X,
1007 .cpu_user_features = COMMON_USER_BOOKE,
1008 .icache_bsize = 32,
1009 .dcache_bsize = 32,
1010 .platform = "ppc440",
1011 },
1012 { /* 440GX Rev. F */
1013 .pvr_mask = 0xf0000fff,
1014 .pvr_value = 0x50000894,
1015 .cpu_name = "440GX Rev. F",
1016 .cpu_features = CPU_FTRS_44X,
1017 .cpu_user_features = COMMON_USER_BOOKE,
1018 .icache_bsize = 32,
1019 .dcache_bsize = 32,
1020 .platform = "ppc440",
1021 },
1022 { /* 440SP Rev. A */
1023 .pvr_mask = 0xff000fff,
1024 .pvr_value = 0x53000891,
1025 .cpu_name = "440SP Rev. A",
1026 .cpu_features = CPU_FTRS_44X,
1027 .cpu_user_features = COMMON_USER_BOOKE,
1028 .icache_bsize = 32,
1029 .dcache_bsize = 32,
1030 .platform = "ppc440",
1031 },
1032 { /* 440SPe Rev. A */
1033 .pvr_mask = 0xff000fff,
1034 .pvr_value = 0x53000890,
1035 .cpu_name = "440SPe Rev. A",
1036 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1037 CPU_FTR_USE_TB,
1038 .cpu_user_features = COMMON_USER_BOOKE,
1039 .icache_bsize = 32,
1040 .dcache_bsize = 32,
1041 .platform = "ppc440",
1042 },
1043 #endif /* CONFIG_44x */
1044 #ifdef CONFIG_FSL_BOOKE
1045 { /* e200z5 */
1046 .pvr_mask = 0xfff00000,
1047 .pvr_value = 0x81000000,
1048 .cpu_name = "e200z5",
1049 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1050 .cpu_features = CPU_FTRS_E200,
1051 .cpu_user_features = COMMON_USER_BOOKE |
1052 PPC_FEATURE_HAS_EFP_SINGLE |
1053 PPC_FEATURE_UNIFIED_CACHE,
1054 .dcache_bsize = 32,
1055 .platform = "ppc5554",
1056 },
1057 { /* e200z6 */
1058 .pvr_mask = 0xfff00000,
1059 .pvr_value = 0x81100000,
1060 .cpu_name = "e200z6",
1061 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1062 .cpu_features = CPU_FTRS_E200,
1063 .cpu_user_features = COMMON_USER_BOOKE |
1064 PPC_FEATURE_SPE_COMP |
1065 PPC_FEATURE_HAS_EFP_SINGLE |
1066 PPC_FEATURE_UNIFIED_CACHE,
1067 .dcache_bsize = 32,
1068 .platform = "ppc5554",
1069 },
1070 { /* e500 */
1071 .pvr_mask = 0xffff0000,
1072 .pvr_value = 0x80200000,
1073 .cpu_name = "e500",
1074 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1075 .cpu_features = CPU_FTRS_E500,
1076 .cpu_user_features = COMMON_USER_BOOKE |
1077 PPC_FEATURE_SPE_COMP |
1078 PPC_FEATURE_HAS_EFP_SINGLE,
1079 .icache_bsize = 32,
1080 .dcache_bsize = 32,
1081 .num_pmcs = 4,
1082 .oprofile_cpu_type = "ppc/e500",
1083 .oprofile_type = PPC_OPROFILE_BOOKE,
1084 .platform = "ppc8540",
1085 },
1086 { /* e500v2 */
1087 .pvr_mask = 0xffff0000,
1088 .pvr_value = 0x80210000,
1089 .cpu_name = "e500v2",
1090 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1091 .cpu_features = CPU_FTRS_E500_2,
1092 .cpu_user_features = COMMON_USER_BOOKE |
1093 PPC_FEATURE_SPE_COMP |
1094 PPC_FEATURE_HAS_EFP_SINGLE |
1095 PPC_FEATURE_HAS_EFP_DOUBLE,
1096 .icache_bsize = 32,
1097 .dcache_bsize = 32,
1098 .num_pmcs = 4,
1099 .oprofile_cpu_type = "ppc/e500",
1100 .oprofile_type = PPC_OPROFILE_BOOKE,
1101 .platform = "ppc8548",
1102 },
1103 #endif
1104 #if !CLASSIC_PPC
1105 { /* default match */
1106 .pvr_mask = 0x00000000,
1107 .pvr_value = 0x00000000,
1108 .cpu_name = "(generic PPC)",
1109 .cpu_features = CPU_FTRS_GENERIC_32,
1110 .cpu_user_features = PPC_FEATURE_32,
1111 .icache_bsize = 32,
1112 .dcache_bsize = 32,
1113 .platform = "powerpc",
1114 }
1115 #endif /* !CLASSIC_PPC */
1116 #endif /* CONFIG_PPC32 */
1117 };
Linux kernel - Deliverables
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