2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/init.h>
27 #include <linux/list.h>
28 #include <linux/pci.h>
29 #include <linux/proc_fs.h>
30 #include <linux/rbtree.h>
31 #include <linux/seq_file.h>
32 #include <linux/spinlock.h>
33 #include <linux/export.h>
36 #include <linux/atomic.h>
38 #include <asm/eeh_event.h>
40 #include <asm/machdep.h>
41 #include <asm/ppc-pci.h>
46 * EEH, or "Extended Error Handling" is a PCI bridge technology for
47 * dealing with PCI bus errors that can't be dealt with within the
48 * usual PCI framework, except by check-stopping the CPU. Systems
49 * that are designed for high-availability/reliability cannot afford
50 * to crash due to a "mere" PCI error, thus the need for EEH.
51 * An EEH-capable bridge operates by converting a detected error
52 * into a "slot freeze", taking the PCI adapter off-line, making
53 * the slot behave, from the OS'es point of view, as if the slot
54 * were "empty": all reads return 0xff's and all writes are silently
55 * ignored. EEH slot isolation events can be triggered by parity
56 * errors on the address or data busses (e.g. during posted writes),
57 * which in turn might be caused by low voltage on the bus, dust,
58 * vibration, humidity, radioactivity or plain-old failed hardware.
60 * Note, however, that one of the leading causes of EEH slot
61 * freeze events are buggy device drivers, buggy device microcode,
62 * or buggy device hardware. This is because any attempt by the
63 * device to bus-master data to a memory address that is not
64 * assigned to the device will trigger a slot freeze. (The idea
65 * is to prevent devices-gone-wild from corrupting system memory).
66 * Buggy hardware/drivers will have a miserable time co-existing
69 * Ideally, a PCI device driver, when suspecting that an isolation
70 * event has occurred (e.g. by reading 0xff's), will then ask EEH
71 * whether this is the case, and then take appropriate steps to
72 * reset the PCI slot, the PCI device, and then resume operations.
73 * However, until that day, the checking is done here, with the
74 * eeh_check_failure() routine embedded in the MMIO macros. If
75 * the slot is found to be isolated, an "EEH Event" is synthesized
76 * and sent out for processing.
79 /* If a device driver keeps reading an MMIO register in an interrupt
80 * handler after a slot isolation event, it might be broken.
81 * This sets the threshold for how many read attempts we allow
82 * before printing an error message.
84 #define EEH_MAX_FAILS 2100000
86 /* Time to wait for a PCI slot to report status, in milliseconds */
87 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
89 /* Platform dependent EEH operations */
90 struct eeh_ops
*eeh_ops
= NULL
;
92 int eeh_subsystem_enabled
;
93 EXPORT_SYMBOL(eeh_subsystem_enabled
);
96 * EEH probe mode support. The intention is to support multiple
97 * platforms for EEH. Some platforms like pSeries do PCI emunation
98 * based on device tree. However, other platforms like powernv probe
99 * PCI devices from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for particular
101 * OF node or PCI device so that the corresponding PE would be created
106 /* Lock to avoid races due to multiple reports of an error */
107 DEFINE_RAW_SPINLOCK(confirm_error_lock
);
109 /* Buffer for reporting pci register dumps. Its here in BSS, and
110 * not dynamically alloced, so that it ends up in RMO where RTAS
113 #define EEH_PCI_REGS_LOG_LEN 4096
114 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
117 * The struct is used to maintain the EEH global statistic
118 * information. Besides, the EEH global statistics will be
119 * exported to user space through procfs
122 u64 no_device
; /* PCI device not found */
123 u64 no_dn
; /* OF node not found */
124 u64 no_cfg_addr
; /* Config address not found */
125 u64 ignored_check
; /* EEH check skipped */
126 u64 total_mmio_ffs
; /* Total EEH checks */
127 u64 false_positives
; /* Unnecessary EEH checks */
128 u64 slot_resets
; /* PE reset */
131 static struct eeh_stats eeh_stats
;
133 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
136 * eeh_gather_pci_data - Copy assorted PCI config space registers to buff
137 * @edev: device to report data for
138 * @buf: point to buffer in which to log
139 * @len: amount of room in buffer
141 * This routine captures assorted PCI configuration space data,
142 * and puts them into a buffer for RTAS error logging.
144 static size_t eeh_gather_pci_data(struct eeh_dev
*edev
, char * buf
, size_t len
)
146 struct device_node
*dn
= eeh_dev_to_of_node(edev
);
147 struct pci_dev
*dev
= eeh_dev_to_pci_dev(edev
);
152 n
+= scnprintf(buf
+n
, len
-n
, "%s\n", dn
->full_name
);
153 printk(KERN_WARNING
"EEH: of node=%s\n", dn
->full_name
);
155 eeh_ops
->read_config(dn
, PCI_VENDOR_ID
, 4, &cfg
);
156 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
157 printk(KERN_WARNING
"EEH: PCI device/vendor: %08x\n", cfg
);
159 eeh_ops
->read_config(dn
, PCI_COMMAND
, 4, &cfg
);
160 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
161 printk(KERN_WARNING
"EEH: PCI cmd/status register: %08x\n", cfg
);
164 printk(KERN_WARNING
"EEH: no PCI device for this of node\n");
168 /* Gather bridge-specific registers */
169 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
170 eeh_ops
->read_config(dn
, PCI_SEC_STATUS
, 2, &cfg
);
171 n
+= scnprintf(buf
+n
, len
-n
, "sec stat:%x\n", cfg
);
172 printk(KERN_WARNING
"EEH: Bridge secondary status: %04x\n", cfg
);
174 eeh_ops
->read_config(dn
, PCI_BRIDGE_CONTROL
, 2, &cfg
);
175 n
+= scnprintf(buf
+n
, len
-n
, "brdg ctl:%x\n", cfg
);
176 printk(KERN_WARNING
"EEH: Bridge control: %04x\n", cfg
);
179 /* Dump out the PCI-X command and status regs */
180 cap
= pci_find_capability(dev
, PCI_CAP_ID_PCIX
);
182 eeh_ops
->read_config(dn
, cap
, 4, &cfg
);
183 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
184 printk(KERN_WARNING
"EEH: PCI-X cmd: %08x\n", cfg
);
186 eeh_ops
->read_config(dn
, cap
+4, 4, &cfg
);
187 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
188 printk(KERN_WARNING
"EEH: PCI-X status: %08x\n", cfg
);
191 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
192 if (pci_is_pcie(dev
)) {
193 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
195 "EEH: PCI-E capabilities and status follow:\n");
197 for (i
=0; i
<=8; i
++) {
198 eeh_ops
->read_config(dn
, dev
->pcie_cap
+4*i
, 4, &cfg
);
199 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
200 printk(KERN_WARNING
"EEH: PCI-E %02x: %08x\n", i
, cfg
);
203 cap
= pci_find_ext_capability(dev
, PCI_EXT_CAP_ID_ERR
);
205 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
207 "EEH: PCI-E AER capability register set follows:\n");
209 for (i
=0; i
<14; i
++) {
210 eeh_ops
->read_config(dn
, cap
+4*i
, 4, &cfg
);
211 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
212 printk(KERN_WARNING
"EEH: PCI-E AER %02x: %08x\n", i
, cfg
);
221 * eeh_slot_error_detail - Generate combined log including driver log and error log
223 * @severity: temporary or permanent error log
225 * This routine should be called to generate the combined log, which
226 * is comprised of driver log and error log. The driver log is figured
227 * out from the config space of the corresponding PCI device, while
228 * the error log is fetched through platform dependent function call.
230 void eeh_slot_error_detail(struct eeh_pe
*pe
, int severity
)
233 struct eeh_dev
*edev
, *tmp
;
234 bool valid_cfg_log
= true;
237 * When the PHB is fenced or dead, it's pointless to collect
238 * the data from PCI config space because it should return
239 * 0xFF's. For ER, we still retrieve the data from the PCI
242 if (eeh_probe_mode_dev() &&
243 (pe
->type
& EEH_PE_PHB
) &&
244 (pe
->state
& (EEH_PE_ISOLATED
| EEH_PE_PHB_DEAD
)))
245 valid_cfg_log
= false;
248 eeh_pci_enable(pe
, EEH_OPT_THAW_MMIO
);
249 eeh_ops
->configure_bridge(pe
);
250 eeh_pe_restore_bars(pe
);
253 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
254 loglen
+= eeh_gather_pci_data(edev
, pci_regs_buf
+ loglen
,
255 EEH_PCI_REGS_LOG_LEN
- loglen
);
259 eeh_ops
->get_log(pe
, severity
, pci_regs_buf
, loglen
);
263 * eeh_token_to_phys - Convert EEH address token to phys address
264 * @token: I/O token, should be address in the form 0xA....
266 * This routine should be called to convert virtual I/O address
269 static inline unsigned long eeh_token_to_phys(unsigned long token
)
276 * We won't find hugepages here, iomem
278 ptep
= find_linux_pte_or_hugepte(init_mm
.pgd
, token
, &hugepage_shift
);
281 WARN_ON(hugepage_shift
);
282 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
284 return pa
| (token
& (PAGE_SIZE
-1));
288 * On PowerNV platform, we might already have fenced PHB there.
289 * For that case, it's meaningless to recover frozen PE. Intead,
290 * We have to handle fenced PHB firstly.
292 static int eeh_phb_check_failure(struct eeh_pe
*pe
)
294 struct eeh_pe
*phb_pe
;
298 if (!eeh_probe_mode_dev())
301 /* Find the PHB PE */
302 phb_pe
= eeh_phb_pe_get(pe
->phb
);
304 pr_warning("%s Can't find PE for PHB#%d\n",
305 __func__
, pe
->phb
->global_number
);
309 /* If the PHB has been in problematic state */
310 eeh_serialize_lock(&flags
);
311 if (phb_pe
->state
& (EEH_PE_ISOLATED
| EEH_PE_PHB_DEAD
)) {
316 /* Check PHB state */
317 ret
= eeh_ops
->get_state(phb_pe
, NULL
);
319 (ret
== EEH_STATE_NOT_SUPPORT
) ||
320 (ret
& (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) ==
321 (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) {
326 /* Isolate the PHB and send event */
327 eeh_pe_state_mark(phb_pe
, EEH_PE_ISOLATED
);
328 eeh_serialize_unlock(flags
);
330 pr_err("EEH: PHB#%x failure detected\n",
331 phb_pe
->phb
->global_number
);
333 eeh_send_failure_event(phb_pe
);
337 eeh_serialize_unlock(flags
);
342 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
345 * Check for an EEH failure for the given device node. Call this
346 * routine if the result of a read was all 0xff's and you want to
347 * find out if this is due to an EEH slot freeze. This routine
348 * will query firmware for the EEH status.
350 * Returns 0 if there has not been an EEH error; otherwise returns
351 * a non-zero value and queues up a slot isolation event notification.
353 * It is safe to call this routine in an interrupt context.
355 int eeh_dev_check_failure(struct eeh_dev
*edev
)
359 struct device_node
*dn
;
363 const char *location
;
365 eeh_stats
.total_mmio_ffs
++;
367 if (!eeh_subsystem_enabled
)
374 dn
= eeh_dev_to_of_node(edev
);
375 dev
= eeh_dev_to_pci_dev(edev
);
378 /* Access to IO BARs might get this far and still not want checking. */
380 eeh_stats
.ignored_check
++;
381 pr_debug("EEH: Ignored check for %s %s\n",
382 eeh_pci_name(dev
), dn
->full_name
);
386 if (!pe
->addr
&& !pe
->config_addr
) {
387 eeh_stats
.no_cfg_addr
++;
392 * On PowerNV platform, we might already have fenced PHB
393 * there and we need take care of that firstly.
395 ret
= eeh_phb_check_failure(pe
);
399 /* If we already have a pending isolation event for this
400 * slot, we know it's bad already, we don't need to check.
401 * Do this checking under a lock; as multiple PCI devices
402 * in one slot might report errors simultaneously, and we
403 * only want one error recovery routine running.
405 eeh_serialize_lock(&flags
);
407 if (pe
->state
& EEH_PE_ISOLATED
) {
409 if (pe
->check_count
% EEH_MAX_FAILS
== 0) {
410 location
= of_get_property(dn
, "ibm,loc-code", NULL
);
411 printk(KERN_ERR
"EEH: %d reads ignored for recovering device at "
412 "location=%s driver=%s pci addr=%s\n",
413 pe
->check_count
, location
,
414 eeh_driver_name(dev
), eeh_pci_name(dev
));
415 printk(KERN_ERR
"EEH: Might be infinite loop in %s driver\n",
416 eeh_driver_name(dev
));
423 * Now test for an EEH failure. This is VERY expensive.
424 * Note that the eeh_config_addr may be a parent device
425 * in the case of a device behind a bridge, or it may be
426 * function zero of a multi-function device.
427 * In any case they must share a common PHB.
429 ret
= eeh_ops
->get_state(pe
, NULL
);
431 /* Note that config-io to empty slots may fail;
432 * they are empty when they don't have children.
433 * We will punt with the following conditions: Failure to get
434 * PE's state, EEH not support and Permanently unavailable
435 * state, PE is in good state.
438 (ret
== EEH_STATE_NOT_SUPPORT
) ||
439 (ret
& (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) ==
440 (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) {
441 eeh_stats
.false_positives
++;
442 pe
->false_positives
++;
447 eeh_stats
.slot_resets
++;
449 /* Avoid repeated reports of this failure, including problems
450 * with other functions on this device, and functions under
453 eeh_pe_state_mark(pe
, EEH_PE_ISOLATED
);
454 eeh_serialize_unlock(flags
);
456 /* Most EEH events are due to device driver bugs. Having
457 * a stack trace will help the device-driver authors figure
458 * out what happened. So print that out.
460 pr_err("EEH: Frozen PE#%x detected on PHB#%x\n",
461 pe
->addr
, pe
->phb
->global_number
);
464 eeh_send_failure_event(pe
);
469 eeh_serialize_unlock(flags
);
473 EXPORT_SYMBOL_GPL(eeh_dev_check_failure
);
476 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
477 * @token: I/O token, should be address in the form 0xA....
478 * @val: value, should be all 1's (XXX why do we need this arg??)
480 * Check for an EEH failure at the given token address. Call this
481 * routine if the result of a read was all 0xff's and you want to
482 * find out if this is due to an EEH slot freeze event. This routine
483 * will query firmware for the EEH status.
485 * Note this routine is safe to call in an interrupt context.
487 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
490 struct eeh_dev
*edev
;
492 /* Finding the phys addr + pci device; this is pretty quick. */
493 addr
= eeh_token_to_phys((unsigned long __force
) token
);
494 edev
= eeh_addr_cache_get_dev(addr
);
496 eeh_stats
.no_device
++;
500 eeh_dev_check_failure(edev
);
504 EXPORT_SYMBOL(eeh_check_failure
);
508 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
511 * This routine should be called to reenable frozen MMIO or DMA
512 * so that it would work correctly again. It's useful while doing
513 * recovery or log collection on the indicated device.
515 int eeh_pci_enable(struct eeh_pe
*pe
, int function
)
519 rc
= eeh_ops
->set_option(pe
, function
);
521 pr_warning("%s: Unexpected state change %d on PHB#%d-PE#%x, err=%d\n",
522 __func__
, function
, pe
->phb
->global_number
, pe
->addr
, rc
);
524 rc
= eeh_ops
->wait_state(pe
, PCI_BUS_RESET_WAIT_MSEC
);
525 if (rc
> 0 && (rc
& EEH_STATE_MMIO_ENABLED
) &&
526 (function
== EEH_OPT_THAW_MMIO
))
533 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
534 * @dev: pci device struct
535 * @state: reset state to enter
540 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
542 struct eeh_dev
*edev
= pci_dev_to_eeh_dev(dev
);
543 struct eeh_pe
*pe
= edev
->pe
;
546 pr_err("%s: No PE found on PCI device %s\n",
547 __func__
, pci_name(dev
));
552 case pcie_deassert_reset
:
553 eeh_ops
->reset(pe
, EEH_RESET_DEACTIVATE
);
556 eeh_ops
->reset(pe
, EEH_RESET_HOT
);
558 case pcie_warm_reset
:
559 eeh_ops
->reset(pe
, EEH_RESET_FUNDAMENTAL
);
569 * eeh_set_pe_freset - Check the required reset for the indicated device
571 * @flag: return value
573 * Each device might have its preferred reset type: fundamental or
574 * hot reset. The routine is used to collected the information for
575 * the indicated device and its children so that the bunch of the
576 * devices could be reset properly.
578 static void *eeh_set_dev_freset(void *data
, void *flag
)
581 unsigned int *freset
= (unsigned int *)flag
;
582 struct eeh_dev
*edev
= (struct eeh_dev
*)data
;
584 dev
= eeh_dev_to_pci_dev(edev
);
586 *freset
|= dev
->needs_freset
;
592 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
595 * Assert the PCI #RST line for 1/4 second.
597 static void eeh_reset_pe_once(struct eeh_pe
*pe
)
599 unsigned int freset
= 0;
601 /* Determine type of EEH reset required for
602 * Partitionable Endpoint, a hot-reset (1)
603 * or a fundamental reset (3).
604 * A fundamental reset required by any device under
605 * Partitionable Endpoint trumps hot-reset.
607 eeh_pe_dev_traverse(pe
, eeh_set_dev_freset
, &freset
);
610 eeh_ops
->reset(pe
, EEH_RESET_FUNDAMENTAL
);
612 eeh_ops
->reset(pe
, EEH_RESET_HOT
);
614 /* The PCI bus requires that the reset be held high for at least
615 * a 100 milliseconds. We wait a bit longer 'just in case'.
617 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
618 msleep(PCI_BUS_RST_HOLD_TIME_MSEC
);
620 /* We might get hit with another EEH freeze as soon as the
621 * pci slot reset line is dropped. Make sure we don't miss
622 * these, and clear the flag now.
624 eeh_pe_state_clear(pe
, EEH_PE_ISOLATED
);
626 eeh_ops
->reset(pe
, EEH_RESET_DEACTIVATE
);
628 /* After a PCI slot has been reset, the PCI Express spec requires
629 * a 1.5 second idle time for the bus to stabilize, before starting
632 #define PCI_BUS_SETTLE_TIME_MSEC 1800
633 msleep(PCI_BUS_SETTLE_TIME_MSEC
);
637 * eeh_reset_pe - Reset the indicated PE
640 * This routine should be called to reset indicated device, including
641 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
642 * might be involved as well.
644 int eeh_reset_pe(struct eeh_pe
*pe
)
646 int flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
649 /* Take three shots at resetting the bus */
650 for (i
=0; i
<3; i
++) {
651 eeh_reset_pe_once(pe
);
653 rc
= eeh_ops
->wait_state(pe
, PCI_BUS_RESET_WAIT_MSEC
);
654 if ((rc
& flags
) == flags
)
658 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
659 __func__
, pe
->phb
->global_number
, pe
->addr
);
662 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
663 i
+1, pe
->phb
->global_number
, pe
->addr
, rc
);
670 * eeh_save_bars - Save device bars
671 * @edev: PCI device associated EEH device
673 * Save the values of the device bars. Unlike the restore
674 * routine, this routine is *not* recursive. This is because
675 * PCI devices are added individually; but, for the restore,
676 * an entire slot is reset at a time.
678 void eeh_save_bars(struct eeh_dev
*edev
)
681 struct device_node
*dn
;
685 dn
= eeh_dev_to_of_node(edev
);
687 for (i
= 0; i
< 16; i
++)
688 eeh_ops
->read_config(dn
, i
* 4, 4, &edev
->config_space
[i
]);
691 * For PCI bridges including root port, we need enable bus
692 * master explicitly. Otherwise, it can't fetch IODA table
693 * entries correctly. So we cache the bit in advance so that
694 * we can restore it after reset, either PHB range or PE range.
696 if (edev
->mode
& EEH_DEV_BRIDGE
)
697 edev
->config_space
[1] |= PCI_COMMAND_MASTER
;
701 * eeh_ops_register - Register platform dependent EEH operations
702 * @ops: platform dependent EEH operations
704 * Register the platform dependent EEH operation callback
705 * functions. The platform should call this function before
706 * any other EEH operations.
708 int __init
eeh_ops_register(struct eeh_ops
*ops
)
711 pr_warning("%s: Invalid EEH ops name for %p\n",
716 if (eeh_ops
&& eeh_ops
!= ops
) {
717 pr_warning("%s: EEH ops of platform %s already existing (%s)\n",
718 __func__
, eeh_ops
->name
, ops
->name
);
728 * eeh_ops_unregister - Unreigster platform dependent EEH operations
729 * @name: name of EEH platform operations
731 * Unregister the platform dependent EEH operation callback
734 int __exit
eeh_ops_unregister(const char *name
)
736 if (!name
|| !strlen(name
)) {
737 pr_warning("%s: Invalid EEH ops name\n",
742 if (eeh_ops
&& !strcmp(eeh_ops
->name
, name
)) {
751 * eeh_init - EEH initialization
753 * Initialize EEH by trying to enable it for all of the adapters in the system.
754 * As a side effect we can determine here if eeh is supported at all.
755 * Note that we leave EEH on so failed config cycles won't cause a machine
756 * check. If a user turns off EEH for a particular adapter they are really
757 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
758 * grant access to a slot if EEH isn't enabled, and so we always enable
759 * EEH for all slots/all devices.
761 * The eeh-force-off option disables EEH checking globally, for all slots.
762 * Even if force-off is set, the EEH hardware is still enabled, so that
763 * newer systems can boot.
767 struct pci_controller
*hose
, *tmp
;
768 struct device_node
*phb
;
773 * We have to delay the initialization on PowerNV after
774 * the PCI hierarchy tree has been built because the PEs
775 * are figured out based on PCI devices instead of device
778 if (machine_is(powernv
) && cnt
++ <= 0)
781 /* call platform initialization function */
783 pr_warning("%s: Platform EEH operation not found\n",
786 } else if ((ret
= eeh_ops
->init())) {
787 pr_warning("%s: Failed to call platform init function (%d)\n",
792 /* Initialize EEH event */
793 ret
= eeh_event_init();
797 /* Enable EEH for all adapters */
798 if (eeh_probe_mode_devtree()) {
799 list_for_each_entry_safe(hose
, tmp
,
800 &hose_list
, list_node
) {
802 traverse_pci_devices(phb
, eeh_ops
->of_probe
, NULL
);
804 } else if (eeh_probe_mode_dev()) {
805 list_for_each_entry_safe(hose
, tmp
,
806 &hose_list
, list_node
)
807 pci_walk_bus(hose
->bus
, eeh_ops
->dev_probe
, NULL
);
809 pr_warning("%s: Invalid probe mode %d\n",
810 __func__
, eeh_probe_mode
);
815 * Call platform post-initialization. Actually, It's good chance
816 * to inform platform that EEH is ready to supply service if the
817 * I/O cache stuff has been built up.
819 if (eeh_ops
->post_init
) {
820 ret
= eeh_ops
->post_init();
825 if (eeh_subsystem_enabled
)
826 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
828 pr_warning("EEH: No capable adapters found\n");
833 core_initcall_sync(eeh_init
);
836 * eeh_add_device_early - Enable EEH for the indicated device_node
837 * @dn: device node for which to set up EEH
839 * This routine must be used to perform EEH initialization for PCI
840 * devices that were added after system boot (e.g. hotplug, dlpar).
841 * This routine must be called before any i/o is performed to the
842 * adapter (inluding any config-space i/o).
843 * Whether this actually enables EEH or not for this device depends
844 * on the CEC architecture, type of the device, on earlier boot
845 * command-line arguments & etc.
847 void eeh_add_device_early(struct device_node
*dn
)
849 struct pci_controller
*phb
;
852 * If we're doing EEH probe based on PCI device, we
853 * would delay the probe until late stage because
854 * the PCI device isn't available this moment.
856 if (!eeh_probe_mode_devtree())
859 if (!of_node_to_eeh_dev(dn
))
861 phb
= of_node_to_eeh_dev(dn
)->phb
;
863 /* USB Bus children of PCI devices will not have BUID's */
864 if (NULL
== phb
|| 0 == phb
->buid
)
867 eeh_ops
->of_probe(dn
, NULL
);
871 * eeh_add_device_tree_early - Enable EEH for the indicated device
874 * This routine must be used to perform EEH initialization for the
875 * indicated PCI device that was added after system boot (e.g.
878 void eeh_add_device_tree_early(struct device_node
*dn
)
880 struct device_node
*sib
;
882 for_each_child_of_node(dn
, sib
)
883 eeh_add_device_tree_early(sib
);
884 eeh_add_device_early(dn
);
886 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
889 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
890 * @dev: pci device for which to set up EEH
892 * This routine must be used to complete EEH initialization for PCI
893 * devices that were added after system boot (e.g. hotplug, dlpar).
895 void eeh_add_device_late(struct pci_dev
*dev
)
897 struct device_node
*dn
;
898 struct eeh_dev
*edev
;
900 if (!dev
|| !eeh_subsystem_enabled
)
903 pr_debug("EEH: Adding device %s\n", pci_name(dev
));
905 dn
= pci_device_to_OF_node(dev
);
906 edev
= of_node_to_eeh_dev(dn
);
907 if (edev
->pdev
== dev
) {
908 pr_debug("EEH: Already referenced !\n");
913 * The EEH cache might not be removed correctly because of
914 * unbalanced kref to the device during unplug time, which
915 * relies on pcibios_release_device(). So we have to remove
916 * that here explicitly.
919 eeh_rmv_from_parent_pe(edev
);
920 eeh_addr_cache_rmv_dev(edev
->pdev
);
921 eeh_sysfs_remove_device(edev
->pdev
);
922 edev
->mode
&= ~EEH_DEV_SYSFS
;
925 * We definitely should have the PCI device removed
926 * though it wasn't correctly. So we needn't call
927 * into error handler afterwards.
929 edev
->mode
|= EEH_DEV_NO_HANDLER
;
932 dev
->dev
.archdata
.edev
= NULL
;
936 dev
->dev
.archdata
.edev
= edev
;
939 * We have to do the EEH probe here because the PCI device
940 * hasn't been created yet in the early stage.
942 if (eeh_probe_mode_dev())
943 eeh_ops
->dev_probe(dev
, NULL
);
945 eeh_addr_cache_insert_dev(dev
);
949 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
952 * This routine must be used to perform EEH initialization for PCI
953 * devices which are attached to the indicated PCI bus. The PCI bus
954 * is added after system boot through hotplug or dlpar.
956 void eeh_add_device_tree_late(struct pci_bus
*bus
)
960 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
961 eeh_add_device_late(dev
);
962 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
963 struct pci_bus
*subbus
= dev
->subordinate
;
965 eeh_add_device_tree_late(subbus
);
969 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
972 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
975 * This routine must be used to add EEH sysfs files for PCI
976 * devices which are attached to the indicated PCI bus. The PCI bus
977 * is added after system boot through hotplug or dlpar.
979 void eeh_add_sysfs_files(struct pci_bus
*bus
)
983 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
984 eeh_sysfs_add_device(dev
);
985 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
986 struct pci_bus
*subbus
= dev
->subordinate
;
988 eeh_add_sysfs_files(subbus
);
992 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files
);
995 * eeh_remove_device - Undo EEH setup for the indicated pci device
996 * @dev: pci device to be removed
998 * This routine should be called when a device is removed from
999 * a running system (e.g. by hotplug or dlpar). It unregisters
1000 * the PCI device from the EEH subsystem. I/O errors affecting
1001 * this device will no longer be detected after this call; thus,
1002 * i/o errors affecting this slot may leave this device unusable.
1004 void eeh_remove_device(struct pci_dev
*dev
)
1006 struct eeh_dev
*edev
;
1008 if (!dev
|| !eeh_subsystem_enabled
)
1010 edev
= pci_dev_to_eeh_dev(dev
);
1012 /* Unregister the device with the EEH/PCI address search system */
1013 pr_debug("EEH: Removing device %s\n", pci_name(dev
));
1015 if (!edev
|| !edev
->pdev
|| !edev
->pe
) {
1016 pr_debug("EEH: Not referenced !\n");
1021 * During the hotplug for EEH error recovery, we need the EEH
1022 * device attached to the parent PE in order for BAR restore
1023 * a bit later. So we keep it for BAR restore and remove it
1024 * from the parent PE during the BAR resotre.
1027 dev
->dev
.archdata
.edev
= NULL
;
1028 if (!(edev
->pe
->state
& EEH_PE_KEEP
))
1029 eeh_rmv_from_parent_pe(edev
);
1031 edev
->mode
|= EEH_DEV_DISCONNECTED
;
1034 * We're removing from the PCI subsystem, that means
1035 * the PCI device driver can't support EEH or not
1036 * well. So we rely on hotplug completely to do recovery
1037 * for the specific PCI device.
1039 edev
->mode
|= EEH_DEV_NO_HANDLER
;
1041 eeh_addr_cache_rmv_dev(dev
);
1042 eeh_sysfs_remove_device(dev
);
1043 edev
->mode
&= ~EEH_DEV_SYSFS
;
1046 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1048 if (0 == eeh_subsystem_enabled
) {
1049 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1050 seq_printf(m
, "eeh_total_mmio_ffs=%llu\n", eeh_stats
.total_mmio_ffs
);
1052 seq_printf(m
, "EEH Subsystem is enabled\n");
1055 "no device node=%llu\n"
1056 "no config address=%llu\n"
1057 "check not wanted=%llu\n"
1058 "eeh_total_mmio_ffs=%llu\n"
1059 "eeh_false_positives=%llu\n"
1060 "eeh_slot_resets=%llu\n",
1061 eeh_stats
.no_device
,
1063 eeh_stats
.no_cfg_addr
,
1064 eeh_stats
.ignored_check
,
1065 eeh_stats
.total_mmio_ffs
,
1066 eeh_stats
.false_positives
,
1067 eeh_stats
.slot_resets
);
1073 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1075 return single_open(file
, proc_eeh_show
, NULL
);
1078 static const struct file_operations proc_eeh_operations
= {
1079 .open
= proc_eeh_open
,
1081 .llseek
= seq_lseek
,
1082 .release
= single_release
,
1085 static int __init
eeh_init_proc(void)
1087 if (machine_is(pseries
) || machine_is(powernv
))
1088 proc_create("powerpc/eeh", 0, NULL
, &proc_eeh_operations
);
1091 __initcall(eeh_init_proc
);