2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/debugfs.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/pci.h>
30 #include <linux/iommu.h>
31 #include <linux/proc_fs.h>
32 #include <linux/rbtree.h>
33 #include <linux/reboot.h>
34 #include <linux/seq_file.h>
35 #include <linux/spinlock.h>
36 #include <linux/export.h>
39 #include <linux/atomic.h>
40 #include <asm/debug.h>
42 #include <asm/eeh_event.h>
44 #include <asm/iommu.h>
45 #include <asm/machdep.h>
46 #include <asm/ppc-pci.h>
51 * EEH, or "Extended Error Handling" is a PCI bridge technology for
52 * dealing with PCI bus errors that can't be dealt with within the
53 * usual PCI framework, except by check-stopping the CPU. Systems
54 * that are designed for high-availability/reliability cannot afford
55 * to crash due to a "mere" PCI error, thus the need for EEH.
56 * An EEH-capable bridge operates by converting a detected error
57 * into a "slot freeze", taking the PCI adapter off-line, making
58 * the slot behave, from the OS'es point of view, as if the slot
59 * were "empty": all reads return 0xff's and all writes are silently
60 * ignored. EEH slot isolation events can be triggered by parity
61 * errors on the address or data busses (e.g. during posted writes),
62 * which in turn might be caused by low voltage on the bus, dust,
63 * vibration, humidity, radioactivity or plain-old failed hardware.
65 * Note, however, that one of the leading causes of EEH slot
66 * freeze events are buggy device drivers, buggy device microcode,
67 * or buggy device hardware. This is because any attempt by the
68 * device to bus-master data to a memory address that is not
69 * assigned to the device will trigger a slot freeze. (The idea
70 * is to prevent devices-gone-wild from corrupting system memory).
71 * Buggy hardware/drivers will have a miserable time co-existing
74 * Ideally, a PCI device driver, when suspecting that an isolation
75 * event has occurred (e.g. by reading 0xff's), will then ask EEH
76 * whether this is the case, and then take appropriate steps to
77 * reset the PCI slot, the PCI device, and then resume operations.
78 * However, until that day, the checking is done here, with the
79 * eeh_check_failure() routine embedded in the MMIO macros. If
80 * the slot is found to be isolated, an "EEH Event" is synthesized
81 * and sent out for processing.
84 /* If a device driver keeps reading an MMIO register in an interrupt
85 * handler after a slot isolation event, it might be broken.
86 * This sets the threshold for how many read attempts we allow
87 * before printing an error message.
89 #define EEH_MAX_FAILS 2100000
91 /* Time to wait for a PCI slot to report status, in milliseconds */
92 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
95 * EEH probe mode support, which is part of the flags,
96 * is to support multiple platforms for EEH. Some platforms
97 * like pSeries do PCI emunation based on device tree.
98 * However, other platforms like powernv probe PCI devices
99 * from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for
101 * particular OF node or PCI device so that the corresponding
102 * PE would be created there.
104 int eeh_subsystem_flags
;
105 EXPORT_SYMBOL(eeh_subsystem_flags
);
107 /* Platform dependent EEH operations */
108 struct eeh_ops
*eeh_ops
= NULL
;
110 /* Lock to avoid races due to multiple reports of an error */
111 DEFINE_RAW_SPINLOCK(confirm_error_lock
);
113 /* Lock to protect passed flags */
114 static DEFINE_MUTEX(eeh_dev_mutex
);
116 /* Buffer for reporting pci register dumps. Its here in BSS, and
117 * not dynamically alloced, so that it ends up in RMO where RTAS
120 #define EEH_PCI_REGS_LOG_LEN 8192
121 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
124 * The struct is used to maintain the EEH global statistic
125 * information. Besides, the EEH global statistics will be
126 * exported to user space through procfs
129 u64 no_device
; /* PCI device not found */
130 u64 no_dn
; /* OF node not found */
131 u64 no_cfg_addr
; /* Config address not found */
132 u64 ignored_check
; /* EEH check skipped */
133 u64 total_mmio_ffs
; /* Total EEH checks */
134 u64 false_positives
; /* Unnecessary EEH checks */
135 u64 slot_resets
; /* PE reset */
138 static struct eeh_stats eeh_stats
;
140 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
142 static int __init
eeh_setup(char *str
)
144 if (!strcmp(str
, "off"))
145 eeh_add_flag(EEH_FORCE_DISABLED
);
149 __setup("eeh=", eeh_setup
);
152 * This routine captures assorted PCI configuration space data
153 * for the indicated PCI device, and puts them into a buffer
154 * for RTAS error logging.
156 static size_t eeh_dump_dev_log(struct eeh_dev
*edev
, char *buf
, size_t len
)
158 struct device_node
*dn
= eeh_dev_to_of_node(edev
);
164 n
+= scnprintf(buf
+n
, len
-n
, "%s\n", dn
->full_name
);
165 pr_warn("EEH: of node=%s\n", dn
->full_name
);
167 eeh_ops
->read_config(dn
, PCI_VENDOR_ID
, 4, &cfg
);
168 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
169 pr_warn("EEH: PCI device/vendor: %08x\n", cfg
);
171 eeh_ops
->read_config(dn
, PCI_COMMAND
, 4, &cfg
);
172 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
173 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg
);
175 /* Gather bridge-specific registers */
176 if (edev
->mode
& EEH_DEV_BRIDGE
) {
177 eeh_ops
->read_config(dn
, PCI_SEC_STATUS
, 2, &cfg
);
178 n
+= scnprintf(buf
+n
, len
-n
, "sec stat:%x\n", cfg
);
179 pr_warn("EEH: Bridge secondary status: %04x\n", cfg
);
181 eeh_ops
->read_config(dn
, PCI_BRIDGE_CONTROL
, 2, &cfg
);
182 n
+= scnprintf(buf
+n
, len
-n
, "brdg ctl:%x\n", cfg
);
183 pr_warn("EEH: Bridge control: %04x\n", cfg
);
186 /* Dump out the PCI-X command and status regs */
187 cap
= edev
->pcix_cap
;
189 eeh_ops
->read_config(dn
, cap
, 4, &cfg
);
190 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
191 pr_warn("EEH: PCI-X cmd: %08x\n", cfg
);
193 eeh_ops
->read_config(dn
, cap
+4, 4, &cfg
);
194 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
195 pr_warn("EEH: PCI-X status: %08x\n", cfg
);
198 /* If PCI-E capable, dump PCI-E cap 10 */
199 cap
= edev
->pcie_cap
;
201 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
202 pr_warn("EEH: PCI-E capabilities and status follow:\n");
204 for (i
=0; i
<=8; i
++) {
205 eeh_ops
->read_config(dn
, cap
+4*i
, 4, &cfg
);
206 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
210 pr_warn("%s\n", buffer
);
212 l
= scnprintf(buffer
, sizeof(buffer
),
213 "EEH: PCI-E %02x: %08x ",
216 l
+= scnprintf(buffer
+l
, sizeof(buffer
)-l
,
222 pr_warn("%s\n", buffer
);
225 /* If AER capable, dump it */
228 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
229 pr_warn("EEH: PCI-E AER capability register set follows:\n");
231 for (i
=0; i
<=13; i
++) {
232 eeh_ops
->read_config(dn
, cap
+4*i
, 4, &cfg
);
233 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
237 pr_warn("%s\n", buffer
);
239 l
= scnprintf(buffer
, sizeof(buffer
),
240 "EEH: PCI-E AER %02x: %08x ",
243 l
+= scnprintf(buffer
+l
, sizeof(buffer
)-l
,
248 pr_warn("%s\n", buffer
);
254 static void *eeh_dump_pe_log(void *data
, void *flag
)
256 struct eeh_pe
*pe
= data
;
257 struct eeh_dev
*edev
, *tmp
;
260 eeh_pe_for_each_dev(pe
, edev
, tmp
)
261 *plen
+= eeh_dump_dev_log(edev
, pci_regs_buf
+ *plen
,
262 EEH_PCI_REGS_LOG_LEN
- *plen
);
268 * eeh_slot_error_detail - Generate combined log including driver log and error log
270 * @severity: temporary or permanent error log
272 * This routine should be called to generate the combined log, which
273 * is comprised of driver log and error log. The driver log is figured
274 * out from the config space of the corresponding PCI device, while
275 * the error log is fetched through platform dependent function call.
277 void eeh_slot_error_detail(struct eeh_pe
*pe
, int severity
)
282 * When the PHB is fenced or dead, it's pointless to collect
283 * the data from PCI config space because it should return
284 * 0xFF's. For ER, we still retrieve the data from the PCI
287 * For pHyp, we have to enable IO for log retrieval. Otherwise,
288 * 0xFF's is always returned from PCI config space.
290 if (!(pe
->type
& EEH_PE_PHB
)) {
291 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG
))
292 eeh_pci_enable(pe
, EEH_OPT_THAW_MMIO
);
293 eeh_ops
->configure_bridge(pe
);
294 eeh_pe_restore_bars(pe
);
297 eeh_pe_traverse(pe
, eeh_dump_pe_log
, &loglen
);
300 eeh_ops
->get_log(pe
, severity
, pci_regs_buf
, loglen
);
304 * eeh_token_to_phys - Convert EEH address token to phys address
305 * @token: I/O token, should be address in the form 0xA....
307 * This routine should be called to convert virtual I/O address
310 static inline unsigned long eeh_token_to_phys(unsigned long token
)
317 * We won't find hugepages here, iomem
319 ptep
= find_linux_pte_or_hugepte(init_mm
.pgd
, token
, &hugepage_shift
);
322 WARN_ON(hugepage_shift
);
323 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
325 return pa
| (token
& (PAGE_SIZE
-1));
329 * On PowerNV platform, we might already have fenced PHB there.
330 * For that case, it's meaningless to recover frozen PE. Intead,
331 * We have to handle fenced PHB firstly.
333 static int eeh_phb_check_failure(struct eeh_pe
*pe
)
335 struct eeh_pe
*phb_pe
;
339 if (!eeh_has_flag(EEH_PROBE_MODE_DEV
))
342 /* Find the PHB PE */
343 phb_pe
= eeh_phb_pe_get(pe
->phb
);
345 pr_warn("%s Can't find PE for PHB#%d\n",
346 __func__
, pe
->phb
->global_number
);
350 /* If the PHB has been in problematic state */
351 eeh_serialize_lock(&flags
);
352 if (phb_pe
->state
& EEH_PE_ISOLATED
) {
357 /* Check PHB state */
358 ret
= eeh_ops
->get_state(phb_pe
, NULL
);
360 (ret
== EEH_STATE_NOT_SUPPORT
) ||
361 (ret
& (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) ==
362 (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
)) {
367 /* Isolate the PHB and send event */
368 eeh_pe_state_mark(phb_pe
, EEH_PE_ISOLATED
);
369 eeh_serialize_unlock(flags
);
371 pr_err("EEH: PHB#%x failure detected, location: %s\n",
372 phb_pe
->phb
->global_number
, eeh_pe_loc_get(phb_pe
));
374 eeh_send_failure_event(phb_pe
);
378 eeh_serialize_unlock(flags
);
383 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
386 * Check for an EEH failure for the given device node. Call this
387 * routine if the result of a read was all 0xff's and you want to
388 * find out if this is due to an EEH slot freeze. This routine
389 * will query firmware for the EEH status.
391 * Returns 0 if there has not been an EEH error; otherwise returns
392 * a non-zero value and queues up a slot isolation event notification.
394 * It is safe to call this routine in an interrupt context.
396 int eeh_dev_check_failure(struct eeh_dev
*edev
)
399 int active_flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
401 struct device_node
*dn
;
403 struct eeh_pe
*pe
, *parent_pe
, *phb_pe
;
405 const char *location
;
407 eeh_stats
.total_mmio_ffs
++;
416 dn
= eeh_dev_to_of_node(edev
);
417 dev
= eeh_dev_to_pci_dev(edev
);
418 pe
= eeh_dev_to_pe(edev
);
420 /* Access to IO BARs might get this far and still not want checking. */
422 eeh_stats
.ignored_check
++;
423 pr_debug("EEH: Ignored check for %s %s\n",
424 eeh_pci_name(dev
), dn
->full_name
);
428 if (!pe
->addr
&& !pe
->config_addr
) {
429 eeh_stats
.no_cfg_addr
++;
434 * On PowerNV platform, we might already have fenced PHB
435 * there and we need take care of that firstly.
437 ret
= eeh_phb_check_failure(pe
);
442 * If the PE isn't owned by us, we shouldn't check the
443 * state. Instead, let the owner handle it if the PE has
446 if (eeh_pe_passed(pe
))
449 /* If we already have a pending isolation event for this
450 * slot, we know it's bad already, we don't need to check.
451 * Do this checking under a lock; as multiple PCI devices
452 * in one slot might report errors simultaneously, and we
453 * only want one error recovery routine running.
455 eeh_serialize_lock(&flags
);
457 if (pe
->state
& EEH_PE_ISOLATED
) {
459 if (pe
->check_count
% EEH_MAX_FAILS
== 0) {
460 location
= of_get_property(dn
, "ibm,loc-code", NULL
);
461 printk(KERN_ERR
"EEH: %d reads ignored for recovering device at "
462 "location=%s driver=%s pci addr=%s\n",
463 pe
->check_count
, location
,
464 eeh_driver_name(dev
), eeh_pci_name(dev
));
465 printk(KERN_ERR
"EEH: Might be infinite loop in %s driver\n",
466 eeh_driver_name(dev
));
473 * Now test for an EEH failure. This is VERY expensive.
474 * Note that the eeh_config_addr may be a parent device
475 * in the case of a device behind a bridge, or it may be
476 * function zero of a multi-function device.
477 * In any case they must share a common PHB.
479 ret
= eeh_ops
->get_state(pe
, NULL
);
481 /* Note that config-io to empty slots may fail;
482 * they are empty when they don't have children.
483 * We will punt with the following conditions: Failure to get
484 * PE's state, EEH not support and Permanently unavailable
485 * state, PE is in good state.
488 (ret
== EEH_STATE_NOT_SUPPORT
) ||
489 ((ret
& active_flags
) == active_flags
)) {
490 eeh_stats
.false_positives
++;
491 pe
->false_positives
++;
497 * It should be corner case that the parent PE has been
498 * put into frozen state as well. We should take care
501 parent_pe
= pe
->parent
;
503 /* Hit the ceiling ? */
504 if (parent_pe
->type
& EEH_PE_PHB
)
507 /* Frozen parent PE ? */
508 ret
= eeh_ops
->get_state(parent_pe
, NULL
);
510 (ret
& active_flags
) != active_flags
)
513 /* Next parent level */
514 parent_pe
= parent_pe
->parent
;
517 eeh_stats
.slot_resets
++;
519 /* Avoid repeated reports of this failure, including problems
520 * with other functions on this device, and functions under
523 eeh_pe_state_mark(pe
, EEH_PE_ISOLATED
);
524 eeh_serialize_unlock(flags
);
526 /* Most EEH events are due to device driver bugs. Having
527 * a stack trace will help the device-driver authors figure
528 * out what happened. So print that out.
530 phb_pe
= eeh_phb_pe_get(pe
->phb
);
531 pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
532 pe
->phb
->global_number
, pe
->addr
);
533 pr_err("EEH: PE location: %s, PHB location: %s\n",
534 eeh_pe_loc_get(pe
), eeh_pe_loc_get(phb_pe
));
537 eeh_send_failure_event(pe
);
542 eeh_serialize_unlock(flags
);
546 EXPORT_SYMBOL_GPL(eeh_dev_check_failure
);
549 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
550 * @token: I/O address
552 * Check for an EEH failure at the given I/O address. Call this
553 * routine if the result of a read was all 0xff's and you want to
554 * find out if this is due to an EEH slot freeze event. This routine
555 * will query firmware for the EEH status.
557 * Note this routine is safe to call in an interrupt context.
559 int eeh_check_failure(const volatile void __iomem
*token
)
562 struct eeh_dev
*edev
;
564 /* Finding the phys addr + pci device; this is pretty quick. */
565 addr
= eeh_token_to_phys((unsigned long __force
) token
);
566 edev
= eeh_addr_cache_get_dev(addr
);
568 eeh_stats
.no_device
++;
572 return eeh_dev_check_failure(edev
);
574 EXPORT_SYMBOL(eeh_check_failure
);
578 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
581 * This routine should be called to reenable frozen MMIO or DMA
582 * so that it would work correctly again. It's useful while doing
583 * recovery or log collection on the indicated device.
585 int eeh_pci_enable(struct eeh_pe
*pe
, int function
)
590 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
591 * Also, it's pointless to enable them on unfrozen PE. So
592 * we have to check before enabling IO or DMA.
595 case EEH_OPT_THAW_MMIO
:
596 active_flag
= EEH_STATE_MMIO_ACTIVE
;
598 case EEH_OPT_THAW_DMA
:
599 active_flag
= EEH_STATE_DMA_ACTIVE
;
601 case EEH_OPT_DISABLE
:
603 case EEH_OPT_FREEZE_PE
:
607 pr_warn("%s: Invalid function %d\n",
613 * Check if IO or DMA has been enabled before
617 rc
= eeh_ops
->get_state(pe
, NULL
);
621 /* Needn't enable it at all */
622 if (rc
== EEH_STATE_NOT_SUPPORT
)
625 /* It's already enabled */
626 if (rc
& active_flag
)
631 /* Issue the request */
632 rc
= eeh_ops
->set_option(pe
, function
);
634 pr_warn("%s: Unexpected state change %d on "
635 "PHB#%d-PE#%x, err=%d\n",
636 __func__
, function
, pe
->phb
->global_number
,
639 /* Check if the request is finished successfully */
641 rc
= eeh_ops
->wait_state(pe
, PCI_BUS_RESET_WAIT_MSEC
);
645 if (rc
& active_flag
)
655 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
656 * @dev: pci device struct
657 * @state: reset state to enter
662 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
664 struct eeh_dev
*edev
= pci_dev_to_eeh_dev(dev
);
665 struct eeh_pe
*pe
= eeh_dev_to_pe(edev
);
668 pr_err("%s: No PE found on PCI device %s\n",
669 __func__
, pci_name(dev
));
674 case pcie_deassert_reset
:
675 eeh_ops
->reset(pe
, EEH_RESET_DEACTIVATE
);
676 eeh_pe_state_clear(pe
, EEH_PE_RESET
);
679 eeh_pe_state_mark(pe
, EEH_PE_RESET
);
680 eeh_ops
->reset(pe
, EEH_RESET_HOT
);
682 case pcie_warm_reset
:
683 eeh_pe_state_mark(pe
, EEH_PE_RESET
);
684 eeh_ops
->reset(pe
, EEH_RESET_FUNDAMENTAL
);
687 eeh_pe_state_clear(pe
, EEH_PE_RESET
);
695 * eeh_set_pe_freset - Check the required reset for the indicated device
697 * @flag: return value
699 * Each device might have its preferred reset type: fundamental or
700 * hot reset. The routine is used to collected the information for
701 * the indicated device and its children so that the bunch of the
702 * devices could be reset properly.
704 static void *eeh_set_dev_freset(void *data
, void *flag
)
707 unsigned int *freset
= (unsigned int *)flag
;
708 struct eeh_dev
*edev
= (struct eeh_dev
*)data
;
710 dev
= eeh_dev_to_pci_dev(edev
);
712 *freset
|= dev
->needs_freset
;
718 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
721 * Assert the PCI #RST line for 1/4 second.
723 static void eeh_reset_pe_once(struct eeh_pe
*pe
)
725 unsigned int freset
= 0;
727 /* Determine type of EEH reset required for
728 * Partitionable Endpoint, a hot-reset (1)
729 * or a fundamental reset (3).
730 * A fundamental reset required by any device under
731 * Partitionable Endpoint trumps hot-reset.
733 eeh_pe_dev_traverse(pe
, eeh_set_dev_freset
, &freset
);
736 eeh_ops
->reset(pe
, EEH_RESET_FUNDAMENTAL
);
738 eeh_ops
->reset(pe
, EEH_RESET_HOT
);
740 eeh_ops
->reset(pe
, EEH_RESET_DEACTIVATE
);
744 * eeh_reset_pe - Reset the indicated PE
747 * This routine should be called to reset indicated device, including
748 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
749 * might be involved as well.
751 int eeh_reset_pe(struct eeh_pe
*pe
)
753 int flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
756 /* Take three shots at resetting the bus */
757 for (i
=0; i
<3; i
++) {
758 eeh_reset_pe_once(pe
);
761 * EEH_PE_ISOLATED is expected to be removed after
764 rc
= eeh_ops
->wait_state(pe
, PCI_BUS_RESET_WAIT_MSEC
);
765 if ((rc
& flags
) == flags
)
769 pr_err("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
770 __func__
, pe
->phb
->global_number
, pe
->addr
);
773 pr_err("EEH: bus reset %d failed on PHB#%d-PE#%x, rc=%d\n",
774 i
+1, pe
->phb
->global_number
, pe
->addr
, rc
);
781 * eeh_save_bars - Save device bars
782 * @edev: PCI device associated EEH device
784 * Save the values of the device bars. Unlike the restore
785 * routine, this routine is *not* recursive. This is because
786 * PCI devices are added individually; but, for the restore,
787 * an entire slot is reset at a time.
789 void eeh_save_bars(struct eeh_dev
*edev
)
792 struct device_node
*dn
;
796 dn
= eeh_dev_to_of_node(edev
);
798 for (i
= 0; i
< 16; i
++)
799 eeh_ops
->read_config(dn
, i
* 4, 4, &edev
->config_space
[i
]);
802 * For PCI bridges including root port, we need enable bus
803 * master explicitly. Otherwise, it can't fetch IODA table
804 * entries correctly. So we cache the bit in advance so that
805 * we can restore it after reset, either PHB range or PE range.
807 if (edev
->mode
& EEH_DEV_BRIDGE
)
808 edev
->config_space
[1] |= PCI_COMMAND_MASTER
;
812 * eeh_ops_register - Register platform dependent EEH operations
813 * @ops: platform dependent EEH operations
815 * Register the platform dependent EEH operation callback
816 * functions. The platform should call this function before
817 * any other EEH operations.
819 int __init
eeh_ops_register(struct eeh_ops
*ops
)
822 pr_warn("%s: Invalid EEH ops name for %p\n",
827 if (eeh_ops
&& eeh_ops
!= ops
) {
828 pr_warn("%s: EEH ops of platform %s already existing (%s)\n",
829 __func__
, eeh_ops
->name
, ops
->name
);
839 * eeh_ops_unregister - Unreigster platform dependent EEH operations
840 * @name: name of EEH platform operations
842 * Unregister the platform dependent EEH operation callback
845 int __exit
eeh_ops_unregister(const char *name
)
847 if (!name
|| !strlen(name
)) {
848 pr_warn("%s: Invalid EEH ops name\n",
853 if (eeh_ops
&& !strcmp(eeh_ops
->name
, name
)) {
861 static int eeh_reboot_notifier(struct notifier_block
*nb
,
862 unsigned long action
, void *unused
)
864 eeh_clear_flag(EEH_ENABLED
);
868 static struct notifier_block eeh_reboot_nb
= {
869 .notifier_call
= eeh_reboot_notifier
,
873 * eeh_init - EEH initialization
875 * Initialize EEH by trying to enable it for all of the adapters in the system.
876 * As a side effect we can determine here if eeh is supported at all.
877 * Note that we leave EEH on so failed config cycles won't cause a machine
878 * check. If a user turns off EEH for a particular adapter they are really
879 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
880 * grant access to a slot if EEH isn't enabled, and so we always enable
881 * EEH for all slots/all devices.
883 * The eeh-force-off option disables EEH checking globally, for all slots.
884 * Even if force-off is set, the EEH hardware is still enabled, so that
885 * newer systems can boot.
889 struct pci_controller
*hose
, *tmp
;
890 struct device_node
*phb
;
895 * We have to delay the initialization on PowerNV after
896 * the PCI hierarchy tree has been built because the PEs
897 * are figured out based on PCI devices instead of device
900 if (machine_is(powernv
) && cnt
++ <= 0)
903 /* Register reboot notifier */
904 ret
= register_reboot_notifier(&eeh_reboot_nb
);
906 pr_warn("%s: Failed to register notifier (%d)\n",
911 /* call platform initialization function */
913 pr_warn("%s: Platform EEH operation not found\n",
916 } else if ((ret
= eeh_ops
->init())) {
917 pr_warn("%s: Failed to call platform init function (%d)\n",
922 /* Initialize EEH event */
923 ret
= eeh_event_init();
927 /* Enable EEH for all adapters */
928 if (eeh_has_flag(EEH_PROBE_MODE_DEVTREE
)) {
929 list_for_each_entry_safe(hose
, tmp
,
930 &hose_list
, list_node
) {
932 traverse_pci_devices(phb
, eeh_ops
->of_probe
, NULL
);
934 } else if (eeh_has_flag(EEH_PROBE_MODE_DEV
)) {
935 list_for_each_entry_safe(hose
, tmp
,
936 &hose_list
, list_node
)
937 pci_walk_bus(hose
->bus
, eeh_ops
->dev_probe
, NULL
);
939 pr_warn("%s: Invalid probe mode %x",
940 __func__
, eeh_subsystem_flags
);
945 * Call platform post-initialization. Actually, It's good chance
946 * to inform platform that EEH is ready to supply service if the
947 * I/O cache stuff has been built up.
949 if (eeh_ops
->post_init
) {
950 ret
= eeh_ops
->post_init();
956 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
958 pr_warn("EEH: No capable adapters found\n");
963 core_initcall_sync(eeh_init
);
966 * eeh_add_device_early - Enable EEH for the indicated device_node
967 * @dn: device node for which to set up EEH
969 * This routine must be used to perform EEH initialization for PCI
970 * devices that were added after system boot (e.g. hotplug, dlpar).
971 * This routine must be called before any i/o is performed to the
972 * adapter (inluding any config-space i/o).
973 * Whether this actually enables EEH or not for this device depends
974 * on the CEC architecture, type of the device, on earlier boot
975 * command-line arguments & etc.
977 void eeh_add_device_early(struct device_node
*dn
)
979 struct pci_controller
*phb
;
982 * If we're doing EEH probe based on PCI device, we
983 * would delay the probe until late stage because
984 * the PCI device isn't available this moment.
986 if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE
))
989 if (!of_node_to_eeh_dev(dn
))
991 phb
= of_node_to_eeh_dev(dn
)->phb
;
993 /* USB Bus children of PCI devices will not have BUID's */
994 if (NULL
== phb
|| 0 == phb
->buid
)
997 eeh_ops
->of_probe(dn
, NULL
);
1001 * eeh_add_device_tree_early - Enable EEH for the indicated device
1004 * This routine must be used to perform EEH initialization for the
1005 * indicated PCI device that was added after system boot (e.g.
1008 void eeh_add_device_tree_early(struct device_node
*dn
)
1010 struct device_node
*sib
;
1012 for_each_child_of_node(dn
, sib
)
1013 eeh_add_device_tree_early(sib
);
1014 eeh_add_device_early(dn
);
1016 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
1019 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
1020 * @dev: pci device for which to set up EEH
1022 * This routine must be used to complete EEH initialization for PCI
1023 * devices that were added after system boot (e.g. hotplug, dlpar).
1025 void eeh_add_device_late(struct pci_dev
*dev
)
1027 struct device_node
*dn
;
1028 struct eeh_dev
*edev
;
1030 if (!dev
|| !eeh_enabled())
1033 pr_debug("EEH: Adding device %s\n", pci_name(dev
));
1035 dn
= pci_device_to_OF_node(dev
);
1036 edev
= of_node_to_eeh_dev(dn
);
1037 if (edev
->pdev
== dev
) {
1038 pr_debug("EEH: Already referenced !\n");
1043 * The EEH cache might not be removed correctly because of
1044 * unbalanced kref to the device during unplug time, which
1045 * relies on pcibios_release_device(). So we have to remove
1046 * that here explicitly.
1049 eeh_rmv_from_parent_pe(edev
);
1050 eeh_addr_cache_rmv_dev(edev
->pdev
);
1051 eeh_sysfs_remove_device(edev
->pdev
);
1052 edev
->mode
&= ~EEH_DEV_SYSFS
;
1055 * We definitely should have the PCI device removed
1056 * though it wasn't correctly. So we needn't call
1057 * into error handler afterwards.
1059 edev
->mode
|= EEH_DEV_NO_HANDLER
;
1062 dev
->dev
.archdata
.edev
= NULL
;
1066 dev
->dev
.archdata
.edev
= edev
;
1069 * We have to do the EEH probe here because the PCI device
1070 * hasn't been created yet in the early stage.
1072 if (eeh_has_flag(EEH_PROBE_MODE_DEV
))
1073 eeh_ops
->dev_probe(dev
, NULL
);
1075 eeh_addr_cache_insert_dev(dev
);
1079 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1082 * This routine must be used to perform EEH initialization for PCI
1083 * devices which are attached to the indicated PCI bus. The PCI bus
1084 * is added after system boot through hotplug or dlpar.
1086 void eeh_add_device_tree_late(struct pci_bus
*bus
)
1088 struct pci_dev
*dev
;
1090 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1091 eeh_add_device_late(dev
);
1092 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1093 struct pci_bus
*subbus
= dev
->subordinate
;
1095 eeh_add_device_tree_late(subbus
);
1099 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
1102 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1105 * This routine must be used to add EEH sysfs files for PCI
1106 * devices which are attached to the indicated PCI bus. The PCI bus
1107 * is added after system boot through hotplug or dlpar.
1109 void eeh_add_sysfs_files(struct pci_bus
*bus
)
1111 struct pci_dev
*dev
;
1113 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1114 eeh_sysfs_add_device(dev
);
1115 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1116 struct pci_bus
*subbus
= dev
->subordinate
;
1118 eeh_add_sysfs_files(subbus
);
1122 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files
);
1125 * eeh_remove_device - Undo EEH setup for the indicated pci device
1126 * @dev: pci device to be removed
1128 * This routine should be called when a device is removed from
1129 * a running system (e.g. by hotplug or dlpar). It unregisters
1130 * the PCI device from the EEH subsystem. I/O errors affecting
1131 * this device will no longer be detected after this call; thus,
1132 * i/o errors affecting this slot may leave this device unusable.
1134 void eeh_remove_device(struct pci_dev
*dev
)
1136 struct eeh_dev
*edev
;
1138 if (!dev
|| !eeh_enabled())
1140 edev
= pci_dev_to_eeh_dev(dev
);
1142 /* Unregister the device with the EEH/PCI address search system */
1143 pr_debug("EEH: Removing device %s\n", pci_name(dev
));
1145 if (!edev
|| !edev
->pdev
|| !edev
->pe
) {
1146 pr_debug("EEH: Not referenced !\n");
1151 * During the hotplug for EEH error recovery, we need the EEH
1152 * device attached to the parent PE in order for BAR restore
1153 * a bit later. So we keep it for BAR restore and remove it
1154 * from the parent PE during the BAR resotre.
1157 dev
->dev
.archdata
.edev
= NULL
;
1158 if (!(edev
->pe
->state
& EEH_PE_KEEP
))
1159 eeh_rmv_from_parent_pe(edev
);
1161 edev
->mode
|= EEH_DEV_DISCONNECTED
;
1164 * We're removing from the PCI subsystem, that means
1165 * the PCI device driver can't support EEH or not
1166 * well. So we rely on hotplug completely to do recovery
1167 * for the specific PCI device.
1169 edev
->mode
|= EEH_DEV_NO_HANDLER
;
1171 eeh_addr_cache_rmv_dev(dev
);
1172 eeh_sysfs_remove_device(dev
);
1173 edev
->mode
&= ~EEH_DEV_SYSFS
;
1176 int eeh_unfreeze_pe(struct eeh_pe
*pe
, bool sw_state
)
1180 ret
= eeh_pci_enable(pe
, EEH_OPT_THAW_MMIO
);
1182 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n",
1183 __func__
, ret
, pe
->phb
->global_number
, pe
->addr
);
1187 ret
= eeh_pci_enable(pe
, EEH_OPT_THAW_DMA
);
1189 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n",
1190 __func__
, ret
, pe
->phb
->global_number
, pe
->addr
);
1194 /* Clear software isolated state */
1195 if (sw_state
&& (pe
->state
& EEH_PE_ISOLATED
))
1196 eeh_pe_state_clear(pe
, EEH_PE_ISOLATED
);
1202 static struct pci_device_id eeh_reset_ids
[] = {
1203 { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */
1204 { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */
1208 static int eeh_pe_change_owner(struct eeh_pe
*pe
)
1210 struct eeh_dev
*edev
, *tmp
;
1211 struct pci_dev
*pdev
;
1212 struct pci_device_id
*id
;
1215 /* Check PE state */
1216 flags
= (EEH_STATE_MMIO_ACTIVE
| EEH_STATE_DMA_ACTIVE
);
1217 ret
= eeh_ops
->get_state(pe
, NULL
);
1218 if (ret
< 0 || ret
== EEH_STATE_NOT_SUPPORT
)
1221 /* Unfrozen PE, nothing to do */
1222 if ((ret
& flags
) == flags
)
1225 /* Frozen PE, check if it needs PE level reset */
1226 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
1227 pdev
= eeh_dev_to_pci_dev(edev
);
1231 for (id
= &eeh_reset_ids
[0]; id
->vendor
!= 0; id
++) {
1232 if (id
->vendor
!= PCI_ANY_ID
&&
1233 id
->vendor
!= pdev
->vendor
)
1235 if (id
->device
!= PCI_ANY_ID
&&
1236 id
->device
!= pdev
->device
)
1238 if (id
->subvendor
!= PCI_ANY_ID
&&
1239 id
->subvendor
!= pdev
->subsystem_vendor
)
1241 if (id
->subdevice
!= PCI_ANY_ID
&&
1242 id
->subdevice
!= pdev
->subsystem_device
)
1249 return eeh_unfreeze_pe(pe
, true);
1252 return eeh_pe_reset_and_recover(pe
);
1256 * eeh_dev_open - Increase count of pass through devices for PE
1259 * Increase count of passed through devices for the indicated
1260 * PE. In the result, the EEH errors detected on the PE won't be
1261 * reported. The PE owner will be responsible for detection
1264 int eeh_dev_open(struct pci_dev
*pdev
)
1266 struct eeh_dev
*edev
;
1269 mutex_lock(&eeh_dev_mutex
);
1271 /* No PCI device ? */
1275 /* No EEH device or PE ? */
1276 edev
= pci_dev_to_eeh_dev(pdev
);
1277 if (!edev
|| !edev
->pe
)
1281 * The PE might have been put into frozen state, but we
1282 * didn't detect that yet. The passed through PCI devices
1283 * in frozen PE won't work properly. Clear the frozen state
1286 ret
= eeh_pe_change_owner(edev
->pe
);
1290 /* Increase PE's pass through count */
1291 atomic_inc(&edev
->pe
->pass_dev_cnt
);
1292 mutex_unlock(&eeh_dev_mutex
);
1296 mutex_unlock(&eeh_dev_mutex
);
1299 EXPORT_SYMBOL_GPL(eeh_dev_open
);
1302 * eeh_dev_release - Decrease count of pass through devices for PE
1305 * Decrease count of pass through devices for the indicated PE. If
1306 * there is no passed through device in PE, the EEH errors detected
1307 * on the PE will be reported and handled as usual.
1309 void eeh_dev_release(struct pci_dev
*pdev
)
1311 struct eeh_dev
*edev
;
1313 mutex_lock(&eeh_dev_mutex
);
1315 /* No PCI device ? */
1319 /* No EEH device ? */
1320 edev
= pci_dev_to_eeh_dev(pdev
);
1321 if (!edev
|| !edev
->pe
|| !eeh_pe_passed(edev
->pe
))
1324 /* Decrease PE's pass through count */
1325 atomic_dec(&edev
->pe
->pass_dev_cnt
);
1326 WARN_ON(atomic_read(&edev
->pe
->pass_dev_cnt
) < 0);
1327 eeh_pe_change_owner(edev
->pe
);
1329 mutex_unlock(&eeh_dev_mutex
);
1331 EXPORT_SYMBOL(eeh_dev_release
);
1333 #ifdef CONFIG_IOMMU_API
1335 static int dev_has_iommu_table(struct device
*dev
, void *data
)
1337 struct pci_dev
*pdev
= to_pci_dev(dev
);
1338 struct pci_dev
**ppdev
= data
;
1339 struct iommu_table
*tbl
;
1344 tbl
= get_iommu_table_base(dev
);
1345 if (tbl
&& tbl
->it_group
) {
1354 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1355 * @group: IOMMU group
1357 * The routine is called to convert IOMMU group to EEH PE.
1359 struct eeh_pe
*eeh_iommu_group_to_pe(struct iommu_group
*group
)
1361 struct pci_dev
*pdev
= NULL
;
1362 struct eeh_dev
*edev
;
1365 /* No IOMMU group ? */
1369 ret
= iommu_group_for_each_dev(group
, &pdev
, dev_has_iommu_table
);
1373 /* No EEH device or PE ? */
1374 edev
= pci_dev_to_eeh_dev(pdev
);
1375 if (!edev
|| !edev
->pe
)
1380 EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe
);
1382 #endif /* CONFIG_IOMMU_API */
1385 * eeh_pe_set_option - Set options for the indicated PE
1387 * @option: requested option
1389 * The routine is called to enable or disable EEH functionality
1390 * on the indicated PE, to enable IO or DMA for the frozen PE.
1392 int eeh_pe_set_option(struct eeh_pe
*pe
, int option
)
1401 * EEH functionality could possibly be disabled, just
1402 * return error for the case. And the EEH functinality
1403 * isn't expected to be disabled on one specific PE.
1406 case EEH_OPT_ENABLE
:
1407 if (eeh_enabled()) {
1408 ret
= eeh_pe_change_owner(pe
);
1413 case EEH_OPT_DISABLE
:
1415 case EEH_OPT_THAW_MMIO
:
1416 case EEH_OPT_THAW_DMA
:
1417 if (!eeh_ops
|| !eeh_ops
->set_option
) {
1422 ret
= eeh_pci_enable(pe
, option
);
1425 pr_debug("%s: Option %d out of range (%d, %d)\n",
1426 __func__
, option
, EEH_OPT_DISABLE
, EEH_OPT_THAW_DMA
);
1432 EXPORT_SYMBOL_GPL(eeh_pe_set_option
);
1435 * eeh_pe_get_state - Retrieve PE's state
1438 * Retrieve the PE's state, which includes 3 aspects: enabled
1439 * DMA, enabled IO and asserted reset.
1441 int eeh_pe_get_state(struct eeh_pe
*pe
)
1443 int result
, ret
= 0;
1444 bool rst_active
, dma_en
, mmio_en
;
1450 if (!eeh_ops
|| !eeh_ops
->get_state
)
1453 result
= eeh_ops
->get_state(pe
, NULL
);
1454 rst_active
= !!(result
& EEH_STATE_RESET_ACTIVE
);
1455 dma_en
= !!(result
& EEH_STATE_DMA_ENABLED
);
1456 mmio_en
= !!(result
& EEH_STATE_MMIO_ENABLED
);
1459 ret
= EEH_PE_STATE_RESET
;
1460 else if (dma_en
&& mmio_en
)
1461 ret
= EEH_PE_STATE_NORMAL
;
1462 else if (!dma_en
&& !mmio_en
)
1463 ret
= EEH_PE_STATE_STOPPED_IO_DMA
;
1464 else if (!dma_en
&& mmio_en
)
1465 ret
= EEH_PE_STATE_STOPPED_DMA
;
1467 ret
= EEH_PE_STATE_UNAVAIL
;
1471 EXPORT_SYMBOL_GPL(eeh_pe_get_state
);
1473 static int eeh_pe_reenable_devices(struct eeh_pe
*pe
)
1475 struct eeh_dev
*edev
, *tmp
;
1476 struct pci_dev
*pdev
;
1479 /* Restore config space */
1480 eeh_pe_restore_bars(pe
);
1483 * Reenable PCI devices as the devices passed
1484 * through are always enabled before the reset.
1486 eeh_pe_for_each_dev(pe
, edev
, tmp
) {
1487 pdev
= eeh_dev_to_pci_dev(edev
);
1491 ret
= pci_reenable_device(pdev
);
1493 pr_warn("%s: Failure %d reenabling %s\n",
1494 __func__
, ret
, pci_name(pdev
));
1499 /* The PE is still in frozen state */
1500 return eeh_unfreeze_pe(pe
, true);
1504 * eeh_pe_reset - Issue PE reset according to specified type
1506 * @option: reset type
1508 * The routine is called to reset the specified PE with the
1509 * indicated type, either fundamental reset or hot reset.
1510 * PE reset is the most important part for error recovery.
1512 int eeh_pe_reset(struct eeh_pe
*pe
, int option
)
1520 if (!eeh_ops
|| !eeh_ops
->set_option
|| !eeh_ops
->reset
)
1524 case EEH_RESET_DEACTIVATE
:
1525 ret
= eeh_ops
->reset(pe
, option
);
1526 eeh_pe_state_clear(pe
, EEH_PE_RESET
);
1530 ret
= eeh_pe_reenable_devices(pe
);
1533 case EEH_RESET_FUNDAMENTAL
:
1535 * Proactively freeze the PE to drop all MMIO access
1536 * during reset, which should be banned as it's always
1537 * cause recursive EEH error.
1539 eeh_ops
->set_option(pe
, EEH_OPT_FREEZE_PE
);
1541 eeh_pe_state_mark(pe
, EEH_PE_RESET
);
1542 ret
= eeh_ops
->reset(pe
, option
);
1545 pr_debug("%s: Unsupported option %d\n",
1552 EXPORT_SYMBOL_GPL(eeh_pe_reset
);
1555 * eeh_pe_configure - Configure PCI bridges after PE reset
1558 * The routine is called to restore the PCI config space for
1559 * those PCI devices, especially PCI bridges affected by PE
1560 * reset issued previously.
1562 int eeh_pe_configure(struct eeh_pe
*pe
)
1572 EXPORT_SYMBOL_GPL(eeh_pe_configure
);
1574 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1576 if (!eeh_enabled()) {
1577 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1578 seq_printf(m
, "eeh_total_mmio_ffs=%llu\n", eeh_stats
.total_mmio_ffs
);
1580 seq_printf(m
, "EEH Subsystem is enabled\n");
1583 "no device node=%llu\n"
1584 "no config address=%llu\n"
1585 "check not wanted=%llu\n"
1586 "eeh_total_mmio_ffs=%llu\n"
1587 "eeh_false_positives=%llu\n"
1588 "eeh_slot_resets=%llu\n",
1589 eeh_stats
.no_device
,
1591 eeh_stats
.no_cfg_addr
,
1592 eeh_stats
.ignored_check
,
1593 eeh_stats
.total_mmio_ffs
,
1594 eeh_stats
.false_positives
,
1595 eeh_stats
.slot_resets
);
1601 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1603 return single_open(file
, proc_eeh_show
, NULL
);
1606 static const struct file_operations proc_eeh_operations
= {
1607 .open
= proc_eeh_open
,
1609 .llseek
= seq_lseek
,
1610 .release
= single_release
,
1613 #ifdef CONFIG_DEBUG_FS
1614 static int eeh_enable_dbgfs_set(void *data
, u64 val
)
1617 eeh_clear_flag(EEH_FORCE_DISABLED
);
1619 eeh_add_flag(EEH_FORCE_DISABLED
);
1621 /* Notify the backend */
1622 if (eeh_ops
->post_init
)
1623 eeh_ops
->post_init();
1628 static int eeh_enable_dbgfs_get(void *data
, u64
*val
)
1637 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops
, eeh_enable_dbgfs_get
,
1638 eeh_enable_dbgfs_set
, "0x%llx\n");
1641 static int __init
eeh_init_proc(void)
1643 if (machine_is(pseries
) || machine_is(powernv
)) {
1644 proc_create("powerpc/eeh", 0, NULL
, &proc_eeh_operations
);
1645 #ifdef CONFIG_DEBUG_FS
1646 debugfs_create_file("eeh_enable", 0600,
1647 powerpc_debugfs_root
, NULL
,
1648 &eeh_enable_dbgfs_ops
);
1654 __initcall(eeh_init_proc
);