arch/powerpc/kernel/entry_64.S

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
   5  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
   6  *  Adapted for Power Macintosh by Paul Mackerras.
   7  *  Low-level exception handlers and MMU support
   8  *  rewritten by Paul Mackerras.
   9  *    Copyright (C) 1996 Paul Mackerras.
  10  *  MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
  11  *
  12  *  This file contains the system call entry code, context switch
  13  *  code, and exception/interrupt return code for PowerPC.
  14  *
  15  *  This program is free software; you can redistribute it and/or
  16  *  modify it under the terms of the GNU General Public License
  17  *  as published by the Free Software Foundation; either version
  18  *  2 of the License, or (at your option) any later version.
  19  */
  20
  21 #include <linux/errno.h>
  22 #include <asm/unistd.h>
  23 #include <asm/processor.h>
  24 #include <asm/page.h>
  25 #include <asm/mmu.h>
  26 #include <asm/thread_info.h>
  27 #include <asm/ppc_asm.h>
  28 #include <asm/asm-offsets.h>
  29 #include <asm/cputable.h>
  30 #include <asm/firmware.h>
  31 #include <asm/bug.h>
  32 #include <asm/ptrace.h>
  33 #include <asm/irqflags.h>
  34 #include <asm/ftrace.h>
  35 #include <asm/hw_irq.h>
  36
  37 /*
  38  * System calls.
  39  */
  40         .section        ".toc","aw"
  41 .SYS_CALL_TABLE:
  42         .tc .sys_call_table[TC],.sys_call_table
  43
  44 /* This value is used to mark exception frames on the stack. */
  45 exception_marker:
  46         .tc     ID_EXC_MARKER[TC],STACK_FRAME_REGS_MARKER
  47
  48         .section        ".text"
  49         .align 7
  50
  51 #undef SHOW_SYSCALLS
  52
  53         .globl system_call_common
  54 system_call_common:
  55         andi.   r10,r12,MSR_PR
  56         mr      r10,r1
  57         addi    r1,r1,-INT_FRAME_SIZE
  58         beq-    1f
  59         ld      r1,PACAKSAVE(r13)
  60 1:      std     r10,0(r1)
  61         std     r11,_NIP(r1)
  62         std     r12,_MSR(r1)
  63         std     r0,GPR0(r1)
  64         std     r10,GPR1(r1)
  65         ACCOUNT_CPU_USER_ENTRY(r10, r11)
  66         std     r2,GPR2(r1)
  67         std     r3,GPR3(r1)
  68         mfcr    r2
  69         std     r4,GPR4(r1)
  70         std     r5,GPR5(r1)
  71         std     r6,GPR6(r1)
  72         std     r7,GPR7(r1)
  73         std     r8,GPR8(r1)
  74         li      r11,0
  75         std     r11,GPR9(r1)
  76         std     r11,GPR10(r1)
  77         std     r11,GPR11(r1)
  78         std     r11,GPR12(r1)
  79         std     r11,_XER(r1)
  80         std     r11,_CTR(r1)
  81         std     r9,GPR13(r1)
  82         mflr    r10
  83         /*
  84          * This clears CR0.SO (bit 28), which is the error indication on
  85          * return from this system call.
  86          */
  87         rldimi  r2,r11,28,(63-28)
  88         li      r11,0xc01
  89         std     r10,_LINK(r1)
  90         std     r11,_TRAP(r1)
  91         std     r3,ORIG_GPR3(r1)
  92         std     r2,_CCR(r1)
  93         ld      r2,PACATOC(r13)
  94         addi    r9,r1,STACK_FRAME_OVERHEAD
  95         ld      r11,exception_marker@toc(r2)
  96         std     r11,-16(r9)             /* "regshere" marker */
  97 #if defined(CONFIG_VIRT_CPU_ACCOUNTING) && defined(CONFIG_PPC_SPLPAR)
  98 BEGIN_FW_FTR_SECTION
  99         beq     33f
 100         /* if from user, see if there are any DTL entries to process */
 101         ld      r10,PACALPPACAPTR(r13)  /* get ptr to VPA */
 102         ld      r11,PACA_DTL_RIDX(r13)  /* get log read index */
 103         ld      r10,LPPACA_DTLIDX(r10)  /* get log write index */
 104         cmpd    cr1,r11,r10
 105         beq+    cr1,33f
 106         bl      .accumulate_stolen_time
 107         REST_GPR(0,r1)
 108         REST_4GPRS(3,r1)
 109         REST_2GPRS(7,r1)
 110         addi    r9,r1,STACK_FRAME_OVERHEAD
 111 33:
 112 END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
 113 #endif /* CONFIG_VIRT_CPU_ACCOUNTING && CONFIG_PPC_SPLPAR */
 114
 115         /*
 116          * A syscall should always be called with interrupts enabled
 117          * so we just unconditionally hard-enable here. When some kind
 118          * of irq tracing is used, we additionally check that condition
 119          * is correct
 120          */
 121 #if defined(CONFIG_TRACE_IRQFLAGS) && defined(CONFIG_BUG)
 122         lbz     r10,PACASOFTIRQEN(r13)
 123         xori    r10,r10,1
 124 1:      tdnei   r10,0
 125         EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,BUGFLAG_WARNING
 126 #endif
 127
 128 #ifdef CONFIG_PPC_BOOK3E
 129         wrteei  1
 130 #else
 131         ld      r11,PACAKMSR(r13)
 132         ori     r11,r11,MSR_EE
 133         mtmsrd  r11,1
 134 #endif /* CONFIG_PPC_BOOK3E */
 135
 136         /* We do need to set SOFTE in the stack frame or the return
 137          * from interrupt will be painful
 138          */
 139         li      r10,1
 140         std     r10,SOFTE(r1)
 141
 142 #ifdef SHOW_SYSCALLS
 143         bl      .do_show_syscall
 144         REST_GPR(0,r1)
 145         REST_4GPRS(3,r1)
 146         REST_2GPRS(7,r1)
 147         addi    r9,r1,STACK_FRAME_OVERHEAD
 148 #endif
 149         clrrdi  r11,r1,THREAD_SHIFT
 150         ld      r10,TI_FLAGS(r11)
 151         andi.   r11,r10,_TIF_SYSCALL_T_OR_A
 152         bne-    syscall_dotrace
 153 .Lsyscall_dotrace_cont:
 154         cmpldi  0,r0,NR_syscalls
 155         bge-    syscall_enosys
 156
 157 system_call:                    /* label this so stack traces look sane */
 158 /*
 159  * Need to vector to 32 Bit or default sys_call_table here,
 160  * based on caller's run-mode / personality.
 161  */
 162         ld      r11,.SYS_CALL_TABLE@toc(2)
 163         andi.   r10,r10,_TIF_32BIT
 164         beq     15f
 165         addi    r11,r11,8       /* use 32-bit syscall entries */
 166         clrldi  r3,r3,32
 167         clrldi  r4,r4,32
 168         clrldi  r5,r5,32
 169         clrldi  r6,r6,32
 170         clrldi  r7,r7,32
 171         clrldi  r8,r8,32
 172 15:
 173         slwi    r0,r0,4
 174         ldx     r10,r11,r0      /* Fetch system call handler [ptr] */
 175         mtctr   r10
 176         bctrl                   /* Call handler */
 177
 178 syscall_exit:
 179         std     r3,RESULT(r1)
 180 #ifdef SHOW_SYSCALLS
 181         bl      .do_show_syscall_exit
 182         ld      r3,RESULT(r1)
 183 #endif
 184         clrrdi  r12,r1,THREAD_SHIFT
 185
 186         ld      r8,_MSR(r1)
 187 #ifdef CONFIG_PPC_BOOK3S
 188         /* No MSR:RI on BookE */
 189         andi.   r10,r8,MSR_RI
 190         beq-    unrecov_restore
 191 #endif
 192         /*
 193          * Disable interrupts so current_thread_info()->flags can't change,
 194          * and so that we don't get interrupted after loading SRR0/1.
 195          */
 196 #ifdef CONFIG_PPC_BOOK3E
 197         wrteei  0
 198 #else
 199         ld      r10,PACAKMSR(r13)
 200         mtmsrd  r10,1
 201 #endif /* CONFIG_PPC_BOOK3E */
 202
 203         ld      r9,TI_FLAGS(r12)
 204         li      r11,-_LAST_ERRNO
 205         andi.   r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK)
 206         bne-    syscall_exit_work
 207         cmpld   r3,r11
 208         ld      r5,_CCR(r1)
 209         bge-    syscall_error
 210 .Lsyscall_error_cont:
 211         ld      r7,_NIP(r1)
 212 BEGIN_FTR_SECTION
 213         stdcx.  r0,0,r1                 /* to clear the reservation */
 214 END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
 215         andi.   r6,r8,MSR_PR
 216         ld      r4,_LINK(r1)
 217         /*
 218          * Clear RI before restoring r13.  If we are returning to
 219          * userspace and we take an exception after restoring r13,
 220          * we end up corrupting the userspace r13 value.
 221          */
 222 #ifdef CONFIG_PPC_BOOK3S
 223         /* No MSR:RI on BookE */
 224         li      r12,MSR_RI
 225         andc    r11,r10,r12
 226         mtmsrd  r11,1                   /* clear MSR.RI */
 227 #endif /* CONFIG_PPC_BOOK3S */
 228
 229         beq-    1f
 230         ACCOUNT_CPU_USER_EXIT(r11, r12)
 231         ld      r13,GPR13(r1)   /* only restore r13 if returning to usermode */
 232 1:      ld      r2,GPR2(r1)
 233         ld      r1,GPR1(r1)
 234         mtlr    r4
 235         mtcr    r5
 236         mtspr   SPRN_SRR0,r7
 237         mtspr   SPRN_SRR1,r8
 238         RFI
 239         b       .       /* prevent speculative execution */
 240
 241 syscall_error:
 242         oris    r5,r5,0x1000    /* Set SO bit in CR */
 243         neg     r3,r3
 244         std     r5,_CCR(r1)
 245         b       .Lsyscall_error_cont
 246
 247 /* Traced system call support */
 248 syscall_dotrace:
 249         bl      .save_nvgprs
 250         addi    r3,r1,STACK_FRAME_OVERHEAD
 251         bl      .do_syscall_trace_enter
 252         /*
 253          * Restore argument registers possibly just changed.
 254          * We use the return value of do_syscall_trace_enter
 255          * for the call number to look up in the table (r0).
 256          */
 257         mr      r0,r3
 258         ld      r3,GPR3(r1)
 259         ld      r4,GPR4(r1)
 260         ld      r5,GPR5(r1)
 261         ld      r6,GPR6(r1)
 262         ld      r7,GPR7(r1)
 263         ld      r8,GPR8(r1)
 264         addi    r9,r1,STACK_FRAME_OVERHEAD
 265         clrrdi  r10,r1,THREAD_SHIFT
 266         ld      r10,TI_FLAGS(r10)
 267         b       .Lsyscall_dotrace_cont
 268
 269 syscall_enosys:
 270         li      r3,-ENOSYS
 271         b       syscall_exit
 272
 273 syscall_exit_work:
 274         /* If TIF_RESTOREALL is set, don't scribble on either r3 or ccr.
 275          If TIF_NOERROR is set, just save r3 as it is. */
 276
 277         andi.   r0,r9,_TIF_RESTOREALL
 278         beq+    0f
 279         REST_NVGPRS(r1)
 280         b       2f
 281 0:      cmpld   r3,r11          /* r10 is -LAST_ERRNO */
 282         blt+    1f
 283         andi.   r0,r9,_TIF_NOERROR
 284         bne-    1f
 285         ld      r5,_CCR(r1)
 286         neg     r3,r3
 287         oris    r5,r5,0x1000    /* Set SO bit in CR */
 288         std     r5,_CCR(r1)
 289 1:      std     r3,GPR3(r1)
 290 2:      andi.   r0,r9,(_TIF_PERSYSCALL_MASK)
 291         beq     4f
 292
 293         /* Clear per-syscall TIF flags if any are set.  */
 294
 295         li      r11,_TIF_PERSYSCALL_MASK
 296         addi    r12,r12,TI_FLAGS
 297 3:      ldarx   r10,0,r12
 298         andc    r10,r10,r11
 299         stdcx.  r10,0,r12
 300         bne-    3b
 301         subi    r12,r12,TI_FLAGS
 302
 303 4:      /* Anything else left to do? */
 304         andi.   r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
 305         beq     .ret_from_except_lite
 306
 307         /* Re-enable interrupts */
 308 #ifdef CONFIG_PPC_BOOK3E
 309         wrteei  1
 310 #else
 311         ld      r10,PACAKMSR(r13)
 312         ori     r10,r10,MSR_EE
 313         mtmsrd  r10,1
 314 #endif /* CONFIG_PPC_BOOK3E */
 315
 316         bl      .save_nvgprs
 317         addi    r3,r1,STACK_FRAME_OVERHEAD
 318         bl      .do_syscall_trace_leave
 319         b       .ret_from_except
 320
 321 /* Save non-volatile GPRs, if not already saved. */
 322 _GLOBAL(save_nvgprs)
 323         ld      r11,_TRAP(r1)
 324         andi.   r0,r11,1
 325         beqlr-
 326         SAVE_NVGPRS(r1)
 327         clrrdi  r0,r11,1
 328         std     r0,_TRAP(r1)
 329         blr
 330
 331
 332 /*
 333  * The sigsuspend and rt_sigsuspend system calls can call do_signal
 334  * and thus put the process into the stopped state where we might
 335  * want to examine its user state with ptrace.  Therefore we need
 336  * to save all the nonvolatile registers (r14 - r31) before calling
 337  * the C code.  Similarly, fork, vfork and clone need the full
 338  * register state on the stack so that it can be copied to the child.
 339  */
 340
 341 _GLOBAL(ppc_fork)
 342         bl      .save_nvgprs
 343         bl      .sys_fork
 344         b       syscall_exit
 345
 346 _GLOBAL(ppc_vfork)
 347         bl      .save_nvgprs
 348         bl      .sys_vfork
 349         b       syscall_exit
 350
 351 _GLOBAL(ppc_clone)
 352         bl      .save_nvgprs
 353         bl      .sys_clone
 354         b       syscall_exit
 355
 356 _GLOBAL(ppc32_swapcontext)
 357         bl      .save_nvgprs
 358         bl      .compat_sys_swapcontext
 359         b       syscall_exit
 360
 361 _GLOBAL(ppc64_swapcontext)
 362         bl      .save_nvgprs
 363         bl      .sys_swapcontext
 364         b       syscall_exit
 365
 366 _GLOBAL(ret_from_fork)
 367         bl      .schedule_tail
 368         REST_NVGPRS(r1)
 369         li      r3,0
 370         b       syscall_exit
 371
 372 /*
 373  * This routine switches between two different tasks.  The process
 374  * state of one is saved on its kernel stack.  Then the state
 375  * of the other is restored from its kernel stack.  The memory
 376  * management hardware is updated to the second process's state.
 377  * Finally, we can return to the second process, via ret_from_except.
 378  * On entry, r3 points to the THREAD for the current task, r4
 379  * points to the THREAD for the new task.
 380  *
 381  * Note: there are two ways to get to the "going out" portion
 382  * of this code; either by coming in via the entry (_switch)
 383  * or via "fork" which must set up an environment equivalent
 384  * to the "_switch" path.  If you change this you'll have to change
 385  * the fork code also.
 386  *
 387  * The code which creates the new task context is in 'copy_thread'
 388  * in arch/powerpc/kernel/process.c
 389  */
 390         .align  7
 391 _GLOBAL(_switch)
 392         mflr    r0
 393         std     r0,16(r1)
 394         stdu    r1,-SWITCH_FRAME_SIZE(r1)
 395         /* r3-r13 are caller saved -- Cort */
 396         SAVE_8GPRS(14, r1)
 397         SAVE_10GPRS(22, r1)
 398         mflr    r20             /* Return to switch caller */
 399         mfmsr   r22
 400         li      r0, MSR_FP
 401 #ifdef CONFIG_VSX
 402 BEGIN_FTR_SECTION
 403         oris    r0,r0,MSR_VSX@h /* Disable VSX */
 404 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
 405 #endif /* CONFIG_VSX */
 406 #ifdef CONFIG_ALTIVEC
 407 BEGIN_FTR_SECTION
 408         oris    r0,r0,MSR_VEC@h /* Disable altivec */
 409         mfspr   r24,SPRN_VRSAVE /* save vrsave register value */
 410         std     r24,THREAD_VRSAVE(r3)
 411 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 412 #endif /* CONFIG_ALTIVEC */
 413 #ifdef CONFIG_PPC64
 414 BEGIN_FTR_SECTION
 415         mfspr   r25,SPRN_DSCR
 416         std     r25,THREAD_DSCR(r3)
 417 END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
 418 #endif
 419         and.    r0,r0,r22
 420         beq+    1f
 421         andc    r22,r22,r0
 422         MTMSRD(r22)
 423         isync
 424 1:      std     r20,_NIP(r1)
 425         mfcr    r23
 426         std     r23,_CCR(r1)
 427         std     r1,KSP(r3)      /* Set old stack pointer */
 428
 429 #ifdef CONFIG_SMP
 430         /* We need a sync somewhere here to make sure that if the
 431          * previous task gets rescheduled on another CPU, it sees all
 432          * stores it has performed on this one.
 433          */
 434         sync
 435 #endif /* CONFIG_SMP */
 436
 437         /*
 438          * If we optimise away the clear of the reservation in system
 439          * calls because we know the CPU tracks the address of the
 440          * reservation, then we need to clear it here to cover the
 441          * case that the kernel context switch path has no larx
 442          * instructions.
 443          */
 444 BEGIN_FTR_SECTION
 445         ldarx   r6,0,r1
 446 END_FTR_SECTION_IFSET(CPU_FTR_STCX_CHECKS_ADDRESS)
 447
 448         addi    r6,r4,-THREAD   /* Convert THREAD to 'current' */
 449         std     r6,PACACURRENT(r13)     /* Set new 'current' */
 450
 451         ld      r8,KSP(r4)      /* new stack pointer */
 452 #ifdef CONFIG_PPC_BOOK3S
 453 BEGIN_FTR_SECTION
 454   BEGIN_FTR_SECTION_NESTED(95)
 455         clrrdi  r6,r8,28        /* get its ESID */
 456         clrrdi  r9,r1,28        /* get current sp ESID */
 457   FTR_SECTION_ELSE_NESTED(95)
 458         clrrdi  r6,r8,40        /* get its 1T ESID */
 459         clrrdi  r9,r1,40        /* get current sp 1T ESID */
 460   ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_1T_SEGMENT, 95)
 461 FTR_SECTION_ELSE
 462         b       2f
 463 ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_SLB)
 464         clrldi. r0,r6,2         /* is new ESID c00000000? */
 465         cmpd    cr1,r6,r9       /* or is new ESID the same as current ESID? */
 466         cror    eq,4*cr1+eq,eq
 467         beq     2f              /* if yes, don't slbie it */
 468
 469         /* Bolt in the new stack SLB entry */
 470         ld      r7,KSP_VSID(r4) /* Get new stack's VSID */
 471         oris    r0,r6,(SLB_ESID_V)@h
 472         ori     r0,r0,(SLB_NUM_BOLTED-1)@l
 473 BEGIN_FTR_SECTION
 474         li      r9,MMU_SEGSIZE_1T       /* insert B field */
 475         oris    r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
 476         rldimi  r7,r9,SLB_VSID_SSIZE_SHIFT,0
 477 END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
 478
 479         /* Update the last bolted SLB.  No write barriers are needed
 480          * here, provided we only update the current CPU's SLB shadow
 481          * buffer.
 482          */
 483         ld      r9,PACA_SLBSHADOWPTR(r13)
 484         li      r12,0
 485         std     r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
 486         std     r7,SLBSHADOW_STACKVSID(r9)  /* Save VSID */
 487         std     r0,SLBSHADOW_STACKESID(r9)  /* Save ESID */
 488
 489         /* No need to check for MMU_FTR_NO_SLBIE_B here, since when
 490          * we have 1TB segments, the only CPUs known to have the errata
 491          * only support less than 1TB of system memory and we'll never
 492          * actually hit this code path.
 493          */
 494
 495         slbie   r6
 496         slbie   r6              /* Workaround POWER5 < DD2.1 issue */
 497         slbmte  r7,r0
 498         isync
 499 2:
 500 #endif /* !CONFIG_PPC_BOOK3S */
 501
 502         clrrdi  r7,r8,THREAD_SHIFT      /* base of new stack */
 503         /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
 504            because we don't need to leave the 288-byte ABI gap at the
 505            top of the kernel stack. */
 506         addi    r7,r7,THREAD_SIZE-SWITCH_FRAME_SIZE
 507
 508         mr      r1,r8           /* start using new stack pointer */
 509         std     r7,PACAKSAVE(r13)
 510
 511         ld      r6,_CCR(r1)
 512         mtcrf   0xFF,r6
 513
 514 #ifdef CONFIG_ALTIVEC
 515 BEGIN_FTR_SECTION
 516         ld      r0,THREAD_VRSAVE(r4)
 517         mtspr   SPRN_VRSAVE,r0          /* if G4, restore VRSAVE reg */
 518 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 519 #endif /* CONFIG_ALTIVEC */
 520 #ifdef CONFIG_PPC64
 521 BEGIN_FTR_SECTION
 522         ld      r0,THREAD_DSCR(r4)
 523         cmpd    r0,r25
 524         beq     1f
 525         mtspr   SPRN_DSCR,r0
 526 1:
 527 END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
 528 #endif
 529
 530         /* r3-r13 are destroyed -- Cort */
 531         REST_8GPRS(14, r1)
 532         REST_10GPRS(22, r1)
 533
 534         /* convert old thread to its task_struct for return value */
 535         addi    r3,r3,-THREAD
 536         ld      r7,_NIP(r1)     /* Return to _switch caller in new task */
 537         mtlr    r7
 538         addi    r1,r1,SWITCH_FRAME_SIZE
 539         blr
 540
 541         .align  7
 542 _GLOBAL(ret_from_except)
 543         ld      r11,_TRAP(r1)
 544         andi.   r0,r11,1
 545         bne     .ret_from_except_lite
 546         REST_NVGPRS(r1)
 547
 548 _GLOBAL(ret_from_except_lite)
 549         /*
 550          * Disable interrupts so that current_thread_info()->flags
 551          * can't change between when we test it and when we return
 552          * from the interrupt.
 553          */
 554 #ifdef CONFIG_PPC_BOOK3E
 555         wrteei  0
 556 #else
 557         ld      r10,PACAKMSR(r13) /* Get kernel MSR without EE */
 558         mtmsrd  r10,1             /* Update machine state */
 559 #endif /* CONFIG_PPC_BOOK3E */
 560
 561         clrrdi  r9,r1,THREAD_SHIFT      /* current_thread_info() */
 562         ld      r3,_MSR(r1)
 563         ld      r4,TI_FLAGS(r9)
 564         andi.   r3,r3,MSR_PR
 565         beq     resume_kernel
 566
 567         /* Check current_thread_info()->flags */
 568         andi.   r0,r4,_TIF_USER_WORK_MASK
 569         beq     restore
 570
 571         andi.   r0,r4,_TIF_NEED_RESCHED
 572         beq     1f
 573         bl      .restore_interrupts
 574         bl      .schedule
 575         b       .ret_from_except_lite
 576
 577 1:      bl      .save_nvgprs
 578         bl      .restore_interrupts
 579         addi    r3,r1,STACK_FRAME_OVERHEAD
 580         bl      .do_notify_resume
 581         b       .ret_from_except
 582
 583 resume_kernel:
 584 #ifdef CONFIG_PREEMPT
 585         /* Check if we need to preempt */
 586         andi.   r0,r4,_TIF_NEED_RESCHED
 587         beq+    restore
 588         /* Check that preempt_count() == 0 and interrupts are enabled */
 589         lwz     r8,TI_PREEMPT(r9)
 590         cmpwi   cr1,r8,0
 591         ld      r0,SOFTE(r1)
 592         cmpdi   r0,0
 593         crandc  eq,cr1*4+eq,eq
 594         bne     restore
 595
 596         /*
 597          * Here we are preempting the current task. We want to make
 598          * sure we are soft-disabled first
 599          */
 600         SOFT_DISABLE_INTS(r3,r4)
 601 1:      bl      .preempt_schedule_irq
 602
 603         /* Re-test flags and eventually loop */
 604         clrrdi  r9,r1,THREAD_SHIFT
 605         ld      r4,TI_FLAGS(r9)
 606         andi.   r0,r4,_TIF_NEED_RESCHED
 607         bne     1b
 608 #endif /* CONFIG_PREEMPT */
 609
 610         .globl  fast_exc_return_irq
 611 fast_exc_return_irq:
 612 restore:
 613         /*
 614          * This is the main kernel exit path. First we check if we
 615          * are about to re-enable interrupts
 616          */
 617         ld      r5,SOFTE(r1)
 618         lbz     r6,PACASOFTIRQEN(r13)
 619         cmpwi   cr0,r5,0
 620         beq     restore_irq_off
 621
 622         /* We are enabling, were we already enabled ? Yes, just return */
 623         cmpwi   cr0,r6,1
 624         beq     cr0,do_restore
 625
 626         /*
 627          * We are about to soft-enable interrupts (we are hard disabled
 628          * at this point). We check if there's anything that needs to
 629          * be replayed first.
 630          */
 631         lbz     r0,PACAIRQHAPPENED(r13)
 632         cmpwi   cr0,r0,0
 633         bne-    restore_check_irq_replay
 634
 635         /*
 636          * Get here when nothing happened while soft-disabled, just
 637          * soft-enable and move-on. We will hard-enable as a side
 638          * effect of rfi
 639          */
 640 restore_no_replay:
 641         TRACE_ENABLE_INTS
 642         li      r0,1
 643         stb     r0,PACASOFTIRQEN(r13);
 644
 645         /*
 646          * Final return path. BookE is handled in a different file
 647          */
 648 do_restore:
 649 #ifdef CONFIG_PPC_BOOK3E
 650         b       .exception_return_book3e
 651 #else
 652         /*
 653          * Clear the reservation. If we know the CPU tracks the address of
 654          * the reservation then we can potentially save some cycles and use
 655          * a larx. On POWER6 and POWER7 this is significantly faster.
 656          */
 657 BEGIN_FTR_SECTION
 658         stdcx.  r0,0,r1         /* to clear the reservation */
 659 FTR_SECTION_ELSE
 660         ldarx   r4,0,r1
 661 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
 662
 663         /*
 664          * Some code path such as load_up_fpu or altivec return directly
 665          * here. They run entirely hard disabled and do not alter the
 666          * interrupt state. They also don't use lwarx/stwcx. and thus
 667          * are known not to leave dangling reservations.
 668          */
 669         .globl  fast_exception_return
 670 fast_exception_return:
 671         ld      r3,_MSR(r1)
 672         ld      r4,_CTR(r1)
 673         ld      r0,_LINK(r1)
 674         mtctr   r4
 675         mtlr    r0
 676         ld      r4,_XER(r1)
 677         mtspr   SPRN_XER,r4
 678
 679         REST_8GPRS(5, r1)
 680
 681         andi.   r0,r3,MSR_RI
 682         beq-    unrecov_restore
 683
 684         /*
 685          * Clear RI before restoring r13.  If we are returning to
 686          * userspace and we take an exception after restoring r13,
 687          * we end up corrupting the userspace r13 value.
 688          */
 689         ld      r4,PACAKMSR(r13) /* Get kernel MSR without EE */
 690         andc    r4,r4,r0         /* r0 contains MSR_RI here */
 691         mtmsrd  r4,1
 692
 693         /*
 694          * r13 is our per cpu area, only restore it if we are returning to
 695          * userspace the value stored in the stack frame may belong to
 696          * another CPU.
 697          */
 698         andi.   r0,r3,MSR_PR
 699         beq     1f
 700         ACCOUNT_CPU_USER_EXIT(r2, r4)
 701         REST_GPR(13, r1)
 702 1:
 703         mtspr   SPRN_SRR1,r3
 704
 705         ld      r2,_CCR(r1)
 706         mtcrf   0xFF,r2
 707         ld      r2,_NIP(r1)
 708         mtspr   SPRN_SRR0,r2
 709
 710         ld      r0,GPR0(r1)
 711         ld      r2,GPR2(r1)
 712         ld      r3,GPR3(r1)
 713         ld      r4,GPR4(r1)
 714         ld      r1,GPR1(r1)
 715
 716         rfid
 717         b       .       /* prevent speculative execution */
 718
 719 #endif /* CONFIG_PPC_BOOK3E */
 720
 721         /*
 722          * We are returning to a context with interrupts soft disabled.
 723          *
 724          * However, we may also about to hard enable, so we need to
 725          * make sure that in this case, we also clear PACA_IRQ_HARD_DIS
 726          * or that bit can get out of sync and bad things will happen
 727          */
 728 restore_irq_off:
 729         ld      r3,_MSR(r1)
 730         lbz     r7,PACAIRQHAPPENED(r13)
 731         andi.   r0,r3,MSR_EE
 732         beq     1f
 733         rlwinm  r7,r7,0,~PACA_IRQ_HARD_DIS
 734         stb     r7,PACAIRQHAPPENED(r13)
 735 1:      li      r0,0
 736         stb     r0,PACASOFTIRQEN(r13);
 737         TRACE_DISABLE_INTS
 738         b       do_restore
 739
 740         /*
 741          * Something did happen, check if a re-emit is needed
 742          * (this also clears paca->irq_happened)
 743          */
 744 restore_check_irq_replay:
 745         /* XXX: We could implement a fast path here where we check
 746          * for irq_happened being just 0x01, in which case we can
 747          * clear it and return. That means that we would potentially
 748          * miss a decrementer having wrapped all the way around.
 749          *
 750          * Still, this might be useful for things like hash_page
 751          */
 752         bl      .__check_irq_replay
 753         cmpwi   cr0,r3,0
 754         beq     restore_no_replay
 755
 756         /*
 757          * We need to re-emit an interrupt. We do so by re-using our
 758          * existing exception frame. We first change the trap value,
 759          * but we need to ensure we preserve the low nibble of it
 760          */
 761         ld      r4,_TRAP(r1)
 762         clrldi  r4,r4,60
 763         or      r4,r4,r3
 764         std     r4,_TRAP(r1)
 765
 766         /*
 767          * Then find the right handler and call it. Interrupts are
 768          * still soft-disabled and we keep them that way.
 769         */
 770         cmpwi   cr0,r3,0x500
 771         bne     1f
 772         addi    r3,r1,STACK_FRAME_OVERHEAD;
 773         bl      .do_IRQ
 774         b       .ret_from_except
 775 1:      cmpwi   cr0,r3,0x900
 776         bne     1f
 777         addi    r3,r1,STACK_FRAME_OVERHEAD;
 778         bl      .timer_interrupt
 779         b       .ret_from_except
 780 #ifdef CONFIG_PPC_BOOK3E
 781 1:      cmpwi   cr0,r3,0x280
 782         bne     1f
 783         addi    r3,r1,STACK_FRAME_OVERHEAD;
 784         bl      .doorbell_exception
 785         b       .ret_from_except
 786 #endif /* CONFIG_PPC_BOOK3E */
 787 1:      b       .ret_from_except /* What else to do here ? */
 788
 789 unrecov_restore:
 790         addi    r3,r1,STACK_FRAME_OVERHEAD
 791         bl      .unrecoverable_exception
 792         b       unrecov_restore
 793
 794 #ifdef CONFIG_PPC_RTAS
 795 /*
 796  * On CHRP, the Run-Time Abstraction Services (RTAS) have to be
 797  * called with the MMU off.
 798  *
 799  * In addition, we need to be in 32b mode, at least for now.
 800  *
 801  * Note: r3 is an input parameter to rtas, so don't trash it...
 802  */
 803 _GLOBAL(enter_rtas)
 804         mflr    r0
 805         std     r0,16(r1)
 806         stdu    r1,-RTAS_FRAME_SIZE(r1) /* Save SP and create stack space. */
 807
 808         /* Because RTAS is running in 32b mode, it clobbers the high order half
 809          * of all registers that it saves.  We therefore save those registers
 810          * RTAS might touch to the stack.  (r0, r3-r13 are caller saved)
 811          */
 812         SAVE_GPR(2, r1)                 /* Save the TOC */
 813         SAVE_GPR(13, r1)                /* Save paca */
 814         SAVE_8GPRS(14, r1)              /* Save the non-volatiles */
 815         SAVE_10GPRS(22, r1)             /* ditto */
 816
 817         mfcr    r4
 818         std     r4,_CCR(r1)
 819         mfctr   r5
 820         std     r5,_CTR(r1)
 821         mfspr   r6,SPRN_XER
 822         std     r6,_XER(r1)
 823         mfdar   r7
 824         std     r7,_DAR(r1)
 825         mfdsisr r8
 826         std     r8,_DSISR(r1)
 827
 828         /* Temporary workaround to clear CR until RTAS can be modified to
 829          * ignore all bits.
 830          */
 831         li      r0,0
 832         mtcr    r0
 833
 834 #ifdef CONFIG_BUG
 835         /* There is no way it is acceptable to get here with interrupts enabled,
 836          * check it with the asm equivalent of WARN_ON
 837          */
 838         lbz     r0,PACASOFTIRQEN(r13)
 839 1:      tdnei   r0,0
 840         EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,BUGFLAG_WARNING
 841 #endif
 842
 843         /* Hard-disable interrupts */
 844         mfmsr   r6
 845         rldicl  r7,r6,48,1
 846         rotldi  r7,r7,16
 847         mtmsrd  r7,1
 848
 849         /* Unfortunately, the stack pointer and the MSR are also clobbered,
 850          * so they are saved in the PACA which allows us to restore
 851          * our original state after RTAS returns.
 852          */
 853         std     r1,PACAR1(r13)
 854         std     r6,PACASAVEDMSR(r13)
 855
 856         /* Setup our real return addr */
 857         LOAD_REG_ADDR(r4,.rtas_return_loc)
 858         clrldi  r4,r4,2                 /* convert to realmode address */
 859         mtlr    r4
 860
 861         li      r0,0
 862         ori     r0,r0,MSR_EE|MSR_SE|MSR_BE|MSR_RI
 863         andc    r0,r6,r0
 864
 865         li      r9,1
 866         rldicr  r9,r9,MSR_SF_LG,(63-MSR_SF_LG)
 867         ori     r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI
 868         andc    r6,r0,r9
 869         sync                            /* disable interrupts so SRR0/1 */
 870         mtmsrd  r0                      /* don't get trashed */
 871
 872         LOAD_REG_ADDR(r4, rtas)
 873         ld      r5,RTASENTRY(r4)        /* get the rtas->entry value */
 874         ld      r4,RTASBASE(r4)         /* get the rtas->base value */
 875
 876         mtspr   SPRN_SRR0,r5
 877         mtspr   SPRN_SRR1,r6
 878         rfid
 879         b       .       /* prevent speculative execution */
 880
 881 _STATIC(rtas_return_loc)
 882         /* relocation is off at this point */
 883         GET_PACA(r4)
 884         clrldi  r4,r4,2                 /* convert to realmode address */
 885
 886         bcl     20,31,$+4
 887 0:      mflr    r3
 888         ld      r3,(1f-0b)(r3)          /* get &.rtas_restore_regs */
 889
 890         mfmsr   r6
 891         li      r0,MSR_RI
 892         andc    r6,r6,r0
 893         sync
 894         mtmsrd  r6
 895
 896         ld      r1,PACAR1(r4)           /* Restore our SP */
 897         ld      r4,PACASAVEDMSR(r4)     /* Restore our MSR */
 898
 899         mtspr   SPRN_SRR0,r3
 900         mtspr   SPRN_SRR1,r4
 901         rfid
 902         b       .       /* prevent speculative execution */
 903
 904         .align  3
 905 1:      .llong  .rtas_restore_regs
 906
 907 _STATIC(rtas_restore_regs)
 908         /* relocation is on at this point */
 909         REST_GPR(2, r1)                 /* Restore the TOC */
 910         REST_GPR(13, r1)                /* Restore paca */
 911         REST_8GPRS(14, r1)              /* Restore the non-volatiles */
 912         REST_10GPRS(22, r1)             /* ditto */
 913
 914         GET_PACA(r13)
 915
 916         ld      r4,_CCR(r1)
 917         mtcr    r4
 918         ld      r5,_CTR(r1)
 919         mtctr   r5
 920         ld      r6,_XER(r1)
 921         mtspr   SPRN_XER,r6
 922         ld      r7,_DAR(r1)
 923         mtdar   r7
 924         ld      r8,_DSISR(r1)
 925         mtdsisr r8
 926
 927         addi    r1,r1,RTAS_FRAME_SIZE   /* Unstack our frame */
 928         ld      r0,16(r1)               /* get return address */
 929
 930         mtlr    r0
 931         blr                             /* return to caller */
 932
 933 #endif /* CONFIG_PPC_RTAS */
 934
 935 _GLOBAL(enter_prom)
 936         mflr    r0
 937         std     r0,16(r1)
 938         stdu    r1,-PROM_FRAME_SIZE(r1) /* Save SP and create stack space */
 939
 940         /* Because PROM is running in 32b mode, it clobbers the high order half
 941          * of all registers that it saves.  We therefore save those registers
 942          * PROM might touch to the stack.  (r0, r3-r13 are caller saved)
 943          */
 944         SAVE_GPR(2, r1)
 945         SAVE_GPR(13, r1)
 946         SAVE_8GPRS(14, r1)
 947         SAVE_10GPRS(22, r1)
 948         mfcr    r10
 949         mfmsr   r11
 950         std     r10,_CCR(r1)
 951         std     r11,_MSR(r1)
 952
 953         /* Get the PROM entrypoint */
 954         mtlr    r4
 955
 956         /* Switch MSR to 32 bits mode
 957          */
 958 #ifdef CONFIG_PPC_BOOK3E
 959         rlwinm  r11,r11,0,1,31
 960         mtmsr   r11
 961 #else /* CONFIG_PPC_BOOK3E */
 962         mfmsr   r11
 963         li      r12,1
 964         rldicr  r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
 965         andc    r11,r11,r12
 966         li      r12,1
 967         rldicr  r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
 968         andc    r11,r11,r12
 969         mtmsrd  r11
 970 #endif /* CONFIG_PPC_BOOK3E */
 971         isync
 972
 973         /* Enter PROM here... */
 974         blrl
 975
 976         /* Just make sure that r1 top 32 bits didn't get
 977          * corrupt by OF
 978          */
 979         rldicl  r1,r1,0,32
 980
 981         /* Restore the MSR (back to 64 bits) */
 982         ld      r0,_MSR(r1)
 983         MTMSRD(r0)
 984         isync
 985
 986         /* Restore other registers */
 987         REST_GPR(2, r1)
 988         REST_GPR(13, r1)
 989         REST_8GPRS(14, r1)
 990         REST_10GPRS(22, r1)
 991         ld      r4,_CCR(r1)
 992         mtcr    r4
 993
 994         addi    r1,r1,PROM_FRAME_SIZE
 995         ld      r0,16(r1)
 996         mtlr    r0
 997         blr
 998
 999 #ifdef CONFIG_FUNCTION_TRACER
1000 #ifdef CONFIG_DYNAMIC_FTRACE
1001 _GLOBAL(mcount)
1002 _GLOBAL(_mcount)
1003         blr
1004
1005 _GLOBAL(ftrace_caller)
1006         /* Taken from output of objdump from lib64/glibc */
1007         mflr    r3
1008         ld      r11, 0(r1)
1009         stdu    r1, -112(r1)
1010         std     r3, 128(r1)
1011         ld      r4, 16(r11)
1012         subi    r3, r3, MCOUNT_INSN_SIZE
1013 .globl ftrace_call
1014 ftrace_call:
1015         bl      ftrace_stub
1016         nop
1017 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1018 .globl ftrace_graph_call
1019 ftrace_graph_call:
1020         b       ftrace_graph_stub
1021 _GLOBAL(ftrace_graph_stub)
1022 #endif
1023         ld      r0, 128(r1)
1024         mtlr    r0
1025         addi    r1, r1, 112
1026 _GLOBAL(ftrace_stub)
1027         blr
1028 #else
1029 _GLOBAL(mcount)
1030         blr
1031
1032 _GLOBAL(_mcount)
1033         /* Taken from output of objdump from lib64/glibc */
1034         mflr    r3
1035         ld      r11, 0(r1)
1036         stdu    r1, -112(r1)
1037         std     r3, 128(r1)
1038         ld      r4, 16(r11)
1039
1040         subi    r3, r3, MCOUNT_INSN_SIZE
1041         LOAD_REG_ADDR(r5,ftrace_trace_function)
1042         ld      r5,0(r5)
1043         ld      r5,0(r5)
1044         mtctr   r5
1045         bctrl
1046         nop
1047
1048
1049 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1050         b       ftrace_graph_caller
1051 #endif
1052         ld      r0, 128(r1)
1053         mtlr    r0
1054         addi    r1, r1, 112
1055 _GLOBAL(ftrace_stub)
1056         blr
1057
1058 #endif /* CONFIG_DYNAMIC_FTRACE */
1059
1060 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1061 _GLOBAL(ftrace_graph_caller)
1062         /* load r4 with local address */
1063         ld      r4, 128(r1)
1064         subi    r4, r4, MCOUNT_INSN_SIZE
1065
1066         /* get the parent address */
1067         ld      r11, 112(r1)
1068         addi    r3, r11, 16
1069
1070         bl      .prepare_ftrace_return
1071         nop
1072
1073         ld      r0, 128(r1)
1074         mtlr    r0
1075         addi    r1, r1, 112
1076         blr
1077
1078 _GLOBAL(return_to_handler)
1079         /* need to save return values */
1080         std     r4,  -24(r1)
1081         std     r3,  -16(r1)
1082         std     r31, -8(r1)
1083         mr      r31, r1
1084         stdu    r1, -112(r1)
1085
1086         bl      .ftrace_return_to_handler
1087         nop
1088
1089         /* return value has real return address */
1090         mtlr    r3
1091
1092         ld      r1, 0(r1)
1093         ld      r4,  -24(r1)
1094         ld      r3,  -16(r1)
1095         ld      r31, -8(r1)
1096
1097         /* Jump back to real return address */
1098         blr
1099
1100 _GLOBAL(mod_return_to_handler)
1101         /* need to save return values */
1102         std     r4,  -32(r1)
1103         std     r3,  -24(r1)
1104         /* save TOC */
1105         std     r2,  -16(r1)
1106         std     r31, -8(r1)
1107         mr      r31, r1
1108         stdu    r1, -112(r1)
1109
1110         /*
1111          * We are in a module using the module's TOC.
1112          * Switch to our TOC to run inside the core kernel.
1113          */
1114         ld      r2, PACATOC(r13)
1115
1116         bl      .ftrace_return_to_handler
1117         nop
1118
1119         /* return value has real return address */
1120         mtlr    r3
1121
1122         ld      r1, 0(r1)
1123         ld      r4,  -32(r1)
1124         ld      r3,  -24(r1)
1125         ld      r2,  -16(r1)
1126         ld      r31, -8(r1)
1127
1128         /* Jump back to real return address */
1129         blr
1130 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
1131 #endif /* CONFIG_FUNCTION_TRACER */