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powerpc/book3s: Fix CFAR clobbering issue in machine check handler.
[deliverable/linux.git] / arch / powerpc / kernel / exceptions-64s.S
1 /*
2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
6 *
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
9 *
10 * Most of this originates from head_64.S and thus has the same
11 * copyright history.
12 *
13 */
14
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18
19 /*
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
29 */
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
32 BEGIN_FTR_SECTION \
33 cmpdi r0,0x1ebe ; \
34 beq- 1f ; \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
36 mr r9,r13 ; \
37 GET_PACA(r13) ; \
38 mfspr r11,SPRN_SRR0 ; \
39 0:
40
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
48 rfid ; \
49 b . ; /* prevent speculative execution */
50
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
57 b . ; \
58 2: mfspr r12,SPRN_SRR1 ; \
59 andi. r12,r12,MSR_PR ; \
60 bne 0b ; \
61 mtspr SPRN_SRR0,r3 ; \
62 mtspr SPRN_SRR1,r4 ; \
63 mtspr SPRN_SDR1,r5 ; \
64 rfid ; \
65 b . ; /* prevent speculative execution */
66
67 #if defined(CONFIG_RELOCATABLE)
68 /*
69 * We can't branch directly; in the direct case we use LR
70 * and system_call_entry restores LR. (We thus need to move
71 * LR to r10 in the RFID case too.)
72 */
73 #define SYSCALL_PSERIES_2_DIRECT \
74 mflr r10 ; \
75 ld r12,PACAKBASE(r13) ; \
76 LOAD_HANDLER(r12, system_call_entry_direct) ; \
77 mtctr r12 ; \
78 mfspr r12,SPRN_SRR1 ; \
79 /* Re-use of r13... No spare regs to do this */ \
80 li r13,MSR_RI ; \
81 mtmsrd r13,1 ; \
82 GET_PACA(r13) ; /* get r13 back */ \
83 bctr ;
84 #else
85 /* We can branch directly */
86 #define SYSCALL_PSERIES_2_DIRECT \
87 mfspr r12,SPRN_SRR1 ; \
88 li r10,MSR_RI ; \
89 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
90 b system_call_entry_direct ;
91 #endif
92
93 /*
94 * This is the start of the interrupt handlers for pSeries
95 * This code runs with relocation off.
96 * Code from here to __end_interrupts gets copied down to real
97 * address 0x100 when we are running a relocatable kernel.
98 * Therefore any relative branches in this section must only
99 * branch to labels in this section.
100 */
101 . = 0x100
102 .globl __start_interrupts
103 __start_interrupts:
104
105 .globl system_reset_pSeries;
106 system_reset_pSeries:
107 HMT_MEDIUM_PPR_DISCARD
108 SET_SCRATCH0(r13)
109 #ifdef CONFIG_PPC_P7_NAP
110 BEGIN_FTR_SECTION
111 /* Running native on arch 2.06 or later, check if we are
112 * waking up from nap. We only handle no state loss and
113 * supervisor state loss. We do -not- handle hypervisor
114 * state loss at this time.
115 */
116 mfspr r13,SPRN_SRR1
117 rlwinm. r13,r13,47-31,30,31
118 beq 9f
119
120 /* waking up from powersave (nap) state */
121 cmpwi cr1,r13,2
122 /* Total loss of HV state is fatal, we could try to use the
123 * PIR to locate a PACA, then use an emergency stack etc...
124 * but for now, let's just stay stuck here
125 */
126 bgt cr1,.
127 GET_PACA(r13)
128
129 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
130 li r0,KVM_HWTHREAD_IN_KERNEL
131 stb r0,HSTATE_HWTHREAD_STATE(r13)
132 /* Order setting hwthread_state vs. testing hwthread_req */
133 sync
134 lbz r0,HSTATE_HWTHREAD_REQ(r13)
135 cmpwi r0,0
136 beq 1f
137 b kvm_start_guest
138 1:
139 #endif
140
141 beq cr1,2f
142 b .power7_wakeup_noloss
143 2: b .power7_wakeup_loss
144 9:
145 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
146 #endif /* CONFIG_PPC_P7_NAP */
147 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
148 NOTEST, 0x100)
149
150 . = 0x200
151 machine_check_pSeries_1:
152 /* This is moved out of line as it can be patched by FW, but
153 * some code path might still want to branch into the original
154 * vector
155 */
156 HMT_MEDIUM_PPR_DISCARD
157 SET_SCRATCH0(r13) /* save r13 */
158 #ifdef CONFIG_PPC_P7_NAP
159 BEGIN_FTR_SECTION
160 /* Running native on arch 2.06 or later, check if we are
161 * waking up from nap. We only handle no state loss and
162 * supervisor state loss. We do -not- handle hypervisor
163 * state loss at this time.
164 */
165 mfspr r13,SPRN_SRR1
166 rlwinm. r13,r13,47-31,30,31
167 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
168 beq 9f
169
170 mfspr r13,SPRN_SRR1
171 rlwinm. r13,r13,47-31,30,31
172 /* waking up from powersave (nap) state */
173 cmpwi cr1,r13,2
174 /* Total loss of HV state is fatal. let's just stay stuck here */
175 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
176 bgt cr1,.
177 9:
178 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
179 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
180 #endif /* CONFIG_PPC_P7_NAP */
181 EXCEPTION_PROLOG_0(PACA_EXMC)
182 BEGIN_FTR_SECTION
183 b machine_check_pSeries_early
184 FTR_SECTION_ELSE
185 b machine_check_pSeries_0
186 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
187
188 . = 0x300
189 .globl data_access_pSeries
190 data_access_pSeries:
191 HMT_MEDIUM_PPR_DISCARD
192 SET_SCRATCH0(r13)
193 BEGIN_FTR_SECTION
194 b data_access_check_stab
195 data_access_not_stab:
196 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
197 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
198 KVMTEST, 0x300)
199
200 . = 0x380
201 .globl data_access_slb_pSeries
202 data_access_slb_pSeries:
203 HMT_MEDIUM_PPR_DISCARD
204 SET_SCRATCH0(r13)
205 EXCEPTION_PROLOG_0(PACA_EXSLB)
206 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
207 std r3,PACA_EXSLB+EX_R3(r13)
208 mfspr r3,SPRN_DAR
209 #ifdef __DISABLED__
210 /* Keep that around for when we re-implement dynamic VSIDs */
211 cmpdi r3,0
212 bge slb_miss_user_pseries
213 #endif /* __DISABLED__ */
214 mfspr r12,SPRN_SRR1
215 #ifndef CONFIG_RELOCATABLE
216 b .slb_miss_realmode
217 #else
218 /*
219 * We can't just use a direct branch to .slb_miss_realmode
220 * because the distance from here to there depends on where
221 * the kernel ends up being put.
222 */
223 mfctr r11
224 ld r10,PACAKBASE(r13)
225 LOAD_HANDLER(r10, .slb_miss_realmode)
226 mtctr r10
227 bctr
228 #endif
229
230 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
231
232 . = 0x480
233 .globl instruction_access_slb_pSeries
234 instruction_access_slb_pSeries:
235 HMT_MEDIUM_PPR_DISCARD
236 SET_SCRATCH0(r13)
237 EXCEPTION_PROLOG_0(PACA_EXSLB)
238 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
239 std r3,PACA_EXSLB+EX_R3(r13)
240 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
241 #ifdef __DISABLED__
242 /* Keep that around for when we re-implement dynamic VSIDs */
243 cmpdi r3,0
244 bge slb_miss_user_pseries
245 #endif /* __DISABLED__ */
246 mfspr r12,SPRN_SRR1
247 #ifndef CONFIG_RELOCATABLE
248 b .slb_miss_realmode
249 #else
250 mfctr r11
251 ld r10,PACAKBASE(r13)
252 LOAD_HANDLER(r10, .slb_miss_realmode)
253 mtctr r10
254 bctr
255 #endif
256
257 /* We open code these as we can't have a ". = x" (even with
258 * x = "." within a feature section
259 */
260 . = 0x500;
261 .globl hardware_interrupt_pSeries;
262 .globl hardware_interrupt_hv;
263 hardware_interrupt_pSeries:
264 hardware_interrupt_hv:
265 HMT_MEDIUM_PPR_DISCARD
266 BEGIN_FTR_SECTION
267 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
268 EXC_HV, SOFTEN_TEST_HV)
269 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
270 FTR_SECTION_ELSE
271 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
272 EXC_STD, SOFTEN_TEST_HV_201)
273 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
274 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
275
276 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
277 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
278
279 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
280 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
281
282 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
283 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
284
285 . = 0x900
286 .globl decrementer_pSeries
287 decrementer_pSeries:
288 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
289
290 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
291
292 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
293 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
294
295 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
296 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
297
298 . = 0xc00
299 .globl system_call_pSeries
300 system_call_pSeries:
301 HMT_MEDIUM
302 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
303 SET_SCRATCH0(r13)
304 GET_PACA(r13)
305 std r9,PACA_EXGEN+EX_R9(r13)
306 std r10,PACA_EXGEN+EX_R10(r13)
307 mfcr r9
308 KVMTEST(0xc00)
309 GET_SCRATCH0(r13)
310 #endif
311 SYSCALL_PSERIES_1
312 SYSCALL_PSERIES_2_RFID
313 SYSCALL_PSERIES_3
314 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
315
316 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
317 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
318
319 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
320 * out of line to handle them
321 */
322 . = 0xe00
323 hv_data_storage_trampoline:
324 SET_SCRATCH0(r13)
325 EXCEPTION_PROLOG_0(PACA_EXGEN)
326 b h_data_storage_hv
327
328 . = 0xe20
329 hv_instr_storage_trampoline:
330 SET_SCRATCH0(r13)
331 EXCEPTION_PROLOG_0(PACA_EXGEN)
332 b h_instr_storage_hv
333
334 . = 0xe40
335 emulation_assist_trampoline:
336 SET_SCRATCH0(r13)
337 EXCEPTION_PROLOG_0(PACA_EXGEN)
338 b emulation_assist_hv
339
340 . = 0xe60
341 hv_exception_trampoline:
342 SET_SCRATCH0(r13)
343 EXCEPTION_PROLOG_0(PACA_EXGEN)
344 b hmi_exception_hv
345
346 . = 0xe80
347 hv_doorbell_trampoline:
348 SET_SCRATCH0(r13)
349 EXCEPTION_PROLOG_0(PACA_EXGEN)
350 b h_doorbell_hv
351
352 /* We need to deal with the Altivec unavailable exception
353 * here which is at 0xf20, thus in the middle of the
354 * prolog code of the PerformanceMonitor one. A little
355 * trickery is thus necessary
356 */
357 . = 0xf00
358 performance_monitor_pseries_trampoline:
359 SET_SCRATCH0(r13)
360 EXCEPTION_PROLOG_0(PACA_EXGEN)
361 b performance_monitor_pSeries
362
363 . = 0xf20
364 altivec_unavailable_pseries_trampoline:
365 SET_SCRATCH0(r13)
366 EXCEPTION_PROLOG_0(PACA_EXGEN)
367 b altivec_unavailable_pSeries
368
369 . = 0xf40
370 vsx_unavailable_pseries_trampoline:
371 SET_SCRATCH0(r13)
372 EXCEPTION_PROLOG_0(PACA_EXGEN)
373 b vsx_unavailable_pSeries
374
375 . = 0xf60
376 facility_unavailable_trampoline:
377 SET_SCRATCH0(r13)
378 EXCEPTION_PROLOG_0(PACA_EXGEN)
379 b facility_unavailable_pSeries
380
381 . = 0xf80
382 hv_facility_unavailable_trampoline:
383 SET_SCRATCH0(r13)
384 EXCEPTION_PROLOG_0(PACA_EXGEN)
385 b facility_unavailable_hv
386
387 #ifdef CONFIG_CBE_RAS
388 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
389 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
390 #endif /* CONFIG_CBE_RAS */
391
392 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
393 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
394
395 . = 0x1500
396 .global denorm_exception_hv
397 denorm_exception_hv:
398 HMT_MEDIUM_PPR_DISCARD
399 mtspr SPRN_SPRG_HSCRATCH0,r13
400 EXCEPTION_PROLOG_0(PACA_EXGEN)
401 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
402
403 #ifdef CONFIG_PPC_DENORMALISATION
404 mfspr r10,SPRN_HSRR1
405 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
406 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
407 addi r11,r11,-4 /* HSRR0 is next instruction */
408 bne+ denorm_assist
409 #endif
410
411 KVMTEST(0x1500)
412 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
413 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
414
415 #ifdef CONFIG_CBE_RAS
416 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
417 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
418 #endif /* CONFIG_CBE_RAS */
419
420 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
421 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
422
423 #ifdef CONFIG_CBE_RAS
424 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
425 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
426 #else
427 . = 0x1800
428 #endif /* CONFIG_CBE_RAS */
429
430
431 /*** Out of line interrupts support ***/
432
433 .align 7
434 /* moved from 0x200 */
435 machine_check_pSeries_early:
436 BEGIN_FTR_SECTION
437 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
438 /*
439 * Register contents:
440 * R13 = PACA
441 * R9 = CR
442 * Original R9 to R13 is saved on PACA_EXMC
443 *
444 * Switch to mc_emergency stack and handle re-entrancy (though we
445 * currently don't test for overflow). Save MCE registers srr1,
446 * srr0, dar and dsisr and then set ME=1
447 *
448 * We use paca->in_mce to check whether this is the first entry or
449 * nested machine check. We increment paca->in_mce to track nested
450 * machine checks.
451 *
452 * If this is the first entry then set stack pointer to
453 * paca->mc_emergency_sp, otherwise r1 is already pointing to
454 * stack frame on mc_emergency stack.
455 *
456 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
457 * checkstop if we get another machine check exception before we do
458 * rfid with MSR_ME=1.
459 */
460 mr r11,r1 /* Save r1 */
461 lhz r10,PACA_IN_MCE(r13)
462 cmpwi r10,0 /* Are we in nested machine check */
463 bne 0f /* Yes, we are. */
464 /* First machine check entry */
465 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
466 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
467 addi r10,r10,1 /* increment paca->in_mce */
468 sth r10,PACA_IN_MCE(r13)
469 std r11,GPR1(r1) /* Save r1 on the stack. */
470 std r11,0(r1) /* make stack chain pointer */
471 mfspr r11,SPRN_SRR0 /* Save SRR0 */
472 std r11,_NIP(r1)
473 mfspr r11,SPRN_SRR1 /* Save SRR1 */
474 std r11,_MSR(r1)
475 mfspr r11,SPRN_DAR /* Save DAR */
476 std r11,_DAR(r1)
477 mfspr r11,SPRN_DSISR /* Save DSISR */
478 std r11,_DSISR(r1)
479 std r9,_CCR(r1) /* Save CR in stackframe */
480 /* Save r9 through r13 from EXMC save area to stack frame. */
481 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
482 mfmsr r11 /* get MSR value */
483 ori r11,r11,MSR_ME /* turn on ME bit */
484 ori r11,r11,MSR_RI /* turn on RI bit */
485 ld r12,PACAKBASE(r13) /* get high part of &label */
486 LOAD_HANDLER(r12, machine_check_handle_early)
487 mtspr SPRN_SRR0,r12
488 mtspr SPRN_SRR1,r11
489 rfid
490 b . /* prevent speculative execution */
491 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
492
493 machine_check_pSeries:
494 .globl machine_check_fwnmi
495 machine_check_fwnmi:
496 HMT_MEDIUM_PPR_DISCARD
497 SET_SCRATCH0(r13) /* save r13 */
498 EXCEPTION_PROLOG_0(PACA_EXMC)
499 machine_check_pSeries_0:
500 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
501 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
502 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
503
504 /* moved from 0x300 */
505 data_access_check_stab:
506 GET_PACA(r13)
507 std r9,PACA_EXSLB+EX_R9(r13)
508 std r10,PACA_EXSLB+EX_R10(r13)
509 mfspr r10,SPRN_DAR
510 mfspr r9,SPRN_DSISR
511 srdi r10,r10,60
512 rlwimi r10,r9,16,0x20
513 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
514 lbz r9,HSTATE_IN_GUEST(r13)
515 rlwimi r10,r9,8,0x300
516 #endif
517 mfcr r9
518 cmpwi r10,0x2c
519 beq do_stab_bolted_pSeries
520 mtcrf 0x80,r9
521 ld r9,PACA_EXSLB+EX_R9(r13)
522 ld r10,PACA_EXSLB+EX_R10(r13)
523 b data_access_not_stab
524 do_stab_bolted_pSeries:
525 std r11,PACA_EXSLB+EX_R11(r13)
526 std r12,PACA_EXSLB+EX_R12(r13)
527 GET_SCRATCH0(r10)
528 std r10,PACA_EXSLB+EX_R13(r13)
529 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
530
531 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
532 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
533 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
534 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
535 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
536 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
537
538 #ifdef CONFIG_PPC_DENORMALISATION
539 denorm_assist:
540 BEGIN_FTR_SECTION
541 /*
542 * To denormalise we need to move a copy of the register to itself.
543 * For POWER6 do that here for all FP regs.
544 */
545 mfmsr r10
546 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
547 xori r10,r10,(MSR_FE0|MSR_FE1)
548 mtmsrd r10
549 sync
550
551 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
552 #define FMR4(n) FMR2(n) ; FMR2(n+2)
553 #define FMR8(n) FMR4(n) ; FMR4(n+4)
554 #define FMR16(n) FMR8(n) ; FMR8(n+8)
555 #define FMR32(n) FMR16(n) ; FMR16(n+16)
556 FMR32(0)
557
558 FTR_SECTION_ELSE
559 /*
560 * To denormalise we need to move a copy of the register to itself.
561 * For POWER7 do that here for the first 32 VSX registers only.
562 */
563 mfmsr r10
564 oris r10,r10,MSR_VSX@h
565 mtmsrd r10
566 sync
567
568 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
569 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
570 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
571 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
572 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
573 XVCPSGNDP32(0)
574
575 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
576
577 BEGIN_FTR_SECTION
578 b denorm_done
579 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
580 /*
581 * To denormalise we need to move a copy of the register to itself.
582 * For POWER8 we need to do that for all 64 VSX registers
583 */
584 XVCPSGNDP32(32)
585 denorm_done:
586 mtspr SPRN_HSRR0,r11
587 mtcrf 0x80,r9
588 ld r9,PACA_EXGEN+EX_R9(r13)
589 RESTORE_PPR_PACA(PACA_EXGEN, r10)
590 BEGIN_FTR_SECTION
591 ld r10,PACA_EXGEN+EX_CFAR(r13)
592 mtspr SPRN_CFAR,r10
593 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
594 ld r10,PACA_EXGEN+EX_R10(r13)
595 ld r11,PACA_EXGEN+EX_R11(r13)
596 ld r12,PACA_EXGEN+EX_R12(r13)
597 ld r13,PACA_EXGEN+EX_R13(r13)
598 HRFID
599 b .
600 #endif
601
602 .align 7
603 /* moved from 0xe00 */
604 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
605 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
606 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
607 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
608 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
609 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
610 STD_EXCEPTION_HV_OOL(0xe62, hmi_exception) /* need to flush cache ? */
611 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
612 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
613 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
614
615 /* moved from 0xf00 */
616 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
617 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
618 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
619 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
620 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
621 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
622 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
623 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
624 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
625 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
626
627 /*
628 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
629 * - If it was a decrementer interrupt, we bump the dec to max and and return.
630 * - If it was a doorbell we return immediately since doorbells are edge
631 * triggered and won't automatically refire.
632 * - else we hard disable and return.
633 * This is called with r10 containing the value to OR to the paca field.
634 */
635 #define MASKED_INTERRUPT(_H) \
636 masked_##_H##interrupt: \
637 std r11,PACA_EXGEN+EX_R11(r13); \
638 lbz r11,PACAIRQHAPPENED(r13); \
639 or r11,r11,r10; \
640 stb r11,PACAIRQHAPPENED(r13); \
641 cmpwi r10,PACA_IRQ_DEC; \
642 bne 1f; \
643 lis r10,0x7fff; \
644 ori r10,r10,0xffff; \
645 mtspr SPRN_DEC,r10; \
646 b 2f; \
647 1: cmpwi r10,PACA_IRQ_DBELL; \
648 beq 2f; \
649 mfspr r10,SPRN_##_H##SRR1; \
650 rldicl r10,r10,48,1; /* clear MSR_EE */ \
651 rotldi r10,r10,16; \
652 mtspr SPRN_##_H##SRR1,r10; \
653 2: mtcrf 0x80,r9; \
654 ld r9,PACA_EXGEN+EX_R9(r13); \
655 ld r10,PACA_EXGEN+EX_R10(r13); \
656 ld r11,PACA_EXGEN+EX_R11(r13); \
657 GET_SCRATCH0(r13); \
658 ##_H##rfid; \
659 b .
660
661 MASKED_INTERRUPT()
662 MASKED_INTERRUPT(H)
663
664 /*
665 * Called from arch_local_irq_enable when an interrupt needs
666 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
667 * which kind of interrupt. MSR:EE is already off. We generate a
668 * stackframe like if a real interrupt had happened.
669 *
670 * Note: While MSR:EE is off, we need to make sure that _MSR
671 * in the generated frame has EE set to 1 or the exception
672 * handler will not properly re-enable them.
673 */
674 _GLOBAL(__replay_interrupt)
675 /* We are going to jump to the exception common code which
676 * will retrieve various register values from the PACA which
677 * we don't give a damn about, so we don't bother storing them.
678 */
679 mfmsr r12
680 mflr r11
681 mfcr r9
682 ori r12,r12,MSR_EE
683 cmpwi r3,0x900
684 beq decrementer_common
685 cmpwi r3,0x500
686 beq hardware_interrupt_common
687 BEGIN_FTR_SECTION
688 cmpwi r3,0xe80
689 beq h_doorbell_common
690 FTR_SECTION_ELSE
691 cmpwi r3,0xa00
692 beq doorbell_super_common
693 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
694 blr
695
696 #ifdef CONFIG_PPC_PSERIES
697 /*
698 * Vectors for the FWNMI option. Share common code.
699 */
700 .globl system_reset_fwnmi
701 .align 7
702 system_reset_fwnmi:
703 HMT_MEDIUM_PPR_DISCARD
704 SET_SCRATCH0(r13) /* save r13 */
705 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
706 NOTEST, 0x100)
707
708 #endif /* CONFIG_PPC_PSERIES */
709
710 #ifdef __DISABLED__
711 /*
712 * This is used for when the SLB miss handler has to go virtual,
713 * which doesn't happen for now anymore but will once we re-implement
714 * dynamic VSIDs for shared page tables
715 */
716 slb_miss_user_pseries:
717 std r10,PACA_EXGEN+EX_R10(r13)
718 std r11,PACA_EXGEN+EX_R11(r13)
719 std r12,PACA_EXGEN+EX_R12(r13)
720 GET_SCRATCH0(r10)
721 ld r11,PACA_EXSLB+EX_R9(r13)
722 ld r12,PACA_EXSLB+EX_R3(r13)
723 std r10,PACA_EXGEN+EX_R13(r13)
724 std r11,PACA_EXGEN+EX_R9(r13)
725 std r12,PACA_EXGEN+EX_R3(r13)
726 clrrdi r12,r13,32
727 mfmsr r10
728 mfspr r11,SRR0 /* save SRR0 */
729 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
730 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
731 mtspr SRR0,r12
732 mfspr r12,SRR1 /* and SRR1 */
733 mtspr SRR1,r10
734 rfid
735 b . /* prevent spec. execution */
736 #endif /* __DISABLED__ */
737
738 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
739 kvmppc_skip_interrupt:
740 /*
741 * Here all GPRs are unchanged from when the interrupt happened
742 * except for r13, which is saved in SPRG_SCRATCH0.
743 */
744 mfspr r13, SPRN_SRR0
745 addi r13, r13, 4
746 mtspr SPRN_SRR0, r13
747 GET_SCRATCH0(r13)
748 rfid
749 b .
750
751 kvmppc_skip_Hinterrupt:
752 /*
753 * Here all GPRs are unchanged from when the interrupt happened
754 * except for r13, which is saved in SPRG_SCRATCH0.
755 */
756 mfspr r13, SPRN_HSRR0
757 addi r13, r13, 4
758 mtspr SPRN_HSRR0, r13
759 GET_SCRATCH0(r13)
760 hrfid
761 b .
762 #endif
763
764 /*
765 * Code from here down to __end_handlers is invoked from the
766 * exception prologs above. Because the prologs assemble the
767 * addresses of these handlers using the LOAD_HANDLER macro,
768 * which uses an ori instruction, these handlers must be in
769 * the first 64k of the kernel image.
770 */
771
772 /*** Common interrupt handlers ***/
773
774 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
775
776 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
777 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
778 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
779 #ifdef CONFIG_PPC_DOORBELL
780 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
781 #else
782 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .unknown_exception)
783 #endif
784 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
785 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
786 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
787 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .emulation_assist_interrupt)
788 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
789 #ifdef CONFIG_PPC_DOORBELL
790 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .doorbell_exception)
791 #else
792 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .unknown_exception)
793 #endif
794 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
795 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
796 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
797 #ifdef CONFIG_ALTIVEC
798 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
799 #else
800 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
801 #endif
802 #ifdef CONFIG_CBE_RAS
803 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
804 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
805 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
806 #endif /* CONFIG_CBE_RAS */
807
808 /*
809 * Relocation-on interrupts: A subset of the interrupts can be delivered
810 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
811 * it. Addresses are the same as the original interrupt addresses, but
812 * offset by 0xc000000000004000.
813 * It's impossible to receive interrupts below 0x300 via this mechanism.
814 * KVM: None of these traps are from the guest ; anything that escalated
815 * to HV=1 from HV=0 is delivered via real mode handlers.
816 */
817
818 /*
819 * This uses the standard macro, since the original 0x300 vector
820 * only has extra guff for STAB-based processors -- which never
821 * come here.
822 */
823 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
824 . = 0x4380
825 .globl data_access_slb_relon_pSeries
826 data_access_slb_relon_pSeries:
827 SET_SCRATCH0(r13)
828 EXCEPTION_PROLOG_0(PACA_EXSLB)
829 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
830 std r3,PACA_EXSLB+EX_R3(r13)
831 mfspr r3,SPRN_DAR
832 mfspr r12,SPRN_SRR1
833 #ifndef CONFIG_RELOCATABLE
834 b .slb_miss_realmode
835 #else
836 /*
837 * We can't just use a direct branch to .slb_miss_realmode
838 * because the distance from here to there depends on where
839 * the kernel ends up being put.
840 */
841 mfctr r11
842 ld r10,PACAKBASE(r13)
843 LOAD_HANDLER(r10, .slb_miss_realmode)
844 mtctr r10
845 bctr
846 #endif
847
848 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
849 . = 0x4480
850 .globl instruction_access_slb_relon_pSeries
851 instruction_access_slb_relon_pSeries:
852 SET_SCRATCH0(r13)
853 EXCEPTION_PROLOG_0(PACA_EXSLB)
854 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
855 std r3,PACA_EXSLB+EX_R3(r13)
856 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
857 mfspr r12,SPRN_SRR1
858 #ifndef CONFIG_RELOCATABLE
859 b .slb_miss_realmode
860 #else
861 mfctr r11
862 ld r10,PACAKBASE(r13)
863 LOAD_HANDLER(r10, .slb_miss_realmode)
864 mtctr r10
865 bctr
866 #endif
867
868 . = 0x4500
869 .globl hardware_interrupt_relon_pSeries;
870 .globl hardware_interrupt_relon_hv;
871 hardware_interrupt_relon_pSeries:
872 hardware_interrupt_relon_hv:
873 BEGIN_FTR_SECTION
874 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
875 FTR_SECTION_ELSE
876 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
877 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
878 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
879 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
880 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
881 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
882 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
883 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
884 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
885
886 . = 0x4c00
887 .globl system_call_relon_pSeries
888 system_call_relon_pSeries:
889 HMT_MEDIUM
890 SYSCALL_PSERIES_1
891 SYSCALL_PSERIES_2_DIRECT
892 SYSCALL_PSERIES_3
893
894 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
895
896 . = 0x4e00
897 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
898
899 . = 0x4e20
900 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
901
902 . = 0x4e40
903 emulation_assist_relon_trampoline:
904 SET_SCRATCH0(r13)
905 EXCEPTION_PROLOG_0(PACA_EXGEN)
906 b emulation_assist_relon_hv
907
908 . = 0x4e60
909 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
910
911 . = 0x4e80
912 h_doorbell_relon_trampoline:
913 SET_SCRATCH0(r13)
914 EXCEPTION_PROLOG_0(PACA_EXGEN)
915 b h_doorbell_relon_hv
916
917 . = 0x4f00
918 performance_monitor_relon_pseries_trampoline:
919 SET_SCRATCH0(r13)
920 EXCEPTION_PROLOG_0(PACA_EXGEN)
921 b performance_monitor_relon_pSeries
922
923 . = 0x4f20
924 altivec_unavailable_relon_pseries_trampoline:
925 SET_SCRATCH0(r13)
926 EXCEPTION_PROLOG_0(PACA_EXGEN)
927 b altivec_unavailable_relon_pSeries
928
929 . = 0x4f40
930 vsx_unavailable_relon_pseries_trampoline:
931 SET_SCRATCH0(r13)
932 EXCEPTION_PROLOG_0(PACA_EXGEN)
933 b vsx_unavailable_relon_pSeries
934
935 . = 0x4f60
936 facility_unavailable_relon_trampoline:
937 SET_SCRATCH0(r13)
938 EXCEPTION_PROLOG_0(PACA_EXGEN)
939 b facility_unavailable_relon_pSeries
940
941 . = 0x4f80
942 hv_facility_unavailable_relon_trampoline:
943 SET_SCRATCH0(r13)
944 EXCEPTION_PROLOG_0(PACA_EXGEN)
945 b hv_facility_unavailable_relon_hv
946
947 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
948 #ifdef CONFIG_PPC_DENORMALISATION
949 . = 0x5500
950 b denorm_exception_hv
951 #endif
952 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
953
954 /* Other future vectors */
955 .align 7
956 .globl __end_interrupts
957 __end_interrupts:
958
959 .align 7
960 system_call_entry_direct:
961 #if defined(CONFIG_RELOCATABLE)
962 /* The first level prologue may have used LR to get here, saving
963 * orig in r10. To save hacking/ifdeffing common code, restore here.
964 */
965 mtlr r10
966 #endif
967 system_call_entry:
968 b system_call_common
969
970 ppc64_runlatch_on_trampoline:
971 b .__ppc64_runlatch_on
972
973 /*
974 * Here we have detected that the kernel stack pointer is bad.
975 * R9 contains the saved CR, r13 points to the paca,
976 * r10 contains the (bad) kernel stack pointer,
977 * r11 and r12 contain the saved SRR0 and SRR1.
978 * We switch to using an emergency stack, save the registers there,
979 * and call kernel_bad_stack(), which panics.
980 */
981 bad_stack:
982 ld r1,PACAEMERGSP(r13)
983 subi r1,r1,64+INT_FRAME_SIZE
984 std r9,_CCR(r1)
985 std r10,GPR1(r1)
986 std r11,_NIP(r1)
987 std r12,_MSR(r1)
988 mfspr r11,SPRN_DAR
989 mfspr r12,SPRN_DSISR
990 std r11,_DAR(r1)
991 std r12,_DSISR(r1)
992 mflr r10
993 mfctr r11
994 mfxer r12
995 std r10,_LINK(r1)
996 std r11,_CTR(r1)
997 std r12,_XER(r1)
998 SAVE_GPR(0,r1)
999 SAVE_GPR(2,r1)
1000 ld r10,EX_R3(r3)
1001 std r10,GPR3(r1)
1002 SAVE_GPR(4,r1)
1003 SAVE_4GPRS(5,r1)
1004 ld r9,EX_R9(r3)
1005 ld r10,EX_R10(r3)
1006 SAVE_2GPRS(9,r1)
1007 ld r9,EX_R11(r3)
1008 ld r10,EX_R12(r3)
1009 ld r11,EX_R13(r3)
1010 std r9,GPR11(r1)
1011 std r10,GPR12(r1)
1012 std r11,GPR13(r1)
1013 BEGIN_FTR_SECTION
1014 ld r10,EX_CFAR(r3)
1015 std r10,ORIG_GPR3(r1)
1016 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1017 SAVE_8GPRS(14,r1)
1018 SAVE_10GPRS(22,r1)
1019 lhz r12,PACA_TRAP_SAVE(r13)
1020 std r12,_TRAP(r1)
1021 addi r11,r1,INT_FRAME_SIZE
1022 std r11,0(r1)
1023 li r12,0
1024 std r12,0(r11)
1025 ld r2,PACATOC(r13)
1026 ld r11,exception_marker@toc(r2)
1027 std r12,RESULT(r1)
1028 std r11,STACK_FRAME_OVERHEAD-16(r1)
1029 1: addi r3,r1,STACK_FRAME_OVERHEAD
1030 bl .kernel_bad_stack
1031 b 1b
1032
1033 /*
1034 * Here r13 points to the paca, r9 contains the saved CR,
1035 * SRR0 and SRR1 are saved in r11 and r12,
1036 * r9 - r13 are saved in paca->exgen.
1037 */
1038 .align 7
1039 .globl data_access_common
1040 data_access_common:
1041 mfspr r10,SPRN_DAR
1042 std r10,PACA_EXGEN+EX_DAR(r13)
1043 mfspr r10,SPRN_DSISR
1044 stw r10,PACA_EXGEN+EX_DSISR(r13)
1045 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
1046 DISABLE_INTS
1047 ld r12,_MSR(r1)
1048 ld r3,PACA_EXGEN+EX_DAR(r13)
1049 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1050 li r5,0x300
1051 b .do_hash_page /* Try to handle as hpte fault */
1052
1053 .align 7
1054 .globl h_data_storage_common
1055 h_data_storage_common:
1056 mfspr r10,SPRN_HDAR
1057 std r10,PACA_EXGEN+EX_DAR(r13)
1058 mfspr r10,SPRN_HDSISR
1059 stw r10,PACA_EXGEN+EX_DSISR(r13)
1060 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
1061 bl .save_nvgprs
1062 DISABLE_INTS
1063 addi r3,r1,STACK_FRAME_OVERHEAD
1064 bl .unknown_exception
1065 b .ret_from_except
1066
1067 .align 7
1068 .globl instruction_access_common
1069 instruction_access_common:
1070 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
1071 DISABLE_INTS
1072 ld r12,_MSR(r1)
1073 ld r3,_NIP(r1)
1074 andis. r4,r12,0x5820
1075 li r5,0x400
1076 b .do_hash_page /* Try to handle as hpte fault */
1077
1078 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
1079
1080 /*
1081 * Here is the common SLB miss user that is used when going to virtual
1082 * mode for SLB misses, that is currently not used
1083 */
1084 #ifdef __DISABLED__
1085 .align 7
1086 .globl slb_miss_user_common
1087 slb_miss_user_common:
1088 mflr r10
1089 std r3,PACA_EXGEN+EX_DAR(r13)
1090 stw r9,PACA_EXGEN+EX_CCR(r13)
1091 std r10,PACA_EXGEN+EX_LR(r13)
1092 std r11,PACA_EXGEN+EX_SRR0(r13)
1093 bl .slb_allocate_user
1094
1095 ld r10,PACA_EXGEN+EX_LR(r13)
1096 ld r3,PACA_EXGEN+EX_R3(r13)
1097 lwz r9,PACA_EXGEN+EX_CCR(r13)
1098 ld r11,PACA_EXGEN+EX_SRR0(r13)
1099 mtlr r10
1100 beq- slb_miss_fault
1101
1102 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1103 beq- unrecov_user_slb
1104 mfmsr r10
1105
1106 .machine push
1107 .machine "power4"
1108 mtcrf 0x80,r9
1109 .machine pop
1110
1111 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1112 mtmsrd r10,1
1113
1114 mtspr SRR0,r11
1115 mtspr SRR1,r12
1116
1117 ld r9,PACA_EXGEN+EX_R9(r13)
1118 ld r10,PACA_EXGEN+EX_R10(r13)
1119 ld r11,PACA_EXGEN+EX_R11(r13)
1120 ld r12,PACA_EXGEN+EX_R12(r13)
1121 ld r13,PACA_EXGEN+EX_R13(r13)
1122 rfid
1123 b .
1124
1125 slb_miss_fault:
1126 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1127 ld r4,PACA_EXGEN+EX_DAR(r13)
1128 li r5,0
1129 std r4,_DAR(r1)
1130 std r5,_DSISR(r1)
1131 b handle_page_fault
1132
1133 unrecov_user_slb:
1134 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1135 DISABLE_INTS
1136 bl .save_nvgprs
1137 1: addi r3,r1,STACK_FRAME_OVERHEAD
1138 bl .unrecoverable_exception
1139 b 1b
1140
1141 #endif /* __DISABLED__ */
1142
1143
1144 /*
1145 * Machine check is different because we use a different
1146 * save area: PACA_EXMC instead of PACA_EXGEN.
1147 */
1148 .align 7
1149 .globl machine_check_common
1150 machine_check_common:
1151
1152 mfspr r10,SPRN_DAR
1153 std r10,PACA_EXGEN+EX_DAR(r13)
1154 mfspr r10,SPRN_DSISR
1155 stw r10,PACA_EXGEN+EX_DSISR(r13)
1156 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
1157 FINISH_NAP
1158 DISABLE_INTS
1159 ld r3,PACA_EXGEN+EX_DAR(r13)
1160 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1161 std r3,_DAR(r1)
1162 std r4,_DSISR(r1)
1163 bl .save_nvgprs
1164 addi r3,r1,STACK_FRAME_OVERHEAD
1165 bl .machine_check_exception
1166 b .ret_from_except
1167
1168 .align 7
1169 .globl alignment_common
1170 alignment_common:
1171 mfspr r10,SPRN_DAR
1172 std r10,PACA_EXGEN+EX_DAR(r13)
1173 mfspr r10,SPRN_DSISR
1174 stw r10,PACA_EXGEN+EX_DSISR(r13)
1175 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1176 ld r3,PACA_EXGEN+EX_DAR(r13)
1177 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1178 std r3,_DAR(r1)
1179 std r4,_DSISR(r1)
1180 bl .save_nvgprs
1181 DISABLE_INTS
1182 addi r3,r1,STACK_FRAME_OVERHEAD
1183 bl .alignment_exception
1184 b .ret_from_except
1185
1186 .align 7
1187 .globl program_check_common
1188 program_check_common:
1189 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1190 bl .save_nvgprs
1191 DISABLE_INTS
1192 addi r3,r1,STACK_FRAME_OVERHEAD
1193 bl .program_check_exception
1194 b .ret_from_except
1195
1196 .align 7
1197 .globl fp_unavailable_common
1198 fp_unavailable_common:
1199 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1200 bne 1f /* if from user, just load it up */
1201 bl .save_nvgprs
1202 DISABLE_INTS
1203 addi r3,r1,STACK_FRAME_OVERHEAD
1204 bl .kernel_fp_unavailable_exception
1205 BUG_OPCODE
1206 1:
1207 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1208 BEGIN_FTR_SECTION
1209 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1210 * transaction), go do TM stuff
1211 */
1212 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1213 bne- 2f
1214 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1215 #endif
1216 bl .load_up_fpu
1217 b fast_exception_return
1218 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1219 2: /* User process was in a transaction */
1220 bl .save_nvgprs
1221 DISABLE_INTS
1222 addi r3,r1,STACK_FRAME_OVERHEAD
1223 bl .fp_unavailable_tm
1224 b .ret_from_except
1225 #endif
1226 .align 7
1227 .globl altivec_unavailable_common
1228 altivec_unavailable_common:
1229 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1230 #ifdef CONFIG_ALTIVEC
1231 BEGIN_FTR_SECTION
1232 beq 1f
1233 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1234 BEGIN_FTR_SECTION_NESTED(69)
1235 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1236 * transaction), go do TM stuff
1237 */
1238 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1239 bne- 2f
1240 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1241 #endif
1242 bl .load_up_altivec
1243 b fast_exception_return
1244 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1245 2: /* User process was in a transaction */
1246 bl .save_nvgprs
1247 DISABLE_INTS
1248 addi r3,r1,STACK_FRAME_OVERHEAD
1249 bl .altivec_unavailable_tm
1250 b .ret_from_except
1251 #endif
1252 1:
1253 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1254 #endif
1255 bl .save_nvgprs
1256 DISABLE_INTS
1257 addi r3,r1,STACK_FRAME_OVERHEAD
1258 bl .altivec_unavailable_exception
1259 b .ret_from_except
1260
1261 .align 7
1262 .globl vsx_unavailable_common
1263 vsx_unavailable_common:
1264 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1265 #ifdef CONFIG_VSX
1266 BEGIN_FTR_SECTION
1267 beq 1f
1268 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1269 BEGIN_FTR_SECTION_NESTED(69)
1270 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1271 * transaction), go do TM stuff
1272 */
1273 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1274 bne- 2f
1275 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1276 #endif
1277 b .load_up_vsx
1278 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1279 2: /* User process was in a transaction */
1280 bl .save_nvgprs
1281 DISABLE_INTS
1282 addi r3,r1,STACK_FRAME_OVERHEAD
1283 bl .vsx_unavailable_tm
1284 b .ret_from_except
1285 #endif
1286 1:
1287 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1288 #endif
1289 bl .save_nvgprs
1290 DISABLE_INTS
1291 addi r3,r1,STACK_FRAME_OVERHEAD
1292 bl .vsx_unavailable_exception
1293 b .ret_from_except
1294
1295 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception)
1296 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception)
1297
1298 .align 7
1299 .globl __end_handlers
1300 __end_handlers:
1301
1302 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1303 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1304 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1305
1306 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1307 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1308 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1309 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1310 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1311
1312 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1313 /*
1314 * Data area reserved for FWNMI option.
1315 * This address (0x7000) is fixed by the RPA.
1316 */
1317 .= 0x7000
1318 .globl fwnmi_data_area
1319 fwnmi_data_area:
1320
1321 /* pseries and powernv need to keep the whole page from
1322 * 0x7000 to 0x8000 free for use by the firmware
1323 */
1324 . = 0x8000
1325 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1326
1327 /* Space for CPU0's segment table */
1328 .balign 4096
1329 .globl initial_stab
1330 initial_stab:
1331 .space 4096
1332
1333 #ifdef CONFIG_PPC_POWERNV
1334 _GLOBAL(opal_mc_secondary_handler)
1335 HMT_MEDIUM_PPR_DISCARD
1336 SET_SCRATCH0(r13)
1337 GET_PACA(r13)
1338 clrldi r3,r3,2
1339 tovirt(r3,r3)
1340 std r3,PACA_OPAL_MC_EVT(r13)
1341 ld r13,OPAL_MC_SRR0(r3)
1342 mtspr SPRN_SRR0,r13
1343 ld r13,OPAL_MC_SRR1(r3)
1344 mtspr SPRN_SRR1,r13
1345 ld r3,OPAL_MC_GPR3(r3)
1346 GET_SCRATCH0(r13)
1347 b machine_check_pSeries
1348 #endif /* CONFIG_PPC_POWERNV */
1349
1350
1351 #define MACHINE_CHECK_HANDLER_WINDUP \
1352 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1353 li r0,MSR_RI; \
1354 mfmsr r9; /* get MSR value */ \
1355 andc r9,r9,r0; \
1356 mtmsrd r9,1; /* Clear MSR_RI */ \
1357 /* Move original SRR0 and SRR1 into the respective regs */ \
1358 ld r9,_MSR(r1); \
1359 mtspr SPRN_SRR1,r9; \
1360 ld r3,_NIP(r1); \
1361 mtspr SPRN_SRR0,r3; \
1362 ld r9,_CTR(r1); \
1363 mtctr r9; \
1364 ld r9,_XER(r1); \
1365 mtxer r9; \
1366 ld r9,_LINK(r1); \
1367 mtlr r9; \
1368 REST_GPR(0, r1); \
1369 REST_8GPRS(2, r1); \
1370 REST_GPR(10, r1); \
1371 ld r11,_CCR(r1); \
1372 mtcr r11; \
1373 /* Decrement paca->in_mce. */ \
1374 lhz r12,PACA_IN_MCE(r13); \
1375 subi r12,r12,1; \
1376 sth r12,PACA_IN_MCE(r13); \
1377 REST_GPR(11, r1); \
1378 REST_2GPRS(12, r1); \
1379 /* restore original r1. */ \
1380 ld r1,GPR1(r1)
1381
1382 /*
1383 * Handle machine check early in real mode. We come here with
1384 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1385 */
1386 .align 7
1387 .globl machine_check_handle_early
1388 machine_check_handle_early:
1389 std r0,GPR0(r1) /* Save r0 */
1390 EXCEPTION_PROLOG_COMMON_3(0x200)
1391 bl .save_nvgprs
1392 addi r3,r1,STACK_FRAME_OVERHEAD
1393 bl .machine_check_early
1394 ld r12,_MSR(r1)
1395 #ifdef CONFIG_PPC_P7_NAP
1396 /*
1397 * Check if thread was in power saving mode. We come here when any
1398 * of the following is true:
1399 * a. thread wasn't in power saving mode
1400 * b. thread was in power saving mode with no state loss or
1401 * supervisor state loss
1402 *
1403 * Go back to nap again if (b) is true.
1404 */
1405 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1406 beq 4f /* No, it wasn;t */
1407 /* Thread was in power saving mode. Go back to nap again. */
1408 cmpwi r11,2
1409 bne 3f
1410 /* Supervisor state loss */
1411 li r0,1
1412 stb r0,PACA_NAPSTATELOST(r13)
1413 3: bl .machine_check_queue_event
1414 MACHINE_CHECK_HANDLER_WINDUP
1415 GET_PACA(r13)
1416 ld r1,PACAR1(r13)
1417 b .power7_enter_nap_mode
1418 4:
1419 #endif
1420 /*
1421 * Check if we are coming from hypervisor userspace. If yes then we
1422 * continue in host kernel in V mode to deliver the MC event.
1423 */
1424 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1425 beq 5f
1426 andi. r11,r12,MSR_PR /* See if coming from user. */
1427 bne 9f /* continue in V mode if we are. */
1428
1429 5:
1430 #ifdef CONFIG_KVM_BOOK3S_64_HV
1431 /*
1432 * We are coming from kernel context. Check if we are coming from
1433 * guest. if yes, then we can continue. We will fall through
1434 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1435 */
1436 lbz r11,HSTATE_IN_GUEST(r13)
1437 cmpwi r11,0 /* Check if coming from guest */
1438 bne 9f /* continue if we are. */
1439 #endif
1440 /*
1441 * At this point we are not sure about what context we come from.
1442 * Queue up the MCE event and return from the interrupt.
1443 * But before that, check if this is an un-recoverable exception.
1444 * If yes, then stay on emergency stack and panic.
1445 */
1446 andi. r11,r12,MSR_RI
1447 bne 2f
1448 1: addi r3,r1,STACK_FRAME_OVERHEAD
1449 bl .unrecoverable_exception
1450 b 1b
1451 2:
1452 /*
1453 * Return from MC interrupt.
1454 * Queue up the MCE event so that we can log it later, while
1455 * returning from kernel or opal call.
1456 */
1457 bl .machine_check_queue_event
1458 MACHINE_CHECK_HANDLER_WINDUP
1459 rfid
1460 9:
1461 /* Deliver the machine check to host kernel in V mode. */
1462 MACHINE_CHECK_HANDLER_WINDUP
1463 b machine_check_pSeries
1464
1465 /*
1466 * r13 points to the PACA, r9 contains the saved CR,
1467 * r12 contain the saved SRR1, SRR0 is still ready for return
1468 * r3 has the faulting address
1469 * r9 - r13 are saved in paca->exslb.
1470 * r3 is saved in paca->slb_r3
1471 * We assume we aren't going to take any exceptions during this procedure.
1472 */
1473 _GLOBAL(slb_miss_realmode)
1474 mflr r10
1475 #ifdef CONFIG_RELOCATABLE
1476 mtctr r11
1477 #endif
1478
1479 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1480 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1481
1482 bl .slb_allocate_realmode
1483
1484 /* All done -- return from exception. */
1485
1486 ld r10,PACA_EXSLB+EX_LR(r13)
1487 ld r3,PACA_EXSLB+EX_R3(r13)
1488 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1489
1490 mtlr r10
1491
1492 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1493 beq- 2f
1494
1495 .machine push
1496 .machine "power4"
1497 mtcrf 0x80,r9
1498 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1499 .machine pop
1500
1501 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1502 ld r9,PACA_EXSLB+EX_R9(r13)
1503 ld r10,PACA_EXSLB+EX_R10(r13)
1504 ld r11,PACA_EXSLB+EX_R11(r13)
1505 ld r12,PACA_EXSLB+EX_R12(r13)
1506 ld r13,PACA_EXSLB+EX_R13(r13)
1507 rfid
1508 b . /* prevent speculative execution */
1509
1510 2: mfspr r11,SPRN_SRR0
1511 ld r10,PACAKBASE(r13)
1512 LOAD_HANDLER(r10,unrecov_slb)
1513 mtspr SPRN_SRR0,r10
1514 ld r10,PACAKMSR(r13)
1515 mtspr SPRN_SRR1,r10
1516 rfid
1517 b .
1518
1519 unrecov_slb:
1520 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1521 DISABLE_INTS
1522 bl .save_nvgprs
1523 1: addi r3,r1,STACK_FRAME_OVERHEAD
1524 bl .unrecoverable_exception
1525 b 1b
1526
1527
1528 #ifdef CONFIG_PPC_970_NAP
1529 power4_fixup_nap:
1530 andc r9,r9,r10
1531 std r9,TI_LOCAL_FLAGS(r11)
1532 ld r10,_LINK(r1) /* make idle task do the */
1533 std r10,_NIP(r1) /* equivalent of a blr */
1534 blr
1535 #endif
1536
1537 /*
1538 * Hash table stuff
1539 */
1540 .align 7
1541 _STATIC(do_hash_page)
1542 std r3,_DAR(r1)
1543 std r4,_DSISR(r1)
1544
1545 andis. r0,r4,0xa410 /* weird error? */
1546 bne- handle_page_fault /* if not, try to insert a HPTE */
1547 andis. r0,r4,DSISR_DABRMATCH@h
1548 bne- handle_dabr_fault
1549
1550 BEGIN_FTR_SECTION
1551 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1552 bne- do_ste_alloc /* If so handle it */
1553 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
1554
1555 CURRENT_THREAD_INFO(r11, r1)
1556 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1557 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1558 bne 77f /* then don't call hash_page now */
1559 /*
1560 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1561 * accessing a userspace segment (even from the kernel). We assume
1562 * kernel addresses always have the high bit set.
1563 */
1564 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1565 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1566 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1567 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1568 ori r4,r4,1 /* add _PAGE_PRESENT */
1569 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1570
1571 /*
1572 * r3 contains the faulting address
1573 * r4 contains the required access permissions
1574 * r5 contains the trap number
1575 *
1576 * at return r3 = 0 for success, 1 for page fault, negative for error
1577 */
1578 bl .hash_page /* build HPTE if possible */
1579 cmpdi r3,0 /* see if hash_page succeeded */
1580
1581 /* Success */
1582 beq fast_exc_return_irq /* Return from exception on success */
1583
1584 /* Error */
1585 blt- 13f
1586
1587 /* Here we have a page fault that hash_page can't handle. */
1588 handle_page_fault:
1589 11: ld r4,_DAR(r1)
1590 ld r5,_DSISR(r1)
1591 addi r3,r1,STACK_FRAME_OVERHEAD
1592 bl .do_page_fault
1593 cmpdi r3,0
1594 beq+ 12f
1595 bl .save_nvgprs
1596 mr r5,r3
1597 addi r3,r1,STACK_FRAME_OVERHEAD
1598 lwz r4,_DAR(r1)
1599 bl .bad_page_fault
1600 b .ret_from_except
1601
1602 /* We have a data breakpoint exception - handle it */
1603 handle_dabr_fault:
1604 bl .save_nvgprs
1605 ld r4,_DAR(r1)
1606 ld r5,_DSISR(r1)
1607 addi r3,r1,STACK_FRAME_OVERHEAD
1608 bl .do_break
1609 12: b .ret_from_except_lite
1610
1611
1612 /* We have a page fault that hash_page could handle but HV refused
1613 * the PTE insertion
1614 */
1615 13: bl .save_nvgprs
1616 mr r5,r3
1617 addi r3,r1,STACK_FRAME_OVERHEAD
1618 ld r4,_DAR(r1)
1619 bl .low_hash_fault
1620 b .ret_from_except
1621
1622 /*
1623 * We come here as a result of a DSI at a point where we don't want
1624 * to call hash_page, such as when we are accessing memory (possibly
1625 * user memory) inside a PMU interrupt that occurred while interrupts
1626 * were soft-disabled. We want to invoke the exception handler for
1627 * the access, or panic if there isn't a handler.
1628 */
1629 77: bl .save_nvgprs
1630 mr r4,r3
1631 addi r3,r1,STACK_FRAME_OVERHEAD
1632 li r5,SIGSEGV
1633 bl .bad_page_fault
1634 b .ret_from_except
1635
1636 /* here we have a segment miss */
1637 do_ste_alloc:
1638 bl .ste_allocate /* try to insert stab entry */
1639 cmpdi r3,0
1640 bne- handle_page_fault
1641 b fast_exception_return
1642
1643 /*
1644 * r13 points to the PACA, r9 contains the saved CR,
1645 * r11 and r12 contain the saved SRR0 and SRR1.
1646 * r9 - r13 are saved in paca->exslb.
1647 * We assume we aren't going to take any exceptions during this procedure.
1648 * We assume (DAR >> 60) == 0xc.
1649 */
1650 .align 7
1651 _GLOBAL(do_stab_bolted)
1652 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1653 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1654 mfspr r11,SPRN_DAR /* ea */
1655
1656 /*
1657 * check for bad kernel/user address
1658 * (ea & ~REGION_MASK) >= PGTABLE_RANGE
1659 */
1660 rldicr. r9,r11,4,(63 - 46 - 4)
1661 li r9,0 /* VSID = 0 for bad address */
1662 bne- 0f
1663
1664 /*
1665 * Calculate VSID:
1666 * This is the kernel vsid, we take the top for context from
1667 * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
1668 * Here we know that (ea >> 60) == 0xc
1669 */
1670 lis r9,(MAX_USER_CONTEXT + 1)@ha
1671 addi r9,r9,(MAX_USER_CONTEXT + 1)@l
1672
1673 srdi r10,r11,SID_SHIFT
1674 rldimi r10,r9,ESID_BITS,0 /* proto vsid */
1675 ASM_VSID_SCRAMBLE(r10, r9, 256M)
1676 rldic r9,r10,12,16 /* r9 = vsid << 12 */
1677
1678 0:
1679 /* Hash to the primary group */
1680 ld r10,PACASTABVIRT(r13)
1681 srdi r11,r11,SID_SHIFT
1682 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1683
1684 /* Search the primary group for a free entry */
1685 1: ld r11,0(r10) /* Test valid bit of the current ste */
1686 andi. r11,r11,0x80
1687 beq 2f
1688 addi r10,r10,16
1689 andi. r11,r10,0x70
1690 bne 1b
1691
1692 /* Stick for only searching the primary group for now. */
1693 /* At least for now, we use a very simple random castout scheme */
1694 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1695 mftb r11
1696 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1697 ori r11,r11,0x10
1698
1699 /* r10 currently points to an ste one past the group of interest */
1700 /* make it point to the randomly selected entry */
1701 subi r10,r10,128
1702 or r10,r10,r11 /* r10 is the entry to invalidate */
1703
1704 isync /* mark the entry invalid */
1705 ld r11,0(r10)
1706 rldicl r11,r11,56,1 /* clear the valid bit */
1707 rotldi r11,r11,8
1708 std r11,0(r10)
1709 sync
1710
1711 clrrdi r11,r11,28 /* Get the esid part of the ste */
1712 slbie r11
1713
1714 2: std r9,8(r10) /* Store the vsid part of the ste */
1715 eieio
1716
1717 mfspr r11,SPRN_DAR /* Get the new esid */
1718 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1719 ori r11,r11,0x90 /* Turn on valid and kp */
1720 std r11,0(r10) /* Put new entry back into the stab */
1721
1722 sync
1723
1724 /* All done -- return from exception. */
1725 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1726 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1727
1728 andi. r10,r12,MSR_RI
1729 beq- unrecov_slb
1730
1731 mtcrf 0x80,r9 /* restore CR */
1732
1733 mfmsr r10
1734 clrrdi r10,r10,2
1735 mtmsrd r10,1
1736
1737 mtspr SPRN_SRR0,r11
1738 mtspr SPRN_SRR1,r12
1739 ld r9,PACA_EXSLB+EX_R9(r13)
1740 ld r10,PACA_EXSLB+EX_R10(r13)
1741 ld r11,PACA_EXSLB+EX_R11(r13)
1742 ld r12,PACA_EXSLB+EX_R12(r13)
1743 ld r13,PACA_EXSLB+EX_R13(r13)
1744 rfid
1745 b . /* prevent speculative execution */
Linux kernel - Deliverables
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