arch/powerpc/kernel/head_64.S

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
   6  *    Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
   7  *  Adapted for Power Macintosh by Paul Mackerras.
   8  *  Low-level exception handlers and MMU support
   9  *  rewritten by Paul Mackerras.
  10  *    Copyright (C) 1996 Paul Mackerras.
  11  *
  12  *  Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  13  *    Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  14  *
  15  *  This file contains the entry point for the 64-bit kernel along
  16  *  with some early initialization code common to all 64-bit powerpc
  17  *  variants.
  18  *
  19  *  This program is free software; you can redistribute it and/or
  20  *  modify it under the terms of the GNU General Public License
  21  *  as published by the Free Software Foundation; either version
  22  *  2 of the License, or (at your option) any later version.
  23  */
  24
  25 #include <linux/threads.h>
  26 #include <asm/reg.h>
  27 #include <asm/page.h>
  28 #include <asm/mmu.h>
  29 #include <asm/ppc_asm.h>
  30 #include <asm/asm-offsets.h>
  31 #include <asm/bug.h>
  32 #include <asm/cputable.h>
  33 #include <asm/setup.h>
  34 #include <asm/hvcall.h>
  35 #include <asm/iseries/lpar_map.h>
  36 #include <asm/thread_info.h>
  37 #include <asm/firmware.h>
  38 #include <asm/page_64.h>
  39 #include <asm/exception.h>
  40 #include <asm/irqflags.h>
  41
  42 /* The physical memory is layed out such that the secondary processor
  43  * spin code sits at 0x0000...0x00ff. On server, the vectors follow
  44  * using the layout described in exceptions-64s.S
  45  */
  46
  47 /*
  48  * Entering into this code we make the following assumptions:
  49  *
  50  *  For pSeries or server processors:
  51  *   1. The MMU is off & open firmware is running in real mode.
  52  *   2. The kernel is entered at __start
  53  *
  54  *  For iSeries:
  55  *   1. The MMU is on (as it always is for iSeries)
  56  *   2. The kernel is entered at system_reset_iSeries
  57  *
  58  *  For Book3E processors:
  59  *   1. The MMU is on running in AS0 in a state defined in ePAPR
  60  *   2. The kernel is entered at __start
  61  */
  62
  63         .text
  64         .globl  _stext
  65 _stext:
  66 _GLOBAL(__start)
  67         /* NOP this out unconditionally */
  68 BEGIN_FTR_SECTION
  69         b       .__start_initialization_multiplatform
  70 END_FTR_SECTION(0, 1)
  71
  72         /* Catch branch to 0 in real mode */
  73         trap
  74
  75         /* Secondary processors spin on this value until it becomes nonzero.
  76          * When it does it contains the real address of the descriptor
  77          * of the function that the cpu should jump to to continue
  78          * initialization.
  79          */
  80         .globl  __secondary_hold_spinloop
  81 __secondary_hold_spinloop:
  82         .llong  0x0
  83
  84         /* Secondary processors write this value with their cpu # */
  85         /* after they enter the spin loop immediately below.      */
  86         .globl  __secondary_hold_acknowledge
  87 __secondary_hold_acknowledge:
  88         .llong  0x0
  89
  90 #ifdef CONFIG_PPC_ISERIES
  91         /*
  92          * At offset 0x20, there is a pointer to iSeries LPAR data.
  93          * This is required by the hypervisor
  94          */
  95         . = 0x20
  96         .llong hvReleaseData-KERNELBASE
  97 #endif /* CONFIG_PPC_ISERIES */
  98
  99 #ifdef CONFIG_CRASH_DUMP
 100         /* This flag is set to 1 by a loader if the kernel should run
 101          * at the loaded address instead of the linked address.  This
 102          * is used by kexec-tools to keep the the kdump kernel in the
 103          * crash_kernel region.  The loader is responsible for
 104          * observing the alignment requirement.
 105          */
 106         /* Do not move this variable as kexec-tools knows about it. */
 107         . = 0x5c
 108         .globl  __run_at_load
 109 __run_at_load:
 110         .long   0x72756e30      /* "run0" -- relocate to 0 by default */
 111 #endif
 112
 113         . = 0x60
 114 /*
 115  * The following code is used to hold secondary processors
 116  * in a spin loop after they have entered the kernel, but
 117  * before the bulk of the kernel has been relocated.  This code
 118  * is relocated to physical address 0x60 before prom_init is run.
 119  * All of it must fit below the first exception vector at 0x100.
 120  * Use .globl here not _GLOBAL because we want __secondary_hold
 121  * to be the actual text address, not a descriptor.
 122  */
 123         .globl  __secondary_hold
 124 __secondary_hold:
 125         mfmsr   r24
 126         ori     r24,r24,MSR_RI
 127         mtmsrd  r24                     /* RI on */
 128
 129         /* Grab our physical cpu number */
 130         mr      r24,r3
 131
 132         /* Tell the master cpu we're here */
 133         /* Relocation is off & we are located at an address less */
 134         /* than 0x100, so only need to grab low order offset.    */
 135         std     r24,__secondary_hold_acknowledge-_stext(0)
 136         sync
 137
 138         /* All secondary cpus wait here until told to start. */
 139 100:    ld      r4,__secondary_hold_spinloop-_stext(0)
 140         cmpdi   0,r4,0
 141         beq     100b
 142
 143 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
 144         ld      r4,0(r4)                /* deref function descriptor */
 145         mtctr   r4
 146         mr      r3,r24
 147         bctr
 148 #else
 149         BUG_OPCODE
 150 #endif
 151
 152 /* This value is used to mark exception frames on the stack. */
 153         .section ".toc","aw"
 154 exception_marker:
 155         .tc     ID_72656773_68657265[TC],0x7265677368657265
 156         .text
 157
 158 /*
 159  * On server, we include the exception vectors code here as it
 160  * relies on absolute addressing which is only possible within
 161  * this compilation unit
 162  */
 163 #ifdef CONFIG_PPC_BOOK3S
 164 #include "exceptions-64s.S"
 165 #endif
 166
 167
 168 /*
 169  * On pSeries and most other platforms, secondary processors spin
 170  * in the following code.
 171  * At entry, r3 = this processor's number (physical cpu id)
 172  */
 173 _GLOBAL(generic_secondary_smp_init)
 174         mr      r24,r3
 175
 176         /* turn on 64-bit mode */
 177         bl      .enable_64b_mode
 178
 179         /* get the TOC pointer (real address) */
 180         bl      .relative_toc
 181
 182         /* Set up a paca value for this processor. Since we have the
 183          * physical cpu id in r24, we need to search the pacas to find
 184          * which logical id maps to our physical one.
 185          */
 186         LOAD_REG_ADDR(r13, paca)        /* Get base vaddr of paca array  */
 187         li      r5,0                    /* logical cpu id                */
 188 1:      lhz     r6,PACAHWCPUID(r13)     /* Load HW procid from paca      */
 189         cmpw    r6,r24                  /* Compare to our id             */
 190         beq     2f
 191         addi    r13,r13,PACA_SIZE       /* Loop to next PACA on miss     */
 192         addi    r5,r5,1
 193         cmpwi   r5,NR_CPUS
 194         blt     1b
 195
 196         mr      r3,r24                  /* not found, copy phys to r3    */
 197         b       .kexec_wait             /* next kernel might do better   */
 198
 199 2:      mtspr   SPRN_SPRG3,r13          /* Save vaddr of paca in SPRG3   */
 200         /* From now on, r24 is expected to be logical cpuid */
 201         mr      r24,r5
 202 3:      HMT_LOW
 203         lbz     r23,PACAPROCSTART(r13)  /* Test if this processor should */
 204                                         /* start.                        */
 205
 206 #ifndef CONFIG_SMP
 207         b       3b                      /* Never go on non-SMP           */
 208 #else
 209         cmpwi   0,r23,0
 210         beq     3b                      /* Loop until told to go         */
 211
 212         sync                            /* order paca.run and cur_cpu_spec */
 213
 214         /* See if we need to call a cpu state restore handler */
 215         LOAD_REG_ADDR(r23, cur_cpu_spec)
 216         ld      r23,0(r23)
 217         ld      r23,CPU_SPEC_RESTORE(r23)
 218         cmpdi   0,r23,0
 219         beq     4f
 220         ld      r23,0(r23)
 221         mtctr   r23
 222         bctrl
 223
 224 4:      /* Create a temp kernel stack for use before relocation is on.  */
 225         ld      r1,PACAEMERGSP(r13)
 226         subi    r1,r1,STACK_FRAME_OVERHEAD
 227
 228         b       __secondary_start
 229 #endif
 230
 231 /*
 232  * Turn the MMU off.
 233  * Assumes we're mapped EA == RA if the MMU is on.
 234  */
 235 _STATIC(__mmu_off)
 236         mfmsr   r3
 237         andi.   r0,r3,MSR_IR|MSR_DR
 238         beqlr
 239         mflr    r4
 240         andc    r3,r3,r0
 241         mtspr   SPRN_SRR0,r4
 242         mtspr   SPRN_SRR1,r3
 243         sync
 244         rfid
 245         b       .       /* prevent speculative execution */
 246
 247
 248 /*
 249  * Here is our main kernel entry point. We support currently 2 kind of entries
 250  * depending on the value of r5.
 251  *
 252  *   r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
 253  *                 in r3...r7
 254  *
 255  *   r5 == NULL -> kexec style entry. r3 is a physical pointer to the
 256  *                 DT block, r4 is a physical pointer to the kernel itself
 257  *
 258  */
 259 _GLOBAL(__start_initialization_multiplatform)
 260         /* Make sure we are running in 64 bits mode */
 261         bl      .enable_64b_mode
 262
 263         /* Get TOC pointer (current runtime address) */
 264         bl      .relative_toc
 265
 266         /* find out where we are now */
 267         bcl     20,31,$+4
 268 0:      mflr    r26                     /* r26 = runtime addr here */
 269         addis   r26,r26,(_stext - 0b)@ha
 270         addi    r26,r26,(_stext - 0b)@l /* current runtime base addr */
 271
 272         /*
 273          * Are we booted from a PROM Of-type client-interface ?
 274          */
 275         cmpldi  cr0,r5,0
 276         beq     1f
 277         b       .__boot_from_prom               /* yes -> prom */
 278 1:
 279         /* Save parameters */
 280         mr      r31,r3
 281         mr      r30,r4
 282
 283         /* Setup some critical 970 SPRs before switching MMU off */
 284         mfspr   r0,SPRN_PVR
 285         srwi    r0,r0,16
 286         cmpwi   r0,0x39         /* 970 */
 287         beq     1f
 288         cmpwi   r0,0x3c         /* 970FX */
 289         beq     1f
 290         cmpwi   r0,0x44         /* 970MP */
 291         beq     1f
 292         cmpwi   r0,0x45         /* 970GX */
 293         bne     2f
 294 1:      bl      .__cpu_preinit_ppc970
 295 2:
 296
 297         /* Switch off MMU if not already off */
 298         bl      .__mmu_off
 299         b       .__after_prom_start
 300
 301 _INIT_STATIC(__boot_from_prom)
 302 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
 303         /* Save parameters */
 304         mr      r31,r3
 305         mr      r30,r4
 306         mr      r29,r5
 307         mr      r28,r6
 308         mr      r27,r7
 309
 310         /*
 311          * Align the stack to 16-byte boundary
 312          * Depending on the size and layout of the ELF sections in the initial
 313          * boot binary, the stack pointer may be unaligned on PowerMac
 314          */
 315         rldicr  r1,r1,0,59
 316
 317 #ifdef CONFIG_RELOCATABLE
 318         /* Relocate code for where we are now */
 319         mr      r3,r26
 320         bl      .relocate
 321 #endif
 322
 323         /* Restore parameters */
 324         mr      r3,r31
 325         mr      r4,r30
 326         mr      r5,r29
 327         mr      r6,r28
 328         mr      r7,r27
 329
 330         /* Do all of the interaction with OF client interface */
 331         mr      r8,r26
 332         bl      .prom_init
 333 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
 334
 335         /* We never return. We also hit that trap if trying to boot
 336          * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
 337         trap
 338
 339 _STATIC(__after_prom_start)
 340 #ifdef CONFIG_RELOCATABLE
 341         /* process relocations for the final address of the kernel */
 342         lis     r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
 343         sldi    r25,r25,32
 344 #ifdef CONFIG_CRASH_DUMP
 345         lwz     r7,__run_at_load-_stext(r26)
 346         cmplwi  cr0,r7,1        /* kdump kernel ? - stay where we are */
 347         bne     1f
 348         add     r25,r25,r26
 349 #endif
 350 1:      mr      r3,r25
 351         bl      .relocate
 352 #endif
 353
 354 /*
 355  * We need to run with _stext at physical address PHYSICAL_START.
 356  * This will leave some code in the first 256B of
 357  * real memory, which are reserved for software use.
 358  *
 359  * Note: This process overwrites the OF exception vectors.
 360  */
 361         li      r3,0                    /* target addr */
 362         mr.     r4,r26                  /* In some cases the loader may  */
 363         beq     9f                      /* have already put us at zero */
 364         li      r6,0x100                /* Start offset, the first 0x100 */
 365                                         /* bytes were copied earlier.    */
 366
 367 #ifdef CONFIG_CRASH_DUMP
 368 /*
 369  * Check if the kernel has to be running as relocatable kernel based on the
 370  * variable __run_at_load, if it is set the kernel is treated as relocatable
 371  * kernel, otherwise it will be moved to PHYSICAL_START
 372  */
 373         lwz     r7,__run_at_load-_stext(r26)
 374         cmplwi  cr0,r7,1
 375         bne     3f
 376
 377         li      r5,__end_interrupts - _stext    /* just copy interrupts */
 378         b       5f
 379 3:
 380 #endif
 381         lis     r5,(copy_to_here - _stext)@ha
 382         addi    r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
 383
 384         bl      .copy_and_flush         /* copy the first n bytes        */
 385                                         /* this includes the code being  */
 386                                         /* executed here.                */
 387         addis   r8,r3,(4f - _stext)@ha  /* Jump to the copy of this code */
 388         addi    r8,r8,(4f - _stext)@l   /* that we just made */
 389         mtctr   r8
 390         bctr
 391
 392 p_end:  .llong  _end - _stext
 393
 394 4:      /* Now copy the rest of the kernel up to _end */
 395         addis   r5,r26,(p_end - _stext)@ha
 396         ld      r5,(p_end - _stext)@l(r5)       /* get _end */
 397 5:      bl      .copy_and_flush         /* copy the rest */
 398
 399 9:      b       .start_here_multiplatform
 400
 401 /*
 402  * Copy routine used to copy the kernel to start at physical address 0
 403  * and flush and invalidate the caches as needed.
 404  * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
 405  * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
 406  *
 407  * Note: this routine *only* clobbers r0, r6 and lr
 408  */
 409 _GLOBAL(copy_and_flush)
 410         addi    r5,r5,-8
 411         addi    r6,r6,-8
 412 4:      li      r0,8                    /* Use the smallest common      */
 413                                         /* denominator cache line       */
 414                                         /* size.  This results in       */
 415                                         /* extra cache line flushes     */
 416                                         /* but operation is correct.    */
 417                                         /* Can't get cache line size    */
 418                                         /* from NACA as it is being     */
 419                                         /* moved too.                   */
 420
 421         mtctr   r0                      /* put # words/line in ctr      */
 422 3:      addi    r6,r6,8                 /* copy a cache line            */
 423         ldx     r0,r6,r4
 424         stdx    r0,r6,r3
 425         bdnz    3b
 426         dcbst   r6,r3                   /* write it to memory           */
 427         sync
 428         icbi    r6,r3                   /* flush the icache line        */
 429         cmpld   0,r6,r5
 430         blt     4b
 431         sync
 432         addi    r5,r5,8
 433         addi    r6,r6,8
 434         blr
 435
 436 .align 8
 437 copy_to_here:
 438
 439 #ifdef CONFIG_SMP
 440 #ifdef CONFIG_PPC_PMAC
 441 /*
 442  * On PowerMac, secondary processors starts from the reset vector, which
 443  * is temporarily turned into a call to one of the functions below.
 444  */
 445         .section ".text";
 446         .align 2 ;
 447
 448         .globl  __secondary_start_pmac_0
 449 __secondary_start_pmac_0:
 450         /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
 451         li      r24,0
 452         b       1f
 453         li      r24,1
 454         b       1f
 455         li      r24,2
 456         b       1f
 457         li      r24,3
 458 1:
 459
 460 _GLOBAL(pmac_secondary_start)
 461         /* turn on 64-bit mode */
 462         bl      .enable_64b_mode
 463
 464         li      r0,0
 465         mfspr   r3,SPRN_HID4
 466         rldimi  r3,r0,40,23     /* clear bit 23 (rm_ci) */
 467         sync
 468         mtspr   SPRN_HID4,r3
 469         isync
 470         sync
 471         slbia
 472
 473         /* get TOC pointer (real address) */
 474         bl      .relative_toc
 475
 476         /* Copy some CPU settings from CPU 0 */
 477         bl      .__restore_cpu_ppc970
 478
 479         /* pSeries do that early though I don't think we really need it */
 480         mfmsr   r3
 481         ori     r3,r3,MSR_RI
 482         mtmsrd  r3                      /* RI on */
 483
 484         /* Set up a paca value for this processor. */
 485         LOAD_REG_ADDR(r4,paca)          /* Get base vaddr of paca array */
 486         mulli   r13,r24,PACA_SIZE       /* Calculate vaddr of right paca */
 487         add     r13,r13,r4              /* for this processor.          */
 488         mtspr   SPRN_SPRG3,r13          /* Save vaddr of paca in SPRG3  */
 489
 490         /* Create a temp kernel stack for use before relocation is on.  */
 491         ld      r1,PACAEMERGSP(r13)
 492         subi    r1,r1,STACK_FRAME_OVERHEAD
 493
 494         b       __secondary_start
 495
 496 #endif /* CONFIG_PPC_PMAC */
 497
 498 /*
 499  * This function is called after the master CPU has released the
 500  * secondary processors.  The execution environment is relocation off.
 501  * The paca for this processor has the following fields initialized at
 502  * this point:
 503  *   1. Processor number
 504  *   2. Segment table pointer (virtual address)
 505  * On entry the following are set:
 506  *   r1 = stack pointer.  vaddr for iSeries, raddr (temp stack) for pSeries
 507  *   r24   = cpu# (in Linux terms)
 508  *   r13   = paca virtual address
 509  *   SPRG3 = paca virtual address
 510  */
 511         .globl  __secondary_start
 512 __secondary_start:
 513         /* Set thread priority to MEDIUM */
 514         HMT_MEDIUM
 515
 516         /* Do early setup for that CPU (stab, slb, hash table pointer) */
 517         bl      .early_setup_secondary
 518
 519         /* Initialize the kernel stack.  Just a repeat for iSeries.      */
 520         LOAD_REG_ADDR(r3, current_set)
 521         sldi    r28,r24,3               /* get current_set[cpu#]         */
 522         ldx     r1,r3,r28
 523         addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
 524         std     r1,PACAKSAVE(r13)
 525
 526         /* Clear backchain so we get nice backtraces */
 527         li      r7,0
 528         mtlr    r7
 529
 530         /* enable MMU and jump to start_secondary */
 531         LOAD_REG_ADDR(r3, .start_secondary_prolog)
 532         LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
 533 #ifdef CONFIG_PPC_ISERIES
 534 BEGIN_FW_FTR_SECTION
 535         ori     r4,r4,MSR_EE
 536         li      r8,1
 537         stb     r8,PACAHARDIRQEN(r13)
 538 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
 539 #endif
 540 BEGIN_FW_FTR_SECTION
 541         stb     r7,PACAHARDIRQEN(r13)
 542 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
 543         stb     r7,PACASOFTIRQEN(r13)
 544
 545         mtspr   SPRN_SRR0,r3
 546         mtspr   SPRN_SRR1,r4
 547         rfid
 548         b       .       /* prevent speculative execution */
 549
 550 /*
 551  * Running with relocation on at this point.  All we want to do is
 552  * zero the stack back-chain pointer and get the TOC virtual address
 553  * before going into C code.
 554  */
 555 _GLOBAL(start_secondary_prolog)
 556         ld      r2,PACATOC(r13)
 557         li      r3,0
 558         std     r3,0(r1)                /* Zero the stack frame pointer */
 559         bl      .start_secondary
 560         b       .
 561 #endif
 562
 563 /*
 564  * This subroutine clobbers r11 and r12
 565  */
 566 _GLOBAL(enable_64b_mode)
 567         mfmsr   r11                     /* grab the current MSR */
 568         li      r12,(MSR_SF | MSR_ISF)@highest
 569         sldi    r12,r12,48
 570         or      r11,r11,r12
 571         mtmsrd  r11
 572         isync
 573         blr
 574
 575 /*
 576  * This puts the TOC pointer into r2, offset by 0x8000 (as expected
 577  * by the toolchain).  It computes the correct value for wherever we
 578  * are running at the moment, using position-independent code.
 579  */
 580 _GLOBAL(relative_toc)
 581         mflr    r0
 582         bcl     20,31,$+4
 583 0:      mflr    r9
 584         ld      r2,(p_toc - 0b)(r9)
 585         add     r2,r2,r9
 586         mtlr    r0
 587         blr
 588
 589 p_toc:  .llong  __toc_start + 0x8000 - 0b
 590
 591 /*
 592  * This is where the main kernel code starts.
 593  */
 594 _INIT_STATIC(start_here_multiplatform)
 595         /* set up the TOC (real address) */
 596         bl      .relative_toc
 597
 598         /* Clear out the BSS. It may have been done in prom_init,
 599          * already but that's irrelevant since prom_init will soon
 600          * be detached from the kernel completely. Besides, we need
 601          * to clear it now for kexec-style entry.
 602          */
 603         LOAD_REG_ADDR(r11,__bss_stop)
 604         LOAD_REG_ADDR(r8,__bss_start)
 605         sub     r11,r11,r8              /* bss size                     */
 606         addi    r11,r11,7               /* round up to an even double word */
 607         srdi.   r11,r11,3               /* shift right by 3             */
 608         beq     4f
 609         addi    r8,r8,-8
 610         li      r0,0
 611         mtctr   r11                     /* zero this many doublewords   */
 612 3:      stdu    r0,8(r8)
 613         bdnz    3b
 614 4:
 615
 616         mfmsr   r6
 617         ori     r6,r6,MSR_RI
 618         mtmsrd  r6                      /* RI on */
 619
 620 #ifdef CONFIG_RELOCATABLE
 621         /* Save the physical address we're running at in kernstart_addr */
 622         LOAD_REG_ADDR(r4, kernstart_addr)
 623         clrldi  r0,r25,2
 624         std     r0,0(r4)
 625 #endif
 626
 627         /* The following gets the stack set up with the regs */
 628         /* pointing to the real addr of the kernel stack.  This is   */
 629         /* all done to support the C function call below which sets  */
 630         /* up the htab.  This is done because we have relocated the  */
 631         /* kernel but are still running in real mode. */
 632
 633         LOAD_REG_ADDR(r3,init_thread_union)
 634
 635         /* set up a stack pointer */
 636         addi    r1,r3,THREAD_SIZE
 637         li      r0,0
 638         stdu    r0,-STACK_FRAME_OVERHEAD(r1)
 639
 640         /* Do very early kernel initializations, including initial hash table,
 641          * stab and slb setup before we turn on relocation.     */
 642
 643         /* Restore parameters passed from prom_init/kexec */
 644         mr      r3,r31
 645         bl      .early_setup            /* also sets r13 and SPRG3 */
 646
 647         LOAD_REG_ADDR(r3, .start_here_common)
 648         ld      r4,PACAKMSR(r13)
 649         mtspr   SPRN_SRR0,r3
 650         mtspr   SPRN_SRR1,r4
 651         rfid
 652         b       .       /* prevent speculative execution */
 653
 654         /* This is where all platforms converge execution */
 655 _INIT_GLOBAL(start_here_common)
 656         /* relocation is on at this point */
 657         std     r1,PACAKSAVE(r13)
 658
 659         /* Load the TOC (virtual address) */
 660         ld      r2,PACATOC(r13)
 661
 662         bl      .setup_system
 663
 664         /* Load up the kernel context */
 665 5:
 666         li      r5,0
 667         stb     r5,PACASOFTIRQEN(r13)   /* Soft Disabled */
 668 #ifdef CONFIG_PPC_ISERIES
 669 BEGIN_FW_FTR_SECTION
 670         mfmsr   r5
 671         ori     r5,r5,MSR_EE            /* Hard Enabled on iSeries*/
 672         mtmsrd  r5
 673         li      r5,1
 674 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
 675 #endif
 676         stb     r5,PACAHARDIRQEN(r13)   /* Hard Disabled on others */
 677
 678         bl      .start_kernel
 679
 680         /* Not reached */
 681         BUG_OPCODE
 682
 683 /*
 684  * We put a few things here that have to be page-aligned.
 685  * This stuff goes at the beginning of the bss, which is page-aligned.
 686  */
 687         .section ".bss"
 688
 689         .align  PAGE_SHIFT
 690
 691         .globl  empty_zero_page
 692 empty_zero_page:
 693         .space  PAGE_SIZE
 694
 695         .globl  swapper_pg_dir
 696 swapper_pg_dir:
 697         .space  PGD_TABLE_SIZE