arch/powerpc/kernel/iommu.c

   1 /*
   2  * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
   3  *
   4  * Rewrite, cleanup, new allocation schemes, virtual merging:
   5  * Copyright (C) 2004 Olof Johansson, IBM Corporation
   6  *               and  Ben. Herrenschmidt, IBM Corporation
   7  *
   8  * Dynamic DMA mapping support, bus-independent parts.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  23  */
  24
  25
  26 #include <linux/init.h>
  27 #include <linux/types.h>
  28 #include <linux/slab.h>
  29 #include <linux/mm.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/string.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/bitops.h>
  34 #include <linux/iommu-helper.h>
  35 #include <asm/io.h>
  36 #include <asm/prom.h>
  37 #include <asm/iommu.h>
  38 #include <asm/pci-bridge.h>
  39 #include <asm/machdep.h>
  40 #include <asm/kdump.h>
  41
  42 #define DBG(...)
  43
  44 #ifdef CONFIG_IOMMU_VMERGE
  45 static int novmerge = 0;
  46 #else
  47 static int novmerge = 1;
  48 #endif
  49
  50 static int protect4gb = 1;
  51
  52 static inline unsigned long iommu_num_pages(unsigned long vaddr,
  53                                             unsigned long slen)
  54 {
  55         unsigned long npages;
  56
  57         npages = IOMMU_PAGE_ALIGN(vaddr + slen) - (vaddr & IOMMU_PAGE_MASK);
  58         npages >>= IOMMU_PAGE_SHIFT;
  59
  60         return npages;
  61 }
  62
  63 static int __init setup_protect4gb(char *str)
  64 {
  65         if (strcmp(str, "on") == 0)
  66                 protect4gb = 1;
  67         else if (strcmp(str, "off") == 0)
  68                 protect4gb = 0;
  69
  70         return 1;
  71 }
  72
  73 static int __init setup_iommu(char *str)
  74 {
  75         if (!strcmp(str, "novmerge"))
  76                 novmerge = 1;
  77         else if (!strcmp(str, "vmerge"))
  78                 novmerge = 0;
  79         return 1;
  80 }
  81
  82 __setup("protect4gb=", setup_protect4gb);
  83 __setup("iommu=", setup_iommu);
  84
  85 static unsigned long iommu_range_alloc(struct device *dev,
  86                                        struct iommu_table *tbl,
  87                                        unsigned long npages,
  88                                        unsigned long *handle,
  89                                        unsigned long mask,
  90                                        unsigned int align_order)
  91 {
  92         unsigned long n, end, start;
  93         unsigned long limit;
  94         int largealloc = npages > 15;
  95         int pass = 0;
  96         unsigned long align_mask;
  97         unsigned long boundary_size;
  98
  99         align_mask = 0xffffffffffffffffl >> (64 - align_order);
 100
 101         /* This allocator was derived from x86_64's bit string search */
 102
 103         /* Sanity check */
 104         if (unlikely(npages == 0)) {
 105                 if (printk_ratelimit())
 106                         WARN_ON(1);
 107                 return DMA_ERROR_CODE;
 108         }
 109
 110         if (handle && *handle)
 111                 start = *handle;
 112         else
 113                 start = largealloc ? tbl->it_largehint : tbl->it_hint;
 114
 115         /* Use only half of the table for small allocs (15 pages or less) */
 116         limit = largealloc ? tbl->it_size : tbl->it_halfpoint;
 117
 118         if (largealloc && start < tbl->it_halfpoint)
 119                 start = tbl->it_halfpoint;
 120
 121         /* The case below can happen if we have a small segment appended
 122          * to a large, or when the previous alloc was at the very end of
 123          * the available space. If so, go back to the initial start.
 124          */
 125         if (start >= limit)
 126                 start = largealloc ? tbl->it_largehint : tbl->it_hint;
 127
 128  again:
 129
 130         if (limit + tbl->it_offset > mask) {
 131                 limit = mask - tbl->it_offset + 1;
 132                 /* If we're constrained on address range, first try
 133                  * at the masked hint to avoid O(n) search complexity,
 134                  * but on second pass, start at 0.
 135                  */
 136                 if ((start & mask) >= limit || pass > 0)
 137                         start = 0;
 138                 else
 139                         start &= mask;
 140         }
 141
 142         if (dev)
 143                 boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
 144                                       1 << IOMMU_PAGE_SHIFT);
 145         else
 146                 boundary_size = ALIGN(1UL << 32, 1 << IOMMU_PAGE_SHIFT);
 147         /* 4GB boundary for iseries_hv_alloc and iseries_hv_map */
 148
 149         n = iommu_area_alloc(tbl->it_map, limit, start, npages,
 150                              tbl->it_offset, boundary_size >> IOMMU_PAGE_SHIFT,
 151                              align_mask);
 152         if (n == -1) {
 153                 if (likely(pass < 2)) {
 154                         /* First failure, just rescan the half of the table.
 155                          * Second failure, rescan the other half of the table.
 156                          */
 157                         start = (largealloc ^ pass) ? tbl->it_halfpoint : 0;
 158                         limit = pass ? tbl->it_size : limit;
 159                         pass++;
 160                         goto again;
 161                 } else {
 162                         /* Third failure, give up */
 163                         return DMA_ERROR_CODE;
 164                 }
 165         }
 166
 167         end = n + npages;
 168
 169         /* Bump the hint to a new block for small allocs. */
 170         if (largealloc) {
 171                 /* Don't bump to new block to avoid fragmentation */
 172                 tbl->it_largehint = end;
 173         } else {
 174                 /* Overflow will be taken care of at the next allocation */
 175                 tbl->it_hint = (end + tbl->it_blocksize - 1) &
 176                                 ~(tbl->it_blocksize - 1);
 177         }
 178
 179         /* Update handle for SG allocations */
 180         if (handle)
 181                 *handle = end;
 182
 183         return n;
 184 }
 185
 186 static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,
 187                               void *page, unsigned int npages,
 188                               enum dma_data_direction direction,
 189                               unsigned long mask, unsigned int align_order,
 190                               struct dma_attrs *attrs)
 191 {
 192         unsigned long entry, flags;
 193         dma_addr_t ret = DMA_ERROR_CODE;
 194
 195         spin_lock_irqsave(&(tbl->it_lock), flags);
 196
 197         entry = iommu_range_alloc(dev, tbl, npages, NULL, mask, align_order);
 198
 199         if (unlikely(entry == DMA_ERROR_CODE)) {
 200                 spin_unlock_irqrestore(&(tbl->it_lock), flags);
 201                 return DMA_ERROR_CODE;
 202         }
 203
 204         entry += tbl->it_offset;        /* Offset into real TCE table */
 205         ret = entry << IOMMU_PAGE_SHIFT;        /* Set the return dma address */
 206
 207         /* Put the TCEs in the HW table */
 208         ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & IOMMU_PAGE_MASK,
 209                          direction, attrs);
 210
 211
 212         /* Flush/invalidate TLB caches if necessary */
 213         if (ppc_md.tce_flush)
 214                 ppc_md.tce_flush(tbl);
 215
 216         spin_unlock_irqrestore(&(tbl->it_lock), flags);
 217
 218         /* Make sure updates are seen by hardware */
 219         mb();
 220
 221         return ret;
 222 }
 223
 224 static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
 225                          unsigned int npages)
 226 {
 227         unsigned long entry, free_entry;
 228
 229         entry = dma_addr >> IOMMU_PAGE_SHIFT;
 230         free_entry = entry - tbl->it_offset;
 231
 232         if (((free_entry + npages) > tbl->it_size) ||
 233             (entry < tbl->it_offset)) {
 234                 if (printk_ratelimit()) {
 235                         printk(KERN_INFO "iommu_free: invalid entry\n");
 236                         printk(KERN_INFO "\tentry     = 0x%lx\n", entry);
 237                         printk(KERN_INFO "\tdma_addr  = 0x%lx\n", (u64)dma_addr);
 238                         printk(KERN_INFO "\tTable     = 0x%lx\n", (u64)tbl);
 239                         printk(KERN_INFO "\tbus#      = 0x%lx\n", (u64)tbl->it_busno);
 240                         printk(KERN_INFO "\tsize      = 0x%lx\n", (u64)tbl->it_size);
 241                         printk(KERN_INFO "\tstartOff  = 0x%lx\n", (u64)tbl->it_offset);
 242                         printk(KERN_INFO "\tindex     = 0x%lx\n", (u64)tbl->it_index);
 243                         WARN_ON(1);
 244                 }
 245                 return;
 246         }
 247
 248         ppc_md.tce_free(tbl, entry, npages);
 249         iommu_area_free(tbl->it_map, free_entry, npages);
 250 }
 251
 252 static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
 253                 unsigned int npages)
 254 {
 255         unsigned long flags;
 256
 257         spin_lock_irqsave(&(tbl->it_lock), flags);
 258
 259         __iommu_free(tbl, dma_addr, npages);
 260
 261         /* Make sure TLB cache is flushed if the HW needs it. We do
 262          * not do an mb() here on purpose, it is not needed on any of
 263          * the current platforms.
 264          */
 265         if (ppc_md.tce_flush)
 266                 ppc_md.tce_flush(tbl);
 267
 268         spin_unlock_irqrestore(&(tbl->it_lock), flags);
 269 }
 270
 271 int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
 272                  struct scatterlist *sglist, int nelems,
 273                  unsigned long mask, enum dma_data_direction direction,
 274                  struct dma_attrs *attrs)
 275 {
 276         dma_addr_t dma_next = 0, dma_addr;
 277         unsigned long flags;
 278         struct scatterlist *s, *outs, *segstart;
 279         int outcount, incount, i;
 280         unsigned int align;
 281         unsigned long handle;
 282         unsigned int max_seg_size;
 283
 284         BUG_ON(direction == DMA_NONE);
 285
 286         if ((nelems == 0) || !tbl)
 287                 return 0;
 288
 289         outs = s = segstart = &sglist[0];
 290         outcount = 1;
 291         incount = nelems;
 292         handle = 0;
 293
 294         /* Init first segment length for backout at failure */
 295         outs->dma_length = 0;
 296
 297         DBG("sg mapping %d elements:\n", nelems);
 298
 299         spin_lock_irqsave(&(tbl->it_lock), flags);
 300
 301         max_seg_size = dma_get_max_seg_size(dev);
 302         for_each_sg(sglist, s, nelems, i) {
 303                 unsigned long vaddr, npages, entry, slen;
 304
 305                 slen = s->length;
 306                 /* Sanity check */
 307                 if (slen == 0) {
 308                         dma_next = 0;
 309                         continue;
 310                 }
 311                 /* Allocate iommu entries for that segment */
 312                 vaddr = (unsigned long) sg_virt(s);
 313                 npages = iommu_num_pages(vaddr, slen);
 314                 align = 0;
 315                 if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && slen >= PAGE_SIZE &&
 316                     (vaddr & ~PAGE_MASK) == 0)
 317                         align = PAGE_SHIFT - IOMMU_PAGE_SHIFT;
 318                 entry = iommu_range_alloc(dev, tbl, npages, &handle,
 319                                           mask >> IOMMU_PAGE_SHIFT, align);
 320
 321                 DBG("  - vaddr: %lx, size: %lx\n", vaddr, slen);
 322
 323                 /* Handle failure */
 324                 if (unlikely(entry == DMA_ERROR_CODE)) {
 325                         if (printk_ratelimit())
 326                                 printk(KERN_INFO "iommu_alloc failed, tbl %p vaddr %lx"
 327                                        " npages %lx\n", tbl, vaddr, npages);
 328                         goto failure;
 329                 }
 330
 331                 /* Convert entry to a dma_addr_t */
 332                 entry += tbl->it_offset;
 333                 dma_addr = entry << IOMMU_PAGE_SHIFT;
 334                 dma_addr |= (s->offset & ~IOMMU_PAGE_MASK);
 335
 336                 DBG("  - %lu pages, entry: %lx, dma_addr: %lx\n",
 337                             npages, entry, dma_addr);
 338
 339                 /* Insert into HW table */
 340                 ppc_md.tce_build(tbl, entry, npages, vaddr & IOMMU_PAGE_MASK,
 341                                  direction, attrs);
 342
 343                 /* If we are in an open segment, try merging */
 344                 if (segstart != s) {
 345                         DBG("  - trying merge...\n");
 346                         /* We cannot merge if:
 347                          * - allocated dma_addr isn't contiguous to previous allocation
 348                          */
 349                         if (novmerge || (dma_addr != dma_next) ||
 350                             (outs->dma_length + s->length > max_seg_size)) {
 351                                 /* Can't merge: create a new segment */
 352                                 segstart = s;
 353                                 outcount++;
 354                                 outs = sg_next(outs);
 355                                 DBG("    can't merge, new segment.\n");
 356                         } else {
 357                                 outs->dma_length += s->length;
 358                                 DBG("    merged, new len: %ux\n", outs->dma_length);
 359                         }
 360                 }
 361
 362                 if (segstart == s) {
 363                         /* This is a new segment, fill entries */
 364                         DBG("  - filling new segment.\n");
 365                         outs->dma_address = dma_addr;
 366                         outs->dma_length = slen;
 367                 }
 368
 369                 /* Calculate next page pointer for contiguous check */
 370                 dma_next = dma_addr + slen;
 371
 372                 DBG("  - dma next is: %lx\n", dma_next);
 373         }
 374
 375         /* Flush/invalidate TLB caches if necessary */
 376         if (ppc_md.tce_flush)
 377                 ppc_md.tce_flush(tbl);
 378
 379         spin_unlock_irqrestore(&(tbl->it_lock), flags);
 380
 381         DBG("mapped %d elements:\n", outcount);
 382
 383         /* For the sake of iommu_unmap_sg, we clear out the length in the
 384          * next entry of the sglist if we didn't fill the list completely
 385          */
 386         if (outcount < incount) {
 387                 outs = sg_next(outs);
 388                 outs->dma_address = DMA_ERROR_CODE;
 389                 outs->dma_length = 0;
 390         }
 391
 392         /* Make sure updates are seen by hardware */
 393         mb();
 394
 395         return outcount;
 396
 397  failure:
 398         for_each_sg(sglist, s, nelems, i) {
 399                 if (s->dma_length != 0) {
 400                         unsigned long vaddr, npages;
 401
 402                         vaddr = s->dma_address & IOMMU_PAGE_MASK;
 403                         npages = iommu_num_pages(s->dma_address, s->dma_length);
 404                         __iommu_free(tbl, vaddr, npages);
 405                         s->dma_address = DMA_ERROR_CODE;
 406                         s->dma_length = 0;
 407                 }
 408                 if (s == outs)
 409                         break;
 410         }
 411         spin_unlock_irqrestore(&(tbl->it_lock), flags);
 412         return 0;
 413 }
 414
 415
 416 void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
 417                 int nelems, enum dma_data_direction direction,
 418                 struct dma_attrs *attrs)
 419 {
 420         struct scatterlist *sg;
 421         unsigned long flags;
 422
 423         BUG_ON(direction == DMA_NONE);
 424
 425         if (!tbl)
 426                 return;
 427
 428         spin_lock_irqsave(&(tbl->it_lock), flags);
 429
 430         sg = sglist;
 431         while (nelems--) {
 432                 unsigned int npages;
 433                 dma_addr_t dma_handle = sg->dma_address;
 434
 435                 if (sg->dma_length == 0)
 436                         break;
 437                 npages = iommu_num_pages(dma_handle, sg->dma_length);
 438                 __iommu_free(tbl, dma_handle, npages);
 439                 sg = sg_next(sg);
 440         }
 441
 442         /* Flush/invalidate TLBs if necessary. As for iommu_free(), we
 443          * do not do an mb() here, the affected platforms do not need it
 444          * when freeing.
 445          */
 446         if (ppc_md.tce_flush)
 447                 ppc_md.tce_flush(tbl);
 448
 449         spin_unlock_irqrestore(&(tbl->it_lock), flags);
 450 }
 451
 452 /*
 453  * Build a iommu_table structure.  This contains a bit map which
 454  * is used to manage allocation of the tce space.
 455  */
 456 struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
 457 {
 458         unsigned long sz;
 459         static int welcomed = 0;
 460         struct page *page;
 461
 462         /* Set aside 1/4 of the table for large allocations. */
 463         tbl->it_halfpoint = tbl->it_size * 3 / 4;
 464
 465         /* number of bytes needed for the bitmap */
 466         sz = (tbl->it_size + 7) >> 3;
 467
 468         page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz));
 469         if (!page)
 470                 panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
 471         tbl->it_map = page_address(page);
 472         memset(tbl->it_map, 0, sz);
 473
 474         tbl->it_hint = 0;
 475         tbl->it_largehint = tbl->it_halfpoint;
 476         spin_lock_init(&tbl->it_lock);
 477
 478 #ifdef CONFIG_CRASH_DUMP
 479         if (ppc_md.tce_get) {
 480                 unsigned long index;
 481                 unsigned long tceval;
 482                 unsigned long tcecount = 0;
 483
 484                 /*
 485                  * Reserve the existing mappings left by the first kernel.
 486                  */
 487                 for (index = 0; index < tbl->it_size; index++) {
 488                         tceval = ppc_md.tce_get(tbl, index + tbl->it_offset);
 489                         /*
 490                          * Freed TCE entry contains 0x7fffffffffffffff on JS20
 491                          */
 492                         if (tceval && (tceval != 0x7fffffffffffffffUL)) {
 493                                 __set_bit(index, tbl->it_map);
 494                                 tcecount++;
 495                         }
 496                 }
 497                 if ((tbl->it_size - tcecount) < KDUMP_MIN_TCE_ENTRIES) {
 498                         printk(KERN_WARNING "TCE table is full; ");
 499                         printk(KERN_WARNING "freeing %d entries for the kdump boot\n",
 500                                 KDUMP_MIN_TCE_ENTRIES);
 501                         for (index = tbl->it_size - KDUMP_MIN_TCE_ENTRIES;
 502                                 index < tbl->it_size; index++)
 503                                 __clear_bit(index, tbl->it_map);
 504                 }
 505         }
 506 #else
 507         /* Clear the hardware table in case firmware left allocations in it */
 508         ppc_md.tce_free(tbl, tbl->it_offset, tbl->it_size);
 509 #endif
 510
 511         if (!welcomed) {
 512                 printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n",
 513                        novmerge ? "disabled" : "enabled");
 514                 welcomed = 1;
 515         }
 516
 517         return tbl;
 518 }
 519
 520 void iommu_free_table(struct iommu_table *tbl, const char *node_name)
 521 {
 522         unsigned long bitmap_sz, i;
 523         unsigned int order;
 524
 525         if (!tbl || !tbl->it_map) {
 526                 printk(KERN_ERR "%s: expected TCE map for %s\n", __func__,
 527                                 node_name);
 528                 return;
 529         }
 530
 531         /* verify that table contains no entries */
 532         /* it_size is in entries, and we're examining 64 at a time */
 533         for (i = 0; i < (tbl->it_size/64); i++) {
 534                 if (tbl->it_map[i] != 0) {
 535                         printk(KERN_WARNING "%s: Unexpected TCEs for %s\n",
 536                                 __func__, node_name);
 537                         break;
 538                 }
 539         }
 540
 541         /* calculate bitmap size in bytes */
 542         bitmap_sz = (tbl->it_size + 7) / 8;
 543
 544         /* free bitmap */
 545         order = get_order(bitmap_sz);
 546         free_pages((unsigned long) tbl->it_map, order);
 547
 548         /* free table */
 549         kfree(tbl);
 550 }
 551
 552 /* Creates TCEs for a user provided buffer.  The user buffer must be
 553  * contiguous real kernel storage (not vmalloc).  The address of the buffer
 554  * passed here is the kernel (virtual) address of the buffer.  The buffer
 555  * need not be page aligned, the dma_addr_t returned will point to the same
 556  * byte within the page as vaddr.
 557  */
 558 dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl,
 559                             void *vaddr, size_t size, unsigned long mask,
 560                 enum dma_data_direction direction, struct dma_attrs *attrs)
 561 {
 562         dma_addr_t dma_handle = DMA_ERROR_CODE;
 563         unsigned long uaddr;
 564         unsigned int npages, align;
 565
 566         BUG_ON(direction == DMA_NONE);
 567
 568         uaddr = (unsigned long)vaddr;
 569         npages = iommu_num_pages(uaddr, size);
 570
 571         if (tbl) {
 572                 align = 0;
 573                 if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && size >= PAGE_SIZE &&
 574                     ((unsigned long)vaddr & ~PAGE_MASK) == 0)
 575                         align = PAGE_SHIFT - IOMMU_PAGE_SHIFT;
 576
 577                 dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction,
 578                                          mask >> IOMMU_PAGE_SHIFT, align,
 579                                          attrs);
 580                 if (dma_handle == DMA_ERROR_CODE) {
 581                         if (printk_ratelimit())  {
 582                                 printk(KERN_INFO "iommu_alloc failed, "
 583                                                 "tbl %p vaddr %p npages %d\n",
 584                                                 tbl, vaddr, npages);
 585                         }
 586                 } else
 587                         dma_handle |= (uaddr & ~IOMMU_PAGE_MASK);
 588         }
 589
 590         return dma_handle;
 591 }
 592
 593 void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
 594                 size_t size, enum dma_data_direction direction,
 595                 struct dma_attrs *attrs)
 596 {
 597         unsigned int npages;
 598
 599         BUG_ON(direction == DMA_NONE);
 600
 601         if (tbl) {
 602                 npages = iommu_num_pages(dma_handle, size);
 603                 iommu_free(tbl, dma_handle, npages);
 604         }
 605 }
 606
 607 /* Allocates a contiguous real buffer and creates mappings over it.
 608  * Returns the virtual address of the buffer and sets dma_handle
 609  * to the dma address (mapping) of the first page.
 610  */
 611 void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
 612                            size_t size, dma_addr_t *dma_handle,
 613                            unsigned long mask, gfp_t flag, int node)
 614 {
 615         void *ret = NULL;
 616         dma_addr_t mapping;
 617         unsigned int order;
 618         unsigned int nio_pages, io_order;
 619         struct page *page;
 620
 621         size = PAGE_ALIGN(size);
 622         order = get_order(size);
 623
 624         /*
 625          * Client asked for way too much space.  This is checked later
 626          * anyway.  It is easier to debug here for the drivers than in
 627          * the tce tables.
 628          */
 629         if (order >= IOMAP_MAX_ORDER) {
 630                 printk("iommu_alloc_consistent size too large: 0x%lx\n", size);
 631                 return NULL;
 632         }
 633
 634         if (!tbl)
 635                 return NULL;
 636
 637         /* Alloc enough pages (and possibly more) */
 638         page = alloc_pages_node(node, flag, order);
 639         if (!page)
 640                 return NULL;
 641         ret = page_address(page);
 642         memset(ret, 0, size);
 643
 644         /* Set up tces to cover the allocated range */
 645         nio_pages = size >> IOMMU_PAGE_SHIFT;
 646         io_order = get_iommu_order(size);
 647         mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
 648                               mask >> IOMMU_PAGE_SHIFT, io_order, NULL);
 649         if (mapping == DMA_ERROR_CODE) {
 650                 free_pages((unsigned long)ret, order);
 651                 return NULL;
 652         }
 653         *dma_handle = mapping;
 654         return ret;
 655 }
 656
 657 void iommu_free_coherent(struct iommu_table *tbl, size_t size,
 658                          void *vaddr, dma_addr_t dma_handle)
 659 {
 660         if (tbl) {
 661                 unsigned int nio_pages;
 662
 663                 size = PAGE_ALIGN(size);
 664                 nio_pages = size >> IOMMU_PAGE_SHIFT;
 665                 iommu_free(tbl, dma_handle, nio_pages);
 666                 size = PAGE_ALIGN(size);
 667                 free_pages((unsigned long)vaddr, get_order(size));
 668         }
 669 }