x86: Move call to print_modules() out of show_regs()
[deliverable/linux.git] / arch / powerpc / kernel / irq.c
1 /*
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
20 * should be easier.
21 *
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
29 */
30
31 #undef DEBUG
32
33 #include <linux/export.h>
34 #include <linux/threads.h>
35 #include <linux/kernel_stat.h>
36 #include <linux/signal.h>
37 #include <linux/sched.h>
38 #include <linux/ptrace.h>
39 #include <linux/ioport.h>
40 #include <linux/interrupt.h>
41 #include <linux/timex.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/delay.h>
45 #include <linux/irq.h>
46 #include <linux/seq_file.h>
47 #include <linux/cpumask.h>
48 #include <linux/profile.h>
49 #include <linux/bitops.h>
50 #include <linux/list.h>
51 #include <linux/radix-tree.h>
52 #include <linux/mutex.h>
53 #include <linux/bootmem.h>
54 #include <linux/pci.h>
55 #include <linux/debugfs.h>
56 #include <linux/of.h>
57 #include <linux/of_irq.h>
58
59 #include <asm/uaccess.h>
60 #include <asm/io.h>
61 #include <asm/pgtable.h>
62 #include <asm/irq.h>
63 #include <asm/cache.h>
64 #include <asm/prom.h>
65 #include <asm/ptrace.h>
66 #include <asm/machdep.h>
67 #include <asm/udbg.h>
68 #include <asm/smp.h>
69 #include <asm/debug.h>
70
71 #ifdef CONFIG_PPC64
72 #include <asm/paca.h>
73 #include <asm/firmware.h>
74 #include <asm/lv1call.h>
75 #endif
76 #define CREATE_TRACE_POINTS
77 #include <asm/trace.h>
78
79 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
80 EXPORT_PER_CPU_SYMBOL(irq_stat);
81
82 int __irq_offset_value;
83
84 #ifdef CONFIG_PPC32
85 EXPORT_SYMBOL(__irq_offset_value);
86 atomic_t ppc_n_lost_interrupts;
87
88 #ifdef CONFIG_TAU_INT
89 extern int tau_initialized;
90 extern int tau_interrupts(int);
91 #endif
92 #endif /* CONFIG_PPC32 */
93
94 #ifdef CONFIG_PPC64
95
96 int distribute_irqs = 1;
97
98 static inline notrace unsigned long get_irq_happened(void)
99 {
100 unsigned long happened;
101
102 __asm__ __volatile__("lbz %0,%1(13)"
103 : "=r" (happened) : "i" (offsetof(struct paca_struct, irq_happened)));
104
105 return happened;
106 }
107
108 static inline notrace void set_soft_enabled(unsigned long enable)
109 {
110 __asm__ __volatile__("stb %0,%1(13)"
111 : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
112 }
113
114 static inline notrace int decrementer_check_overflow(void)
115 {
116 u64 now = get_tb_or_rtc();
117 u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
118
119 if (now >= *next_tb)
120 set_dec(1);
121 return now >= *next_tb;
122 }
123
124 /* This is called whenever we are re-enabling interrupts
125 * and returns either 0 (nothing to do) or 500/900 if there's
126 * either an EE or a DEC to generate.
127 *
128 * This is called in two contexts: From arch_local_irq_restore()
129 * before soft-enabling interrupts, and from the exception exit
130 * path when returning from an interrupt from a soft-disabled to
131 * a soft enabled context. In both case we have interrupts hard
132 * disabled.
133 *
134 * We take care of only clearing the bits we handled in the
135 * PACA irq_happened field since we can only re-emit one at a
136 * time and we don't want to "lose" one.
137 */
138 notrace unsigned int __check_irq_replay(void)
139 {
140 /*
141 * We use local_paca rather than get_paca() to avoid all
142 * the debug_smp_processor_id() business in this low level
143 * function
144 */
145 unsigned char happened = local_paca->irq_happened;
146
147 /* Clear bit 0 which we wouldn't clear otherwise */
148 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
149
150 /*
151 * Force the delivery of pending soft-disabled interrupts on PS3.
152 * Any HV call will have this side effect.
153 */
154 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
155 u64 tmp, tmp2;
156 lv1_get_version_info(&tmp, &tmp2);
157 }
158
159 /*
160 * We may have missed a decrementer interrupt. We check the
161 * decrementer itself rather than the paca irq_happened field
162 * in case we also had a rollover while hard disabled
163 */
164 local_paca->irq_happened &= ~PACA_IRQ_DEC;
165 if (decrementer_check_overflow())
166 return 0x900;
167
168 /* Finally check if an external interrupt happened */
169 local_paca->irq_happened &= ~PACA_IRQ_EE;
170 if (happened & PACA_IRQ_EE)
171 return 0x500;
172
173 #ifdef CONFIG_PPC_BOOK3E
174 /* Finally check if an EPR external interrupt happened
175 * this bit is typically set if we need to handle another
176 * "edge" interrupt from within the MPIC "EPR" handler
177 */
178 local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE;
179 if (happened & PACA_IRQ_EE_EDGE)
180 return 0x500;
181
182 local_paca->irq_happened &= ~PACA_IRQ_DBELL;
183 if (happened & PACA_IRQ_DBELL)
184 return 0x280;
185 #endif /* CONFIG_PPC_BOOK3E */
186
187 /* There should be nothing left ! */
188 BUG_ON(local_paca->irq_happened != 0);
189
190 return 0;
191 }
192
193 notrace void arch_local_irq_restore(unsigned long en)
194 {
195 unsigned char irq_happened;
196 unsigned int replay;
197
198 /* Write the new soft-enabled value */
199 set_soft_enabled(en);
200 if (!en)
201 return;
202 /*
203 * From this point onward, we can take interrupts, preempt,
204 * etc... unless we got hard-disabled. We check if an event
205 * happened. If none happened, we know we can just return.
206 *
207 * We may have preempted before the check below, in which case
208 * we are checking the "new" CPU instead of the old one. This
209 * is only a problem if an event happened on the "old" CPU.
210 *
211 * External interrupt events will have caused interrupts to
212 * be hard-disabled, so there is no problem, we
213 * cannot have preempted.
214 */
215 irq_happened = get_irq_happened();
216 if (!irq_happened)
217 return;
218
219 /*
220 * We need to hard disable to get a trusted value from
221 * __check_irq_replay(). We also need to soft-disable
222 * again to avoid warnings in there due to the use of
223 * per-cpu variables.
224 *
225 * We know that if the value in irq_happened is exactly 0x01
226 * then we are already hard disabled (there are other less
227 * common cases that we'll ignore for now), so we skip the
228 * (expensive) mtmsrd.
229 */
230 if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
231 __hard_irq_disable();
232 #ifdef CONFIG_TRACE_IRQFLAG
233 else {
234 /*
235 * We should already be hard disabled here. We had bugs
236 * where that wasn't the case so let's dbl check it and
237 * warn if we are wrong. Only do that when IRQ tracing
238 * is enabled as mfmsr() can be costly.
239 */
240 if (WARN_ON(mfmsr() & MSR_EE))
241 __hard_irq_disable();
242 }
243 #endif /* CONFIG_TRACE_IRQFLAG */
244
245 set_soft_enabled(0);
246
247 /*
248 * Check if anything needs to be re-emitted. We haven't
249 * soft-enabled yet to avoid warnings in decrementer_check_overflow
250 * accessing per-cpu variables
251 */
252 replay = __check_irq_replay();
253
254 /* We can soft-enable now */
255 set_soft_enabled(1);
256
257 /*
258 * And replay if we have to. This will return with interrupts
259 * hard-enabled.
260 */
261 if (replay) {
262 __replay_interrupt(replay);
263 return;
264 }
265
266 /* Finally, let's ensure we are hard enabled */
267 __hard_irq_enable();
268 }
269 EXPORT_SYMBOL(arch_local_irq_restore);
270
271 /*
272 * This is specifically called by assembly code to re-enable interrupts
273 * if they are currently disabled. This is typically called before
274 * schedule() or do_signal() when returning to userspace. We do it
275 * in C to avoid the burden of dealing with lockdep etc...
276 *
277 * NOTE: This is called with interrupts hard disabled but not marked
278 * as such in paca->irq_happened, so we need to resync this.
279 */
280 void restore_interrupts(void)
281 {
282 if (irqs_disabled()) {
283 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
284 local_irq_enable();
285 } else
286 __hard_irq_enable();
287 }
288
289 #endif /* CONFIG_PPC64 */
290
291 int arch_show_interrupts(struct seq_file *p, int prec)
292 {
293 int j;
294
295 #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
296 if (tau_initialized) {
297 seq_printf(p, "%*s: ", prec, "TAU");
298 for_each_online_cpu(j)
299 seq_printf(p, "%10u ", tau_interrupts(j));
300 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
301 }
302 #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
303
304 seq_printf(p, "%*s: ", prec, "LOC");
305 for_each_online_cpu(j)
306 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs);
307 seq_printf(p, " Local timer interrupts\n");
308
309 seq_printf(p, "%*s: ", prec, "SPU");
310 for_each_online_cpu(j)
311 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
312 seq_printf(p, " Spurious interrupts\n");
313
314 seq_printf(p, "%*s: ", prec, "CNT");
315 for_each_online_cpu(j)
316 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
317 seq_printf(p, " Performance monitoring interrupts\n");
318
319 seq_printf(p, "%*s: ", prec, "MCE");
320 for_each_online_cpu(j)
321 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
322 seq_printf(p, " Machine check exceptions\n");
323
324 return 0;
325 }
326
327 /*
328 * /proc/stat helpers
329 */
330 u64 arch_irq_stat_cpu(unsigned int cpu)
331 {
332 u64 sum = per_cpu(irq_stat, cpu).timer_irqs;
333
334 sum += per_cpu(irq_stat, cpu).pmu_irqs;
335 sum += per_cpu(irq_stat, cpu).mce_exceptions;
336 sum += per_cpu(irq_stat, cpu).spurious_irqs;
337
338 return sum;
339 }
340
341 #ifdef CONFIG_HOTPLUG_CPU
342 void migrate_irqs(void)
343 {
344 struct irq_desc *desc;
345 unsigned int irq;
346 static int warned;
347 cpumask_var_t mask;
348 const struct cpumask *map = cpu_online_mask;
349
350 alloc_cpumask_var(&mask, GFP_KERNEL);
351
352 for_each_irq_desc(irq, desc) {
353 struct irq_data *data;
354 struct irq_chip *chip;
355
356 data = irq_desc_get_irq_data(desc);
357 if (irqd_is_per_cpu(data))
358 continue;
359
360 chip = irq_data_get_irq_chip(data);
361
362 cpumask_and(mask, data->affinity, map);
363 if (cpumask_any(mask) >= nr_cpu_ids) {
364 printk("Breaking affinity for irq %i\n", irq);
365 cpumask_copy(mask, map);
366 }
367 if (chip->irq_set_affinity)
368 chip->irq_set_affinity(data, mask, true);
369 else if (desc->action && !(warned++))
370 printk("Cannot set affinity for irq %i\n", irq);
371 }
372
373 free_cpumask_var(mask);
374
375 local_irq_enable();
376 mdelay(1);
377 local_irq_disable();
378 }
379 #endif
380
381 static inline void handle_one_irq(unsigned int irq)
382 {
383 struct thread_info *curtp, *irqtp;
384 unsigned long saved_sp_limit;
385 struct irq_desc *desc;
386
387 desc = irq_to_desc(irq);
388 if (!desc)
389 return;
390
391 /* Switch to the irq stack to handle this */
392 curtp = current_thread_info();
393 irqtp = hardirq_ctx[smp_processor_id()];
394
395 if (curtp == irqtp) {
396 /* We're already on the irq stack, just handle it */
397 desc->handle_irq(irq, desc);
398 return;
399 }
400
401 saved_sp_limit = current->thread.ksp_limit;
402
403 irqtp->task = curtp->task;
404 irqtp->flags = 0;
405
406 /* Copy the softirq bits in preempt_count so that the
407 * softirq checks work in the hardirq context. */
408 irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) |
409 (curtp->preempt_count & SOFTIRQ_MASK);
410
411 current->thread.ksp_limit = (unsigned long)irqtp +
412 _ALIGN_UP(sizeof(struct thread_info), 16);
413
414 call_handle_irq(irq, desc, irqtp, desc->handle_irq);
415 current->thread.ksp_limit = saved_sp_limit;
416 irqtp->task = NULL;
417
418 /* Set any flag that may have been set on the
419 * alternate stack
420 */
421 if (irqtp->flags)
422 set_bits(irqtp->flags, &curtp->flags);
423 }
424
425 static inline void check_stack_overflow(void)
426 {
427 #ifdef CONFIG_DEBUG_STACKOVERFLOW
428 long sp;
429
430 sp = __get_SP() & (THREAD_SIZE-1);
431
432 /* check for stack overflow: is there less than 2KB free? */
433 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
434 printk("do_IRQ: stack overflow: %ld\n",
435 sp - sizeof(struct thread_info));
436 dump_stack();
437 }
438 #endif
439 }
440
441 void do_IRQ(struct pt_regs *regs)
442 {
443 struct pt_regs *old_regs = set_irq_regs(regs);
444 unsigned int irq;
445
446 trace_irq_entry(regs);
447
448 irq_enter();
449
450 check_stack_overflow();
451
452 /*
453 * Query the platform PIC for the interrupt & ack it.
454 *
455 * This will typically lower the interrupt line to the CPU
456 */
457 irq = ppc_md.get_irq();
458
459 /* We can hard enable interrupts now */
460 may_hard_irq_enable();
461
462 /* And finally process it */
463 if (irq != NO_IRQ)
464 handle_one_irq(irq);
465 else
466 __get_cpu_var(irq_stat).spurious_irqs++;
467
468 irq_exit();
469 set_irq_regs(old_regs);
470
471 trace_irq_exit(regs);
472 }
473
474 void __init init_IRQ(void)
475 {
476 if (ppc_md.init_IRQ)
477 ppc_md.init_IRQ();
478
479 exc_lvl_ctx_init();
480
481 irq_ctx_init();
482 }
483
484 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
485 struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
486 struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
487 struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
488
489 void exc_lvl_ctx_init(void)
490 {
491 struct thread_info *tp;
492 int i, cpu_nr;
493
494 for_each_possible_cpu(i) {
495 #ifdef CONFIG_PPC64
496 cpu_nr = i;
497 #else
498 cpu_nr = get_hard_smp_processor_id(i);
499 #endif
500 memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE);
501 tp = critirq_ctx[cpu_nr];
502 tp->cpu = cpu_nr;
503 tp->preempt_count = 0;
504
505 #ifdef CONFIG_BOOKE
506 memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE);
507 tp = dbgirq_ctx[cpu_nr];
508 tp->cpu = cpu_nr;
509 tp->preempt_count = 0;
510
511 memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE);
512 tp = mcheckirq_ctx[cpu_nr];
513 tp->cpu = cpu_nr;
514 tp->preempt_count = HARDIRQ_OFFSET;
515 #endif
516 }
517 }
518 #endif
519
520 struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
521 struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
522
523 void irq_ctx_init(void)
524 {
525 struct thread_info *tp;
526 int i;
527
528 for_each_possible_cpu(i) {
529 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
530 tp = softirq_ctx[i];
531 tp->cpu = i;
532 tp->preempt_count = 0;
533
534 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
535 tp = hardirq_ctx[i];
536 tp->cpu = i;
537 tp->preempt_count = HARDIRQ_OFFSET;
538 }
539 }
540
541 static inline void do_softirq_onstack(void)
542 {
543 struct thread_info *curtp, *irqtp;
544 unsigned long saved_sp_limit = current->thread.ksp_limit;
545
546 curtp = current_thread_info();
547 irqtp = softirq_ctx[smp_processor_id()];
548 irqtp->task = curtp->task;
549 irqtp->flags = 0;
550 current->thread.ksp_limit = (unsigned long)irqtp +
551 _ALIGN_UP(sizeof(struct thread_info), 16);
552 call_do_softirq(irqtp);
553 current->thread.ksp_limit = saved_sp_limit;
554 irqtp->task = NULL;
555
556 /* Set any flag that may have been set on the
557 * alternate stack
558 */
559 if (irqtp->flags)
560 set_bits(irqtp->flags, &curtp->flags);
561 }
562
563 void do_softirq(void)
564 {
565 unsigned long flags;
566
567 if (in_interrupt())
568 return;
569
570 local_irq_save(flags);
571
572 if (local_softirq_pending())
573 do_softirq_onstack();
574
575 local_irq_restore(flags);
576 }
577
578 irq_hw_number_t virq_to_hw(unsigned int virq)
579 {
580 struct irq_data *irq_data = irq_get_irq_data(virq);
581 return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
582 }
583 EXPORT_SYMBOL_GPL(virq_to_hw);
584
585 #ifdef CONFIG_SMP
586 int irq_choose_cpu(const struct cpumask *mask)
587 {
588 int cpuid;
589
590 if (cpumask_equal(mask, cpu_online_mask)) {
591 static int irq_rover;
592 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
593 unsigned long flags;
594
595 /* Round-robin distribution... */
596 do_round_robin:
597 raw_spin_lock_irqsave(&irq_rover_lock, flags);
598
599 irq_rover = cpumask_next(irq_rover, cpu_online_mask);
600 if (irq_rover >= nr_cpu_ids)
601 irq_rover = cpumask_first(cpu_online_mask);
602
603 cpuid = irq_rover;
604
605 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
606 } else {
607 cpuid = cpumask_first_and(mask, cpu_online_mask);
608 if (cpuid >= nr_cpu_ids)
609 goto do_round_robin;
610 }
611
612 return get_hard_smp_processor_id(cpuid);
613 }
614 #else
615 int irq_choose_cpu(const struct cpumask *mask)
616 {
617 return hard_smp_processor_id();
618 }
619 #endif
620
621 int arch_early_irq_init(void)
622 {
623 return 0;
624 }
625
626 #ifdef CONFIG_PPC64
627 static int __init setup_noirqdistrib(char *str)
628 {
629 distribute_irqs = 0;
630 return 1;
631 }
632
633 __setup("noirqdistrib", setup_noirqdistrib);
634 #endif /* CONFIG_PPC64 */
This page took 0.052164 seconds and 5 git commands to generate.