powerpc/pci: Add calls to set_pcie_port_type() and set_pcie_hotplug_bridge()
[deliverable/linux.git] / arch / powerpc / kernel / pci_of_scan.c
1 /*
2 * Helper routines to scan the device tree for PCI devices and busses
3 *
4 * Migrated out of PowerPC architecture pci_64.c file by Grant Likely
5 * <grant.likely@secretlab.ca> so that these routines are available for
6 * 32 bit also.
7 *
8 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
9 * Rework, based on alpha PCI code.
10 * Copyright (c) 2009 Secret Lab Technologies Ltd.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
15 */
16
17 #include <linux/pci.h>
18 #include <asm/pci-bridge.h>
19 #include <asm/prom.h>
20
21 /**
22 * get_int_prop - Decode a u32 from a device tree property
23 */
24 static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
25 {
26 const u32 *prop;
27 int len;
28
29 prop = of_get_property(np, name, &len);
30 if (prop && len >= 4)
31 return *prop;
32 return def;
33 }
34
35 /**
36 * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
37 * @addr0: value of 1st cell of a device tree PCI address.
38 * @bridge: Set this flag if the address is from a bridge 'ranges' property
39 */
40 unsigned int pci_parse_of_flags(u32 addr0, int bridge)
41 {
42 unsigned int flags = 0;
43
44 if (addr0 & 0x02000000) {
45 flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
46 flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
47 flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
48 if (addr0 & 0x40000000)
49 flags |= IORESOURCE_PREFETCH
50 | PCI_BASE_ADDRESS_MEM_PREFETCH;
51 /* Note: We don't know whether the ROM has been left enabled
52 * by the firmware or not. We mark it as disabled (ie, we do
53 * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
54 * do a config space read, it will be force-enabled if needed
55 */
56 if (!bridge && (addr0 & 0xff) == 0x30)
57 flags |= IORESOURCE_READONLY;
58 } else if (addr0 & 0x01000000)
59 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
60 if (flags)
61 flags |= IORESOURCE_SIZEALIGN;
62 return flags;
63 }
64
65 /**
66 * of_pci_parse_addrs - Parse PCI addresses assigned in the device tree node
67 * @node: device tree node for the PCI device
68 * @dev: pci_dev structure for the device
69 *
70 * This function parses the 'assigned-addresses' property of a PCI devices'
71 * device tree node and writes them into the associated pci_dev structure.
72 */
73 static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
74 {
75 u64 base, size;
76 unsigned int flags;
77 struct resource *res;
78 const u32 *addrs;
79 u32 i;
80 int proplen;
81
82 addrs = of_get_property(node, "assigned-addresses", &proplen);
83 if (!addrs)
84 return;
85 pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
86 for (; proplen >= 20; proplen -= 20, addrs += 5) {
87 flags = pci_parse_of_flags(addrs[0], 0);
88 if (!flags)
89 continue;
90 base = of_read_number(&addrs[1], 2);
91 size = of_read_number(&addrs[3], 2);
92 if (!size)
93 continue;
94 i = addrs[0] & 0xff;
95 pr_debug(" base: %llx, size: %llx, i: %x\n",
96 (unsigned long long)base,
97 (unsigned long long)size, i);
98
99 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
100 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
101 } else if (i == dev->rom_base_reg) {
102 res = &dev->resource[PCI_ROM_RESOURCE];
103 flags |= IORESOURCE_READONLY | IORESOURCE_CACHEABLE;
104 } else {
105 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
106 continue;
107 }
108 res->start = base;
109 res->end = base + size - 1;
110 res->flags = flags;
111 res->name = pci_name(dev);
112 }
113 }
114
115 /**
116 * of_create_pci_dev - Given a device tree node on a pci bus, create a pci_dev
117 * @node: device tree node pointer
118 * @bus: bus the device is sitting on
119 * @devfn: PCI function number, extracted from device tree by caller.
120 */
121 struct pci_dev *of_create_pci_dev(struct device_node *node,
122 struct pci_bus *bus, int devfn)
123 {
124 struct pci_dev *dev;
125 const char *type;
126
127 dev = alloc_pci_dev();
128 if (!dev)
129 return NULL;
130 type = of_get_property(node, "device_type", NULL);
131 if (type == NULL)
132 type = "";
133
134 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type);
135
136 dev->bus = bus;
137 dev->sysdata = node;
138 dev->dev.parent = bus->bridge;
139 dev->dev.bus = &pci_bus_type;
140 dev->devfn = devfn;
141 dev->multifunction = 0; /* maybe a lie? */
142 dev->needs_freset = 0; /* pcie fundamental reset required */
143 set_pcie_port_type(dev);
144
145 dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
146 dev->device = get_int_prop(node, "device-id", 0xffff);
147 dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
148 dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
149
150 dev->cfg_size = pci_cfg_space_size(dev);
151
152 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
153 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
154 dev->class = get_int_prop(node, "class-code", 0);
155 dev->revision = get_int_prop(node, "revision-id", 0);
156
157 pr_debug(" class: 0x%x\n", dev->class);
158 pr_debug(" revision: 0x%x\n", dev->revision);
159
160 dev->current_state = 4; /* unknown power state */
161 dev->error_state = pci_channel_io_normal;
162 dev->dma_mask = 0xffffffff;
163
164 if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
165 /* a PCI-PCI bridge */
166 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
167 dev->rom_base_reg = PCI_ROM_ADDRESS1;
168 set_pcie_hotplug_bridge(dev);
169 } else if (!strcmp(type, "cardbus")) {
170 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
171 } else {
172 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
173 dev->rom_base_reg = PCI_ROM_ADDRESS;
174 /* Maybe do a default OF mapping here */
175 dev->irq = NO_IRQ;
176 }
177
178 of_pci_parse_addrs(node, dev);
179
180 pr_debug(" adding to system ...\n");
181
182 pci_device_add(dev, bus);
183
184 return dev;
185 }
186 EXPORT_SYMBOL(of_create_pci_dev);
187
188 /**
189 * of_scan_pci_bridge - Set up a PCI bridge and scan for child nodes
190 * @node: device tree node of bridge
191 * @dev: pci_dev structure for the bridge
192 *
193 * of_scan_bus() calls this routine for each PCI bridge that it finds, and
194 * this routine in turn call of_scan_bus() recusively to scan for more child
195 * devices.
196 */
197 void __devinit of_scan_pci_bridge(struct device_node *node,
198 struct pci_dev *dev)
199 {
200 struct pci_bus *bus;
201 const u32 *busrange, *ranges;
202 int len, i, mode;
203 struct resource *res;
204 unsigned int flags;
205 u64 size;
206
207 pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
208
209 /* parse bus-range property */
210 busrange = of_get_property(node, "bus-range", &len);
211 if (busrange == NULL || len != 8) {
212 printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
213 node->full_name);
214 return;
215 }
216 ranges = of_get_property(node, "ranges", &len);
217 if (ranges == NULL) {
218 printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
219 node->full_name);
220 return;
221 }
222
223 bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
224 if (!bus) {
225 printk(KERN_ERR "Failed to create pci bus for %s\n",
226 node->full_name);
227 return;
228 }
229
230 bus->primary = dev->bus->number;
231 bus->subordinate = busrange[1];
232 bus->bridge_ctl = 0;
233 bus->sysdata = node;
234
235 /* parse ranges property */
236 /* PCI #address-cells == 3 and #size-cells == 2 always */
237 res = &dev->resource[PCI_BRIDGE_RESOURCES];
238 for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
239 res->flags = 0;
240 bus->resource[i] = res;
241 ++res;
242 }
243 i = 1;
244 for (; len >= 32; len -= 32, ranges += 8) {
245 flags = pci_parse_of_flags(ranges[0], 1);
246 size = of_read_number(&ranges[6], 2);
247 if (flags == 0 || size == 0)
248 continue;
249 if (flags & IORESOURCE_IO) {
250 res = bus->resource[0];
251 if (res->flags) {
252 printk(KERN_ERR "PCI: ignoring extra I/O range"
253 " for bridge %s\n", node->full_name);
254 continue;
255 }
256 } else {
257 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
258 printk(KERN_ERR "PCI: too many memory ranges"
259 " for bridge %s\n", node->full_name);
260 continue;
261 }
262 res = bus->resource[i];
263 ++i;
264 }
265 res->start = of_read_number(&ranges[1], 2);
266 res->end = res->start + size - 1;
267 res->flags = flags;
268 }
269 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
270 bus->number);
271 pr_debug(" bus name: %s\n", bus->name);
272
273 mode = PCI_PROBE_NORMAL;
274 if (ppc_md.pci_probe_mode)
275 mode = ppc_md.pci_probe_mode(bus);
276 pr_debug(" probe mode: %d\n", mode);
277
278 if (mode == PCI_PROBE_DEVTREE)
279 of_scan_bus(node, bus);
280 else if (mode == PCI_PROBE_NORMAL)
281 pci_scan_child_bus(bus);
282 }
283 EXPORT_SYMBOL(of_scan_pci_bridge);
284
285 /**
286 * __of_scan_bus - given a PCI bus node, setup bus and scan for child devices
287 * @node: device tree node for the PCI bus
288 * @bus: pci_bus structure for the PCI bus
289 * @rescan_existing: Flag indicating bus has already been set up
290 */
291 static void __devinit __of_scan_bus(struct device_node *node,
292 struct pci_bus *bus, int rescan_existing)
293 {
294 struct device_node *child;
295 const u32 *reg;
296 int reglen, devfn;
297 struct pci_dev *dev;
298
299 pr_debug("of_scan_bus(%s) bus no %d... \n",
300 node->full_name, bus->number);
301
302 /* Scan direct children */
303 for_each_child_of_node(node, child) {
304 pr_debug(" * %s\n", child->full_name);
305 reg = of_get_property(child, "reg", &reglen);
306 if (reg == NULL || reglen < 20)
307 continue;
308 devfn = (reg[0] >> 8) & 0xff;
309
310 /* create a new pci_dev for this device */
311 dev = of_create_pci_dev(child, bus, devfn);
312 if (!dev)
313 continue;
314 pr_debug(" dev header type: %x\n", dev->hdr_type);
315 }
316
317 /* Apply all fixups necessary. We don't fixup the bus "self"
318 * for an existing bridge that is being rescanned
319 */
320 if (!rescan_existing)
321 pcibios_setup_bus_self(bus);
322 pcibios_setup_bus_devices(bus);
323
324 /* Now scan child busses */
325 list_for_each_entry(dev, &bus->devices, bus_list) {
326 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
327 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
328 struct device_node *child = pci_device_to_OF_node(dev);
329 if (dev)
330 of_scan_pci_bridge(child, dev);
331 }
332 }
333 }
334
335 /**
336 * of_scan_bus - given a PCI bus node, setup bus and scan for child devices
337 * @node: device tree node for the PCI bus
338 * @bus: pci_bus structure for the PCI bus
339 */
340 void __devinit of_scan_bus(struct device_node *node,
341 struct pci_bus *bus)
342 {
343 __of_scan_bus(node, bus, 0);
344 }
345 EXPORT_SYMBOL_GPL(of_scan_bus);
346
347 /**
348 * of_rescan_bus - given a PCI bus node, scan for child devices
349 * @node: device tree node for the PCI bus
350 * @bus: pci_bus structure for the PCI bus
351 *
352 * Same as of_scan_bus, but for a pci_bus structure that has already been
353 * setup.
354 */
355 void __devinit of_rescan_bus(struct device_node *node,
356 struct pci_bus *bus)
357 {
358 __of_scan_bus(node, bus, 1);
359 }
360 EXPORT_SYMBOL_GPL(of_rescan_bus);
361
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