2 * Performance counter support for POWER6 processors.
4 * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 #include <linux/kernel.h>
12 #include <linux/perf_counter.h>
16 * Bits in event code for POWER6
18 #define PM_PMC_SH 20 /* PMC number (1-based) for direct events */
19 #define PM_PMC_MSK 0x7
20 #define PM_PMC_MSKS (PM_PMC_MSK << PM_PMC_SH)
21 #define PM_UNIT_SH 16 /* Unit event comes (TTMxSEL encoding) */
22 #define PM_UNIT_MSK 0xf
23 #define PM_UNIT_MSKS (PM_UNIT_MSK << PM_UNIT_SH)
24 #define PM_LLAV 0x8000 /* Load lookahead match value */
25 #define PM_LLA 0x4000 /* Load lookahead match enable */
26 #define PM_BYTE_SH 12 /* Byte of event bus to use */
28 #define PM_SUBUNIT_SH 8 /* Subunit event comes from (NEST_SEL enc.) */
29 #define PM_SUBUNIT_MSK 7
30 #define PM_SUBUNIT_MSKS (PM_SUBUNIT_MSK << PM_SUBUNIT_SH)
31 #define PM_PMCSEL_MSK 0xff /* PMCxSEL value */
32 #define PM_BUSEVENT_MSK 0xf3700
35 * Bits in MMCR1 for POWER6
37 #define MMCR1_TTM0SEL_SH 60
38 #define MMCR1_TTMSEL_SH(n) (MMCR1_TTM0SEL_SH - (n) * 4)
39 #define MMCR1_TTMSEL_MSK 0xf
40 #define MMCR1_TTMSEL(m, n) (((m) >> MMCR1_TTMSEL_SH(n)) & MMCR1_TTMSEL_MSK)
41 #define MMCR1_NESTSEL_SH 45
42 #define MMCR1_NESTSEL_MSK 0x7
43 #define MMCR1_NESTSEL(m) (((m) >> MMCR1_NESTSEL_SH) & MMCR1_NESTSEL_MSK)
44 #define MMCR1_PMC1_LLA ((u64)1 << 44)
45 #define MMCR1_PMC1_LLA_VALUE ((u64)1 << 39)
46 #define MMCR1_PMC1_ADDR_SEL ((u64)1 << 35)
47 #define MMCR1_PMC1SEL_SH 24
48 #define MMCR1_PMCSEL_SH(n) (MMCR1_PMC1SEL_SH - (n) * 8)
49 #define MMCR1_PMCSEL_MSK 0xff
52 * Map of which direct events on which PMCs are marked instruction events.
53 * Indexed by PMCSEL value >> 1.
54 * Bottom 4 bits are a map of which PMCs are interesting,
55 * top 4 bits say what sort of event:
56 * 0 = direct marked event,
57 * 1 = byte decode event,
58 * 4 = add/and event (PMC1 -> bits 0 & 4),
59 * 5 = add/and event (PMC1 -> bits 1 & 5),
60 * 6 = add/and event (PMC1 -> bits 2 & 6),
61 * 7 = add/and event (PMC1 -> bits 3 & 7).
63 static unsigned char direct_event_is_marked
[0x60 >> 1] = {
67 0x07, /* 06 PM_MRK_ST_CMPL, PM_MRK_ST_GPS, PM_MRK_ST_CMPL_INT */
68 0x04, /* 08 PM_MRK_DFU_FIN */
69 0x06, /* 0a PM_MRK_IFU_FIN, PM_MRK_INST_FIN */
72 0x02, /* 10 PM_MRK_INST_DISP */
73 0x08, /* 12 PM_MRK_LSU_DERAT_MISS */
76 0x0c, /* 18 PM_THRESH_TIMEO, PM_MRK_INST_FIN */
77 0x0f, /* 1a PM_MRK_INST_DISP, PM_MRK_{FXU,FPU,LSU}_FIN */
78 0x01, /* 1c PM_MRK_INST_ISSUED */
84 0x15, /* 28 PM_MRK_DATA_FROM_L2MISS, PM_MRK_DATA_FROM_L3MISS */
95 0x08, /* 3e PM_MRK_INST_TIMEO */
105 0x05, /* 52 PM_MRK_BR_TAKEN, PM_MRK_BR_MPRED */
106 0x1c, /* 54 PM_MRK_PTEG_FROM_L3MISS, PM_MRK_PTEG_FROM_L2MISS */
107 0x02, /* 56 PM_MRK_LD_MISS_L1 */
115 * Masks showing for each unit which bits are marked events.
116 * These masks are in LE order, i.e. 0x00000001 is byte 0, bit 0.
118 static u32 marked_bus_events
[16] = {
119 0x01000000, /* direct events set 1: byte 3 bit 0 */
120 0x00010000, /* direct events set 2: byte 2 bit 0 */
121 0, 0, 0, 0, /* IDU, IFU, nest: nothing */
122 0x00000088, /* VMX set 1: byte 0 bits 3, 7 */
123 0x000000c0, /* VMX set 2: byte 0 bits 4-7 */
124 0x04010000, /* LSU set 1: byte 2 bit 0, byte 3 bit 2 */
125 0xff010000u
, /* LSU set 2: byte 2 bit 0, all of byte 3 */
127 0x00000010, /* VMX set 3: byte 0 bit 4 */
129 0x00000022, /* BFP set 2: byte 0 bits 1, 5 */
134 * Returns 1 if event counts things relating to marked instructions
135 * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
137 static int power6_marked_instr_event(unsigned int event
)
139 int pmc
, psel
, ptype
;
143 pmc
= (event
>> PM_PMC_SH
) & PM_PMC_MSK
;
144 psel
= (event
& PM_PMCSEL_MSK
) >> 1; /* drop edge/level bit */
149 if (psel
< sizeof(direct_event_is_marked
)) {
150 ptype
= direct_event_is_marked
[psel
];
151 if (pmc
== 0 || !(ptype
& (1 << (pmc
- 1))))
159 bit
= ptype
^ (pmc
- 1);
160 } else if ((psel
& 0x48) == 0x40)
163 if (!(event
& PM_BUSEVENT_MSK
) || bit
== -1)
166 byte
= (event
>> PM_BYTE_SH
) & PM_BYTE_MSK
;
167 unit
= (event
>> PM_UNIT_SH
) & PM_UNIT_MSK
;
168 mask
= marked_bus_events
[unit
];
169 return (mask
>> (byte
* 8 + bit
)) & 1;
173 * Assign PMC numbers and compute MMCR1 value for a set of events
175 static int p6_compute_mmcr(unsigned int event
[], int n_ev
,
176 unsigned int hwc
[], u64 mmcr
[])
181 unsigned int pmc
, ev
, b
, u
, s
, psel
;
182 unsigned int ttmset
= 0;
183 unsigned int pmc_inuse
= 0;
187 for (i
= 0; i
< n_ev
; ++i
) {
188 pmc
= (event
[i
] >> PM_PMC_SH
) & PM_PMC_MSK
;
190 if (pmc_inuse
& (1 << (pmc
- 1)))
191 return -1; /* collision! */
192 pmc_inuse
|= 1 << (pmc
- 1);
195 for (i
= 0; i
< n_ev
; ++i
) {
197 pmc
= (ev
>> PM_PMC_SH
) & PM_PMC_MSK
;
201 /* can go on any PMC; find a free one */
202 for (pmc
= 0; pmc
< 4; ++pmc
)
203 if (!(pmc_inuse
& (1 << pmc
)))
205 pmc_inuse
|= 1 << pmc
;
208 psel
= ev
& PM_PMCSEL_MSK
;
209 if (ev
& PM_BUSEVENT_MSK
) {
210 /* this event uses the event bus */
211 b
= (ev
>> PM_BYTE_SH
) & PM_BYTE_MSK
;
212 u
= (ev
>> PM_UNIT_SH
) & PM_UNIT_MSK
;
213 /* check for conflict on this byte of event bus */
214 if ((ttmset
& (1 << b
)) && MMCR1_TTMSEL(mmcr1
, b
) != u
)
216 mmcr1
|= (u64
)u
<< MMCR1_TTMSEL_SH(b
);
219 /* Nest events have a further mux */
220 s
= (ev
>> PM_SUBUNIT_SH
) & PM_SUBUNIT_MSK
;
221 if ((ttmset
& 0x10) &&
222 MMCR1_NESTSEL(mmcr1
) != s
)
225 mmcr1
|= (u64
)s
<< MMCR1_NESTSEL_SH
;
227 if (0x30 <= psel
&& psel
<= 0x3d) {
228 /* these need the PMCx_ADDR_SEL bits */
230 mmcr1
|= MMCR1_PMC1_ADDR_SEL
>> pmc
;
232 /* bus select values are different for PMC3/4 */
233 if (pmc
>= 2 && (psel
& 0x90) == 0x80)
237 mmcr1
|= MMCR1_PMC1_LLA
>> pmc
;
239 mmcr1
|= MMCR1_PMC1_LLA_VALUE
>> pmc
;
241 if (power6_marked_instr_event(event
[i
]))
242 mmcra
|= MMCRA_SAMPLE_ENABLE
;
243 mmcr1
|= (u64
)psel
<< MMCR1_PMCSEL_SH(pmc
);
247 mmcr
[0] = MMCR0_PMC1CE
;
249 mmcr
[0] |= MMCR0_PMCjCE
;
256 * Layout of constraint bits:
258 * 0-1 add field: number of uses of PMC1 (max 1)
259 * 2-3, 4-5, 6-7: ditto for PMC2, 3, 4
260 * 8-10 select field: nest (subunit) event selector
261 * 16-19 select field: unit on byte 0 of event bus
262 * 20-23, 24-27, 28-31 ditto for bytes 1, 2, 3
264 static int p6_get_constraint(unsigned int event
, u64
*maskp
, u64
*valp
)
267 unsigned int mask
= 0, value
= 0;
269 pmc
= (event
>> PM_PMC_SH
) & PM_PMC_MSK
;
277 if (event
& PM_BUSEVENT_MSK
) {
278 byte
= (event
>> PM_BYTE_SH
) & PM_BYTE_MSK
;
280 mask
|= PM_UNIT_MSKS
<< sh
;
281 value
|= (event
& PM_UNIT_MSKS
) << sh
;
282 if ((event
& PM_UNIT_MSKS
) == (5 << PM_UNIT_SH
)) {
283 mask
|= PM_SUBUNIT_MSKS
;
284 value
|= event
& PM_SUBUNIT_MSKS
;
292 #define MAX_ALT 4 /* at most 4 alternatives for any event */
294 static const unsigned int event_alternatives
[][MAX_ALT
] = {
295 { 0x0130e8, 0x2000f6, 0x3000fc }, /* PM_PTEG_RELOAD_VALID */
296 { 0x080080, 0x10000d, 0x30000c, 0x4000f0 }, /* PM_LD_MISS_L1 */
297 { 0x080088, 0x200054, 0x3000f0 }, /* PM_ST_MISS_L1 */
298 { 0x10000a, 0x2000f4 }, /* PM_RUN_CYC */
299 { 0x10000b, 0x2000f5 }, /* PM_RUN_COUNT */
300 { 0x10000e, 0x400010 }, /* PM_PURR */
301 { 0x100010, 0x4000f8 }, /* PM_FLUSH */
302 { 0x10001a, 0x200010 }, /* PM_MRK_INST_DISP */
303 { 0x100026, 0x3000f8 }, /* PM_TB_BIT_TRANS */
304 { 0x100054, 0x2000f0 }, /* PM_ST_FIN */
305 { 0x100056, 0x2000fc }, /* PM_L1_ICACHE_MISS */
306 { 0x1000f0, 0x40000a }, /* PM_INST_IMC_MATCH_CMPL */
307 { 0x1000f8, 0x200008 }, /* PM_GCT_EMPTY_CYC */
308 { 0x1000fc, 0x400006 }, /* PM_LSU_DERAT_MISS_CYC */
309 { 0x20000e, 0x400007 }, /* PM_LSU_DERAT_MISS */
310 { 0x200012, 0x300012 }, /* PM_INST_DISP */
311 { 0x2000f2, 0x3000f2 }, /* PM_INST_DISP */
312 { 0x2000f8, 0x300010 }, /* PM_EXT_INT */
313 { 0x2000fe, 0x300056 }, /* PM_DATA_FROM_L2MISS */
314 { 0x2d0030, 0x30001a }, /* PM_MRK_FPU_FIN */
315 { 0x30000a, 0x400018 }, /* PM_MRK_INST_FIN */
316 { 0x3000f6, 0x40000e }, /* PM_L1_DCACHE_RELOAD_VALID */
317 { 0x3000fe, 0x400056 }, /* PM_DATA_FROM_L3MISS */
321 * This could be made more efficient with a binary search on
322 * a presorted list, if necessary
324 static int find_alternatives_list(unsigned int event
)
329 for (i
= 0; i
< ARRAY_SIZE(event_alternatives
); ++i
) {
330 if (event
< event_alternatives
[i
][0])
332 for (j
= 0; j
< MAX_ALT
; ++j
) {
333 alt
= event_alternatives
[i
][j
];
334 if (!alt
|| event
< alt
)
343 static int p6_get_alternatives(unsigned int event
, unsigned int alt
[])
346 unsigned int aevent
, psel
, pmc
;
347 unsigned int nalt
= 1;
351 /* check the alternatives table */
352 i
= find_alternatives_list(event
);
354 /* copy out alternatives from list */
355 for (j
= 0; j
< MAX_ALT
; ++j
) {
356 aevent
= event_alternatives
[i
][j
];
360 alt
[nalt
++] = aevent
;
364 /* Check for alternative ways of computing sum events */
365 /* PMCSEL 0x32 counter N == PMCSEL 0x34 counter 5-N */
366 psel
= event
& (PM_PMCSEL_MSK
& ~1); /* ignore edge bit */
367 pmc
= (event
>> PM_PMC_SH
) & PM_PMC_MSK
;
368 if (pmc
&& (psel
== 0x32 || psel
== 0x34))
369 alt
[nalt
++] = ((event
^ 0x6) & ~PM_PMC_MSKS
) |
370 ((5 - pmc
) << PM_PMC_SH
);
372 /* PMCSEL 0x38 counter N == PMCSEL 0x3a counter N+/-2 */
373 if (pmc
&& (psel
== 0x38 || psel
== 0x3a))
374 alt
[nalt
++] = ((event
^ 0x2) & ~PM_PMC_MSKS
) |
375 ((pmc
> 2? pmc
- 2: pmc
+ 2) << PM_PMC_SH
);
381 static void p6_disable_pmc(unsigned int pmc
, u64 mmcr
[])
383 /* Set PMCxSEL to 0 to disable PMCx */
384 mmcr
[1] &= ~(0xffUL
<< MMCR1_PMCSEL_SH(pmc
));
387 static int power6_generic_events
[] = {
388 [PERF_COUNT_CPU_CYCLES
] = 0x1e,
389 [PERF_COUNT_INSTRUCTIONS
] = 2,
390 [PERF_COUNT_CACHE_REFERENCES
] = 0x280030, /* LD_REF_L1 */
391 [PERF_COUNT_CACHE_MISSES
] = 0x30000c, /* LD_MISS_L1 */
392 [PERF_COUNT_BRANCH_INSTRUCTIONS
] = 0x410a0, /* BR_PRED */
393 [PERF_COUNT_BRANCH_MISSES
] = 0x400052, /* BR_MPRED */
396 struct power_pmu power6_pmu
= {
398 .max_alternatives
= MAX_ALT
,
401 .compute_mmcr
= p6_compute_mmcr
,
402 .get_constraint
= p6_get_constraint
,
403 .get_alternatives
= p6_get_alternatives
,
404 .disable_pmc
= p6_disable_pmc
,
405 .n_generic
= ARRAY_SIZE(power6_generic_events
),
406 .generic_events
= power6_generic_events
,