powerpc: Add threads_per_subcore
[deliverable/linux.git] / arch / powerpc / kernel / setup-common.c
1 /*
2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #undef DEBUG
14
15 #include <linux/export.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/platform_device.h>
24 #include <linux/seq_file.h>
25 #include <linux/ioport.h>
26 #include <linux/console.h>
27 #include <linux/screen_info.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/debugfs.h>
35 #include <linux/percpu.h>
36 #include <linux/memblock.h>
37 #include <linux/of_platform.h>
38 #include <asm/io.h>
39 #include <asm/paca.h>
40 #include <asm/prom.h>
41 #include <asm/processor.h>
42 #include <asm/vdso_datapage.h>
43 #include <asm/pgtable.h>
44 #include <asm/smp.h>
45 #include <asm/elf.h>
46 #include <asm/machdep.h>
47 #include <asm/time.h>
48 #include <asm/cputable.h>
49 #include <asm/sections.h>
50 #include <asm/firmware.h>
51 #include <asm/btext.h>
52 #include <asm/nvram.h>
53 #include <asm/setup.h>
54 #include <asm/rtas.h>
55 #include <asm/iommu.h>
56 #include <asm/serial.h>
57 #include <asm/cache.h>
58 #include <asm/page.h>
59 #include <asm/mmu.h>
60 #include <asm/xmon.h>
61 #include <asm/cputhreads.h>
62 #include <mm/mmu_decl.h>
63 #include <asm/fadump.h>
64
65 #ifdef DEBUG
66 #include <asm/udbg.h>
67 #define DBG(fmt...) udbg_printf(fmt)
68 #else
69 #define DBG(fmt...)
70 #endif
71
72 /* The main machine-dep calls structure
73 */
74 struct machdep_calls ppc_md;
75 EXPORT_SYMBOL(ppc_md);
76 struct machdep_calls *machine_id;
77 EXPORT_SYMBOL(machine_id);
78
79 int boot_cpuid = -1;
80 EXPORT_SYMBOL_GPL(boot_cpuid);
81
82 unsigned long klimit = (unsigned long) _end;
83
84 char cmd_line[COMMAND_LINE_SIZE];
85
86 /*
87 * This still seems to be needed... -- paulus
88 */
89 struct screen_info screen_info = {
90 .orig_x = 0,
91 .orig_y = 25,
92 .orig_video_cols = 80,
93 .orig_video_lines = 25,
94 .orig_video_isVGA = 1,
95 .orig_video_points = 16
96 };
97
98 /* Variables required to store legacy IO irq routing */
99 int of_i8042_kbd_irq;
100 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
101 int of_i8042_aux_irq;
102 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
103
104 #ifdef __DO_IRQ_CANON
105 /* XXX should go elsewhere eventually */
106 int ppc_do_canonicalize_irqs;
107 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
108 #endif
109
110 /* also used by kexec */
111 void machine_shutdown(void)
112 {
113 #ifdef CONFIG_FA_DUMP
114 /*
115 * if fadump is active, cleanup the fadump registration before we
116 * shutdown.
117 */
118 fadump_cleanup();
119 #endif
120
121 if (ppc_md.machine_shutdown)
122 ppc_md.machine_shutdown();
123 }
124
125 void machine_restart(char *cmd)
126 {
127 machine_shutdown();
128 if (ppc_md.restart)
129 ppc_md.restart(cmd);
130 #ifdef CONFIG_SMP
131 smp_send_stop();
132 #endif
133 printk(KERN_EMERG "System Halted, OK to turn off power\n");
134 local_irq_disable();
135 while (1) ;
136 }
137
138 void machine_power_off(void)
139 {
140 machine_shutdown();
141 if (ppc_md.power_off)
142 ppc_md.power_off();
143 #ifdef CONFIG_SMP
144 smp_send_stop();
145 #endif
146 printk(KERN_EMERG "System Halted, OK to turn off power\n");
147 local_irq_disable();
148 while (1) ;
149 }
150 /* Used by the G5 thermal driver */
151 EXPORT_SYMBOL_GPL(machine_power_off);
152
153 void (*pm_power_off)(void) = machine_power_off;
154 EXPORT_SYMBOL_GPL(pm_power_off);
155
156 void machine_halt(void)
157 {
158 machine_shutdown();
159 if (ppc_md.halt)
160 ppc_md.halt();
161 #ifdef CONFIG_SMP
162 smp_send_stop();
163 #endif
164 printk(KERN_EMERG "System Halted, OK to turn off power\n");
165 local_irq_disable();
166 while (1) ;
167 }
168
169
170 #ifdef CONFIG_TAU
171 extern u32 cpu_temp(unsigned long cpu);
172 extern u32 cpu_temp_both(unsigned long cpu);
173 #endif /* CONFIG_TAU */
174
175 #ifdef CONFIG_SMP
176 DEFINE_PER_CPU(unsigned int, cpu_pvr);
177 #endif
178
179 static void show_cpuinfo_summary(struct seq_file *m)
180 {
181 struct device_node *root;
182 const char *model = NULL;
183 #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
184 unsigned long bogosum = 0;
185 int i;
186 for_each_online_cpu(i)
187 bogosum += loops_per_jiffy;
188 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
189 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
190 #endif /* CONFIG_SMP && CONFIG_PPC32 */
191 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
192 if (ppc_md.name)
193 seq_printf(m, "platform\t: %s\n", ppc_md.name);
194 root = of_find_node_by_path("/");
195 if (root)
196 model = of_get_property(root, "model", NULL);
197 if (model)
198 seq_printf(m, "model\t\t: %s\n", model);
199 of_node_put(root);
200
201 if (ppc_md.show_cpuinfo != NULL)
202 ppc_md.show_cpuinfo(m);
203
204 #ifdef CONFIG_PPC32
205 /* Display the amount of memory */
206 seq_printf(m, "Memory\t\t: %d MB\n",
207 (unsigned int)(total_memory / (1024 * 1024)));
208 #endif
209 }
210
211 static int show_cpuinfo(struct seq_file *m, void *v)
212 {
213 unsigned long cpu_id = (unsigned long)v - 1;
214 unsigned int pvr;
215 unsigned long proc_freq;
216 unsigned short maj;
217 unsigned short min;
218
219 /* We only show online cpus: disable preempt (overzealous, I
220 * knew) to prevent cpu going down. */
221 preempt_disable();
222 if (!cpu_online(cpu_id)) {
223 preempt_enable();
224 return 0;
225 }
226
227 #ifdef CONFIG_SMP
228 pvr = per_cpu(cpu_pvr, cpu_id);
229 #else
230 pvr = mfspr(SPRN_PVR);
231 #endif
232 maj = (pvr >> 8) & 0xFF;
233 min = pvr & 0xFF;
234
235 seq_printf(m, "processor\t: %lu\n", cpu_id);
236 seq_printf(m, "cpu\t\t: ");
237
238 if (cur_cpu_spec->pvr_mask)
239 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
240 else
241 seq_printf(m, "unknown (%08x)", pvr);
242
243 #ifdef CONFIG_ALTIVEC
244 if (cpu_has_feature(CPU_FTR_ALTIVEC))
245 seq_printf(m, ", altivec supported");
246 #endif /* CONFIG_ALTIVEC */
247
248 seq_printf(m, "\n");
249
250 #ifdef CONFIG_TAU
251 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
252 #ifdef CONFIG_TAU_AVERAGE
253 /* more straightforward, but potentially misleading */
254 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
255 cpu_temp(cpu_id));
256 #else
257 /* show the actual temp sensor range */
258 u32 temp;
259 temp = cpu_temp_both(cpu_id);
260 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
261 temp & 0xff, temp >> 16);
262 #endif
263 }
264 #endif /* CONFIG_TAU */
265
266 /*
267 * Platforms that have variable clock rates, should implement
268 * the method ppc_md.get_proc_freq() that reports the clock
269 * rate of a given cpu. The rest can use ppc_proc_freq to
270 * report the clock rate that is same across all cpus.
271 */
272 if (ppc_md.get_proc_freq)
273 proc_freq = ppc_md.get_proc_freq(cpu_id);
274 else
275 proc_freq = ppc_proc_freq;
276
277 if (proc_freq)
278 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
279 proc_freq / 1000000, proc_freq % 1000000);
280
281 if (ppc_md.show_percpuinfo != NULL)
282 ppc_md.show_percpuinfo(m, cpu_id);
283
284 /* If we are a Freescale core do a simple check so
285 * we dont have to keep adding cases in the future */
286 if (PVR_VER(pvr) & 0x8000) {
287 switch (PVR_VER(pvr)) {
288 case 0x8000: /* 7441/7450/7451, Voyager */
289 case 0x8001: /* 7445/7455, Apollo 6 */
290 case 0x8002: /* 7447/7457, Apollo 7 */
291 case 0x8003: /* 7447A, Apollo 7 PM */
292 case 0x8004: /* 7448, Apollo 8 */
293 case 0x800c: /* 7410, Nitro */
294 maj = ((pvr >> 8) & 0xF);
295 min = PVR_MIN(pvr);
296 break;
297 default: /* e500/book-e */
298 maj = PVR_MAJ(pvr);
299 min = PVR_MIN(pvr);
300 break;
301 }
302 } else {
303 switch (PVR_VER(pvr)) {
304 case 0x0020: /* 403 family */
305 maj = PVR_MAJ(pvr) + 1;
306 min = PVR_MIN(pvr);
307 break;
308 case 0x1008: /* 740P/750P ?? */
309 maj = ((pvr >> 8) & 0xFF) - 1;
310 min = pvr & 0xFF;
311 break;
312 default:
313 maj = (pvr >> 8) & 0xFF;
314 min = pvr & 0xFF;
315 break;
316 }
317 }
318
319 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
320 maj, min, PVR_VER(pvr), PVR_REV(pvr));
321
322 #ifdef CONFIG_PPC32
323 seq_printf(m, "bogomips\t: %lu.%02lu\n",
324 loops_per_jiffy / (500000/HZ),
325 (loops_per_jiffy / (5000/HZ)) % 100);
326 #endif
327
328 #ifdef CONFIG_SMP
329 seq_printf(m, "\n");
330 #endif
331
332 preempt_enable();
333
334 /* If this is the last cpu, print the summary */
335 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
336 show_cpuinfo_summary(m);
337
338 return 0;
339 }
340
341 static void *c_start(struct seq_file *m, loff_t *pos)
342 {
343 if (*pos == 0) /* just in case, cpu 0 is not the first */
344 *pos = cpumask_first(cpu_online_mask);
345 else
346 *pos = cpumask_next(*pos - 1, cpu_online_mask);
347 if ((*pos) < nr_cpu_ids)
348 return (void *)(unsigned long)(*pos + 1);
349 return NULL;
350 }
351
352 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
353 {
354 (*pos)++;
355 return c_start(m, pos);
356 }
357
358 static void c_stop(struct seq_file *m, void *v)
359 {
360 }
361
362 const struct seq_operations cpuinfo_op = {
363 .start =c_start,
364 .next = c_next,
365 .stop = c_stop,
366 .show = show_cpuinfo,
367 };
368
369 void __init check_for_initrd(void)
370 {
371 #ifdef CONFIG_BLK_DEV_INITRD
372 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
373 initrd_start, initrd_end);
374
375 /* If we were passed an initrd, set the ROOT_DEV properly if the values
376 * look sensible. If not, clear initrd reference.
377 */
378 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
379 initrd_end > initrd_start)
380 ROOT_DEV = Root_RAM0;
381 else
382 initrd_start = initrd_end = 0;
383
384 if (initrd_start)
385 printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
386
387 DBG(" <- check_for_initrd()\n");
388 #endif /* CONFIG_BLK_DEV_INITRD */
389 }
390
391 #ifdef CONFIG_SMP
392
393 int threads_per_core, threads_per_subcore, threads_shift;
394 cpumask_t threads_core_mask;
395 EXPORT_SYMBOL_GPL(threads_per_core);
396 EXPORT_SYMBOL_GPL(threads_per_subcore);
397 EXPORT_SYMBOL_GPL(threads_shift);
398 EXPORT_SYMBOL_GPL(threads_core_mask);
399
400 static void __init cpu_init_thread_core_maps(int tpc)
401 {
402 int i;
403
404 threads_per_core = tpc;
405 threads_per_subcore = tpc;
406 cpumask_clear(&threads_core_mask);
407
408 /* This implementation only supports power of 2 number of threads
409 * for simplicity and performance
410 */
411 threads_shift = ilog2(tpc);
412 BUG_ON(tpc != (1 << threads_shift));
413
414 for (i = 0; i < tpc; i++)
415 cpumask_set_cpu(i, &threads_core_mask);
416
417 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
418 tpc, tpc > 1 ? "s" : "");
419 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
420 }
421
422
423 /**
424 * setup_cpu_maps - initialize the following cpu maps:
425 * cpu_possible_mask
426 * cpu_present_mask
427 *
428 * Having the possible map set up early allows us to restrict allocations
429 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
430 *
431 * We do not initialize the online map here; cpus set their own bits in
432 * cpu_online_mask as they come up.
433 *
434 * This function is valid only for Open Firmware systems. finish_device_tree
435 * must be called before using this.
436 *
437 * While we're here, we may as well set the "physical" cpu ids in the paca.
438 *
439 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
440 */
441 void __init smp_setup_cpu_maps(void)
442 {
443 struct device_node *dn = NULL;
444 int cpu = 0;
445 int nthreads = 1;
446
447 DBG("smp_setup_cpu_maps()\n");
448
449 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
450 const __be32 *intserv;
451 __be32 cpu_be;
452 int j, len;
453
454 DBG(" * %s...\n", dn->full_name);
455
456 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
457 &len);
458 if (intserv) {
459 nthreads = len / sizeof(int);
460 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
461 nthreads);
462 } else {
463 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
464 intserv = of_get_property(dn, "reg", NULL);
465 if (!intserv) {
466 cpu_be = cpu_to_be32(cpu);
467 intserv = &cpu_be; /* assume logical == phys */
468 }
469 }
470
471 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
472 DBG(" thread %d -> cpu %d (hard id %d)\n",
473 j, cpu, be32_to_cpu(intserv[j]));
474 set_cpu_present(cpu, true);
475 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
476 set_cpu_possible(cpu, true);
477 cpu++;
478 }
479 }
480
481 /* If no SMT supported, nthreads is forced to 1 */
482 if (!cpu_has_feature(CPU_FTR_SMT)) {
483 DBG(" SMT disabled ! nthreads forced to 1\n");
484 nthreads = 1;
485 }
486
487 #ifdef CONFIG_PPC64
488 /*
489 * On pSeries LPAR, we need to know how many cpus
490 * could possibly be added to this partition.
491 */
492 if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
493 (dn = of_find_node_by_path("/rtas"))) {
494 int num_addr_cell, num_size_cell, maxcpus;
495 const __be32 *ireg;
496
497 num_addr_cell = of_n_addr_cells(dn);
498 num_size_cell = of_n_size_cells(dn);
499
500 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
501
502 if (!ireg)
503 goto out;
504
505 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
506
507 /* Double maxcpus for processors which have SMT capability */
508 if (cpu_has_feature(CPU_FTR_SMT))
509 maxcpus *= nthreads;
510
511 if (maxcpus > nr_cpu_ids) {
512 printk(KERN_WARNING
513 "Partition configured for %d cpus, "
514 "operating system maximum is %d.\n",
515 maxcpus, nr_cpu_ids);
516 maxcpus = nr_cpu_ids;
517 } else
518 printk(KERN_INFO "Partition configured for %d cpus.\n",
519 maxcpus);
520
521 for (cpu = 0; cpu < maxcpus; cpu++)
522 set_cpu_possible(cpu, true);
523 out:
524 of_node_put(dn);
525 }
526 vdso_data->processorCount = num_present_cpus();
527 #endif /* CONFIG_PPC64 */
528
529 /* Initialize CPU <=> thread mapping/
530 *
531 * WARNING: We assume that the number of threads is the same for
532 * every CPU in the system. If that is not the case, then some code
533 * here will have to be reworked
534 */
535 cpu_init_thread_core_maps(nthreads);
536
537 /* Now that possible cpus are set, set nr_cpu_ids for later use */
538 setup_nr_cpu_ids();
539
540 free_unused_pacas();
541 }
542 #endif /* CONFIG_SMP */
543
544 #ifdef CONFIG_PCSPKR_PLATFORM
545 static __init int add_pcspkr(void)
546 {
547 struct device_node *np;
548 struct platform_device *pd;
549 int ret;
550
551 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
552 of_node_put(np);
553 if (!np)
554 return -ENODEV;
555
556 pd = platform_device_alloc("pcspkr", -1);
557 if (!pd)
558 return -ENOMEM;
559
560 ret = platform_device_add(pd);
561 if (ret)
562 platform_device_put(pd);
563
564 return ret;
565 }
566 device_initcall(add_pcspkr);
567 #endif /* CONFIG_PCSPKR_PLATFORM */
568
569 void probe_machine(void)
570 {
571 extern struct machdep_calls __machine_desc_start;
572 extern struct machdep_calls __machine_desc_end;
573
574 /*
575 * Iterate all ppc_md structures until we find the proper
576 * one for the current machine type
577 */
578 DBG("Probing machine type ...\n");
579
580 for (machine_id = &__machine_desc_start;
581 machine_id < &__machine_desc_end;
582 machine_id++) {
583 DBG(" %s ...", machine_id->name);
584 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
585 if (ppc_md.probe()) {
586 DBG(" match !\n");
587 break;
588 }
589 DBG("\n");
590 }
591 /* What can we do if we didn't find ? */
592 if (machine_id >= &__machine_desc_end) {
593 DBG("No suitable machine found !\n");
594 for (;;);
595 }
596
597 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
598 }
599
600 /* Match a class of boards, not a specific device configuration. */
601 int check_legacy_ioport(unsigned long base_port)
602 {
603 struct device_node *parent, *np = NULL;
604 int ret = -ENODEV;
605
606 switch(base_port) {
607 case I8042_DATA_REG:
608 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
609 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
610 if (np) {
611 parent = of_get_parent(np);
612
613 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
614 if (!of_i8042_kbd_irq)
615 of_i8042_kbd_irq = 1;
616
617 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
618 if (!of_i8042_aux_irq)
619 of_i8042_aux_irq = 12;
620
621 of_node_put(np);
622 np = parent;
623 break;
624 }
625 np = of_find_node_by_type(NULL, "8042");
626 /* Pegasos has no device_type on its 8042 node, look for the
627 * name instead */
628 if (!np)
629 np = of_find_node_by_name(NULL, "8042");
630 if (np) {
631 of_i8042_kbd_irq = 1;
632 of_i8042_aux_irq = 12;
633 }
634 break;
635 case FDC_BASE: /* FDC1 */
636 np = of_find_node_by_type(NULL, "fdc");
637 break;
638 default:
639 /* ipmi is supposed to fail here */
640 break;
641 }
642 if (!np)
643 return ret;
644 parent = of_get_parent(np);
645 if (parent) {
646 if (strcmp(parent->type, "isa") == 0)
647 ret = 0;
648 of_node_put(parent);
649 }
650 of_node_put(np);
651 return ret;
652 }
653 EXPORT_SYMBOL(check_legacy_ioport);
654
655 static int ppc_panic_event(struct notifier_block *this,
656 unsigned long event, void *ptr)
657 {
658 /*
659 * If firmware-assisted dump has been registered then trigger
660 * firmware-assisted dump and let firmware handle everything else.
661 */
662 crash_fadump(NULL, ptr);
663 ppc_md.panic(ptr); /* May not return */
664 return NOTIFY_DONE;
665 }
666
667 static struct notifier_block ppc_panic_block = {
668 .notifier_call = ppc_panic_event,
669 .priority = INT_MIN /* may not return; must be done last */
670 };
671
672 void __init setup_panic(void)
673 {
674 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
675 }
676
677 #ifdef CONFIG_CHECK_CACHE_COHERENCY
678 /*
679 * For platforms that have configurable cache-coherency. This function
680 * checks that the cache coherency setting of the kernel matches the setting
681 * left by the firmware, as indicated in the device tree. Since a mismatch
682 * will eventually result in DMA failures, we print * and error and call
683 * BUG() in that case.
684 */
685
686 #ifdef CONFIG_NOT_COHERENT_CACHE
687 #define KERNEL_COHERENCY 0
688 #else
689 #define KERNEL_COHERENCY 1
690 #endif
691
692 static int __init check_cache_coherency(void)
693 {
694 struct device_node *np;
695 const void *prop;
696 int devtree_coherency;
697
698 np = of_find_node_by_path("/");
699 prop = of_get_property(np, "coherency-off", NULL);
700 of_node_put(np);
701
702 devtree_coherency = prop ? 0 : 1;
703
704 if (devtree_coherency != KERNEL_COHERENCY) {
705 printk(KERN_ERR
706 "kernel coherency:%s != device tree_coherency:%s\n",
707 KERNEL_COHERENCY ? "on" : "off",
708 devtree_coherency ? "on" : "off");
709 BUG();
710 }
711
712 return 0;
713 }
714
715 late_initcall(check_cache_coherency);
716 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
717
718 #ifdef CONFIG_DEBUG_FS
719 struct dentry *powerpc_debugfs_root;
720 EXPORT_SYMBOL(powerpc_debugfs_root);
721
722 static int powerpc_debugfs_init(void)
723 {
724 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
725
726 return powerpc_debugfs_root == NULL;
727 }
728 arch_initcall(powerpc_debugfs_init);
729 #endif
730
731 #ifdef CONFIG_BOOKE_WDT
732 extern u32 booke_wdt_enabled;
733 extern u32 booke_wdt_period;
734
735 /* Checks wdt=x and wdt_period=xx command-line option */
736 notrace int __init early_parse_wdt(char *p)
737 {
738 if (p && strncmp(p, "0", 1) != 0)
739 booke_wdt_enabled = 1;
740
741 return 0;
742 }
743 early_param("wdt", early_parse_wdt);
744
745 int __init early_parse_wdt_period(char *p)
746 {
747 unsigned long ret;
748 if (p) {
749 if (!kstrtol(p, 0, &ret))
750 booke_wdt_period = ret;
751 }
752
753 return 0;
754 }
755 early_param("wdt_period", early_parse_wdt_period);
756 #endif /* CONFIG_BOOKE_WDT */
757
758 void ppc_printk_progress(char *s, unsigned short hex)
759 {
760 pr_info("%s\n", s);
761 }
762
763 void arch_setup_pdev_archdata(struct platform_device *pdev)
764 {
765 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
766 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
767 set_dma_ops(&pdev->dev, &dma_direct_ops);
768 }
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