2 * Common prep/pmac/chrp boot and setup code.
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/tty.h>
14 #include <linux/bootmem.h>
15 #include <linux/seq_file.h>
16 #include <linux/root_dev.h>
17 #include <linux/cpu.h>
18 #include <linux/console.h>
19 #include <linux/lmb.h>
23 #include <asm/processor.h>
24 #include <asm/pgtable.h>
25 #include <asm/setup.h>
28 #include <asm/cputable.h>
29 #include <asm/bootx.h>
30 #include <asm/btext.h>
31 #include <asm/machdep.h>
32 #include <asm/uaccess.h>
33 #include <asm/system.h>
34 #include <asm/pmac_feature.h>
35 #include <asm/sections.h>
36 #include <asm/nvram.h>
39 #include <asm/serial.h>
46 #if defined CONFIG_KGDB
51 extern void _mcount(void);
52 EXPORT_SYMBOL(_mcount
);
55 extern void bootx_init(unsigned long r4
, unsigned long phys
);
58 EXPORT_SYMBOL_GPL(boot_cpuid
);
61 unsigned long ISA_DMA_THRESHOLD
;
62 unsigned int DMA_MODE_READ
;
63 unsigned int DMA_MODE_WRITE
;
67 #ifdef CONFIG_VGA_CONSOLE
68 unsigned long vgacon_remap_base
;
69 EXPORT_SYMBOL(vgacon_remap_base
);
73 * These are used in binfmt_elf.c to put aux entries on the stack
74 * for each elf executable being started.
81 * We're called here very early in the boot. We determine the machine
82 * type and call the appropriate low-level setup functions.
83 * -- Cort <cort@fsmlabs.com>
85 * Note that the kernel may be running at an address which is different
86 * from the address that it was linked at, so we must use RELOC/PTRRELOC
87 * to access static data (including strings). -- paulus
89 notrace
unsigned long __init
early_init(unsigned long dt_ptr
)
91 unsigned long offset
= reloc_offset();
92 struct cpu_spec
*spec
;
94 /* First zero the BSS -- use memset_io, some platforms don't have
96 memset_io((void __iomem
*)PTRRELOC(&__bss_start
), 0,
97 __bss_stop
- __bss_start
);
100 * Identify the CPU type and fix up code sections
101 * that depend on which cpu we have.
103 spec
= identify_cpu(offset
, mfspr(SPRN_PVR
));
105 do_feature_fixups(spec
->cpu_features
,
106 PTRRELOC(&__start___ftr_fixup
),
107 PTRRELOC(&__stop___ftr_fixup
));
109 return KERNELBASE
+ offset
;
114 * Find out what kind of machine we're on and save any data we need
115 * from the early boot process (devtree is copied on pmac by prom_init()).
116 * This is called very early on the boot process, after a minimal
117 * MMU environment has been set up but before MMU_init is called.
119 notrace
void __init
machine_init(unsigned long dt_ptr
, unsigned long phys
)
121 /* Enable early debugging if any specified (see udbg.h) */
124 /* Do some early initialization based on the flat device tree */
125 early_init_devtree(__va(dt_ptr
));
130 if (cpu_has_feature(CPU_FTR_CAN_DOZE
) ||
131 cpu_has_feature(CPU_FTR_CAN_NAP
))
132 ppc_md
.power_save
= ppc6xx_idle
;
136 ppc_md
.progress("id mach(): done", 0x200);
139 #ifdef CONFIG_BOOKE_WDT
140 /* Checks wdt=x and wdt_period=xx command-line option */
141 notrace
int __init
early_parse_wdt(char *p
)
143 if (p
&& strncmp(p
, "0", 1) != 0)
144 booke_wdt_enabled
= 1;
148 early_param("wdt", early_parse_wdt
);
150 int __init
early_parse_wdt_period (char *p
)
153 booke_wdt_period
= simple_strtoul(p
, NULL
, 0);
157 early_param("wdt_period", early_parse_wdt_period
);
158 #endif /* CONFIG_BOOKE_WDT */
160 /* Checks "l2cr=xxxx" command-line option */
161 int __init
ppc_setup_l2cr(char *str
)
163 if (cpu_has_feature(CPU_FTR_L2CR
)) {
164 unsigned long val
= simple_strtoul(str
, NULL
, 0);
165 printk(KERN_INFO
"l2cr set to %lx\n", val
);
166 _set_L2CR(0); /* force invalidate by disable cache */
167 _set_L2CR(val
); /* and enable it */
171 __setup("l2cr=", ppc_setup_l2cr
);
173 /* Checks "l3cr=xxxx" command-line option */
174 int __init
ppc_setup_l3cr(char *str
)
176 if (cpu_has_feature(CPU_FTR_L3CR
)) {
177 unsigned long val
= simple_strtoul(str
, NULL
, 0);
178 printk(KERN_INFO
"l3cr set to %lx\n", val
);
179 _set_L3CR(val
); /* and enable it */
183 __setup("l3cr=", ppc_setup_l3cr
);
185 #ifdef CONFIG_GENERIC_NVRAM
187 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
188 unsigned char nvram_read_byte(int addr
)
190 if (ppc_md
.nvram_read_val
)
191 return ppc_md
.nvram_read_val(addr
);
194 EXPORT_SYMBOL(nvram_read_byte
);
196 void nvram_write_byte(unsigned char val
, int addr
)
198 if (ppc_md
.nvram_write_val
)
199 ppc_md
.nvram_write_val(addr
, val
);
201 EXPORT_SYMBOL(nvram_write_byte
);
203 void nvram_sync(void)
205 if (ppc_md
.nvram_sync
)
208 EXPORT_SYMBOL(nvram_sync
);
210 #endif /* CONFIG_NVRAM */
212 static DEFINE_PER_CPU(struct cpu
, cpu_devices
);
214 int __init
ppc_init(void)
218 /* clear the progress line */
220 ppc_md
.progress(" ", 0xffff);
222 /* register CPU devices */
223 for_each_possible_cpu(cpu
) {
224 struct cpu
*c
= &per_cpu(cpu_devices
, cpu
);
226 register_cpu(c
, cpu
);
229 /* call platform init */
230 if (ppc_md
.init
!= NULL
) {
236 arch_initcall(ppc_init
);
238 #ifdef CONFIG_IRQSTACKS
239 static void __init
irqstack_early_init(void)
243 /* interrupt stacks must be in lowmem, we get that for free on ppc32
244 * as the lmb is limited to lowmem by LMB_REAL_LIMIT */
245 for_each_possible_cpu(i
) {
246 softirq_ctx
[i
] = (struct thread_info
*)
247 __va(lmb_alloc(THREAD_SIZE
, THREAD_SIZE
));
248 hardirq_ctx
[i
] = (struct thread_info
*)
249 __va(lmb_alloc(THREAD_SIZE
, THREAD_SIZE
));
253 #define irqstack_early_init()
256 /* Warning, IO base is not yet inited */
257 void __init
setup_arch(char **cmdline_p
)
259 *cmdline_p
= cmd_line
;
261 /* so udelay does something sensible, assume <= 1000 bogomips */
262 loops_per_jiffy
= 500000000 / HZ
;
264 unflatten_device_tree();
267 if (ppc_md
.init_early
)
270 find_legacy_serial_ports();
272 smp_setup_cpu_maps();
274 /* Register early console */
275 register_early_udbg_console();
279 #if defined(CONFIG_KGDB)
280 if (ppc_md
.kgdb_map_scc
)
281 ppc_md
.kgdb_map_scc();
283 if (strstr(cmd_line
, "gdb")) {
285 ppc_md
.progress("setup_arch: kgdb breakpoint", 0x4000);
286 printk("kgdb breakpoint activated\n");
292 * Set cache line size based on type of cpu as a default.
293 * Systems with OF can look in the properties on the cpu node(s)
294 * for a possibly more accurate value.
296 dcache_bsize
= cur_cpu_spec
->dcache_bsize
;
297 icache_bsize
= cur_cpu_spec
->icache_bsize
;
299 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE
))
300 ucache_bsize
= icache_bsize
= dcache_bsize
;
302 /* reboot on panic */
308 init_mm
.start_code
= (unsigned long)_stext
;
309 init_mm
.end_code
= (unsigned long) _etext
;
310 init_mm
.end_data
= (unsigned long) _edata
;
311 init_mm
.brk
= klimit
;
313 irqstack_early_init();
315 /* set up the bootmem stuff with available memory */
317 if ( ppc_md
.progress
) ppc_md
.progress("setup_arch: bootmem", 0x3eab);
319 #ifdef CONFIG_DUMMY_CONSOLE
320 conswitchp
= &dummy_con
;
323 if (ppc_md
.setup_arch
)
325 if ( ppc_md
.progress
) ppc_md
.progress("arch: exit", 0x3eab);
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