powerpc: Separate PACA fields for server CPUs
[deliverable/linux.git] / arch / powerpc / kernel / softemu8xx.c
1 /*
2 * Software emulation of some PPC instructions for the 8xx core.
3 *
4 * Copyright (C) 1998 Dan Malek (dmalek@jlc.net)
5 *
6 * Software floating emuation for the MPC8xx processor. I did this mostly
7 * because it was easier than trying to get the libraries compiled for
8 * software floating point. The goal is still to get the libraries done,
9 * but I lost patience and needed some hacks to at least get init and
10 * shells running. The first problem is the setjmp/longjmp that save
11 * and restore the floating point registers.
12 *
13 * For this emulation, our working registers are found on the register
14 * save area.
15 */
16
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/mm.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/slab.h>
25 #include <linux/user.h>
26 #include <linux/interrupt.h>
27
28 #include <asm/pgtable.h>
29 #include <asm/uaccess.h>
30 #include <asm/system.h>
31 #include <asm/io.h>
32
33 /* Eventually we may need a look-up table, but this works for now.
34 */
35 #define LFS 48
36 #define LFD 50
37 #define LFDU 51
38 #define STFD 54
39 #define STFDU 55
40 #define FMR 63
41
42 void print_8xx_pte(struct mm_struct *mm, unsigned long addr)
43 {
44 pgd_t *pgd;
45 pmd_t *pmd;
46 pte_t *pte;
47
48 printk(" pte @ 0x%8lx: ", addr);
49 pgd = pgd_offset(mm, addr & PAGE_MASK);
50 if (pgd) {
51 pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK),
52 addr & PAGE_MASK);
53 if (pmd && pmd_present(*pmd)) {
54 pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
55 if (pte) {
56 printk(" (0x%08lx)->(0x%08lx)->0x%08lx\n",
57 (long)pgd, (long)pte, (long)pte_val(*pte));
58 #define pp ((long)pte_val(*pte))
59 printk(" RPN: %05lx PP: %lx SPS: %lx SH: %lx "
60 "CI: %lx v: %lx\n",
61 pp>>12, /* rpn */
62 (pp>>10)&3, /* pp */
63 (pp>>3)&1, /* small */
64 (pp>>2)&1, /* shared */
65 (pp>>1)&1, /* cache inhibit */
66 pp&1 /* valid */
67 );
68 #undef pp
69 }
70 else {
71 printk("no pte\n");
72 }
73 }
74 else {
75 printk("no pmd\n");
76 }
77 }
78 else {
79 printk("no pgd\n");
80 }
81 }
82
83 int get_8xx_pte(struct mm_struct *mm, unsigned long addr)
84 {
85 pgd_t *pgd;
86 pmd_t *pmd;
87 pte_t *pte;
88 int retval = 0;
89
90 pgd = pgd_offset(mm, addr & PAGE_MASK);
91 if (pgd) {
92 pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK),
93 addr & PAGE_MASK);
94 if (pmd && pmd_present(*pmd)) {
95 pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
96 if (pte) {
97 retval = (int)pte_val(*pte);
98 }
99 }
100 }
101 return retval;
102 }
103
104 /*
105 * We return 0 on success, 1 on unimplemented instruction, and EFAULT
106 * if a load/store faulted.
107 */
108 int Soft_emulate_8xx(struct pt_regs *regs)
109 {
110 u32 inst, instword;
111 u32 flreg, idxreg, disp;
112 int retval;
113 s16 sdisp;
114 u32 *ea, *ip;
115
116 retval = 0;
117
118 instword = *((u32 *)regs->nip);
119 inst = instword >> 26;
120
121 flreg = (instword >> 21) & 0x1f;
122 idxreg = (instword >> 16) & 0x1f;
123 disp = instword & 0xffff;
124
125 ea = (u32 *)(regs->gpr[idxreg] + disp);
126 ip = (u32 *)&current->thread.TS_FPR(flreg);
127
128 switch ( inst )
129 {
130 case LFD:
131 /* this is a 16 bit quantity that is sign extended
132 * so use a signed short here -- Cort
133 */
134 sdisp = (instword & 0xffff);
135 ea = (u32 *)(regs->gpr[idxreg] + sdisp);
136 if (copy_from_user(ip, ea, sizeof(double)))
137 retval = -EFAULT;
138 break;
139
140 case LFDU:
141 if (copy_from_user(ip, ea, sizeof(double)))
142 retval = -EFAULT;
143 else
144 regs->gpr[idxreg] = (u32)ea;
145 break;
146 case LFS:
147 sdisp = (instword & 0xffff);
148 ea = (u32 *)(regs->gpr[idxreg] + sdisp);
149 if (copy_from_user(ip, ea, sizeof(float)))
150 retval = -EFAULT;
151 break;
152 case STFD:
153 /* this is a 16 bit quantity that is sign extended
154 * so use a signed short here -- Cort
155 */
156 sdisp = (instword & 0xffff);
157 ea = (u32 *)(regs->gpr[idxreg] + sdisp);
158 if (copy_to_user(ea, ip, sizeof(double)))
159 retval = -EFAULT;
160 break;
161
162 case STFDU:
163 if (copy_to_user(ea, ip, sizeof(double)))
164 retval = -EFAULT;
165 else
166 regs->gpr[idxreg] = (u32)ea;
167 break;
168 case FMR:
169 /* assume this is a fp move -- Cort */
170 memcpy(ip, &current->thread.TS_FPR((instword>>11)&0x1f),
171 sizeof(double));
172 break;
173 default:
174 retval = 1;
175 printk("Bad emulation %s/%d\n"
176 " NIP: %08lx instruction: %08x opcode: %x "
177 "A: %x B: %x C: %x code: %x rc: %x\n",
178 current->comm,current->pid,
179 regs->nip,
180 instword,inst,
181 (instword>>16)&0x1f,
182 (instword>>11)&0x1f,
183 (instword>>6)&0x1f,
184 (instword>>1)&0x3ff,
185 instword&1);
186 {
187 int pa;
188 print_8xx_pte(current->mm,regs->nip);
189 pa = get_8xx_pte(current->mm,regs->nip) & PAGE_MASK;
190 pa |= (regs->nip & ~PAGE_MASK);
191 pa = (unsigned long)__va(pa);
192 printk("Kernel VA for NIP %x ", pa);
193 print_8xx_pte(current->mm,pa);
194 }
195 }
196
197 if (retval == 0)
198 regs->nip += 4;
199
200 return retval;
201 }
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