arch/powerpc/kernel/sysfs.c

   1 #include <linux/device.h>
   2 #include <linux/cpu.h>
   3 #include <linux/smp.h>
   4 #include <linux/percpu.h>
   5 #include <linux/init.h>
   6 #include <linux/sched.h>
   7 #include <linux/export.h>
   8 #include <linux/nodemask.h>
   9 #include <linux/cpumask.h>
  10 #include <linux/notifier.h>
  11
  12 #include <asm/current.h>
  13 #include <asm/processor.h>
  14 #include <asm/cputable.h>
  15 #include <asm/hvcall.h>
  16 #include <asm/prom.h>
  17 #include <asm/machdep.h>
  18 #include <asm/smp.h>
  19 #include <asm/pmc.h>
  20 #include <asm/firmware.h>
  21
  22 #include "cacheinfo.h"
  23
  24 #ifdef CONFIG_PPC64
  25 #include <asm/paca.h>
  26 #include <asm/lppaca.h>
  27 #endif
  28
  29 static DEFINE_PER_CPU(struct cpu, cpu_devices);
  30
  31 /*
  32  * SMT snooze delay stuff, 64-bit only for now
  33  */
  34
  35 #ifdef CONFIG_PPC64
  36
  37 /* Time in microseconds we delay before sleeping in the idle loop */
  38 DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
  39
  40 static ssize_t store_smt_snooze_delay(struct device *dev,
  41                                       struct device_attribute *attr,
  42                                       const char *buf,
  43                                       size_t count)
  44 {
  45         struct cpu *cpu = container_of(dev, struct cpu, dev);
  46         ssize_t ret;
  47         long snooze;
  48
  49         ret = sscanf(buf, "%ld", &snooze);
  50         if (ret != 1)
  51                 return -EINVAL;
  52
  53         per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
  54         update_smt_snooze_delay(cpu->dev.id, snooze);
  55
  56         return count;
  57 }
  58
  59 static ssize_t show_smt_snooze_delay(struct device *dev,
  60                                      struct device_attribute *attr,
  61                                      char *buf)
  62 {
  63         struct cpu *cpu = container_of(dev, struct cpu, dev);
  64
  65         return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
  66 }
  67
  68 static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
  69                    store_smt_snooze_delay);
  70
  71 static int __init setup_smt_snooze_delay(char *str)
  72 {
  73         unsigned int cpu;
  74         long snooze;
  75
  76         if (!cpu_has_feature(CPU_FTR_SMT))
  77                 return 1;
  78
  79         snooze = simple_strtol(str, NULL, 10);
  80         for_each_possible_cpu(cpu)
  81                 per_cpu(smt_snooze_delay, cpu) = snooze;
  82
  83         return 1;
  84 }
  85 __setup("smt-snooze-delay=", setup_smt_snooze_delay);
  86
  87 #endif /* CONFIG_PPC64 */
  88
  89 /*
  90  * Enabling PMCs will slow partition context switch times so we only do
  91  * it the first time we write to the PMCs.
  92  */
  93
  94 static DEFINE_PER_CPU(char, pmcs_enabled);
  95
  96 void ppc_enable_pmcs(void)
  97 {
  98         ppc_set_pmu_inuse(1);
  99
 100         /* Only need to enable them once */
 101         if (__get_cpu_var(pmcs_enabled))
 102                 return;
 103
 104         __get_cpu_var(pmcs_enabled) = 1;
 105
 106         if (ppc_md.enable_pmcs)
 107                 ppc_md.enable_pmcs();
 108 }
 109 EXPORT_SYMBOL(ppc_enable_pmcs);
 110
 111 #define __SYSFS_SPRSETUP(NAME, ADDRESS, EXTRA) \
 112 static void read_##NAME(void *val) \
 113 { \
 114         *(unsigned long *)val = mfspr(ADDRESS); \
 115 } \
 116 static void write_##NAME(void *val) \
 117 { \
 118         EXTRA; \
 119         mtspr(ADDRESS, *(unsigned long *)val);  \
 120 } \
 121 static ssize_t show_##NAME(struct device *dev, \
 122                         struct device_attribute *attr, \
 123                         char *buf) \
 124 { \
 125         struct cpu *cpu = container_of(dev, struct cpu, dev); \
 126         unsigned long val; \
 127         smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1);    \
 128         return sprintf(buf, "%lx\n", val); \
 129 } \
 130 static ssize_t __used \
 131         store_##NAME(struct device *dev, struct device_attribute *attr, \
 132                         const char *buf, size_t count) \
 133 { \
 134         struct cpu *cpu = container_of(dev, struct cpu, dev); \
 135         unsigned long val; \
 136         int ret = sscanf(buf, "%lx", &val); \
 137         if (ret != 1) \
 138                 return -EINVAL; \
 139         smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
 140         return count; \
 141 }
 142
 143 #define SYSFS_PMCSETUP(NAME, ADDRESS)   \
 144         __SYSFS_SPRSETUP(NAME, ADDRESS, ppc_enable_pmcs())
 145 #define SYSFS_SPRSETUP(NAME, ADDRESS)   \
 146         __SYSFS_SPRSETUP(NAME, ADDRESS, )
 147
 148 /* Let's define all possible registers, we'll only hook up the ones
 149  * that are implemented on the current processor
 150  */
 151
 152 #if defined(CONFIG_PPC64)
 153 #define HAS_PPC_PMC_CLASSIC     1
 154 #define HAS_PPC_PMC_IBM         1
 155 #define HAS_PPC_PMC_PA6T        1
 156 #elif defined(CONFIG_6xx)
 157 #define HAS_PPC_PMC_CLASSIC     1
 158 #define HAS_PPC_PMC_IBM         1
 159 #define HAS_PPC_PMC_G4          1
 160 #endif
 161
 162
 163 #ifdef HAS_PPC_PMC_CLASSIC
 164 SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
 165 SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
 166 SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
 167 SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
 168 SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
 169 SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
 170 SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
 171 SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
 172
 173 #ifdef HAS_PPC_PMC_G4
 174 SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
 175 #endif
 176
 177 #ifdef CONFIG_PPC64
 178 SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
 179 SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
 180
 181 SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
 182 SYSFS_SPRSETUP(purr, SPRN_PURR);
 183 SYSFS_SPRSETUP(spurr, SPRN_SPURR);
 184 SYSFS_SPRSETUP(dscr, SPRN_DSCR);
 185 SYSFS_SPRSETUP(pir, SPRN_PIR);
 186
 187 /*
 188   Lets only enable read for phyp resources and
 189   enable write when needed with a separate function.
 190   Lets be conservative and default to pseries.
 191 */
 192 static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
 193 static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);
 194 static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
 195 static DEVICE_ATTR(purr, 0400, show_purr, store_purr);
 196 static DEVICE_ATTR(pir, 0400, show_pir, NULL);
 197
 198 unsigned long dscr_default = 0;
 199 EXPORT_SYMBOL(dscr_default);
 200
 201 static void add_write_permission_dev_attr(struct device_attribute *attr)
 202 {
 203         attr->attr.mode |= 0200;
 204 }
 205
 206 static ssize_t show_dscr_default(struct device *dev,
 207                 struct device_attribute *attr, char *buf)
 208 {
 209         return sprintf(buf, "%lx\n", dscr_default);
 210 }
 211
 212 static void update_dscr(void *dummy)
 213 {
 214         if (!current->thread.dscr_inherit) {
 215                 current->thread.dscr = dscr_default;
 216                 mtspr(SPRN_DSCR, dscr_default);
 217         }
 218 }
 219
 220 static ssize_t __used store_dscr_default(struct device *dev,
 221                 struct device_attribute *attr, const char *buf,
 222                 size_t count)
 223 {
 224         unsigned long val;
 225         int ret = 0;
 226
 227         ret = sscanf(buf, "%lx", &val);
 228         if (ret != 1)
 229                 return -EINVAL;
 230         dscr_default = val;
 231
 232         on_each_cpu(update_dscr, NULL, 1);
 233
 234         return count;
 235 }
 236
 237 static DEVICE_ATTR(dscr_default, 0600,
 238                 show_dscr_default, store_dscr_default);
 239
 240 static void sysfs_create_dscr_default(void)
 241 {
 242         int err = 0;
 243         if (cpu_has_feature(CPU_FTR_DSCR))
 244                 err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
 245 }
 246 #endif /* CONFIG_PPC64 */
 247
 248 #ifdef HAS_PPC_PMC_PA6T
 249 SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
 250 SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
 251 SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
 252 SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
 253 SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
 254 SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
 255 #ifdef CONFIG_DEBUG_KERNEL
 256 SYSFS_SPRSETUP(hid0, SPRN_HID0);
 257 SYSFS_SPRSETUP(hid1, SPRN_HID1);
 258 SYSFS_SPRSETUP(hid4, SPRN_HID4);
 259 SYSFS_SPRSETUP(hid5, SPRN_HID5);
 260 SYSFS_SPRSETUP(ima0, SPRN_PA6T_IMA0);
 261 SYSFS_SPRSETUP(ima1, SPRN_PA6T_IMA1);
 262 SYSFS_SPRSETUP(ima2, SPRN_PA6T_IMA2);
 263 SYSFS_SPRSETUP(ima3, SPRN_PA6T_IMA3);
 264 SYSFS_SPRSETUP(ima4, SPRN_PA6T_IMA4);
 265 SYSFS_SPRSETUP(ima5, SPRN_PA6T_IMA5);
 266 SYSFS_SPRSETUP(ima6, SPRN_PA6T_IMA6);
 267 SYSFS_SPRSETUP(ima7, SPRN_PA6T_IMA7);
 268 SYSFS_SPRSETUP(ima8, SPRN_PA6T_IMA8);
 269 SYSFS_SPRSETUP(ima9, SPRN_PA6T_IMA9);
 270 SYSFS_SPRSETUP(imaat, SPRN_PA6T_IMAAT);
 271 SYSFS_SPRSETUP(btcr, SPRN_PA6T_BTCR);
 272 SYSFS_SPRSETUP(pccr, SPRN_PA6T_PCCR);
 273 SYSFS_SPRSETUP(rpccr, SPRN_PA6T_RPCCR);
 274 SYSFS_SPRSETUP(der, SPRN_PA6T_DER);
 275 SYSFS_SPRSETUP(mer, SPRN_PA6T_MER);
 276 SYSFS_SPRSETUP(ber, SPRN_PA6T_BER);
 277 SYSFS_SPRSETUP(ier, SPRN_PA6T_IER);
 278 SYSFS_SPRSETUP(sier, SPRN_PA6T_SIER);
 279 SYSFS_SPRSETUP(siar, SPRN_PA6T_SIAR);
 280 SYSFS_SPRSETUP(tsr0, SPRN_PA6T_TSR0);
 281 SYSFS_SPRSETUP(tsr1, SPRN_PA6T_TSR1);
 282 SYSFS_SPRSETUP(tsr2, SPRN_PA6T_TSR2);
 283 SYSFS_SPRSETUP(tsr3, SPRN_PA6T_TSR3);
 284 #endif /* CONFIG_DEBUG_KERNEL */
 285 #endif /* HAS_PPC_PMC_PA6T */
 286
 287 #ifdef HAS_PPC_PMC_IBM
 288 static struct device_attribute ibm_common_attrs[] = {
 289         __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
 290         __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
 291 };
 292 #endif /* HAS_PPC_PMC_G4 */
 293
 294 #ifdef HAS_PPC_PMC_G4
 295 static struct device_attribute g4_common_attrs[] = {
 296         __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
 297         __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
 298         __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
 299 };
 300 #endif /* HAS_PPC_PMC_G4 */
 301
 302 static struct device_attribute classic_pmc_attrs[] = {
 303         __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
 304         __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
 305         __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
 306         __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
 307         __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
 308         __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
 309 #ifdef CONFIG_PPC64
 310         __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
 311         __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
 312 #endif
 313 };
 314
 315 #ifdef HAS_PPC_PMC_PA6T
 316 static struct device_attribute pa6t_attrs[] = {
 317         __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
 318         __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
 319         __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
 320         __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
 321         __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
 322         __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
 323         __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
 324         __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
 325 #ifdef CONFIG_DEBUG_KERNEL
 326         __ATTR(hid0, 0600, show_hid0, store_hid0),
 327         __ATTR(hid1, 0600, show_hid1, store_hid1),
 328         __ATTR(hid4, 0600, show_hid4, store_hid4),
 329         __ATTR(hid5, 0600, show_hid5, store_hid5),
 330         __ATTR(ima0, 0600, show_ima0, store_ima0),
 331         __ATTR(ima1, 0600, show_ima1, store_ima1),
 332         __ATTR(ima2, 0600, show_ima2, store_ima2),
 333         __ATTR(ima3, 0600, show_ima3, store_ima3),
 334         __ATTR(ima4, 0600, show_ima4, store_ima4),
 335         __ATTR(ima5, 0600, show_ima5, store_ima5),
 336         __ATTR(ima6, 0600, show_ima6, store_ima6),
 337         __ATTR(ima7, 0600, show_ima7, store_ima7),
 338         __ATTR(ima8, 0600, show_ima8, store_ima8),
 339         __ATTR(ima9, 0600, show_ima9, store_ima9),
 340         __ATTR(imaat, 0600, show_imaat, store_imaat),
 341         __ATTR(btcr, 0600, show_btcr, store_btcr),
 342         __ATTR(pccr, 0600, show_pccr, store_pccr),
 343         __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
 344         __ATTR(der, 0600, show_der, store_der),
 345         __ATTR(mer, 0600, show_mer, store_mer),
 346         __ATTR(ber, 0600, show_ber, store_ber),
 347         __ATTR(ier, 0600, show_ier, store_ier),
 348         __ATTR(sier, 0600, show_sier, store_sier),
 349         __ATTR(siar, 0600, show_siar, store_siar),
 350         __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
 351         __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
 352         __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
 353         __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
 354 #endif /* CONFIG_DEBUG_KERNEL */
 355 };
 356 #endif /* HAS_PPC_PMC_PA6T */
 357 #endif /* HAS_PPC_PMC_CLASSIC */
 358
 359 static void register_cpu_online(unsigned int cpu)
 360 {
 361         struct cpu *c = &per_cpu(cpu_devices, cpu);
 362         struct device *s = &c->dev;
 363         struct device_attribute *attrs, *pmc_attrs;
 364         int i, nattrs;
 365
 366 #ifdef CONFIG_PPC64
 367         if (cpu_has_feature(CPU_FTR_SMT))
 368                 device_create_file(s, &dev_attr_smt_snooze_delay);
 369 #endif
 370
 371         /* PMC stuff */
 372         switch (cur_cpu_spec->pmc_type) {
 373 #ifdef HAS_PPC_PMC_IBM
 374         case PPC_PMC_IBM:
 375                 attrs = ibm_common_attrs;
 376                 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
 377                 pmc_attrs = classic_pmc_attrs;
 378                 break;
 379 #endif /* HAS_PPC_PMC_IBM */
 380 #ifdef HAS_PPC_PMC_G4
 381         case PPC_PMC_G4:
 382                 attrs = g4_common_attrs;
 383                 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
 384                 pmc_attrs = classic_pmc_attrs;
 385                 break;
 386 #endif /* HAS_PPC_PMC_G4 */
 387 #ifdef HAS_PPC_PMC_PA6T
 388         case PPC_PMC_PA6T:
 389                 /* PA Semi starts counting at PMC0 */
 390                 attrs = pa6t_attrs;
 391                 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
 392                 pmc_attrs = NULL;
 393                 break;
 394 #endif /* HAS_PPC_PMC_PA6T */
 395         default:
 396                 attrs = NULL;
 397                 nattrs = 0;
 398                 pmc_attrs = NULL;
 399         }
 400
 401         for (i = 0; i < nattrs; i++)
 402                 device_create_file(s, &attrs[i]);
 403
 404         if (pmc_attrs)
 405                 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
 406                         device_create_file(s, &pmc_attrs[i]);
 407
 408 #ifdef CONFIG_PPC64
 409         if (cpu_has_feature(CPU_FTR_MMCRA))
 410                 device_create_file(s, &dev_attr_mmcra);
 411
 412         if (cpu_has_feature(CPU_FTR_PURR)) {
 413                 if (!firmware_has_feature(FW_FEATURE_LPAR))
 414                         add_write_permission_dev_attr(&dev_attr_purr);
 415                 device_create_file(s, &dev_attr_purr);
 416         }
 417
 418         if (cpu_has_feature(CPU_FTR_SPURR))
 419                 device_create_file(s, &dev_attr_spurr);
 420
 421         if (cpu_has_feature(CPU_FTR_DSCR))
 422                 device_create_file(s, &dev_attr_dscr);
 423
 424         if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
 425                 device_create_file(s, &dev_attr_pir);
 426 #endif /* CONFIG_PPC64 */
 427
 428         cacheinfo_cpu_online(cpu);
 429 }
 430
 431 #ifdef CONFIG_HOTPLUG_CPU
 432 static void unregister_cpu_online(unsigned int cpu)
 433 {
 434         struct cpu *c = &per_cpu(cpu_devices, cpu);
 435         struct device *s = &c->dev;
 436         struct device_attribute *attrs, *pmc_attrs;
 437         int i, nattrs;
 438
 439         BUG_ON(!c->hotpluggable);
 440
 441 #ifdef CONFIG_PPC64
 442         if (cpu_has_feature(CPU_FTR_SMT))
 443                 device_remove_file(s, &dev_attr_smt_snooze_delay);
 444 #endif
 445
 446         /* PMC stuff */
 447         switch (cur_cpu_spec->pmc_type) {
 448 #ifdef HAS_PPC_PMC_IBM
 449         case PPC_PMC_IBM:
 450                 attrs = ibm_common_attrs;
 451                 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
 452                 pmc_attrs = classic_pmc_attrs;
 453                 break;
 454 #endif /* HAS_PPC_PMC_IBM */
 455 #ifdef HAS_PPC_PMC_G4
 456         case PPC_PMC_G4:
 457                 attrs = g4_common_attrs;
 458                 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
 459                 pmc_attrs = classic_pmc_attrs;
 460                 break;
 461 #endif /* HAS_PPC_PMC_G4 */
 462 #ifdef HAS_PPC_PMC_PA6T
 463         case PPC_PMC_PA6T:
 464                 /* PA Semi starts counting at PMC0 */
 465                 attrs = pa6t_attrs;
 466                 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
 467                 pmc_attrs = NULL;
 468                 break;
 469 #endif /* HAS_PPC_PMC_PA6T */
 470         default:
 471                 attrs = NULL;
 472                 nattrs = 0;
 473                 pmc_attrs = NULL;
 474         }
 475
 476         for (i = 0; i < nattrs; i++)
 477                 device_remove_file(s, &attrs[i]);
 478
 479         if (pmc_attrs)
 480                 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
 481                         device_remove_file(s, &pmc_attrs[i]);
 482
 483 #ifdef CONFIG_PPC64
 484         if (cpu_has_feature(CPU_FTR_MMCRA))
 485                 device_remove_file(s, &dev_attr_mmcra);
 486
 487         if (cpu_has_feature(CPU_FTR_PURR))
 488                 device_remove_file(s, &dev_attr_purr);
 489
 490         if (cpu_has_feature(CPU_FTR_SPURR))
 491                 device_remove_file(s, &dev_attr_spurr);
 492
 493         if (cpu_has_feature(CPU_FTR_DSCR))
 494                 device_remove_file(s, &dev_attr_dscr);
 495
 496         if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
 497                 device_remove_file(s, &dev_attr_pir);
 498 #endif /* CONFIG_PPC64 */
 499
 500         cacheinfo_cpu_offline(cpu);
 501 }
 502
 503 #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
 504 ssize_t arch_cpu_probe(const char *buf, size_t count)
 505 {
 506         if (ppc_md.cpu_probe)
 507                 return ppc_md.cpu_probe(buf, count);
 508
 509         return -EINVAL;
 510 }
 511
 512 ssize_t arch_cpu_release(const char *buf, size_t count)
 513 {
 514         if (ppc_md.cpu_release)
 515                 return ppc_md.cpu_release(buf, count);
 516
 517         return -EINVAL;
 518 }
 519 #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
 520
 521 #endif /* CONFIG_HOTPLUG_CPU */
 522
 523 static int sysfs_cpu_notify(struct notifier_block *self,
 524                                       unsigned long action, void *hcpu)
 525 {
 526         unsigned int cpu = (unsigned int)(long)hcpu;
 527
 528         switch (action) {
 529         case CPU_ONLINE:
 530         case CPU_ONLINE_FROZEN:
 531                 register_cpu_online(cpu);
 532                 break;
 533 #ifdef CONFIG_HOTPLUG_CPU
 534         case CPU_DEAD:
 535         case CPU_DEAD_FROZEN:
 536                 unregister_cpu_online(cpu);
 537                 break;
 538 #endif
 539         }
 540         return NOTIFY_OK;
 541 }
 542
 543 static struct notifier_block sysfs_cpu_nb = {
 544         .notifier_call  = sysfs_cpu_notify,
 545 };
 546
 547 static DEFINE_MUTEX(cpu_mutex);
 548
 549 int cpu_add_dev_attr(struct device_attribute *attr)
 550 {
 551         int cpu;
 552
 553         mutex_lock(&cpu_mutex);
 554
 555         for_each_possible_cpu(cpu) {
 556                 device_create_file(get_cpu_device(cpu), attr);
 557         }
 558
 559         mutex_unlock(&cpu_mutex);
 560         return 0;
 561 }
 562 EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
 563
 564 int cpu_add_dev_attr_group(struct attribute_group *attrs)
 565 {
 566         int cpu;
 567         struct device *dev;
 568         int ret;
 569
 570         mutex_lock(&cpu_mutex);
 571
 572         for_each_possible_cpu(cpu) {
 573                 dev = get_cpu_device(cpu);
 574                 ret = sysfs_create_group(&dev->kobj, attrs);
 575                 WARN_ON(ret != 0);
 576         }
 577
 578         mutex_unlock(&cpu_mutex);
 579         return 0;
 580 }
 581 EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
 582
 583
 584 void cpu_remove_dev_attr(struct device_attribute *attr)
 585 {
 586         int cpu;
 587
 588         mutex_lock(&cpu_mutex);
 589
 590         for_each_possible_cpu(cpu) {
 591                 device_remove_file(get_cpu_device(cpu), attr);
 592         }
 593
 594         mutex_unlock(&cpu_mutex);
 595 }
 596 EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
 597
 598 void cpu_remove_dev_attr_group(struct attribute_group *attrs)
 599 {
 600         int cpu;
 601         struct device *dev;
 602
 603         mutex_lock(&cpu_mutex);
 604
 605         for_each_possible_cpu(cpu) {
 606                 dev = get_cpu_device(cpu);
 607                 sysfs_remove_group(&dev->kobj, attrs);
 608         }
 609
 610         mutex_unlock(&cpu_mutex);
 611 }
 612 EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
 613
 614
 615 /* NUMA stuff */
 616
 617 #ifdef CONFIG_NUMA
 618 static void register_nodes(void)
 619 {
 620         int i;
 621
 622         for (i = 0; i < MAX_NUMNODES; i++)
 623                 register_one_node(i);
 624 }
 625
 626 int sysfs_add_device_to_node(struct device *dev, int nid)
 627 {
 628         struct node *node = node_devices[nid];
 629         return sysfs_create_link(&node->dev.kobj, &dev->kobj,
 630                         kobject_name(&dev->kobj));
 631 }
 632 EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
 633
 634 void sysfs_remove_device_from_node(struct device *dev, int nid)
 635 {
 636         struct node *node = node_devices[nid];
 637         sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
 638 }
 639 EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
 640
 641 #else
 642 static void register_nodes(void)
 643 {
 644         return;
 645 }
 646
 647 #endif
 648
 649 /* Only valid if CPU is present. */
 650 static ssize_t show_physical_id(struct device *dev,
 651                                 struct device_attribute *attr, char *buf)
 652 {
 653         struct cpu *cpu = container_of(dev, struct cpu, dev);
 654
 655         return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
 656 }
 657 static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
 658
 659 static int __init topology_init(void)
 660 {
 661         int cpu;
 662
 663         register_nodes();
 664         register_cpu_notifier(&sysfs_cpu_nb);
 665
 666         for_each_possible_cpu(cpu) {
 667                 struct cpu *c = &per_cpu(cpu_devices, cpu);
 668
 669                 /*
 670                  * For now, we just see if the system supports making
 671                  * the RTAS calls for CPU hotplug.  But, there may be a
 672                  * more comprehensive way to do this for an individual
 673                  * CPU.  For instance, the boot cpu might never be valid
 674                  * for hotplugging.
 675                  */
 676                 if (ppc_md.cpu_die)
 677                         c->hotpluggable = 1;
 678
 679                 if (cpu_online(cpu) || c->hotpluggable) {
 680                         register_cpu(c, cpu);
 681
 682                         device_create_file(&c->dev, &dev_attr_physical_id);
 683                 }
 684
 685                 if (cpu_online(cpu))
 686                         register_cpu_online(cpu);
 687         }
 688 #ifdef CONFIG_PPC64
 689         sysfs_create_dscr_default();
 690 #endif /* CONFIG_PPC64 */
 691
 692         return 0;
 693 }
 694 subsys_initcall(topology_init);