KVM: PPC: Book3S HV: Add helpers for lock/unlock hpte
[deliverable/linux.git] / arch / powerpc / kvm / book3s_hv_rm_mmu.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * Copyright 2010-2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
7 */
8
9 #include <linux/types.h>
10 #include <linux/string.h>
11 #include <linux/kvm.h>
12 #include <linux/kvm_host.h>
13 #include <linux/hugetlb.h>
14 #include <linux/module.h>
15
16 #include <asm/tlbflush.h>
17 #include <asm/kvm_ppc.h>
18 #include <asm/kvm_book3s.h>
19 #include <asm/mmu-hash64.h>
20 #include <asm/hvcall.h>
21 #include <asm/synch.h>
22 #include <asm/ppc-opcode.h>
23
24 /* Translate address of a vmalloc'd thing to a linear map address */
25 static void *real_vmalloc_addr(void *x)
26 {
27 unsigned long addr = (unsigned long) x;
28 pte_t *p;
29
30 p = find_linux_pte_or_hugepte(swapper_pg_dir, addr, NULL);
31 if (!p || !pte_present(*p))
32 return NULL;
33 /* assume we don't have huge pages in vmalloc space... */
34 addr = (pte_pfn(*p) << PAGE_SHIFT) | (addr & ~PAGE_MASK);
35 return __va(addr);
36 }
37
38 /* Return 1 if we need to do a global tlbie, 0 if we can use tlbiel */
39 static int global_invalidates(struct kvm *kvm, unsigned long flags)
40 {
41 int global;
42
43 /*
44 * If there is only one vcore, and it's currently running,
45 * as indicated by local_paca->kvm_hstate.kvm_vcpu being set,
46 * we can use tlbiel as long as we mark all other physical
47 * cores as potentially having stale TLB entries for this lpid.
48 * Otherwise, don't use tlbiel.
49 */
50 if (kvm->arch.online_vcores == 1 && local_paca->kvm_hstate.kvm_vcpu)
51 global = 0;
52 else
53 global = 1;
54
55 if (!global) {
56 /* any other core might now have stale TLB entries... */
57 smp_wmb();
58 cpumask_setall(&kvm->arch.need_tlb_flush);
59 cpumask_clear_cpu(local_paca->kvm_hstate.kvm_vcore->pcpu,
60 &kvm->arch.need_tlb_flush);
61 }
62
63 return global;
64 }
65
66 /*
67 * Add this HPTE into the chain for the real page.
68 * Must be called with the chain locked; it unlocks the chain.
69 */
70 void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev,
71 unsigned long *rmap, long pte_index, int realmode)
72 {
73 struct revmap_entry *head, *tail;
74 unsigned long i;
75
76 if (*rmap & KVMPPC_RMAP_PRESENT) {
77 i = *rmap & KVMPPC_RMAP_INDEX;
78 head = &kvm->arch.revmap[i];
79 if (realmode)
80 head = real_vmalloc_addr(head);
81 tail = &kvm->arch.revmap[head->back];
82 if (realmode)
83 tail = real_vmalloc_addr(tail);
84 rev->forw = i;
85 rev->back = head->back;
86 tail->forw = pte_index;
87 head->back = pte_index;
88 } else {
89 rev->forw = rev->back = pte_index;
90 *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) |
91 pte_index | KVMPPC_RMAP_PRESENT;
92 }
93 unlock_rmap(rmap);
94 }
95 EXPORT_SYMBOL_GPL(kvmppc_add_revmap_chain);
96
97 /* Remove this HPTE from the chain for a real page */
98 static void remove_revmap_chain(struct kvm *kvm, long pte_index,
99 struct revmap_entry *rev,
100 unsigned long hpte_v, unsigned long hpte_r)
101 {
102 struct revmap_entry *next, *prev;
103 unsigned long gfn, ptel, head;
104 struct kvm_memory_slot *memslot;
105 unsigned long *rmap;
106 unsigned long rcbits;
107
108 rcbits = hpte_r & (HPTE_R_R | HPTE_R_C);
109 ptel = rev->guest_rpte |= rcbits;
110 gfn = hpte_rpn(ptel, hpte_page_size(hpte_v, ptel));
111 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn);
112 if (!memslot)
113 return;
114
115 rmap = real_vmalloc_addr(&memslot->arch.rmap[gfn - memslot->base_gfn]);
116 lock_rmap(rmap);
117
118 head = *rmap & KVMPPC_RMAP_INDEX;
119 next = real_vmalloc_addr(&kvm->arch.revmap[rev->forw]);
120 prev = real_vmalloc_addr(&kvm->arch.revmap[rev->back]);
121 next->back = rev->back;
122 prev->forw = rev->forw;
123 if (head == pte_index) {
124 head = rev->forw;
125 if (head == pte_index)
126 *rmap &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX);
127 else
128 *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | head;
129 }
130 *rmap |= rcbits << KVMPPC_RMAP_RC_SHIFT;
131 unlock_rmap(rmap);
132 }
133
134 static pte_t lookup_linux_pte_and_update(pgd_t *pgdir, unsigned long hva,
135 int writing, unsigned long *pte_sizep)
136 {
137 pte_t *ptep;
138 unsigned long ps = *pte_sizep;
139 unsigned int hugepage_shift;
140
141 ptep = find_linux_pte_or_hugepte(pgdir, hva, &hugepage_shift);
142 if (!ptep)
143 return __pte(0);
144 if (hugepage_shift)
145 *pte_sizep = 1ul << hugepage_shift;
146 else
147 *pte_sizep = PAGE_SIZE;
148 if (ps > *pte_sizep)
149 return __pte(0);
150 return kvmppc_read_update_linux_pte(ptep, writing, hugepage_shift);
151 }
152
153 long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
154 long pte_index, unsigned long pteh, unsigned long ptel,
155 pgd_t *pgdir, bool realmode, unsigned long *pte_idx_ret)
156 {
157 unsigned long i, pa, gpa, gfn, psize;
158 unsigned long slot_fn, hva;
159 __be64 *hpte;
160 struct revmap_entry *rev;
161 unsigned long g_ptel;
162 struct kvm_memory_slot *memslot;
163 unsigned long pte_size;
164 unsigned long is_io;
165 unsigned long *rmap;
166 pte_t pte;
167 unsigned int writing;
168 unsigned long mmu_seq;
169 unsigned long rcbits;
170
171 psize = hpte_page_size(pteh, ptel);
172 if (!psize)
173 return H_PARAMETER;
174 writing = hpte_is_writable(ptel);
175 pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID);
176 ptel &= ~HPTE_GR_RESERVED;
177 g_ptel = ptel;
178
179 /* used later to detect if we might have been invalidated */
180 mmu_seq = kvm->mmu_notifier_seq;
181 smp_rmb();
182
183 /* Find the memslot (if any) for this address */
184 gpa = (ptel & HPTE_R_RPN) & ~(psize - 1);
185 gfn = gpa >> PAGE_SHIFT;
186 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn);
187 pa = 0;
188 is_io = ~0ul;
189 rmap = NULL;
190 if (!(memslot && !(memslot->flags & KVM_MEMSLOT_INVALID))) {
191 /* Emulated MMIO - mark this with key=31 */
192 pteh |= HPTE_V_ABSENT;
193 ptel |= HPTE_R_KEY_HI | HPTE_R_KEY_LO;
194 goto do_insert;
195 }
196
197 /* Check if the requested page fits entirely in the memslot. */
198 if (!slot_is_aligned(memslot, psize))
199 return H_PARAMETER;
200 slot_fn = gfn - memslot->base_gfn;
201 rmap = &memslot->arch.rmap[slot_fn];
202
203 /* Translate to host virtual address */
204 hva = __gfn_to_hva_memslot(memslot, gfn);
205
206 /* Look up the Linux PTE for the backing page */
207 pte_size = psize;
208 pte = lookup_linux_pte_and_update(pgdir, hva, writing, &pte_size);
209 if (pte_present(pte) && !pte_protnone(pte)) {
210 if (writing && !pte_write(pte))
211 /* make the actual HPTE be read-only */
212 ptel = hpte_make_readonly(ptel);
213 is_io = hpte_cache_bits(pte_val(pte));
214 pa = pte_pfn(pte) << PAGE_SHIFT;
215 pa |= hva & (pte_size - 1);
216 pa |= gpa & ~PAGE_MASK;
217 }
218
219 if (pte_size < psize)
220 return H_PARAMETER;
221
222 ptel &= ~(HPTE_R_PP0 - psize);
223 ptel |= pa;
224
225 if (pa)
226 pteh |= HPTE_V_VALID;
227 else
228 pteh |= HPTE_V_ABSENT;
229
230 /* Check WIMG */
231 if (is_io != ~0ul && !hpte_cache_flags_ok(ptel, is_io)) {
232 if (is_io)
233 return H_PARAMETER;
234 /*
235 * Allow guest to map emulated device memory as
236 * uncacheable, but actually make it cacheable.
237 */
238 ptel &= ~(HPTE_R_W|HPTE_R_I|HPTE_R_G);
239 ptel |= HPTE_R_M;
240 }
241
242 /* Find and lock the HPTEG slot to use */
243 do_insert:
244 if (pte_index >= kvm->arch.hpt_npte)
245 return H_PARAMETER;
246 if (likely((flags & H_EXACT) == 0)) {
247 pte_index &= ~7UL;
248 hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4));
249 for (i = 0; i < 8; ++i) {
250 if ((be64_to_cpu(*hpte) & HPTE_V_VALID) == 0 &&
251 try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID |
252 HPTE_V_ABSENT))
253 break;
254 hpte += 2;
255 }
256 if (i == 8) {
257 /*
258 * Since try_lock_hpte doesn't retry (not even stdcx.
259 * failures), it could be that there is a free slot
260 * but we transiently failed to lock it. Try again,
261 * actually locking each slot and checking it.
262 */
263 hpte -= 16;
264 for (i = 0; i < 8; ++i) {
265 u64 pte;
266 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
267 cpu_relax();
268 pte = be64_to_cpu(hpte[0]);
269 if (!(pte & (HPTE_V_VALID | HPTE_V_ABSENT)))
270 break;
271 __unlock_hpte(hpte, pte);
272 hpte += 2;
273 }
274 if (i == 8)
275 return H_PTEG_FULL;
276 }
277 pte_index += i;
278 } else {
279 hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4));
280 if (!try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID |
281 HPTE_V_ABSENT)) {
282 /* Lock the slot and check again */
283 u64 pte;
284
285 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
286 cpu_relax();
287 pte = be64_to_cpu(hpte[0]);
288 if (pte & (HPTE_V_VALID | HPTE_V_ABSENT)) {
289 __unlock_hpte(hpte, pte);
290 return H_PTEG_FULL;
291 }
292 }
293 }
294
295 /* Save away the guest's idea of the second HPTE dword */
296 rev = &kvm->arch.revmap[pte_index];
297 if (realmode)
298 rev = real_vmalloc_addr(rev);
299 if (rev) {
300 rev->guest_rpte = g_ptel;
301 note_hpte_modification(kvm, rev);
302 }
303
304 /* Link HPTE into reverse-map chain */
305 if (pteh & HPTE_V_VALID) {
306 if (realmode)
307 rmap = real_vmalloc_addr(rmap);
308 lock_rmap(rmap);
309 /* Check for pending invalidations under the rmap chain lock */
310 if (mmu_notifier_retry(kvm, mmu_seq)) {
311 /* inval in progress, write a non-present HPTE */
312 pteh |= HPTE_V_ABSENT;
313 pteh &= ~HPTE_V_VALID;
314 unlock_rmap(rmap);
315 } else {
316 kvmppc_add_revmap_chain(kvm, rev, rmap, pte_index,
317 realmode);
318 /* Only set R/C in real HPTE if already set in *rmap */
319 rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT;
320 ptel &= rcbits | ~(HPTE_R_R | HPTE_R_C);
321 }
322 }
323
324 hpte[1] = cpu_to_be64(ptel);
325
326 /* Write the first HPTE dword, unlocking the HPTE and making it valid */
327 eieio();
328 __unlock_hpte(hpte, pteh);
329 asm volatile("ptesync" : : : "memory");
330
331 *pte_idx_ret = pte_index;
332 return H_SUCCESS;
333 }
334 EXPORT_SYMBOL_GPL(kvmppc_do_h_enter);
335
336 long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
337 long pte_index, unsigned long pteh, unsigned long ptel)
338 {
339 return kvmppc_do_h_enter(vcpu->kvm, flags, pte_index, pteh, ptel,
340 vcpu->arch.pgdir, true, &vcpu->arch.gpr[4]);
341 }
342
343 #ifdef __BIG_ENDIAN__
344 #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
345 #else
346 #define LOCK_TOKEN (*(u32 *)(&get_paca()->paca_index))
347 #endif
348
349 static inline int try_lock_tlbie(unsigned int *lock)
350 {
351 unsigned int tmp, old;
352 unsigned int token = LOCK_TOKEN;
353
354 asm volatile("1:lwarx %1,0,%2\n"
355 " cmpwi cr0,%1,0\n"
356 " bne 2f\n"
357 " stwcx. %3,0,%2\n"
358 " bne- 1b\n"
359 " isync\n"
360 "2:"
361 : "=&r" (tmp), "=&r" (old)
362 : "r" (lock), "r" (token)
363 : "cc", "memory");
364 return old == 0;
365 }
366
367 static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues,
368 long npages, int global, bool need_sync)
369 {
370 long i;
371
372 if (global) {
373 while (!try_lock_tlbie(&kvm->arch.tlbie_lock))
374 cpu_relax();
375 if (need_sync)
376 asm volatile("ptesync" : : : "memory");
377 for (i = 0; i < npages; ++i)
378 asm volatile(PPC_TLBIE(%1,%0) : :
379 "r" (rbvalues[i]), "r" (kvm->arch.lpid));
380 asm volatile("eieio; tlbsync; ptesync" : : : "memory");
381 kvm->arch.tlbie_lock = 0;
382 } else {
383 if (need_sync)
384 asm volatile("ptesync" : : : "memory");
385 for (i = 0; i < npages; ++i)
386 asm volatile("tlbiel %0" : : "r" (rbvalues[i]));
387 asm volatile("ptesync" : : : "memory");
388 }
389 }
390
391 long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags,
392 unsigned long pte_index, unsigned long avpn,
393 unsigned long *hpret)
394 {
395 __be64 *hpte;
396 unsigned long v, r, rb;
397 struct revmap_entry *rev;
398 u64 pte;
399
400 if (pte_index >= kvm->arch.hpt_npte)
401 return H_PARAMETER;
402 hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4));
403 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
404 cpu_relax();
405 pte = be64_to_cpu(hpte[0]);
406 if ((pte & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 ||
407 ((flags & H_AVPN) && (pte & ~0x7fUL) != avpn) ||
408 ((flags & H_ANDCOND) && (pte & avpn) != 0)) {
409 __unlock_hpte(hpte, pte);
410 return H_NOT_FOUND;
411 }
412
413 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
414 v = pte & ~HPTE_V_HVLOCK;
415 if (v & HPTE_V_VALID) {
416 u64 pte1;
417
418 pte1 = be64_to_cpu(hpte[1]);
419 hpte[0] &= ~cpu_to_be64(HPTE_V_VALID);
420 rb = compute_tlbie_rb(v, pte1, pte_index);
421 do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags), true);
422 /* Read PTE low word after tlbie to get final R/C values */
423 remove_revmap_chain(kvm, pte_index, rev, v, pte1);
424 }
425 r = rev->guest_rpte & ~HPTE_GR_RESERVED;
426 note_hpte_modification(kvm, rev);
427 unlock_hpte(hpte, 0);
428
429 hpret[0] = v;
430 hpret[1] = r;
431 return H_SUCCESS;
432 }
433 EXPORT_SYMBOL_GPL(kvmppc_do_h_remove);
434
435 long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags,
436 unsigned long pte_index, unsigned long avpn)
437 {
438 return kvmppc_do_h_remove(vcpu->kvm, flags, pte_index, avpn,
439 &vcpu->arch.gpr[4]);
440 }
441
442 long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)
443 {
444 struct kvm *kvm = vcpu->kvm;
445 unsigned long *args = &vcpu->arch.gpr[4];
446 __be64 *hp, *hptes[4];
447 unsigned long tlbrb[4];
448 long int i, j, k, n, found, indexes[4];
449 unsigned long flags, req, pte_index, rcbits;
450 int global;
451 long int ret = H_SUCCESS;
452 struct revmap_entry *rev, *revs[4];
453 u64 hp0;
454
455 global = global_invalidates(kvm, 0);
456 for (i = 0; i < 4 && ret == H_SUCCESS; ) {
457 n = 0;
458 for (; i < 4; ++i) {
459 j = i * 2;
460 pte_index = args[j];
461 flags = pte_index >> 56;
462 pte_index &= ((1ul << 56) - 1);
463 req = flags >> 6;
464 flags &= 3;
465 if (req == 3) { /* no more requests */
466 i = 4;
467 break;
468 }
469 if (req != 1 || flags == 3 ||
470 pte_index >= kvm->arch.hpt_npte) {
471 /* parameter error */
472 args[j] = ((0xa0 | flags) << 56) + pte_index;
473 ret = H_PARAMETER;
474 break;
475 }
476 hp = (__be64 *) (kvm->arch.hpt_virt + (pte_index << 4));
477 /* to avoid deadlock, don't spin except for first */
478 if (!try_lock_hpte(hp, HPTE_V_HVLOCK)) {
479 if (n)
480 break;
481 while (!try_lock_hpte(hp, HPTE_V_HVLOCK))
482 cpu_relax();
483 }
484 found = 0;
485 hp0 = be64_to_cpu(hp[0]);
486 if (hp0 & (HPTE_V_ABSENT | HPTE_V_VALID)) {
487 switch (flags & 3) {
488 case 0: /* absolute */
489 found = 1;
490 break;
491 case 1: /* andcond */
492 if (!(hp0 & args[j + 1]))
493 found = 1;
494 break;
495 case 2: /* AVPN */
496 if ((hp0 & ~0x7fUL) == args[j + 1])
497 found = 1;
498 break;
499 }
500 }
501 if (!found) {
502 hp[0] &= ~cpu_to_be64(HPTE_V_HVLOCK);
503 args[j] = ((0x90 | flags) << 56) + pte_index;
504 continue;
505 }
506
507 args[j] = ((0x80 | flags) << 56) + pte_index;
508 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
509 note_hpte_modification(kvm, rev);
510
511 if (!(hp0 & HPTE_V_VALID)) {
512 /* insert R and C bits from PTE */
513 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C);
514 args[j] |= rcbits << (56 - 5);
515 hp[0] = 0;
516 continue;
517 }
518
519 /* leave it locked */
520 hp[0] &= ~cpu_to_be64(HPTE_V_VALID);
521 tlbrb[n] = compute_tlbie_rb(be64_to_cpu(hp[0]),
522 be64_to_cpu(hp[1]), pte_index);
523 indexes[n] = j;
524 hptes[n] = hp;
525 revs[n] = rev;
526 ++n;
527 }
528
529 if (!n)
530 break;
531
532 /* Now that we've collected a batch, do the tlbies */
533 do_tlbies(kvm, tlbrb, n, global, true);
534
535 /* Read PTE low words after tlbie to get final R/C values */
536 for (k = 0; k < n; ++k) {
537 j = indexes[k];
538 pte_index = args[j] & ((1ul << 56) - 1);
539 hp = hptes[k];
540 rev = revs[k];
541 remove_revmap_chain(kvm, pte_index, rev,
542 be64_to_cpu(hp[0]), be64_to_cpu(hp[1]));
543 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C);
544 args[j] |= rcbits << (56 - 5);
545 __unlock_hpte(hp, 0);
546 }
547 }
548
549 return ret;
550 }
551
552 long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags,
553 unsigned long pte_index, unsigned long avpn,
554 unsigned long va)
555 {
556 struct kvm *kvm = vcpu->kvm;
557 __be64 *hpte;
558 struct revmap_entry *rev;
559 unsigned long v, r, rb, mask, bits;
560 u64 pte;
561
562 if (pte_index >= kvm->arch.hpt_npte)
563 return H_PARAMETER;
564
565 hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4));
566 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
567 cpu_relax();
568 pte = be64_to_cpu(hpte[0]);
569 if ((pte & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 ||
570 ((flags & H_AVPN) && (pte & ~0x7fUL) != avpn)) {
571 __unlock_hpte(hpte, pte);
572 return H_NOT_FOUND;
573 }
574
575 v = pte;
576 bits = (flags << 55) & HPTE_R_PP0;
577 bits |= (flags << 48) & HPTE_R_KEY_HI;
578 bits |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO);
579
580 /* Update guest view of 2nd HPTE dword */
581 mask = HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N |
582 HPTE_R_KEY_HI | HPTE_R_KEY_LO;
583 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
584 if (rev) {
585 r = (rev->guest_rpte & ~mask) | bits;
586 rev->guest_rpte = r;
587 note_hpte_modification(kvm, rev);
588 }
589
590 /* Update HPTE */
591 if (v & HPTE_V_VALID) {
592 /*
593 * If the page is valid, don't let it transition from
594 * readonly to writable. If it should be writable, we'll
595 * take a trap and let the page fault code sort it out.
596 */
597 pte = be64_to_cpu(hpte[1]);
598 r = (pte & ~mask) | bits;
599 if (hpte_is_writable(r) && !hpte_is_writable(pte))
600 r = hpte_make_readonly(r);
601 /* If the PTE is changing, invalidate it first */
602 if (r != pte) {
603 rb = compute_tlbie_rb(v, r, pte_index);
604 hpte[0] = cpu_to_be64((v & ~HPTE_V_VALID) |
605 HPTE_V_ABSENT);
606 do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags),
607 true);
608 hpte[1] = cpu_to_be64(r);
609 }
610 }
611 unlock_hpte(hpte, v & ~HPTE_V_HVLOCK);
612 asm volatile("ptesync" : : : "memory");
613 return H_SUCCESS;
614 }
615
616 long kvmppc_h_read(struct kvm_vcpu *vcpu, unsigned long flags,
617 unsigned long pte_index)
618 {
619 struct kvm *kvm = vcpu->kvm;
620 __be64 *hpte;
621 unsigned long v, r;
622 int i, n = 1;
623 struct revmap_entry *rev = NULL;
624
625 if (pte_index >= kvm->arch.hpt_npte)
626 return H_PARAMETER;
627 if (flags & H_READ_4) {
628 pte_index &= ~3;
629 n = 4;
630 }
631 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
632 for (i = 0; i < n; ++i, ++pte_index) {
633 hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4));
634 v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK;
635 r = be64_to_cpu(hpte[1]);
636 if (v & HPTE_V_ABSENT) {
637 v &= ~HPTE_V_ABSENT;
638 v |= HPTE_V_VALID;
639 }
640 if (v & HPTE_V_VALID) {
641 r = rev[i].guest_rpte | (r & (HPTE_R_R | HPTE_R_C));
642 r &= ~HPTE_GR_RESERVED;
643 }
644 vcpu->arch.gpr[4 + i * 2] = v;
645 vcpu->arch.gpr[5 + i * 2] = r;
646 }
647 return H_SUCCESS;
648 }
649
650 void kvmppc_invalidate_hpte(struct kvm *kvm, __be64 *hptep,
651 unsigned long pte_index)
652 {
653 unsigned long rb;
654
655 hptep[0] &= ~cpu_to_be64(HPTE_V_VALID);
656 rb = compute_tlbie_rb(be64_to_cpu(hptep[0]), be64_to_cpu(hptep[1]),
657 pte_index);
658 do_tlbies(kvm, &rb, 1, 1, true);
659 }
660 EXPORT_SYMBOL_GPL(kvmppc_invalidate_hpte);
661
662 void kvmppc_clear_ref_hpte(struct kvm *kvm, __be64 *hptep,
663 unsigned long pte_index)
664 {
665 unsigned long rb;
666 unsigned char rbyte;
667
668 rb = compute_tlbie_rb(be64_to_cpu(hptep[0]), be64_to_cpu(hptep[1]),
669 pte_index);
670 rbyte = (be64_to_cpu(hptep[1]) & ~HPTE_R_R) >> 8;
671 /* modify only the second-last byte, which contains the ref bit */
672 *((char *)hptep + 14) = rbyte;
673 do_tlbies(kvm, &rb, 1, 1, false);
674 }
675 EXPORT_SYMBOL_GPL(kvmppc_clear_ref_hpte);
676
677 static int slb_base_page_shift[4] = {
678 24, /* 16M */
679 16, /* 64k */
680 34, /* 16G */
681 20, /* 1M, unsupported */
682 };
683
684 /* When called from virtmode, this func should be protected by
685 * preempt_disable(), otherwise, the holding of HPTE_V_HVLOCK
686 * can trigger deadlock issue.
687 */
688 long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t eaddr, unsigned long slb_v,
689 unsigned long valid)
690 {
691 unsigned int i;
692 unsigned int pshift;
693 unsigned long somask;
694 unsigned long vsid, hash;
695 unsigned long avpn;
696 __be64 *hpte;
697 unsigned long mask, val;
698 unsigned long v, r;
699
700 /* Get page shift, work out hash and AVPN etc. */
701 mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_SECONDARY;
702 val = 0;
703 pshift = 12;
704 if (slb_v & SLB_VSID_L) {
705 mask |= HPTE_V_LARGE;
706 val |= HPTE_V_LARGE;
707 pshift = slb_base_page_shift[(slb_v & SLB_VSID_LP) >> 4];
708 }
709 if (slb_v & SLB_VSID_B_1T) {
710 somask = (1UL << 40) - 1;
711 vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T;
712 vsid ^= vsid << 25;
713 } else {
714 somask = (1UL << 28) - 1;
715 vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT;
716 }
717 hash = (vsid ^ ((eaddr & somask) >> pshift)) & kvm->arch.hpt_mask;
718 avpn = slb_v & ~(somask >> 16); /* also includes B */
719 avpn |= (eaddr & somask) >> 16;
720
721 if (pshift >= 24)
722 avpn &= ~((1UL << (pshift - 16)) - 1);
723 else
724 avpn &= ~0x7fUL;
725 val |= avpn;
726
727 for (;;) {
728 hpte = (__be64 *)(kvm->arch.hpt_virt + (hash << 7));
729
730 for (i = 0; i < 16; i += 2) {
731 /* Read the PTE racily */
732 v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK;
733
734 /* Check valid/absent, hash, segment size and AVPN */
735 if (!(v & valid) || (v & mask) != val)
736 continue;
737
738 /* Lock the PTE and read it under the lock */
739 while (!try_lock_hpte(&hpte[i], HPTE_V_HVLOCK))
740 cpu_relax();
741 v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK;
742 r = be64_to_cpu(hpte[i+1]);
743
744 /*
745 * Check the HPTE again, including base page size
746 */
747 if ((v & valid) && (v & mask) == val &&
748 hpte_base_page_size(v, r) == (1ul << pshift))
749 /* Return with the HPTE still locked */
750 return (hash << 3) + (i >> 1);
751
752 __unlock_hpte(&hpte[i], v);
753 }
754
755 if (val & HPTE_V_SECONDARY)
756 break;
757 val |= HPTE_V_SECONDARY;
758 hash = hash ^ kvm->arch.hpt_mask;
759 }
760 return -1;
761 }
762 EXPORT_SYMBOL(kvmppc_hv_find_lock_hpte);
763
764 /*
765 * Called in real mode to check whether an HPTE not found fault
766 * is due to accessing a paged-out page or an emulated MMIO page,
767 * or if a protection fault is due to accessing a page that the
768 * guest wanted read/write access to but which we made read-only.
769 * Returns a possibly modified status (DSISR) value if not
770 * (i.e. pass the interrupt to the guest),
771 * -1 to pass the fault up to host kernel mode code, -2 to do that
772 * and also load the instruction word (for MMIO emulation),
773 * or 0 if we should make the guest retry the access.
774 */
775 long kvmppc_hpte_hv_fault(struct kvm_vcpu *vcpu, unsigned long addr,
776 unsigned long slb_v, unsigned int status, bool data)
777 {
778 struct kvm *kvm = vcpu->kvm;
779 long int index;
780 unsigned long v, r, gr;
781 __be64 *hpte;
782 unsigned long valid;
783 struct revmap_entry *rev;
784 unsigned long pp, key;
785
786 /* For protection fault, expect to find a valid HPTE */
787 valid = HPTE_V_VALID;
788 if (status & DSISR_NOHPTE)
789 valid |= HPTE_V_ABSENT;
790
791 index = kvmppc_hv_find_lock_hpte(kvm, addr, slb_v, valid);
792 if (index < 0) {
793 if (status & DSISR_NOHPTE)
794 return status; /* there really was no HPTE */
795 return 0; /* for prot fault, HPTE disappeared */
796 }
797 hpte = (__be64 *)(kvm->arch.hpt_virt + (index << 4));
798 v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK;
799 r = be64_to_cpu(hpte[1]);
800 rev = real_vmalloc_addr(&kvm->arch.revmap[index]);
801 gr = rev->guest_rpte;
802
803 unlock_hpte(hpte, v);
804
805 /* For not found, if the HPTE is valid by now, retry the instruction */
806 if ((status & DSISR_NOHPTE) && (v & HPTE_V_VALID))
807 return 0;
808
809 /* Check access permissions to the page */
810 pp = gr & (HPTE_R_PP0 | HPTE_R_PP);
811 key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS;
812 status &= ~DSISR_NOHPTE; /* DSISR_NOHPTE == SRR1_ISI_NOPT */
813 if (!data) {
814 if (gr & (HPTE_R_N | HPTE_R_G))
815 return status | SRR1_ISI_N_OR_G;
816 if (!hpte_read_permission(pp, slb_v & key))
817 return status | SRR1_ISI_PROT;
818 } else if (status & DSISR_ISSTORE) {
819 /* check write permission */
820 if (!hpte_write_permission(pp, slb_v & key))
821 return status | DSISR_PROTFAULT;
822 } else {
823 if (!hpte_read_permission(pp, slb_v & key))
824 return status | DSISR_PROTFAULT;
825 }
826
827 /* Check storage key, if applicable */
828 if (data && (vcpu->arch.shregs.msr & MSR_DR)) {
829 unsigned int perm = hpte_get_skey_perm(gr, vcpu->arch.amr);
830 if (status & DSISR_ISSTORE)
831 perm >>= 1;
832 if (perm & 1)
833 return status | DSISR_KEYFAULT;
834 }
835
836 /* Save HPTE info for virtual-mode handler */
837 vcpu->arch.pgfault_addr = addr;
838 vcpu->arch.pgfault_index = index;
839 vcpu->arch.pgfault_hpte[0] = v;
840 vcpu->arch.pgfault_hpte[1] = r;
841
842 /* Check the storage key to see if it is possibly emulated MMIO */
843 if (data && (vcpu->arch.shregs.msr & MSR_IR) &&
844 (r & (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) ==
845 (HPTE_R_KEY_HI | HPTE_R_KEY_LO))
846 return -2; /* MMIO emulation - load instr word */
847
848 return -1; /* send fault up to host kernel mode */
849 }
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