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54ee1c01798f5faab0169593b2da4ad61bc6cd9b
[deliverable/linux.git] / arch / powerpc / kvm / booke.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
22 */
23
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/kvm_host.h>
27 #include <linux/gfp.h>
28 #include <linux/module.h>
29 #include <linux/vmalloc.h>
30 #include <linux/fs.h>
31
32 #include <asm/cputable.h>
33 #include <asm/uaccess.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/cacheflush.h>
36 #include <asm/dbell.h>
37 #include <asm/hw_irq.h>
38 #include <asm/irq.h>
39 #include <asm/time.h>
40
41 #include "timing.h"
42 #include "booke.h"
43
44 #define CREATE_TRACE_POINTS
45 #include "trace_booke.h"
46
47 unsigned long kvmppc_booke_handlers;
48
49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
51
52 struct kvm_stats_debugfs_item debugfs_entries[] = {
53 { "mmio", VCPU_STAT(mmio_exits) },
54 { "dcr", VCPU_STAT(dcr_exits) },
55 { "sig", VCPU_STAT(signal_exits) },
56 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
57 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
58 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
59 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
60 { "sysc", VCPU_STAT(syscall_exits) },
61 { "isi", VCPU_STAT(isi_exits) },
62 { "dsi", VCPU_STAT(dsi_exits) },
63 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
64 { "dec", VCPU_STAT(dec_exits) },
65 { "ext_intr", VCPU_STAT(ext_intr_exits) },
66 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
67 { "doorbell", VCPU_STAT(dbell_exits) },
68 { "guest doorbell", VCPU_STAT(gdbell_exits) },
69 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
70 { NULL }
71 };
72
73 /* TODO: use vcpu_printf() */
74 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
75 {
76 int i;
77
78 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
79 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
80 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
81 vcpu->arch.shared->srr1);
82
83 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
84
85 for (i = 0; i < 32; i += 4) {
86 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
87 kvmppc_get_gpr(vcpu, i),
88 kvmppc_get_gpr(vcpu, i+1),
89 kvmppc_get_gpr(vcpu, i+2),
90 kvmppc_get_gpr(vcpu, i+3));
91 }
92 }
93
94 #ifdef CONFIG_SPE
95 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
96 {
97 preempt_disable();
98 enable_kernel_spe();
99 kvmppc_save_guest_spe(vcpu);
100 vcpu->arch.shadow_msr &= ~MSR_SPE;
101 preempt_enable();
102 }
103
104 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
105 {
106 preempt_disable();
107 enable_kernel_spe();
108 kvmppc_load_guest_spe(vcpu);
109 vcpu->arch.shadow_msr |= MSR_SPE;
110 preempt_enable();
111 }
112
113 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
114 {
115 if (vcpu->arch.shared->msr & MSR_SPE) {
116 if (!(vcpu->arch.shadow_msr & MSR_SPE))
117 kvmppc_vcpu_enable_spe(vcpu);
118 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
119 kvmppc_vcpu_disable_spe(vcpu);
120 }
121 }
122 #else
123 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
124 {
125 }
126 #endif
127
128 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
129 {
130 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
131 /* We always treat the FP bit as enabled from the host
132 perspective, so only need to adjust the shadow MSR */
133 vcpu->arch.shadow_msr &= ~MSR_FP;
134 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
135 #endif
136 }
137
138 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
139 {
140 /* Synchronize guest's desire to get debug interrupts into shadow MSR */
141 #ifndef CONFIG_KVM_BOOKE_HV
142 vcpu->arch.shadow_msr &= ~MSR_DE;
143 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
144 #endif
145
146 /* Force enable debug interrupts when user space wants to debug */
147 if (vcpu->guest_debug) {
148 #ifdef CONFIG_KVM_BOOKE_HV
149 /*
150 * Since there is no shadow MSR, sync MSR_DE into the guest
151 * visible MSR.
152 */
153 vcpu->arch.shared->msr |= MSR_DE;
154 #else
155 vcpu->arch.shadow_msr |= MSR_DE;
156 vcpu->arch.shared->msr &= ~MSR_DE;
157 #endif
158 }
159 }
160
161 /*
162 * Helper function for "full" MSR writes. No need to call this if only
163 * EE/CE/ME/DE/RI are changing.
164 */
165 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
166 {
167 u32 old_msr = vcpu->arch.shared->msr;
168
169 #ifdef CONFIG_KVM_BOOKE_HV
170 new_msr |= MSR_GS;
171 #endif
172
173 vcpu->arch.shared->msr = new_msr;
174
175 kvmppc_mmu_msr_notify(vcpu, old_msr);
176 kvmppc_vcpu_sync_spe(vcpu);
177 kvmppc_vcpu_sync_fpu(vcpu);
178 kvmppc_vcpu_sync_debug(vcpu);
179 }
180
181 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
182 unsigned int priority)
183 {
184 trace_kvm_booke_queue_irqprio(vcpu, priority);
185 set_bit(priority, &vcpu->arch.pending_exceptions);
186 }
187
188 static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
189 ulong dear_flags, ulong esr_flags)
190 {
191 vcpu->arch.queued_dear = dear_flags;
192 vcpu->arch.queued_esr = esr_flags;
193 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
194 }
195
196 static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
197 ulong dear_flags, ulong esr_flags)
198 {
199 vcpu->arch.queued_dear = dear_flags;
200 vcpu->arch.queued_esr = esr_flags;
201 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
202 }
203
204 static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
205 ulong esr_flags)
206 {
207 vcpu->arch.queued_esr = esr_flags;
208 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
209 }
210
211 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
212 ulong esr_flags)
213 {
214 vcpu->arch.queued_dear = dear_flags;
215 vcpu->arch.queued_esr = esr_flags;
216 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
217 }
218
219 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
220 {
221 vcpu->arch.queued_esr = esr_flags;
222 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
223 }
224
225 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
226 {
227 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
228 }
229
230 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
231 {
232 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
233 }
234
235 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
236 {
237 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
238 }
239
240 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
241 struct kvm_interrupt *irq)
242 {
243 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
244
245 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
246 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
247
248 kvmppc_booke_queue_irqprio(vcpu, prio);
249 }
250
251 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
252 {
253 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
254 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
255 }
256
257 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
258 {
259 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
260 }
261
262 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
263 {
264 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
265 }
266
267 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
268 {
269 #ifdef CONFIG_KVM_BOOKE_HV
270 mtspr(SPRN_GSRR0, srr0);
271 mtspr(SPRN_GSRR1, srr1);
272 #else
273 vcpu->arch.shared->srr0 = srr0;
274 vcpu->arch.shared->srr1 = srr1;
275 #endif
276 }
277
278 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
279 {
280 vcpu->arch.csrr0 = srr0;
281 vcpu->arch.csrr1 = srr1;
282 }
283
284 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
285 {
286 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
287 vcpu->arch.dsrr0 = srr0;
288 vcpu->arch.dsrr1 = srr1;
289 } else {
290 set_guest_csrr(vcpu, srr0, srr1);
291 }
292 }
293
294 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
295 {
296 vcpu->arch.mcsrr0 = srr0;
297 vcpu->arch.mcsrr1 = srr1;
298 }
299
300 static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
301 {
302 #ifdef CONFIG_KVM_BOOKE_HV
303 return mfspr(SPRN_GDEAR);
304 #else
305 return vcpu->arch.shared->dar;
306 #endif
307 }
308
309 static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
310 {
311 #ifdef CONFIG_KVM_BOOKE_HV
312 mtspr(SPRN_GDEAR, dear);
313 #else
314 vcpu->arch.shared->dar = dear;
315 #endif
316 }
317
318 static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
319 {
320 #ifdef CONFIG_KVM_BOOKE_HV
321 return mfspr(SPRN_GESR);
322 #else
323 return vcpu->arch.shared->esr;
324 #endif
325 }
326
327 static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
328 {
329 #ifdef CONFIG_KVM_BOOKE_HV
330 mtspr(SPRN_GESR, esr);
331 #else
332 vcpu->arch.shared->esr = esr;
333 #endif
334 }
335
336 static unsigned long get_guest_epr(struct kvm_vcpu *vcpu)
337 {
338 #ifdef CONFIG_KVM_BOOKE_HV
339 return mfspr(SPRN_GEPR);
340 #else
341 return vcpu->arch.epr;
342 #endif
343 }
344
345 /* Deliver the interrupt of the corresponding priority, if possible. */
346 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
347 unsigned int priority)
348 {
349 int allowed = 0;
350 ulong msr_mask = 0;
351 bool update_esr = false, update_dear = false, update_epr = false;
352 ulong crit_raw = vcpu->arch.shared->critical;
353 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
354 bool crit;
355 bool keep_irq = false;
356 enum int_class int_class;
357 ulong new_msr = vcpu->arch.shared->msr;
358
359 /* Truncate crit indicators in 32 bit mode */
360 if (!(vcpu->arch.shared->msr & MSR_SF)) {
361 crit_raw &= 0xffffffff;
362 crit_r1 &= 0xffffffff;
363 }
364
365 /* Critical section when crit == r1 */
366 crit = (crit_raw == crit_r1);
367 /* ... and we're in supervisor mode */
368 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
369
370 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
371 priority = BOOKE_IRQPRIO_EXTERNAL;
372 keep_irq = true;
373 }
374
375 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
376 update_epr = true;
377
378 switch (priority) {
379 case BOOKE_IRQPRIO_DTLB_MISS:
380 case BOOKE_IRQPRIO_DATA_STORAGE:
381 case BOOKE_IRQPRIO_ALIGNMENT:
382 update_dear = true;
383 /* fall through */
384 case BOOKE_IRQPRIO_INST_STORAGE:
385 case BOOKE_IRQPRIO_PROGRAM:
386 update_esr = true;
387 /* fall through */
388 case BOOKE_IRQPRIO_ITLB_MISS:
389 case BOOKE_IRQPRIO_SYSCALL:
390 case BOOKE_IRQPRIO_FP_UNAVAIL:
391 case BOOKE_IRQPRIO_SPE_UNAVAIL:
392 case BOOKE_IRQPRIO_SPE_FP_DATA:
393 case BOOKE_IRQPRIO_SPE_FP_ROUND:
394 case BOOKE_IRQPRIO_AP_UNAVAIL:
395 allowed = 1;
396 msr_mask = MSR_CE | MSR_ME | MSR_DE;
397 int_class = INT_CLASS_NONCRIT;
398 break;
399 case BOOKE_IRQPRIO_WATCHDOG:
400 case BOOKE_IRQPRIO_CRITICAL:
401 case BOOKE_IRQPRIO_DBELL_CRIT:
402 allowed = vcpu->arch.shared->msr & MSR_CE;
403 allowed = allowed && !crit;
404 msr_mask = MSR_ME;
405 int_class = INT_CLASS_CRIT;
406 break;
407 case BOOKE_IRQPRIO_MACHINE_CHECK:
408 allowed = vcpu->arch.shared->msr & MSR_ME;
409 allowed = allowed && !crit;
410 int_class = INT_CLASS_MC;
411 break;
412 case BOOKE_IRQPRIO_DECREMENTER:
413 case BOOKE_IRQPRIO_FIT:
414 keep_irq = true;
415 /* fall through */
416 case BOOKE_IRQPRIO_EXTERNAL:
417 case BOOKE_IRQPRIO_DBELL:
418 allowed = vcpu->arch.shared->msr & MSR_EE;
419 allowed = allowed && !crit;
420 msr_mask = MSR_CE | MSR_ME | MSR_DE;
421 int_class = INT_CLASS_NONCRIT;
422 break;
423 case BOOKE_IRQPRIO_DEBUG:
424 allowed = vcpu->arch.shared->msr & MSR_DE;
425 allowed = allowed && !crit;
426 msr_mask = MSR_ME;
427 int_class = INT_CLASS_CRIT;
428 break;
429 }
430
431 if (allowed) {
432 switch (int_class) {
433 case INT_CLASS_NONCRIT:
434 set_guest_srr(vcpu, vcpu->arch.pc,
435 vcpu->arch.shared->msr);
436 break;
437 case INT_CLASS_CRIT:
438 set_guest_csrr(vcpu, vcpu->arch.pc,
439 vcpu->arch.shared->msr);
440 break;
441 case INT_CLASS_DBG:
442 set_guest_dsrr(vcpu, vcpu->arch.pc,
443 vcpu->arch.shared->msr);
444 break;
445 case INT_CLASS_MC:
446 set_guest_mcsrr(vcpu, vcpu->arch.pc,
447 vcpu->arch.shared->msr);
448 break;
449 }
450
451 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
452 if (update_esr == true)
453 set_guest_esr(vcpu, vcpu->arch.queued_esr);
454 if (update_dear == true)
455 set_guest_dear(vcpu, vcpu->arch.queued_dear);
456 if (update_epr == true) {
457 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
458 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
459 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
460 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
461 kvmppc_mpic_set_epr(vcpu);
462 }
463 }
464
465 new_msr &= msr_mask;
466 #if defined(CONFIG_64BIT)
467 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
468 new_msr |= MSR_CM;
469 #endif
470 kvmppc_set_msr(vcpu, new_msr);
471
472 if (!keep_irq)
473 clear_bit(priority, &vcpu->arch.pending_exceptions);
474 }
475
476 #ifdef CONFIG_KVM_BOOKE_HV
477 /*
478 * If an interrupt is pending but masked, raise a guest doorbell
479 * so that we are notified when the guest enables the relevant
480 * MSR bit.
481 */
482 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
483 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
484 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
485 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
486 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
487 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
488 #endif
489
490 return allowed;
491 }
492
493 /*
494 * Return the number of jiffies until the next timeout. If the timeout is
495 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
496 * because the larger value can break the timer APIs.
497 */
498 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
499 {
500 u64 tb, wdt_tb, wdt_ticks = 0;
501 u64 nr_jiffies = 0;
502 u32 period = TCR_GET_WP(vcpu->arch.tcr);
503
504 wdt_tb = 1ULL << (63 - period);
505 tb = get_tb();
506 /*
507 * The watchdog timeout will hapeen when TB bit corresponding
508 * to watchdog will toggle from 0 to 1.
509 */
510 if (tb & wdt_tb)
511 wdt_ticks = wdt_tb;
512
513 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
514
515 /* Convert timebase ticks to jiffies */
516 nr_jiffies = wdt_ticks;
517
518 if (do_div(nr_jiffies, tb_ticks_per_jiffy))
519 nr_jiffies++;
520
521 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
522 }
523
524 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
525 {
526 unsigned long nr_jiffies;
527 unsigned long flags;
528
529 /*
530 * If TSR_ENW and TSR_WIS are not set then no need to exit to
531 * userspace, so clear the KVM_REQ_WATCHDOG request.
532 */
533 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
534 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
535
536 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
537 nr_jiffies = watchdog_next_timeout(vcpu);
538 /*
539 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
540 * then do not run the watchdog timer as this can break timer APIs.
541 */
542 if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
543 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
544 else
545 del_timer(&vcpu->arch.wdt_timer);
546 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
547 }
548
549 void kvmppc_watchdog_func(unsigned long data)
550 {
551 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
552 u32 tsr, new_tsr;
553 int final;
554
555 do {
556 new_tsr = tsr = vcpu->arch.tsr;
557 final = 0;
558
559 /* Time out event */
560 if (tsr & TSR_ENW) {
561 if (tsr & TSR_WIS)
562 final = 1;
563 else
564 new_tsr = tsr | TSR_WIS;
565 } else {
566 new_tsr = tsr | TSR_ENW;
567 }
568 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
569
570 if (new_tsr & TSR_WIS) {
571 smp_wmb();
572 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
573 kvm_vcpu_kick(vcpu);
574 }
575
576 /*
577 * If this is final watchdog expiry and some action is required
578 * then exit to userspace.
579 */
580 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
581 vcpu->arch.watchdog_enabled) {
582 smp_wmb();
583 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
584 kvm_vcpu_kick(vcpu);
585 }
586
587 /*
588 * Stop running the watchdog timer after final expiration to
589 * prevent the host from being flooded with timers if the
590 * guest sets a short period.
591 * Timers will resume when TSR/TCR is updated next time.
592 */
593 if (!final)
594 arm_next_watchdog(vcpu);
595 }
596
597 static void update_timer_ints(struct kvm_vcpu *vcpu)
598 {
599 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
600 kvmppc_core_queue_dec(vcpu);
601 else
602 kvmppc_core_dequeue_dec(vcpu);
603
604 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
605 kvmppc_core_queue_watchdog(vcpu);
606 else
607 kvmppc_core_dequeue_watchdog(vcpu);
608 }
609
610 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
611 {
612 unsigned long *pending = &vcpu->arch.pending_exceptions;
613 unsigned int priority;
614
615 priority = __ffs(*pending);
616 while (priority < BOOKE_IRQPRIO_MAX) {
617 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
618 break;
619
620 priority = find_next_bit(pending,
621 BITS_PER_BYTE * sizeof(*pending),
622 priority + 1);
623 }
624
625 /* Tell the guest about our interrupt status */
626 vcpu->arch.shared->int_pending = !!*pending;
627 }
628
629 /* Check pending exceptions and deliver one, if possible. */
630 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
631 {
632 int r = 0;
633 WARN_ON_ONCE(!irqs_disabled());
634
635 kvmppc_core_check_exceptions(vcpu);
636
637 if (vcpu->requests) {
638 /* Exception delivery raised request; start over */
639 return 1;
640 }
641
642 if (vcpu->arch.shared->msr & MSR_WE) {
643 local_irq_enable();
644 kvm_vcpu_block(vcpu);
645 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
646 local_irq_disable();
647
648 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
649 r = 1;
650 };
651
652 return r;
653 }
654
655 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
656 {
657 int r = 1; /* Indicate we want to get back into the guest */
658
659 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
660 update_timer_ints(vcpu);
661 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
662 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
663 kvmppc_core_flush_tlb(vcpu);
664 #endif
665
666 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
667 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
668 r = 0;
669 }
670
671 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
672 vcpu->run->epr.epr = 0;
673 vcpu->arch.epr_needed = true;
674 vcpu->run->exit_reason = KVM_EXIT_EPR;
675 r = 0;
676 }
677
678 return r;
679 }
680
681 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
682 {
683 int ret, s;
684 struct thread_struct thread;
685
686 if (!vcpu->arch.sane) {
687 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
688 return -EINVAL;
689 }
690
691 local_irq_disable();
692 s = kvmppc_prepare_to_enter(vcpu);
693 if (s <= 0) {
694 local_irq_enable();
695 ret = s;
696 goto out;
697 }
698
699 #ifdef CONFIG_PPC_FPU
700 /* Save userspace FPU state in stack */
701 enable_kernel_fp();
702
703 /*
704 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
705 * as always using the FPU. Kernel usage of FP (via
706 * enable_kernel_fp()) in this thread must not occur while
707 * vcpu->fpu_active is set.
708 */
709 vcpu->fpu_active = 1;
710
711 kvmppc_load_guest_fp(vcpu);
712 #endif
713
714 /* Switch to guest debug context */
715 thread.debug = vcpu->arch.shadow_dbg_reg;
716 switch_booke_debug_regs(&thread);
717 thread.debug = current->thread.debug;
718 current->thread.debug = vcpu->arch.shadow_dbg_reg;
719
720 vcpu->arch.pgdir = current->mm->pgd;
721 kvmppc_fix_ee_before_entry();
722
723 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
724
725 /* No need for kvm_guest_exit. It's done in handle_exit.
726 We also get here with interrupts enabled. */
727
728 /* Switch back to user space debug context */
729 switch_booke_debug_regs(&thread);
730 current->thread.debug = thread.debug;
731
732 #ifdef CONFIG_PPC_FPU
733 kvmppc_save_guest_fp(vcpu);
734
735 vcpu->fpu_active = 0;
736 #endif
737
738 out:
739 vcpu->mode = OUTSIDE_GUEST_MODE;
740 return ret;
741 }
742
743 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
744 {
745 enum emulation_result er;
746
747 er = kvmppc_emulate_instruction(run, vcpu);
748 switch (er) {
749 case EMULATE_DONE:
750 /* don't overwrite subtypes, just account kvm_stats */
751 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
752 /* Future optimization: only reload non-volatiles if
753 * they were actually modified by emulation. */
754 return RESUME_GUEST_NV;
755
756 case EMULATE_DO_DCR:
757 run->exit_reason = KVM_EXIT_DCR;
758 return RESUME_HOST;
759
760 case EMULATE_FAIL:
761 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
762 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
763 /* For debugging, encode the failing instruction and
764 * report it to userspace. */
765 run->hw.hardware_exit_reason = ~0ULL << 32;
766 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
767 kvmppc_core_queue_program(vcpu, ESR_PIL);
768 return RESUME_HOST;
769
770 case EMULATE_EXIT_USER:
771 return RESUME_HOST;
772
773 default:
774 BUG();
775 }
776 }
777
778 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu)
779 {
780 struct debug_reg *dbg_reg = &(vcpu->arch.shadow_dbg_reg);
781 u32 dbsr = vcpu->arch.dbsr;
782
783 run->debug.arch.status = 0;
784 run->debug.arch.address = vcpu->arch.pc;
785
786 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
787 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
788 } else {
789 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
790 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
791 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
792 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
793 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
794 run->debug.arch.address = dbg_reg->dac1;
795 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
796 run->debug.arch.address = dbg_reg->dac2;
797 }
798
799 return RESUME_HOST;
800 }
801
802 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
803 {
804 ulong r1, ip, msr, lr;
805
806 asm("mr %0, 1" : "=r"(r1));
807 asm("mflr %0" : "=r"(lr));
808 asm("mfmsr %0" : "=r"(msr));
809 asm("bl 1f; 1: mflr %0" : "=r"(ip));
810
811 memset(regs, 0, sizeof(*regs));
812 regs->gpr[1] = r1;
813 regs->nip = ip;
814 regs->msr = msr;
815 regs->link = lr;
816 }
817
818 /*
819 * For interrupts needed to be handled by host interrupt handlers,
820 * corresponding host handler are called from here in similar way
821 * (but not exact) as they are called from low level handler
822 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
823 */
824 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
825 unsigned int exit_nr)
826 {
827 struct pt_regs regs;
828
829 switch (exit_nr) {
830 case BOOKE_INTERRUPT_EXTERNAL:
831 kvmppc_fill_pt_regs(&regs);
832 do_IRQ(&regs);
833 break;
834 case BOOKE_INTERRUPT_DECREMENTER:
835 kvmppc_fill_pt_regs(&regs);
836 timer_interrupt(&regs);
837 break;
838 #if defined(CONFIG_PPC_DOORBELL)
839 case BOOKE_INTERRUPT_DOORBELL:
840 kvmppc_fill_pt_regs(&regs);
841 doorbell_exception(&regs);
842 break;
843 #endif
844 case BOOKE_INTERRUPT_MACHINE_CHECK:
845 /* FIXME */
846 break;
847 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
848 kvmppc_fill_pt_regs(&regs);
849 performance_monitor_exception(&regs);
850 break;
851 case BOOKE_INTERRUPT_WATCHDOG:
852 kvmppc_fill_pt_regs(&regs);
853 #ifdef CONFIG_BOOKE_WDT
854 WatchdogException(&regs);
855 #else
856 unknown_exception(&regs);
857 #endif
858 break;
859 case BOOKE_INTERRUPT_CRITICAL:
860 unknown_exception(&regs);
861 break;
862 case BOOKE_INTERRUPT_DEBUG:
863 /* Save DBSR before preemption is enabled */
864 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
865 kvmppc_clear_dbsr();
866 break;
867 }
868 }
869
870 /**
871 * kvmppc_handle_exit
872 *
873 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
874 */
875 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
876 unsigned int exit_nr)
877 {
878 int r = RESUME_HOST;
879 int s;
880 int idx;
881
882 #ifdef CONFIG_PPC64
883 WARN_ON(local_paca->irq_happened != 0);
884 #endif
885
886 /*
887 * We enter with interrupts disabled in hardware, but
888 * we need to call hard_irq_disable anyway to ensure that
889 * the software state is kept in sync.
890 */
891 hard_irq_disable();
892
893 /* update before a new last_exit_type is rewritten */
894 kvmppc_update_timing_stats(vcpu);
895
896 /* restart interrupts if they were meant for the host */
897 kvmppc_restart_interrupt(vcpu, exit_nr);
898
899 local_irq_enable();
900
901 trace_kvm_exit(exit_nr, vcpu);
902 kvm_guest_exit();
903
904 run->exit_reason = KVM_EXIT_UNKNOWN;
905 run->ready_for_interrupt_injection = 1;
906
907 switch (exit_nr) {
908 case BOOKE_INTERRUPT_MACHINE_CHECK:
909 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
910 kvmppc_dump_vcpu(vcpu);
911 /* For debugging, send invalid exit reason to user space */
912 run->hw.hardware_exit_reason = ~1ULL << 32;
913 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
914 r = RESUME_HOST;
915 break;
916
917 case BOOKE_INTERRUPT_EXTERNAL:
918 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
919 r = RESUME_GUEST;
920 break;
921
922 case BOOKE_INTERRUPT_DECREMENTER:
923 kvmppc_account_exit(vcpu, DEC_EXITS);
924 r = RESUME_GUEST;
925 break;
926
927 case BOOKE_INTERRUPT_WATCHDOG:
928 r = RESUME_GUEST;
929 break;
930
931 case BOOKE_INTERRUPT_DOORBELL:
932 kvmppc_account_exit(vcpu, DBELL_EXITS);
933 r = RESUME_GUEST;
934 break;
935
936 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
937 kvmppc_account_exit(vcpu, GDBELL_EXITS);
938
939 /*
940 * We are here because there is a pending guest interrupt
941 * which could not be delivered as MSR_CE or MSR_ME was not
942 * set. Once we break from here we will retry delivery.
943 */
944 r = RESUME_GUEST;
945 break;
946
947 case BOOKE_INTERRUPT_GUEST_DBELL:
948 kvmppc_account_exit(vcpu, GDBELL_EXITS);
949
950 /*
951 * We are here because there is a pending guest interrupt
952 * which could not be delivered as MSR_EE was not set. Once
953 * we break from here we will retry delivery.
954 */
955 r = RESUME_GUEST;
956 break;
957
958 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
959 r = RESUME_GUEST;
960 break;
961
962 case BOOKE_INTERRUPT_HV_PRIV:
963 r = emulation_exit(run, vcpu);
964 break;
965
966 case BOOKE_INTERRUPT_PROGRAM:
967 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
968 /*
969 * Program traps generated by user-level software must
970 * be handled by the guest kernel.
971 *
972 * In GS mode, hypervisor privileged instructions trap
973 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
974 * actual program interrupts, handled by the guest.
975 */
976 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
977 r = RESUME_GUEST;
978 kvmppc_account_exit(vcpu, USR_PR_INST);
979 break;
980 }
981
982 r = emulation_exit(run, vcpu);
983 break;
984
985 case BOOKE_INTERRUPT_FP_UNAVAIL:
986 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
987 kvmppc_account_exit(vcpu, FP_UNAVAIL);
988 r = RESUME_GUEST;
989 break;
990
991 #ifdef CONFIG_SPE
992 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
993 if (vcpu->arch.shared->msr & MSR_SPE)
994 kvmppc_vcpu_enable_spe(vcpu);
995 else
996 kvmppc_booke_queue_irqprio(vcpu,
997 BOOKE_IRQPRIO_SPE_UNAVAIL);
998 r = RESUME_GUEST;
999 break;
1000 }
1001
1002 case BOOKE_INTERRUPT_SPE_FP_DATA:
1003 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1004 r = RESUME_GUEST;
1005 break;
1006
1007 case BOOKE_INTERRUPT_SPE_FP_ROUND:
1008 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1009 r = RESUME_GUEST;
1010 break;
1011 #else
1012 case BOOKE_INTERRUPT_SPE_UNAVAIL:
1013 /*
1014 * Guest wants SPE, but host kernel doesn't support it. Send
1015 * an "unimplemented operation" program check to the guest.
1016 */
1017 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1018 r = RESUME_GUEST;
1019 break;
1020
1021 /*
1022 * These really should never happen without CONFIG_SPE,
1023 * as we should never enable the real MSR[SPE] in the guest.
1024 */
1025 case BOOKE_INTERRUPT_SPE_FP_DATA:
1026 case BOOKE_INTERRUPT_SPE_FP_ROUND:
1027 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1028 __func__, exit_nr, vcpu->arch.pc);
1029 run->hw.hardware_exit_reason = exit_nr;
1030 r = RESUME_HOST;
1031 break;
1032 #endif
1033
1034 case BOOKE_INTERRUPT_DATA_STORAGE:
1035 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1036 vcpu->arch.fault_esr);
1037 kvmppc_account_exit(vcpu, DSI_EXITS);
1038 r = RESUME_GUEST;
1039 break;
1040
1041 case BOOKE_INTERRUPT_INST_STORAGE:
1042 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1043 kvmppc_account_exit(vcpu, ISI_EXITS);
1044 r = RESUME_GUEST;
1045 break;
1046
1047 case BOOKE_INTERRUPT_ALIGNMENT:
1048 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1049 vcpu->arch.fault_esr);
1050 r = RESUME_GUEST;
1051 break;
1052
1053 #ifdef CONFIG_KVM_BOOKE_HV
1054 case BOOKE_INTERRUPT_HV_SYSCALL:
1055 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1056 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1057 } else {
1058 /*
1059 * hcall from guest userspace -- send privileged
1060 * instruction program check.
1061 */
1062 kvmppc_core_queue_program(vcpu, ESR_PPR);
1063 }
1064
1065 r = RESUME_GUEST;
1066 break;
1067 #else
1068 case BOOKE_INTERRUPT_SYSCALL:
1069 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1070 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1071 /* KVM PV hypercalls */
1072 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1073 r = RESUME_GUEST;
1074 } else {
1075 /* Guest syscalls */
1076 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1077 }
1078 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1079 r = RESUME_GUEST;
1080 break;
1081 #endif
1082
1083 case BOOKE_INTERRUPT_DTLB_MISS: {
1084 unsigned long eaddr = vcpu->arch.fault_dear;
1085 int gtlb_index;
1086 gpa_t gpaddr;
1087 gfn_t gfn;
1088
1089 #ifdef CONFIG_KVM_E500V2
1090 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1091 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1092 kvmppc_map_magic(vcpu);
1093 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1094 r = RESUME_GUEST;
1095
1096 break;
1097 }
1098 #endif
1099
1100 /* Check the guest TLB. */
1101 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1102 if (gtlb_index < 0) {
1103 /* The guest didn't have a mapping for it. */
1104 kvmppc_core_queue_dtlb_miss(vcpu,
1105 vcpu->arch.fault_dear,
1106 vcpu->arch.fault_esr);
1107 kvmppc_mmu_dtlb_miss(vcpu);
1108 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1109 r = RESUME_GUEST;
1110 break;
1111 }
1112
1113 idx = srcu_read_lock(&vcpu->kvm->srcu);
1114
1115 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1116 gfn = gpaddr >> PAGE_SHIFT;
1117
1118 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1119 /* The guest TLB had a mapping, but the shadow TLB
1120 * didn't, and it is RAM. This could be because:
1121 * a) the entry is mapping the host kernel, or
1122 * b) the guest used a large mapping which we're faking
1123 * Either way, we need to satisfy the fault without
1124 * invoking the guest. */
1125 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1126 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1127 r = RESUME_GUEST;
1128 } else {
1129 /* Guest has mapped and accessed a page which is not
1130 * actually RAM. */
1131 vcpu->arch.paddr_accessed = gpaddr;
1132 vcpu->arch.vaddr_accessed = eaddr;
1133 r = kvmppc_emulate_mmio(run, vcpu);
1134 kvmppc_account_exit(vcpu, MMIO_EXITS);
1135 }
1136
1137 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1138 break;
1139 }
1140
1141 case BOOKE_INTERRUPT_ITLB_MISS: {
1142 unsigned long eaddr = vcpu->arch.pc;
1143 gpa_t gpaddr;
1144 gfn_t gfn;
1145 int gtlb_index;
1146
1147 r = RESUME_GUEST;
1148
1149 /* Check the guest TLB. */
1150 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1151 if (gtlb_index < 0) {
1152 /* The guest didn't have a mapping for it. */
1153 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1154 kvmppc_mmu_itlb_miss(vcpu);
1155 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1156 break;
1157 }
1158
1159 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1160
1161 idx = srcu_read_lock(&vcpu->kvm->srcu);
1162
1163 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1164 gfn = gpaddr >> PAGE_SHIFT;
1165
1166 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1167 /* The guest TLB had a mapping, but the shadow TLB
1168 * didn't. This could be because:
1169 * a) the entry is mapping the host kernel, or
1170 * b) the guest used a large mapping which we're faking
1171 * Either way, we need to satisfy the fault without
1172 * invoking the guest. */
1173 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1174 } else {
1175 /* Guest mapped and leaped at non-RAM! */
1176 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1177 }
1178
1179 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1180 break;
1181 }
1182
1183 case BOOKE_INTERRUPT_DEBUG: {
1184 r = kvmppc_handle_debug(run, vcpu);
1185 if (r == RESUME_HOST)
1186 run->exit_reason = KVM_EXIT_DEBUG;
1187 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1188 break;
1189 }
1190
1191 default:
1192 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1193 BUG();
1194 }
1195
1196 /*
1197 * To avoid clobbering exit_reason, only check for signals if we
1198 * aren't already exiting to userspace for some other reason.
1199 */
1200 if (!(r & RESUME_HOST)) {
1201 local_irq_disable();
1202 s = kvmppc_prepare_to_enter(vcpu);
1203 if (s <= 0) {
1204 local_irq_enable();
1205 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1206 } else {
1207 kvmppc_fix_ee_before_entry();
1208 }
1209 }
1210
1211 return r;
1212 }
1213
1214 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1215 {
1216 u32 old_tsr = vcpu->arch.tsr;
1217
1218 vcpu->arch.tsr = new_tsr;
1219
1220 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1221 arm_next_watchdog(vcpu);
1222
1223 update_timer_ints(vcpu);
1224 }
1225
1226 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1227 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1228 {
1229 int i;
1230 int r;
1231
1232 vcpu->arch.pc = 0;
1233 vcpu->arch.shared->pir = vcpu->vcpu_id;
1234 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1235 kvmppc_set_msr(vcpu, 0);
1236
1237 #ifndef CONFIG_KVM_BOOKE_HV
1238 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
1239 vcpu->arch.shadow_pid = 1;
1240 vcpu->arch.shared->msr = 0;
1241 #endif
1242
1243 /* Eye-catching numbers so we know if the guest takes an interrupt
1244 * before it's programmed its own IVPR/IVORs. */
1245 vcpu->arch.ivpr = 0x55550000;
1246 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1247 vcpu->arch.ivor[i] = 0x7700 | i * 4;
1248
1249 kvmppc_init_timing_stats(vcpu);
1250
1251 r = kvmppc_core_vcpu_setup(vcpu);
1252 kvmppc_sanity_check(vcpu);
1253 return r;
1254 }
1255
1256 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1257 {
1258 /* setup watchdog timer once */
1259 spin_lock_init(&vcpu->arch.wdt_lock);
1260 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1261 (unsigned long)vcpu);
1262
1263 return 0;
1264 }
1265
1266 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1267 {
1268 del_timer_sync(&vcpu->arch.wdt_timer);
1269 }
1270
1271 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1272 {
1273 int i;
1274
1275 regs->pc = vcpu->arch.pc;
1276 regs->cr = kvmppc_get_cr(vcpu);
1277 regs->ctr = vcpu->arch.ctr;
1278 regs->lr = vcpu->arch.lr;
1279 regs->xer = kvmppc_get_xer(vcpu);
1280 regs->msr = vcpu->arch.shared->msr;
1281 regs->srr0 = vcpu->arch.shared->srr0;
1282 regs->srr1 = vcpu->arch.shared->srr1;
1283 regs->pid = vcpu->arch.pid;
1284 regs->sprg0 = vcpu->arch.shared->sprg0;
1285 regs->sprg1 = vcpu->arch.shared->sprg1;
1286 regs->sprg2 = vcpu->arch.shared->sprg2;
1287 regs->sprg3 = vcpu->arch.shared->sprg3;
1288 regs->sprg4 = vcpu->arch.shared->sprg4;
1289 regs->sprg5 = vcpu->arch.shared->sprg5;
1290 regs->sprg6 = vcpu->arch.shared->sprg6;
1291 regs->sprg7 = vcpu->arch.shared->sprg7;
1292
1293 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1294 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1295
1296 return 0;
1297 }
1298
1299 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1300 {
1301 int i;
1302
1303 vcpu->arch.pc = regs->pc;
1304 kvmppc_set_cr(vcpu, regs->cr);
1305 vcpu->arch.ctr = regs->ctr;
1306 vcpu->arch.lr = regs->lr;
1307 kvmppc_set_xer(vcpu, regs->xer);
1308 kvmppc_set_msr(vcpu, regs->msr);
1309 vcpu->arch.shared->srr0 = regs->srr0;
1310 vcpu->arch.shared->srr1 = regs->srr1;
1311 kvmppc_set_pid(vcpu, regs->pid);
1312 vcpu->arch.shared->sprg0 = regs->sprg0;
1313 vcpu->arch.shared->sprg1 = regs->sprg1;
1314 vcpu->arch.shared->sprg2 = regs->sprg2;
1315 vcpu->arch.shared->sprg3 = regs->sprg3;
1316 vcpu->arch.shared->sprg4 = regs->sprg4;
1317 vcpu->arch.shared->sprg5 = regs->sprg5;
1318 vcpu->arch.shared->sprg6 = regs->sprg6;
1319 vcpu->arch.shared->sprg7 = regs->sprg7;
1320
1321 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1322 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1323
1324 return 0;
1325 }
1326
1327 static void get_sregs_base(struct kvm_vcpu *vcpu,
1328 struct kvm_sregs *sregs)
1329 {
1330 u64 tb = get_tb();
1331
1332 sregs->u.e.features |= KVM_SREGS_E_BASE;
1333
1334 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1335 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1336 sregs->u.e.mcsr = vcpu->arch.mcsr;
1337 sregs->u.e.esr = get_guest_esr(vcpu);
1338 sregs->u.e.dear = get_guest_dear(vcpu);
1339 sregs->u.e.tsr = vcpu->arch.tsr;
1340 sregs->u.e.tcr = vcpu->arch.tcr;
1341 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1342 sregs->u.e.tb = tb;
1343 sregs->u.e.vrsave = vcpu->arch.vrsave;
1344 }
1345
1346 static int set_sregs_base(struct kvm_vcpu *vcpu,
1347 struct kvm_sregs *sregs)
1348 {
1349 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1350 return 0;
1351
1352 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1353 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1354 vcpu->arch.mcsr = sregs->u.e.mcsr;
1355 set_guest_esr(vcpu, sregs->u.e.esr);
1356 set_guest_dear(vcpu, sregs->u.e.dear);
1357 vcpu->arch.vrsave = sregs->u.e.vrsave;
1358 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1359
1360 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1361 vcpu->arch.dec = sregs->u.e.dec;
1362 kvmppc_emulate_dec(vcpu);
1363 }
1364
1365 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1366 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1367
1368 return 0;
1369 }
1370
1371 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1372 struct kvm_sregs *sregs)
1373 {
1374 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1375
1376 sregs->u.e.pir = vcpu->vcpu_id;
1377 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1378 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1379 sregs->u.e.decar = vcpu->arch.decar;
1380 sregs->u.e.ivpr = vcpu->arch.ivpr;
1381 }
1382
1383 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1384 struct kvm_sregs *sregs)
1385 {
1386 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1387 return 0;
1388
1389 if (sregs->u.e.pir != vcpu->vcpu_id)
1390 return -EINVAL;
1391
1392 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1393 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1394 vcpu->arch.decar = sregs->u.e.decar;
1395 vcpu->arch.ivpr = sregs->u.e.ivpr;
1396
1397 return 0;
1398 }
1399
1400 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1401 {
1402 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1403
1404 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1405 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1406 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1407 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1408 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1409 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1410 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1411 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1412 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1413 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1414 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1415 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1416 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1417 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1418 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1419 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1420 return 0;
1421 }
1422
1423 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1424 {
1425 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1426 return 0;
1427
1428 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1429 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1430 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1431 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1432 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1433 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1434 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1435 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1436 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1437 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1438 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1439 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1440 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1441 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1442 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1443 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1444
1445 return 0;
1446 }
1447
1448 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1449 struct kvm_sregs *sregs)
1450 {
1451 sregs->pvr = vcpu->arch.pvr;
1452
1453 get_sregs_base(vcpu, sregs);
1454 get_sregs_arch206(vcpu, sregs);
1455 return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1456 }
1457
1458 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1459 struct kvm_sregs *sregs)
1460 {
1461 int ret;
1462
1463 if (vcpu->arch.pvr != sregs->pvr)
1464 return -EINVAL;
1465
1466 ret = set_sregs_base(vcpu, sregs);
1467 if (ret < 0)
1468 return ret;
1469
1470 ret = set_sregs_arch206(vcpu, sregs);
1471 if (ret < 0)
1472 return ret;
1473
1474 return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1475 }
1476
1477 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1478 {
1479 int r = 0;
1480 union kvmppc_one_reg val;
1481 int size;
1482
1483 size = one_reg_size(reg->id);
1484 if (size > sizeof(val))
1485 return -EINVAL;
1486
1487 switch (reg->id) {
1488 case KVM_REG_PPC_IAC1:
1489 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac1);
1490 break;
1491 case KVM_REG_PPC_IAC2:
1492 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac2);
1493 break;
1494 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1495 case KVM_REG_PPC_IAC3:
1496 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac3);
1497 break;
1498 case KVM_REG_PPC_IAC4:
1499 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac4);
1500 break;
1501 #endif
1502 case KVM_REG_PPC_DAC1:
1503 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac1);
1504 break;
1505 case KVM_REG_PPC_DAC2:
1506 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac2);
1507 break;
1508 case KVM_REG_PPC_EPR: {
1509 u32 epr = get_guest_epr(vcpu);
1510 val = get_reg_val(reg->id, epr);
1511 break;
1512 }
1513 #if defined(CONFIG_64BIT)
1514 case KVM_REG_PPC_EPCR:
1515 val = get_reg_val(reg->id, vcpu->arch.epcr);
1516 break;
1517 #endif
1518 case KVM_REG_PPC_TCR:
1519 val = get_reg_val(reg->id, vcpu->arch.tcr);
1520 break;
1521 case KVM_REG_PPC_TSR:
1522 val = get_reg_val(reg->id, vcpu->arch.tsr);
1523 break;
1524 case KVM_REG_PPC_DEBUG_INST:
1525 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV_DEBUG);
1526 break;
1527 case KVM_REG_PPC_VRSAVE:
1528 val = get_reg_val(reg->id, vcpu->arch.vrsave);
1529 break;
1530 default:
1531 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, reg->id, &val);
1532 break;
1533 }
1534
1535 if (r)
1536 return r;
1537
1538 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1539 r = -EFAULT;
1540
1541 return r;
1542 }
1543
1544 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1545 {
1546 int r = 0;
1547 union kvmppc_one_reg val;
1548 int size;
1549
1550 size = one_reg_size(reg->id);
1551 if (size > sizeof(val))
1552 return -EINVAL;
1553
1554 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1555 return -EFAULT;
1556
1557 switch (reg->id) {
1558 case KVM_REG_PPC_IAC1:
1559 vcpu->arch.dbg_reg.iac1 = set_reg_val(reg->id, val);
1560 break;
1561 case KVM_REG_PPC_IAC2:
1562 vcpu->arch.dbg_reg.iac2 = set_reg_val(reg->id, val);
1563 break;
1564 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1565 case KVM_REG_PPC_IAC3:
1566 vcpu->arch.dbg_reg.iac3 = set_reg_val(reg->id, val);
1567 break;
1568 case KVM_REG_PPC_IAC4:
1569 vcpu->arch.dbg_reg.iac4 = set_reg_val(reg->id, val);
1570 break;
1571 #endif
1572 case KVM_REG_PPC_DAC1:
1573 vcpu->arch.dbg_reg.dac1 = set_reg_val(reg->id, val);
1574 break;
1575 case KVM_REG_PPC_DAC2:
1576 vcpu->arch.dbg_reg.dac2 = set_reg_val(reg->id, val);
1577 break;
1578 case KVM_REG_PPC_EPR: {
1579 u32 new_epr = set_reg_val(reg->id, val);
1580 kvmppc_set_epr(vcpu, new_epr);
1581 break;
1582 }
1583 #if defined(CONFIG_64BIT)
1584 case KVM_REG_PPC_EPCR: {
1585 u32 new_epcr = set_reg_val(reg->id, val);
1586 kvmppc_set_epcr(vcpu, new_epcr);
1587 break;
1588 }
1589 #endif
1590 case KVM_REG_PPC_OR_TSR: {
1591 u32 tsr_bits = set_reg_val(reg->id, val);
1592 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1593 break;
1594 }
1595 case KVM_REG_PPC_CLEAR_TSR: {
1596 u32 tsr_bits = set_reg_val(reg->id, val);
1597 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1598 break;
1599 }
1600 case KVM_REG_PPC_TSR: {
1601 u32 tsr = set_reg_val(reg->id, val);
1602 kvmppc_set_tsr(vcpu, tsr);
1603 break;
1604 }
1605 case KVM_REG_PPC_TCR: {
1606 u32 tcr = set_reg_val(reg->id, val);
1607 kvmppc_set_tcr(vcpu, tcr);
1608 break;
1609 }
1610 case KVM_REG_PPC_VRSAVE:
1611 vcpu->arch.vrsave = set_reg_val(reg->id, val);
1612 break;
1613 default:
1614 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, reg->id, &val);
1615 break;
1616 }
1617
1618 return r;
1619 }
1620
1621 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1622 {
1623 return -ENOTSUPP;
1624 }
1625
1626 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1627 {
1628 return -ENOTSUPP;
1629 }
1630
1631 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1632 struct kvm_translation *tr)
1633 {
1634 int r;
1635
1636 r = kvmppc_core_vcpu_translate(vcpu, tr);
1637 return r;
1638 }
1639
1640 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1641 {
1642 return -ENOTSUPP;
1643 }
1644
1645 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1646 struct kvm_memory_slot *dont)
1647 {
1648 }
1649
1650 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1651 unsigned long npages)
1652 {
1653 return 0;
1654 }
1655
1656 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1657 struct kvm_memory_slot *memslot,
1658 struct kvm_userspace_memory_region *mem)
1659 {
1660 return 0;
1661 }
1662
1663 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1664 struct kvm_userspace_memory_region *mem,
1665 const struct kvm_memory_slot *old)
1666 {
1667 }
1668
1669 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1670 {
1671 }
1672
1673 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1674 {
1675 #if defined(CONFIG_64BIT)
1676 vcpu->arch.epcr = new_epcr;
1677 #ifdef CONFIG_KVM_BOOKE_HV
1678 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1679 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
1680 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1681 #endif
1682 #endif
1683 }
1684
1685 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1686 {
1687 vcpu->arch.tcr = new_tcr;
1688 arm_next_watchdog(vcpu);
1689 update_timer_ints(vcpu);
1690 }
1691
1692 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1693 {
1694 set_bits(tsr_bits, &vcpu->arch.tsr);
1695 smp_wmb();
1696 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1697 kvm_vcpu_kick(vcpu);
1698 }
1699
1700 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1701 {
1702 clear_bits(tsr_bits, &vcpu->arch.tsr);
1703
1704 /*
1705 * We may have stopped the watchdog due to
1706 * being stuck on final expiration.
1707 */
1708 if (tsr_bits & (TSR_ENW | TSR_WIS))
1709 arm_next_watchdog(vcpu);
1710
1711 update_timer_ints(vcpu);
1712 }
1713
1714 void kvmppc_decrementer_func(unsigned long data)
1715 {
1716 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1717
1718 if (vcpu->arch.tcr & TCR_ARE) {
1719 vcpu->arch.dec = vcpu->arch.decar;
1720 kvmppc_emulate_dec(vcpu);
1721 }
1722
1723 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1724 }
1725
1726 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1727 uint64_t addr, int index)
1728 {
1729 switch (index) {
1730 case 0:
1731 dbg_reg->dbcr0 |= DBCR0_IAC1;
1732 dbg_reg->iac1 = addr;
1733 break;
1734 case 1:
1735 dbg_reg->dbcr0 |= DBCR0_IAC2;
1736 dbg_reg->iac2 = addr;
1737 break;
1738 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1739 case 2:
1740 dbg_reg->dbcr0 |= DBCR0_IAC3;
1741 dbg_reg->iac3 = addr;
1742 break;
1743 case 3:
1744 dbg_reg->dbcr0 |= DBCR0_IAC4;
1745 dbg_reg->iac4 = addr;
1746 break;
1747 #endif
1748 default:
1749 return -EINVAL;
1750 }
1751
1752 dbg_reg->dbcr0 |= DBCR0_IDM;
1753 return 0;
1754 }
1755
1756 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1757 int type, int index)
1758 {
1759 switch (index) {
1760 case 0:
1761 if (type & KVMPPC_DEBUG_WATCH_READ)
1762 dbg_reg->dbcr0 |= DBCR0_DAC1R;
1763 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1764 dbg_reg->dbcr0 |= DBCR0_DAC1W;
1765 dbg_reg->dac1 = addr;
1766 break;
1767 case 1:
1768 if (type & KVMPPC_DEBUG_WATCH_READ)
1769 dbg_reg->dbcr0 |= DBCR0_DAC2R;
1770 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1771 dbg_reg->dbcr0 |= DBCR0_DAC2W;
1772 dbg_reg->dac2 = addr;
1773 break;
1774 default:
1775 return -EINVAL;
1776 }
1777
1778 dbg_reg->dbcr0 |= DBCR0_IDM;
1779 return 0;
1780 }
1781 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1782 {
1783 /* XXX: Add similar MSR protection for BookE-PR */
1784 #ifdef CONFIG_KVM_BOOKE_HV
1785 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1786 if (set) {
1787 if (prot_bitmap & MSR_UCLE)
1788 vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1789 if (prot_bitmap & MSR_DE)
1790 vcpu->arch.shadow_msrp |= MSRP_DEP;
1791 if (prot_bitmap & MSR_PMM)
1792 vcpu->arch.shadow_msrp |= MSRP_PMMP;
1793 } else {
1794 if (prot_bitmap & MSR_UCLE)
1795 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1796 if (prot_bitmap & MSR_DE)
1797 vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1798 if (prot_bitmap & MSR_PMM)
1799 vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1800 }
1801 #endif
1802 }
1803
1804 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1805 struct kvm_guest_debug *dbg)
1806 {
1807 struct debug_reg *dbg_reg;
1808 int n, b = 0, w = 0;
1809
1810 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
1811 vcpu->arch.shadow_dbg_reg.dbcr0 = 0;
1812 vcpu->guest_debug = 0;
1813 kvm_guest_protect_msr(vcpu, MSR_DE, false);
1814 return 0;
1815 }
1816
1817 kvm_guest_protect_msr(vcpu, MSR_DE, true);
1818 vcpu->guest_debug = dbg->control;
1819 vcpu->arch.shadow_dbg_reg.dbcr0 = 0;
1820 /* Set DBCR0_EDM in guest visible DBCR0 register. */
1821 vcpu->arch.dbg_reg.dbcr0 = DBCR0_EDM;
1822
1823 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
1824 vcpu->arch.shadow_dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1825
1826 /* Code below handles only HW breakpoints */
1827 dbg_reg = &(vcpu->arch.shadow_dbg_reg);
1828
1829 #ifdef CONFIG_KVM_BOOKE_HV
1830 /*
1831 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
1832 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
1833 */
1834 dbg_reg->dbcr1 = 0;
1835 dbg_reg->dbcr2 = 0;
1836 #else
1837 /*
1838 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
1839 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
1840 * is set.
1841 */
1842 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
1843 DBCR1_IAC4US;
1844 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
1845 #endif
1846
1847 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1848 return 0;
1849
1850 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
1851 uint64_t addr = dbg->arch.bp[n].addr;
1852 uint32_t type = dbg->arch.bp[n].type;
1853
1854 if (type == KVMPPC_DEBUG_NONE)
1855 continue;
1856
1857 if (type & !(KVMPPC_DEBUG_WATCH_READ |
1858 KVMPPC_DEBUG_WATCH_WRITE |
1859 KVMPPC_DEBUG_BREAKPOINT))
1860 return -EINVAL;
1861
1862 if (type & KVMPPC_DEBUG_BREAKPOINT) {
1863 /* Setting H/W breakpoint */
1864 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
1865 return -EINVAL;
1866 } else {
1867 /* Setting H/W watchpoint */
1868 if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
1869 type, w++))
1870 return -EINVAL;
1871 }
1872 }
1873
1874 return 0;
1875 }
1876
1877 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1878 {
1879 vcpu->cpu = smp_processor_id();
1880 current->thread.kvm_vcpu = vcpu;
1881 }
1882
1883 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1884 {
1885 current->thread.kvm_vcpu = NULL;
1886 vcpu->cpu = -1;
1887
1888 /* Clear pending debug event in DBSR */
1889 kvmppc_clear_dbsr();
1890 }
1891
1892 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
1893 {
1894 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
1895 }
1896
1897 int kvmppc_core_init_vm(struct kvm *kvm)
1898 {
1899 return kvm->arch.kvm_ops->init_vm(kvm);
1900 }
1901
1902 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
1903 {
1904 return kvm->arch.kvm_ops->vcpu_create(kvm, id);
1905 }
1906
1907 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1908 {
1909 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
1910 }
1911
1912 void kvmppc_core_destroy_vm(struct kvm *kvm)
1913 {
1914 kvm->arch.kvm_ops->destroy_vm(kvm);
1915 }
1916
1917 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1918 {
1919 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
1920 }
1921
1922 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
1923 {
1924 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
1925 }
1926
1927 int __init kvmppc_booke_init(void)
1928 {
1929 #ifndef CONFIG_KVM_BOOKE_HV
1930 unsigned long ivor[16];
1931 unsigned long *handler = kvmppc_booke_handler_addr;
1932 unsigned long max_ivor = 0;
1933 unsigned long handler_len;
1934 int i;
1935
1936 /* We install our own exception handlers by hijacking IVPR. IVPR must
1937 * be 16-bit aligned, so we need a 64KB allocation. */
1938 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1939 VCPU_SIZE_ORDER);
1940 if (!kvmppc_booke_handlers)
1941 return -ENOMEM;
1942
1943 /* XXX make sure our handlers are smaller than Linux's */
1944
1945 /* Copy our interrupt handlers to match host IVORs. That way we don't
1946 * have to swap the IVORs on every guest/host transition. */
1947 ivor[0] = mfspr(SPRN_IVOR0);
1948 ivor[1] = mfspr(SPRN_IVOR1);
1949 ivor[2] = mfspr(SPRN_IVOR2);
1950 ivor[3] = mfspr(SPRN_IVOR3);
1951 ivor[4] = mfspr(SPRN_IVOR4);
1952 ivor[5] = mfspr(SPRN_IVOR5);
1953 ivor[6] = mfspr(SPRN_IVOR6);
1954 ivor[7] = mfspr(SPRN_IVOR7);
1955 ivor[8] = mfspr(SPRN_IVOR8);
1956 ivor[9] = mfspr(SPRN_IVOR9);
1957 ivor[10] = mfspr(SPRN_IVOR10);
1958 ivor[11] = mfspr(SPRN_IVOR11);
1959 ivor[12] = mfspr(SPRN_IVOR12);
1960 ivor[13] = mfspr(SPRN_IVOR13);
1961 ivor[14] = mfspr(SPRN_IVOR14);
1962 ivor[15] = mfspr(SPRN_IVOR15);
1963
1964 for (i = 0; i < 16; i++) {
1965 if (ivor[i] > max_ivor)
1966 max_ivor = i;
1967
1968 handler_len = handler[i + 1] - handler[i];
1969 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1970 (void *)handler[i], handler_len);
1971 }
1972
1973 handler_len = handler[max_ivor + 1] - handler[max_ivor];
1974 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
1975 ivor[max_ivor] + handler_len);
1976 #endif /* !BOOKE_HV */
1977 return 0;
1978 }
1979
1980 void __exit kvmppc_booke_exit(void)
1981 {
1982 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1983 kvm_exit();
1984 }
Linux kernel - Deliverables
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