arch/powerpc/math-emu/math.c

   1 /*
   2  * Copyright (C) 1999  Eddie C. Dost  (ecd@atecom.com)
   3  */
   4
   5 #include <linux/types.h>
   6 #include <linux/sched.h>
   7
   8 #include <asm/uaccess.h>
   9 #include <asm/reg.h>
  10
  11 #include <asm/sfp-machine.h>
  12 #include <math-emu/double.h>
  13
  14 #define FLOATFUNC(x)    extern int x(void *, void *, void *, void *)
  15
  16 /* The instructions list which may be not implemented by a hardware FPU */
  17 FLOATFUNC(fre);
  18 FLOATFUNC(frsqrtes);
  19 FLOATFUNC(fsqrt);
  20 FLOATFUNC(fsqrts);
  21 FLOATFUNC(mtfsf);
  22 FLOATFUNC(mtfsfi);
  23
  24 #ifdef CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED
  25 #undef FLOATFUNC(x)
  26 #define FLOATFUNC(x)    static inline int x(void *op1, void *op2, void *op3, \
  27                                                  void *op4) { }
  28 #endif
  29
  30 FLOATFUNC(fadd);
  31 FLOATFUNC(fadds);
  32 FLOATFUNC(fdiv);
  33 FLOATFUNC(fdivs);
  34 FLOATFUNC(fmul);
  35 FLOATFUNC(fmuls);
  36 FLOATFUNC(fsub);
  37 FLOATFUNC(fsubs);
  38
  39 FLOATFUNC(fmadd);
  40 FLOATFUNC(fmadds);
  41 FLOATFUNC(fmsub);
  42 FLOATFUNC(fmsubs);
  43 FLOATFUNC(fnmadd);
  44 FLOATFUNC(fnmadds);
  45 FLOATFUNC(fnmsub);
  46 FLOATFUNC(fnmsubs);
  47
  48 FLOATFUNC(fctiw);
  49 FLOATFUNC(fctiwz);
  50 FLOATFUNC(frsp);
  51
  52 FLOATFUNC(fcmpo);
  53 FLOATFUNC(fcmpu);
  54
  55 FLOATFUNC(mcrfs);
  56 FLOATFUNC(mffs);
  57 FLOATFUNC(mtfsb0);
  58 FLOATFUNC(mtfsb1);
  59
  60 FLOATFUNC(lfd);
  61 FLOATFUNC(lfs);
  62
  63 FLOATFUNC(stfd);
  64 FLOATFUNC(stfs);
  65 FLOATFUNC(stfiwx);
  66
  67 FLOATFUNC(fabs);
  68 FLOATFUNC(fmr);
  69 FLOATFUNC(fnabs);
  70 FLOATFUNC(fneg);
  71
  72 /* Optional */
  73 FLOATFUNC(fres);
  74 FLOATFUNC(frsqrte);
  75 FLOATFUNC(fsel);
  76
  77
  78 #define OP31            0x1f            /*   31 */
  79 #define LFS             0x30            /*   48 */
  80 #define LFSU            0x31            /*   49 */
  81 #define LFD             0x32            /*   50 */
  82 #define LFDU            0x33            /*   51 */
  83 #define STFS            0x34            /*   52 */
  84 #define STFSU           0x35            /*   53 */
  85 #define STFD            0x36            /*   54 */
  86 #define STFDU           0x37            /*   55 */
  87 #define OP59            0x3b            /*   59 */
  88 #define OP63            0x3f            /*   63 */
  89
  90 /* Opcode 31: */
  91 /* X-Form: */
  92 #define LFSX            0x217           /*  535 */
  93 #define LFSUX           0x237           /*  567 */
  94 #define LFDX            0x257           /*  599 */
  95 #define LFDUX           0x277           /*  631 */
  96 #define STFSX           0x297           /*  663 */
  97 #define STFSUX          0x2b7           /*  695 */
  98 #define STFDX           0x2d7           /*  727 */
  99 #define STFDUX          0x2f7           /*  759 */
 100 #define STFIWX          0x3d7           /*  983 */
 101
 102 /* Opcode 59: */
 103 /* A-Form: */
 104 #define FDIVS           0x012           /*   18 */
 105 #define FSUBS           0x014           /*   20 */
 106 #define FADDS           0x015           /*   21 */
 107 #define FSQRTS          0x016           /*   22 */
 108 #define FRES            0x018           /*   24 */
 109 #define FMULS           0x019           /*   25 */
 110 #define FRSQRTES        0x01a           /*   26 */
 111 #define FMSUBS          0x01c           /*   28 */
 112 #define FMADDS          0x01d           /*   29 */
 113 #define FNMSUBS         0x01e           /*   30 */
 114 #define FNMADDS         0x01f           /*   31 */
 115
 116 /* Opcode 63: */
 117 /* A-Form: */
 118 #define FDIV            0x012           /*   18 */
 119 #define FSUB            0x014           /*   20 */
 120 #define FADD            0x015           /*   21 */
 121 #define FSQRT           0x016           /*   22 */
 122 #define FSEL            0x017           /*   23 */
 123 #define FRE             0x018           /*   24 */
 124 #define FMUL            0x019           /*   25 */
 125 #define FRSQRTE         0x01a           /*   26 */
 126 #define FMSUB           0x01c           /*   28 */
 127 #define FMADD           0x01d           /*   29 */
 128 #define FNMSUB          0x01e           /*   30 */
 129 #define FNMADD          0x01f           /*   31 */
 130
 131 /* X-Form: */
 132 #define FCMPU           0x000           /*    0 */
 133 #define FRSP            0x00c           /*   12 */
 134 #define FCTIW           0x00e           /*   14 */
 135 #define FCTIWZ          0x00f           /*   15 */
 136 #define FCMPO           0x020           /*   32 */
 137 #define MTFSB1          0x026           /*   38 */
 138 #define FNEG            0x028           /*   40 */
 139 #define MCRFS           0x040           /*   64 */
 140 #define MTFSB0          0x046           /*   70 */
 141 #define FMR             0x048           /*   72 */
 142 #define MTFSFI          0x086           /*  134 */
 143 #define FNABS           0x088           /*  136 */
 144 #define FABS            0x108           /*  264 */
 145 #define MFFS            0x247           /*  583 */
 146 #define MTFSF           0x2c7           /*  711 */
 147
 148
 149 #define AB      2
 150 #define AC      3
 151 #define ABC     4
 152 #define D       5
 153 #define DU      6
 154 #define X       7
 155 #define XA      8
 156 #define XB      9
 157 #define XCR     11
 158 #define XCRB    12
 159 #define XCRI    13
 160 #define XCRL    16
 161 #define XE      14
 162 #define XEU     15
 163 #define XFLB    10
 164
 165 static int
 166 record_exception(struct pt_regs *regs, int eflag)
 167 {
 168         u32 fpscr;
 169
 170         fpscr = __FPU_FPSCR;
 171
 172         if (eflag) {
 173                 fpscr |= FPSCR_FX;
 174                 if (eflag & EFLAG_OVERFLOW)
 175                         fpscr |= FPSCR_OX;
 176                 if (eflag & EFLAG_UNDERFLOW)
 177                         fpscr |= FPSCR_UX;
 178                 if (eflag & EFLAG_DIVZERO)
 179                         fpscr |= FPSCR_ZX;
 180                 if (eflag & EFLAG_INEXACT)
 181                         fpscr |= FPSCR_XX;
 182                 if (eflag & EFLAG_INVALID)
 183                         fpscr |= FPSCR_VX;
 184                 if (eflag & EFLAG_VXSNAN)
 185                         fpscr |= FPSCR_VXSNAN;
 186                 if (eflag & EFLAG_VXISI)
 187                         fpscr |= FPSCR_VXISI;
 188                 if (eflag & EFLAG_VXIDI)
 189                         fpscr |= FPSCR_VXIDI;
 190                 if (eflag & EFLAG_VXZDZ)
 191                         fpscr |= FPSCR_VXZDZ;
 192                 if (eflag & EFLAG_VXIMZ)
 193                         fpscr |= FPSCR_VXIMZ;
 194                 if (eflag & EFLAG_VXVC)
 195                         fpscr |= FPSCR_VXVC;
 196                 if (eflag & EFLAG_VXSOFT)
 197                         fpscr |= FPSCR_VXSOFT;
 198                 if (eflag & EFLAG_VXSQRT)
 199                         fpscr |= FPSCR_VXSQRT;
 200                 if (eflag & EFLAG_VXCVI)
 201                         fpscr |= FPSCR_VXCVI;
 202         }
 203
 204 //      fpscr &= ~(FPSCR_VX);
 205         if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI |
 206                      FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC |
 207                      FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI))
 208                 fpscr |= FPSCR_VX;
 209
 210         fpscr &= ~(FPSCR_FEX);
 211         if (((fpscr & FPSCR_VX) && (fpscr & FPSCR_VE)) ||
 212             ((fpscr & FPSCR_OX) && (fpscr & FPSCR_OE)) ||
 213             ((fpscr & FPSCR_UX) && (fpscr & FPSCR_UE)) ||
 214             ((fpscr & FPSCR_ZX) && (fpscr & FPSCR_ZE)) ||
 215             ((fpscr & FPSCR_XX) && (fpscr & FPSCR_XE)))
 216                 fpscr |= FPSCR_FEX;
 217
 218         __FPU_FPSCR = fpscr;
 219
 220         return (fpscr & FPSCR_FEX) ? 1 : 0;
 221 }
 222
 223 int
 224 do_mathemu(struct pt_regs *regs)
 225 {
 226         void *op0 = 0, *op1 = 0, *op2 = 0, *op3 = 0;
 227         unsigned long pc = regs->nip;
 228         signed short sdisp;
 229         u32 insn = 0;
 230         int idx = 0;
 231         int (*func)(void *, void *, void *, void *);
 232         int type = 0;
 233         int eflag, trap;
 234
 235         if (get_user(insn, (u32 *)pc))
 236                 return -EFAULT;
 237
 238         switch (insn >> 26) {
 239         case LFS:       func = lfs;     type = D;       break;
 240         case LFSU:      func = lfs;     type = DU;      break;
 241         case LFD:       func = lfd;     type = D;       break;
 242         case LFDU:      func = lfd;     type = DU;      break;
 243         case STFS:      func = stfs;    type = D;       break;
 244         case STFSU:     func = stfs;    type = DU;      break;
 245         case STFD:      func = stfd;    type = D;       break;
 246         case STFDU:     func = stfd;    type = DU;      break;
 247
 248         case OP31:
 249                 switch ((insn >> 1) & 0x3ff) {
 250                 case LFSX:      func = lfs;     type = XE;      break;
 251                 case LFSUX:     func = lfs;     type = XEU;     break;
 252                 case LFDX:      func = lfd;     type = XE;      break;
 253                 case LFDUX:     func = lfd;     type = XEU;     break;
 254                 case STFSX:     func = stfs;    type = XE;      break;
 255                 case STFSUX:    func = stfs;    type = XEU;     break;
 256                 case STFDX:     func = stfd;    type = XE;      break;
 257                 case STFDUX:    func = stfd;    type = XEU;     break;
 258                 case STFIWX:    func = stfiwx;  type = XE;      break;
 259                 default:
 260                         goto illegal;
 261                 }
 262                 break;
 263
 264         case OP59:
 265                 switch ((insn >> 1) & 0x1f) {
 266                 case FDIVS:     func = fdivs;   type = AB;      break;
 267                 case FSUBS:     func = fsubs;   type = AB;      break;
 268                 case FADDS:     func = fadds;   type = AB;      break;
 269                 case FSQRTS:    func = fsqrts;  type = XB;      break;
 270                 case FRES:      func = fres;    type = XB;      break;
 271                 case FMULS:     func = fmuls;   type = AC;      break;
 272                 case FRSQRTES:  func = frsqrtes;type = XB;      break;
 273                 case FMSUBS:    func = fmsubs;  type = ABC;     break;
 274                 case FMADDS:    func = fmadds;  type = ABC;     break;
 275                 case FNMSUBS:   func = fnmsubs; type = ABC;     break;
 276                 case FNMADDS:   func = fnmadds; type = ABC;     break;
 277                 default:
 278                         goto illegal;
 279                 }
 280                 break;
 281
 282         case OP63:
 283                 if (insn & 0x20) {
 284                         switch ((insn >> 1) & 0x1f) {
 285                         case FDIV:      func = fdiv;    type = AB;      break;
 286                         case FSUB:      func = fsub;    type = AB;      break;
 287                         case FADD:      func = fadd;    type = AB;      break;
 288                         case FSQRT:     func = fsqrt;   type = XB;      break;
 289                         case FRE:       func = fre;     type = XB;      break;
 290                         case FSEL:      func = fsel;    type = ABC;     break;
 291                         case FMUL:      func = fmul;    type = AC;      break;
 292                         case FRSQRTE:   func = frsqrte; type = XB;      break;
 293                         case FMSUB:     func = fmsub;   type = ABC;     break;
 294                         case FMADD:     func = fmadd;   type = ABC;     break;
 295                         case FNMSUB:    func = fnmsub;  type = ABC;     break;
 296                         case FNMADD:    func = fnmadd;  type = ABC;     break;
 297                         default:
 298                                 goto illegal;
 299                         }
 300                         break;
 301                 }
 302
 303                 switch ((insn >> 1) & 0x3ff) {
 304                 case FCMPU:     func = fcmpu;   type = XCR;     break;
 305                 case FRSP:      func = frsp;    type = XB;      break;
 306                 case FCTIW:     func = fctiw;   type = XB;      break;
 307                 case FCTIWZ:    func = fctiwz;  type = XB;      break;
 308                 case FCMPO:     func = fcmpo;   type = XCR;     break;
 309                 case MTFSB1:    func = mtfsb1;  type = XCRB;    break;
 310                 case FNEG:      func = fneg;    type = XB;      break;
 311                 case MCRFS:     func = mcrfs;   type = XCRL;    break;
 312                 case MTFSB0:    func = mtfsb0;  type = XCRB;    break;
 313                 case FMR:       func = fmr;     type = XB;      break;
 314                 case MTFSFI:    func = mtfsfi;  type = XCRI;    break;
 315                 case FNABS:     func = fnabs;   type = XB;      break;
 316                 case FABS:      func = fabs;    type = XB;      break;
 317                 case MFFS:      func = mffs;    type = X;       break;
 318                 case MTFSF:     func = mtfsf;   type = XFLB;    break;
 319                 default:
 320                         goto illegal;
 321                 }
 322                 break;
 323
 324         default:
 325                 goto illegal;
 326         }
 327
 328         switch (type) {
 329         case AB:
 330                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 331                 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
 332                 op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 333                 break;
 334
 335         case AC:
 336                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 337                 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
 338                 op2 = (void *)&current->thread.TS_FPR((insn >>  6) & 0x1f);
 339                 break;
 340
 341         case ABC:
 342                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 343                 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
 344                 op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 345                 op3 = (void *)&current->thread.TS_FPR((insn >>  6) & 0x1f);
 346                 break;
 347
 348         case D:
 349                 idx = (insn >> 16) & 0x1f;
 350                 sdisp = (insn & 0xffff);
 351                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 352                 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
 353                 break;
 354
 355         case DU:
 356                 idx = (insn >> 16) & 0x1f;
 357                 if (!idx)
 358                         goto illegal;
 359
 360                 sdisp = (insn & 0xffff);
 361                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 362                 op1 = (void *)(regs->gpr[idx] + sdisp);
 363                 break;
 364
 365         case X:
 366                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 367                 break;
 368
 369         case XA:
 370                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 371                 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
 372                 break;
 373
 374         case XB:
 375                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 376                 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 377                 break;
 378
 379         case XE:
 380                 idx = (insn >> 16) & 0x1f;
 381                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 382                 if (!idx) {
 383                         if (((insn >> 1) & 0x3ff) == STFIWX)
 384                                 op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]);
 385                         else
 386                                 goto illegal;
 387                 } else {
 388                         op1 = (void *)(regs->gpr[idx] + regs->gpr[(insn >> 11) & 0x1f]);
 389                 }
 390
 391                 break;
 392
 393         case XEU:
 394                 idx = (insn >> 16) & 0x1f;
 395                 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
 396                 op1 = (void *)((idx ? regs->gpr[idx] : 0)
 397                                 + regs->gpr[(insn >> 11) & 0x1f]);
 398                 break;
 399
 400         case XCR:
 401                 op0 = (void *)&regs->ccr;
 402                 op1 = (void *)((insn >> 23) & 0x7);
 403                 op2 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
 404                 op3 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 405                 break;
 406
 407         case XCRL:
 408                 op0 = (void *)&regs->ccr;
 409                 op1 = (void *)((insn >> 23) & 0x7);
 410                 op2 = (void *)((insn >> 18) & 0x7);
 411                 break;
 412
 413         case XCRB:
 414                 op0 = (void *)((insn >> 21) & 0x1f);
 415                 break;
 416
 417         case XCRI:
 418                 op0 = (void *)((insn >> 23) & 0x7);
 419                 op1 = (void *)((insn >> 12) & 0xf);
 420                 break;
 421
 422         case XFLB:
 423                 op0 = (void *)((insn >> 17) & 0xff);
 424                 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
 425                 break;
 426
 427         default:
 428                 goto illegal;
 429         }
 430
 431         /*
 432          * If we support a HW FPU, we need to ensure the FP state
 433          * is flushed into the thread_struct before attempting
 434          * emulation
 435          */
 436 #ifdef CONFIG_PPC_FPU
 437         flush_fp_to_thread(current);
 438 #endif
 439
 440         eflag = func(op0, op1, op2, op3);
 441
 442         if (insn & 1) {
 443                 regs->ccr &= ~(0x0f000000);
 444                 regs->ccr |= (__FPU_FPSCR >> 4) & 0x0f000000;
 445         }
 446
 447         trap = record_exception(regs, eflag);
 448         if (trap)
 449                 return 1;
 450
 451         switch (type) {
 452         case DU:
 453         case XEU:
 454                 regs->gpr[idx] = (unsigned long)op1;
 455                 break;
 456
 457         default:
 458                 break;
 459         }
 460
 461         regs->nip += 4;
 462         return 0;
 463
 464 illegal:
 465         return -ENOSYS;
 466 }