3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Derived from "arch/i386/mm/fault.c"
6 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
8 * Modified by Cort Dougan and Paul Mackerras.
10 * Modified for PPC64 by Dave Engebretsen (engebret@ibm.com)
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
18 #include <linux/signal.h>
19 #include <linux/sched.h>
20 #include <linux/kernel.h>
21 #include <linux/errno.h>
22 #include <linux/string.h>
23 #include <linux/types.h>
24 #include <linux/ptrace.h>
25 #include <linux/mman.h>
27 #include <linux/interrupt.h>
28 #include <linux/highmem.h>
29 #include <linux/module.h>
30 #include <linux/kprobes.h>
31 #include <linux/kdebug.h>
34 #include <asm/pgtable.h>
36 #include <asm/mmu_context.h>
37 #include <asm/system.h>
38 #include <asm/uaccess.h>
39 #include <asm/tlbflush.h>
40 #include <asm/siginfo.h>
44 static inline int notify_page_fault(struct pt_regs
*regs
)
48 /* kprobe_running() needs smp_processor_id() */
49 if (!user_mode(regs
)) {
51 if (kprobe_running() && kprobe_fault_handler(regs
, 11))
59 static inline int notify_page_fault(struct pt_regs
*regs
)
66 * Check whether the instruction at regs->nip is a store using
67 * an update addressing form which will update r1.
69 static int store_updates_sp(struct pt_regs
*regs
)
73 if (get_user(inst
, (unsigned int __user
*)regs
->nip
))
75 /* check for 1 in the rA field */
76 if (((inst
>> 16) & 0x1f) != 1)
78 /* check major opcode */
86 case 62: /* std or stdu */
87 return (inst
& 3) == 1;
89 /* check minor opcode */
90 switch ((inst
>> 1) & 0x3ff) {
95 case 695: /* stfsux */
96 case 759: /* stfdux */
104 * For 600- and 800-family processors, the error_code parameter is DSISR
105 * for a data fault, SRR1 for an instruction fault. For 400-family processors
106 * the error_code parameter is ESR for a data fault, 0 for an instruction
108 * For 64-bit processors, the error_code parameter is
109 * - DSISR for a non-SLB data access fault,
110 * - SRR1 & 0x08000000 for a non-SLB instruction access fault
113 * The return value is 0 if the fault was handled, or the signal
114 * number if this is a kernel fault that can't be handled here.
116 int __kprobes
do_page_fault(struct pt_regs
*regs
, unsigned long address
,
117 unsigned long error_code
)
119 struct vm_area_struct
* vma
;
120 struct mm_struct
*mm
= current
->mm
;
122 int code
= SEGV_MAPERR
;
123 int is_write
= 0, ret
;
124 int trap
= TRAP(regs
);
125 int is_exec
= trap
== 0x400;
127 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
129 * Fortunately the bit assignments in SRR1 for an instruction
130 * fault and DSISR for a data fault are mostly the same for the
131 * bits we are interested in. But there are some bits which
132 * indicate errors in DSISR but can validly be set in SRR1.
135 error_code
&= 0x48200000;
137 is_write
= error_code
& DSISR_ISSTORE
;
139 is_write
= error_code
& ESR_DST
;
140 #endif /* CONFIG_4xx || CONFIG_BOOKE */
142 if (notify_page_fault(regs
))
145 if (unlikely(debugger_fault_handler(regs
)))
148 /* On a kernel SLB miss we can only check for a valid exception entry */
149 if (!user_mode(regs
) && (address
>= TASK_SIZE
))
152 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
153 if (error_code
& DSISR_DABRMATCH
) {
155 do_dabr(regs
, address
, error_code
);
158 #endif /* !(CONFIG_4xx || CONFIG_BOOKE)*/
160 if (in_atomic() || mm
== NULL
) {
161 if (!user_mode(regs
))
163 /* in_atomic() in user mode is really bad,
164 as is current->mm == NULL. */
165 printk(KERN_EMERG
"Page fault in user mode with "
166 "in_atomic() = %d mm = %p\n", in_atomic(), mm
);
167 printk(KERN_EMERG
"NIP = %lx MSR = %lx\n",
168 regs
->nip
, regs
->msr
);
169 die("Weird page fault", regs
, SIGSEGV
);
172 /* When running in the kernel we expect faults to occur only to
173 * addresses in user space. All other faults represent errors in the
174 * kernel and should generate an OOPS. Unfortunately, in the case of an
175 * erroneous fault occurring in a code path which already holds mmap_sem
176 * we will deadlock attempting to validate the fault against the
177 * address space. Luckily the kernel only validly references user
178 * space from well defined areas of code, which are listed in the
181 * As the vast majority of faults will be valid we will only perform
182 * the source reference check when there is a possibility of a deadlock.
183 * Attempt to lock the address space, if we cannot we then validate the
184 * source. If this is invalid we can skip the address space check,
185 * thus avoiding the deadlock.
187 if (!down_read_trylock(&mm
->mmap_sem
)) {
188 if (!user_mode(regs
) && !search_exception_tables(regs
->nip
))
189 goto bad_area_nosemaphore
;
191 down_read(&mm
->mmap_sem
);
194 vma
= find_vma(mm
, address
);
197 if (vma
->vm_start
<= address
)
199 if (!(vma
->vm_flags
& VM_GROWSDOWN
))
203 * N.B. The POWER/Open ABI allows programs to access up to
204 * 288 bytes below the stack pointer.
205 * The kernel signal delivery code writes up to about 1.5kB
206 * below the stack pointer (r1) before decrementing it.
207 * The exec code can write slightly over 640kB to the stack
208 * before setting the user r1. Thus we allow the stack to
209 * expand to 1MB without further checks.
211 if (address
+ 0x100000 < vma
->vm_end
) {
212 /* get user regs even if this fault is in kernel mode */
213 struct pt_regs
*uregs
= current
->thread
.regs
;
218 * A user-mode access to an address a long way below
219 * the stack pointer is only valid if the instruction
220 * is one which would update the stack pointer to the
221 * address accessed if the instruction completed,
222 * i.e. either stwu rs,n(r1) or stwux rs,r1,rb
223 * (or the byte, halfword, float or double forms).
225 * If we don't check this then any write to the area
226 * between the last mapped region and the stack will
227 * expand the stack rather than segfaulting.
229 if (address
+ 2048 < uregs
->gpr
[1]
230 && (!user_mode(regs
) || !store_updates_sp(regs
)))
233 if (expand_stack(vma
, address
))
238 #if defined(CONFIG_6xx)
239 if (error_code
& 0x95700000)
240 /* an error such as lwarx to I/O controller space,
241 address matching DABR, eciwx, etc. */
243 #endif /* CONFIG_6xx */
244 #if defined(CONFIG_8xx)
245 /* The MPC8xx seems to always set 0x80000000, which is
246 * "undefined". Of those that can be set, this is the only
247 * one which seems bad.
249 if (error_code
& 0x10000000)
250 /* Guarded storage error. */
252 #endif /* CONFIG_8xx */
255 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
256 /* protection fault */
257 if (error_code
& DSISR_PROTFAULT
)
260 * Allow execution from readable areas if the MMU does not
261 * provide separate controls over reading and executing.
263 if (!(vma
->vm_flags
& VM_EXEC
) &&
264 (cpu_has_feature(CPU_FTR_NOEXECUTE
) ||
265 !(vma
->vm_flags
& (VM_READ
| VM_WRITE
))))
271 /* Since 4xx/Book-E supports per-page execute permission,
272 * we lazily flush dcache to icache. */
274 if (get_pteptr(mm
, address
, &ptep
, &pmdp
)) {
275 spinlock_t
*ptl
= pte_lockptr(mm
, pmdp
);
277 if (pte_present(*ptep
)) {
278 struct page
*page
= pte_page(*ptep
);
280 if (!test_bit(PG_arch_1
, &page
->flags
)) {
281 flush_dcache_icache_page(page
);
282 set_bit(PG_arch_1
, &page
->flags
);
284 pte_update(ptep
, 0, _PAGE_HWEXEC
|
286 _tlbie(address
, mm
->context
.id
);
287 pte_unmap_unlock(ptep
, ptl
);
288 up_read(&mm
->mmap_sem
);
291 pte_unmap_unlock(ptep
, ptl
);
295 } else if (is_write
) {
296 if (!(vma
->vm_flags
& VM_WRITE
))
300 /* protection fault */
301 if (error_code
& 0x08000000)
303 if (!(vma
->vm_flags
& (VM_READ
| VM_EXEC
| VM_WRITE
)))
308 * If for any reason at all we couldn't handle the fault,
309 * make sure we exit gracefully rather than endlessly redo
313 ret
= handle_mm_fault(mm
, vma
, address
, is_write
);
314 if (unlikely(ret
& VM_FAULT_ERROR
)) {
315 if (ret
& VM_FAULT_OOM
)
317 else if (ret
& VM_FAULT_SIGBUS
)
321 if (ret
& VM_FAULT_MAJOR
)
325 up_read(&mm
->mmap_sem
);
329 up_read(&mm
->mmap_sem
);
331 bad_area_nosemaphore
:
332 /* User mode accesses cause a SIGSEGV */
333 if (user_mode(regs
)) {
334 _exception(SIGSEGV
, regs
, code
, address
);
338 if (is_exec
&& (error_code
& DSISR_PROTFAULT
)
339 && printk_ratelimit())
340 printk(KERN_CRIT
"kernel tried to execute NX-protected"
341 " page (%lx) - exploit attempt? (uid: %d)\n",
342 address
, current
->uid
);
347 * We ran out of memory, or some other thing happened to us that made
348 * us unable to handle the page fault gracefully.
351 up_read(&mm
->mmap_sem
);
352 if (is_global_init(current
)) {
354 down_read(&mm
->mmap_sem
);
357 printk("VM: killing process %s\n", current
->comm
);
359 do_group_exit(SIGKILL
);
363 up_read(&mm
->mmap_sem
);
364 if (user_mode(regs
)) {
365 info
.si_signo
= SIGBUS
;
367 info
.si_code
= BUS_ADRERR
;
368 info
.si_addr
= (void __user
*)address
;
369 force_sig_info(SIGBUS
, &info
, current
);
376 * bad_page_fault is called when we have a bad access from the kernel.
377 * It is called from the DSI and ISI handlers in head.S and from some
378 * of the procedures in traps.c.
380 void bad_page_fault(struct pt_regs
*regs
, unsigned long address
, int sig
)
382 const struct exception_table_entry
*entry
;
384 /* Are we prepared to handle this fault? */
385 if ((entry
= search_exception_tables(regs
->nip
)) != NULL
) {
386 regs
->nip
= entry
->fixup
;
390 /* kernel has accessed a bad area */
392 switch (regs
->trap
) {
395 printk(KERN_ALERT
"Unable to handle kernel paging request for "
396 "data at address 0x%08lx\n", regs
->dar
);
400 printk(KERN_ALERT
"Unable to handle kernel paging request for "
401 "instruction fetch\n");
404 printk(KERN_ALERT
"Unable to handle kernel paging request for "
408 printk(KERN_ALERT
"Faulting instruction address: 0x%08lx\n",
411 die("Kernel access of bad area", regs
, sig
);
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