arch/powerpc/mm/fsl_booke_mmu.c

   1 /*
   2  * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
   3  * E500 Book E processors.
   4  *
   5  * Copyright 2004 Freescale Semiconductor, Inc
   6  *
   7  * This file contains the routines for initializing the MMU
   8  * on the 4xx series of chips.
   9  *  -- paulus
  10  *
  11  *  Derived from arch/ppc/mm/init.c:
  12  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  13  *
  14  *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  15  *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
  16  *    Copyright (C) 1996 Paul Mackerras
  17  *
  18  *  Derived from "arch/i386/mm/init.c"
  19  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
  20  *
  21  *  This program is free software; you can redistribute it and/or
  22  *  modify it under the terms of the GNU General Public License
  23  *  as published by the Free Software Foundation; either version
  24  *  2 of the License, or (at your option) any later version.
  25  *
  26  */
  27
  28 #include <linux/signal.h>
  29 #include <linux/sched.h>
  30 #include <linux/kernel.h>
  31 #include <linux/errno.h>
  32 #include <linux/string.h>
  33 #include <linux/types.h>
  34 #include <linux/ptrace.h>
  35 #include <linux/mman.h>
  36 #include <linux/mm.h>
  37 #include <linux/swap.h>
  38 #include <linux/stddef.h>
  39 #include <linux/vmalloc.h>
  40 #include <linux/init.h>
  41 #include <linux/delay.h>
  42 #include <linux/highmem.h>
  43
  44 #include <asm/pgalloc.h>
  45 #include <asm/prom.h>
  46 #include <asm/io.h>
  47 #include <asm/mmu_context.h>
  48 #include <asm/pgtable.h>
  49 #include <asm/mmu.h>
  50 #include <asm/uaccess.h>
  51 #include <asm/smp.h>
  52 #include <asm/machdep.h>
  53 #include <asm/setup.h>
  54
  55 #include "mmu_decl.h"
  56
  57 extern void loadcam_entry(unsigned int index);
  58 unsigned int tlbcam_index;
  59 unsigned int num_tlbcam_entries;
  60 static unsigned long __cam0, __cam1, __cam2;
  61
  62 #define NUM_TLBCAMS     (16)
  63
  64 struct tlbcam {
  65         u32     MAS0;
  66         u32     MAS1;
  67         u32     MAS2;
  68         u32     MAS3;
  69         u32     MAS7;
  70 } TLBCAM[NUM_TLBCAMS];
  71
  72 struct tlbcamrange {
  73         unsigned long start;
  74         unsigned long limit;
  75         phys_addr_t phys;
  76 } tlbcam_addrs[NUM_TLBCAMS];
  77
  78 extern unsigned int tlbcam_index;
  79
  80 /*
  81  * Return PA for this VA if it is mapped by a CAM, or 0
  82  */
  83 unsigned long v_mapped_by_tlbcam(unsigned long va)
  84 {
  85         int b;
  86         for (b = 0; b < tlbcam_index; ++b)
  87                 if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
  88                         return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
  89         return 0;
  90 }
  91
  92 /*
  93  * Return VA for a given PA or 0 if not mapped
  94  */
  95 unsigned long p_mapped_by_tlbcam(unsigned long pa)
  96 {
  97         int b;
  98         for (b = 0; b < tlbcam_index; ++b)
  99                 if (pa >= tlbcam_addrs[b].phys
 100                     && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
 101                               +tlbcam_addrs[b].phys)
 102                         return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
 103         return 0;
 104 }
 105
 106 /*
 107  * Set up one of the I/D BAT (block address translation) register pairs.
 108  * The parameters are not checked; in particular size must be a power
 109  * of 4 between 4k and 256M.
 110  */
 111 void settlbcam(int index, unsigned long virt, phys_addr_t phys,
 112                 unsigned int size, int flags, unsigned int pid)
 113 {
 114         unsigned int tsize, lz;
 115
 116         asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
 117         tsize = (21 - lz) / 2;
 118
 119 #ifdef CONFIG_SMP
 120         if ((flags & _PAGE_NO_CACHE) == 0)
 121                 flags |= _PAGE_COHERENT;
 122 #endif
 123
 124         TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
 125         TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
 126         TLBCAM[index].MAS2 = virt & PAGE_MASK;
 127
 128         TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
 129         TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
 130         TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
 131         TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
 132         TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
 133
 134         TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR;
 135         TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
 136
 137 #ifndef CONFIG_KGDB /* want user access for breakpoints */
 138         if (flags & _PAGE_USER) {
 139            TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
 140            TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
 141         }
 142 #else
 143         TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
 144         TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
 145 #endif
 146
 147         tlbcam_addrs[index].start = virt;
 148         tlbcam_addrs[index].limit = virt + size - 1;
 149         tlbcam_addrs[index].phys = phys;
 150
 151         loadcam_entry(index);
 152 }
 153
 154 void invalidate_tlbcam_entry(int index)
 155 {
 156         TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index);
 157         TLBCAM[index].MAS1 = ~MAS1_VALID;
 158
 159         loadcam_entry(index);
 160 }
 161
 162 void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
 163                 unsigned long cam2)
 164 {
 165         settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0);
 166         tlbcam_index++;
 167         if (cam1) {
 168                 tlbcam_index++;
 169                 settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1, _PAGE_KERNEL, 0);
 170         }
 171         if (cam2) {
 172                 tlbcam_index++;
 173                 settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1, cam2, _PAGE_KERNEL, 0);
 174         }
 175 }
 176
 177 /*
 178  * MMU_init_hw does the chip-specific initialization of the MMU hardware.
 179  */
 180 void __init MMU_init_hw(void)
 181 {
 182         flush_instruction_cache();
 183 }
 184
 185 unsigned long __init mmu_mapin_ram(void)
 186 {
 187         cam_mapin_ram(__cam0, __cam1, __cam2);
 188
 189         return __cam0 + __cam1 + __cam2;
 190 }
 191
 192
 193 void __init
 194 adjust_total_lowmem(void)
 195 {
 196         phys_addr_t max_lowmem_size = __max_low_memory;
 197         phys_addr_t cam_max_size = 0x10000000;
 198         phys_addr_t ram;
 199
 200         /* adjust CAM size to max_lowmem_size */
 201         if (max_lowmem_size < cam_max_size)
 202                 cam_max_size = max_lowmem_size;
 203
 204         /* adjust lowmem size to max_lowmem_size */
 205         ram = min(max_lowmem_size, total_lowmem);
 206
 207         /* Calculate CAM values */
 208         __cam0 = 1UL << 2 * (__ilog2(ram) / 2);
 209         if (__cam0 > cam_max_size)
 210                 __cam0 = cam_max_size;
 211         ram -= __cam0;
 212         if (ram) {
 213                 __cam1 = 1UL << 2 * (__ilog2(ram) / 2);
 214                 if (__cam1 > cam_max_size)
 215                         __cam1 = cam_max_size;
 216                 ram -= __cam1;
 217         }
 218         if (ram) {
 219                 __cam2 = 1UL << 2 * (__ilog2(ram) / 2);
 220                 if (__cam2 > cam_max_size)
 221                         __cam2 = cam_max_size;
 222                 ram -= __cam2;
 223         }
 224
 225         printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb,"
 226                         " CAM2=%ldMb residual: %ldMb\n",
 227                         __cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
 228                         (long int)((total_lowmem - __cam0 - __cam1 - __cam2)
 229                                    >> 20));
 230         __max_low_memory = __cam0 + __cam1 + __cam2;
 231         __initial_memory_limit_addr = memstart_addr + __max_low_memory;
 232 }