2 * Page table handling routines for radix page table.
4 * Copyright 2015-2016, Aneesh Kumar K.V, IBM Corporation.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 #include <linux/sched.h>
12 #include <linux/memblock.h>
13 #include <linux/of_fdt.h>
15 #include <asm/pgtable.h>
16 #include <asm/pgalloc.h>
18 #include <asm/machdep.h>
20 #include <asm/firmware.h>
22 #include <trace/events/thp.h>
24 static int native_register_process_table(unsigned long base
, unsigned long pg_sz
,
25 unsigned long table_size
)
27 unsigned long patb1
= base
| table_size
| PATB_GR
;
29 partition_tb
->patb1
= cpu_to_be64(patb1
);
33 static __ref
void *early_alloc_pgtable(unsigned long size
)
37 pt
= __va(memblock_alloc_base(size
, size
, MEMBLOCK_ALLOC_ANYWHERE
));
43 int radix__map_kernel_page(unsigned long ea
, unsigned long pa
,
45 unsigned int map_page_size
)
52 * Make sure task size is correct as per the max adddr
54 BUILD_BUG_ON(TASK_SIZE_USER64
> RADIX_PGTABLE_RANGE
);
55 if (slab_is_available()) {
56 pgdp
= pgd_offset_k(ea
);
57 pudp
= pud_alloc(&init_mm
, pgdp
, ea
);
60 if (map_page_size
== PUD_SIZE
) {
64 pmdp
= pmd_alloc(&init_mm
, pudp
, ea
);
67 if (map_page_size
== PMD_SIZE
) {
71 ptep
= pte_alloc_kernel(pmdp
, ea
);
75 pgdp
= pgd_offset_k(ea
);
76 if (pgd_none(*pgdp
)) {
77 pudp
= early_alloc_pgtable(PUD_TABLE_SIZE
);
79 pgd_populate(&init_mm
, pgdp
, pudp
);
81 pudp
= pud_offset(pgdp
, ea
);
82 if (map_page_size
== PUD_SIZE
) {
86 if (pud_none(*pudp
)) {
87 pmdp
= early_alloc_pgtable(PMD_TABLE_SIZE
);
89 pud_populate(&init_mm
, pudp
, pmdp
);
91 pmdp
= pmd_offset(pudp
, ea
);
92 if (map_page_size
== PMD_SIZE
) {
96 if (!pmd_present(*pmdp
)) {
97 ptep
= early_alloc_pgtable(PAGE_SIZE
);
99 pmd_populate_kernel(&init_mm
, pmdp
, ptep
);
101 ptep
= pte_offset_kernel(pmdp
, ea
);
105 set_pte_at(&init_mm
, ea
, ptep
, pfn_pte(pa
>> PAGE_SHIFT
, flags
));
110 static void __init
radix_init_pgtable(void)
113 u64 base
, end
, start_addr
;
114 unsigned long rts_field
;
115 struct memblock_region
*reg
;
116 unsigned long linear_page_size
;
118 /* We don't support slb for radix */
121 * Create the linear mapping, using standard page size for now
124 for_each_memblock(memory
, reg
) {
126 start_addr
= reg
->base
;
129 if (loop_count
< 1 && mmu_psize_defs
[MMU_PAGE_1G
].shift
)
130 linear_page_size
= PUD_SIZE
;
131 else if (loop_count
< 2 && mmu_psize_defs
[MMU_PAGE_2M
].shift
)
132 linear_page_size
= PMD_SIZE
;
134 linear_page_size
= PAGE_SIZE
;
136 base
= _ALIGN_UP(start_addr
, linear_page_size
);
137 end
= _ALIGN_DOWN(reg
->base
+ reg
->size
, linear_page_size
);
139 pr_info("Mapping range 0x%lx - 0x%lx with 0x%lx\n",
140 (unsigned long)base
, (unsigned long)end
,
144 radix__map_kernel_page((unsigned long)__va(base
),
147 base
+= linear_page_size
;
150 * map the rest using lower page size
152 if (end
< reg
->base
+ reg
->size
) {
159 * Allocate Partition table and process table for the
162 BUILD_BUG_ON_MSG((PRTB_SIZE_SHIFT
> 23), "Process table size too large.");
163 process_tb
= early_alloc_pgtable(1UL << PRTB_SIZE_SHIFT
);
165 * Fill in the process table.
167 rts_field
= radix__get_tree_size();
168 process_tb
->prtb0
= cpu_to_be64(rts_field
| __pa(init_mm
.pgd
) | RADIX_PGD_INDEX_SIZE
);
170 * Fill in the partition table. We are suppose to use effective address
171 * of process table here. But our linear mapping also enable us to use
172 * physical address here.
174 ppc_md
.register_process_table(__pa(process_tb
), 0, PRTB_SIZE_SHIFT
- 12);
175 pr_info("Process table %p and radix root for kernel: %p\n", process_tb
, init_mm
.pgd
);
178 static void __init
radix_init_partition_table(void)
180 unsigned long rts_field
;
182 rts_field
= radix__get_tree_size();
184 BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT
> 24), "Partition table size too large.");
185 partition_tb
= early_alloc_pgtable(1UL << PATB_SIZE_SHIFT
);
186 partition_tb
->patb0
= cpu_to_be64(rts_field
| __pa(init_mm
.pgd
) |
187 RADIX_PGD_INDEX_SIZE
| PATB_HR
);
188 pr_info("Initializing Radix MMU\n");
189 pr_info("Partition table %p\n", partition_tb
);
191 memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE
);
193 * update partition table control register,
196 mtspr(SPRN_PTCR
, __pa(partition_tb
) | (PATB_SIZE_SHIFT
- 12));
199 void __init
radix_init_native(void)
201 ppc_md
.register_process_table
= native_register_process_table
;
204 static int __init
get_idx_from_shift(unsigned int shift
)
225 static int __init
radix_dt_scan_page_sizes(unsigned long node
,
226 const char *uname
, int depth
,
233 const char *type
= of_get_flat_dt_prop(node
, "device_type", NULL
);
235 /* We are scanning "cpu" nodes only */
236 if (type
== NULL
|| strcmp(type
, "cpu") != 0)
239 prop
= of_get_flat_dt_prop(node
, "ibm,processor-radix-AP-encodings", &size
);
243 pr_info("Page sizes from device-tree:\n");
244 for (; size
>= 4; size
-= 4, ++prop
) {
246 struct mmu_psize_def
*def
;
248 /* top 3 bit is AP encoding */
249 shift
= be32_to_cpu(prop
[0]) & ~(0xe << 28);
250 ap
= be32_to_cpu(prop
[0]) >> 29;
251 pr_info("Page size sift = %d AP=0x%x\n", shift
, ap
);
253 idx
= get_idx_from_shift(shift
);
257 def
= &mmu_psize_defs
[idx
];
263 cur_cpu_spec
->mmu_features
&= ~MMU_FTR_NO_SLBIE_B
;
267 static void __init
radix_init_page_sizes(void)
272 * Try to find the available page sizes in the device-tree
274 rc
= of_scan_flat_dt(radix_dt_scan_page_sizes
, NULL
);
275 if (rc
!= 0) /* Found */
278 * let's assume we have page 4k and 64k support
280 mmu_psize_defs
[MMU_PAGE_4K
].shift
= 12;
281 mmu_psize_defs
[MMU_PAGE_4K
].ap
= 0x0;
283 mmu_psize_defs
[MMU_PAGE_64K
].shift
= 16;
284 mmu_psize_defs
[MMU_PAGE_64K
].ap
= 0x5;
286 #ifdef CONFIG_SPARSEMEM_VMEMMAP
287 if (mmu_psize_defs
[MMU_PAGE_2M
].shift
) {
289 * map vmemmap using 2M if available
291 mmu_vmemmap_psize
= MMU_PAGE_2M
;
293 #endif /* CONFIG_SPARSEMEM_VMEMMAP */
297 void __init
radix__early_init_mmu(void)
301 #ifdef CONFIG_PPC_64K_PAGES
302 /* PAGE_SIZE mappings */
303 mmu_virtual_psize
= MMU_PAGE_64K
;
305 mmu_virtual_psize
= MMU_PAGE_4K
;
308 #ifdef CONFIG_SPARSEMEM_VMEMMAP
309 /* vmemmap mapping */
310 mmu_vmemmap_psize
= mmu_virtual_psize
;
313 * initialize page table size
315 __pte_index_size
= RADIX_PTE_INDEX_SIZE
;
316 __pmd_index_size
= RADIX_PMD_INDEX_SIZE
;
317 __pud_index_size
= RADIX_PUD_INDEX_SIZE
;
318 __pgd_index_size
= RADIX_PGD_INDEX_SIZE
;
319 __pmd_cache_index
= RADIX_PMD_INDEX_SIZE
;
320 __pte_table_size
= RADIX_PTE_TABLE_SIZE
;
321 __pmd_table_size
= RADIX_PMD_TABLE_SIZE
;
322 __pud_table_size
= RADIX_PUD_TABLE_SIZE
;
323 __pgd_table_size
= RADIX_PGD_TABLE_SIZE
;
325 __pmd_val_bits
= RADIX_PMD_VAL_BITS
;
326 __pud_val_bits
= RADIX_PUD_VAL_BITS
;
327 __pgd_val_bits
= RADIX_PGD_VAL_BITS
;
329 __kernel_virt_start
= RADIX_KERN_VIRT_START
;
330 __kernel_virt_size
= RADIX_KERN_VIRT_SIZE
;
331 __vmalloc_start
= RADIX_VMALLOC_START
;
332 __vmalloc_end
= RADIX_VMALLOC_END
;
333 vmemmap
= (struct page
*)RADIX_VMEMMAP_BASE
;
334 ioremap_bot
= IOREMAP_BASE
;
337 pci_io_base
= ISA_IO_BASE
;
341 * For now radix also use the same frag size
343 __pte_frag_nr
= H_PTE_FRAG_NR
;
344 __pte_frag_size_shift
= H_PTE_FRAG_SIZE_SHIFT
;
346 radix_init_page_sizes();
347 if (!firmware_has_feature(FW_FEATURE_LPAR
)) {
349 lpcr
= mfspr(SPRN_LPCR
);
350 mtspr(SPRN_LPCR
, lpcr
| LPCR_UPRT
| LPCR_HR
);
351 radix_init_partition_table();
354 radix_init_pgtable();
357 void radix__early_init_mmu_secondary(void)
361 * update partition table control register and UPRT
363 if (!firmware_has_feature(FW_FEATURE_LPAR
)) {
364 lpcr
= mfspr(SPRN_LPCR
);
365 mtspr(SPRN_LPCR
, lpcr
| LPCR_UPRT
| LPCR_HR
);
368 __pa(partition_tb
) | (PATB_SIZE_SHIFT
- 12));
372 void radix__setup_initial_memory_limit(phys_addr_t first_memblock_base
,
373 phys_addr_t first_memblock_size
)
375 /* We don't currently support the first MEMBLOCK not mapping 0
376 * physical on those processors
378 BUG_ON(first_memblock_base
!= 0);
380 * We limit the allocation that depend on ppc64_rma_size
381 * to first_memblock_size. We also clamp it to 1GB to
382 * avoid some funky things such as RTAS bugs.
384 * On radix config we really don't have a limitation
385 * on real mode access. But keeping it as above works
388 ppc64_rma_size
= min_t(u64
, first_memblock_size
, 0x40000000);
390 * Finally limit subsequent allocations. We really don't want
391 * to limit the memblock allocations to rma_size. FIXME!! should
392 * we even limit at all ?
394 memblock_set_current_limit(first_memblock_base
+ first_memblock_size
);
397 #ifdef CONFIG_SPARSEMEM_VMEMMAP
398 int __meminit
radix__vmemmap_create_mapping(unsigned long start
,
399 unsigned long page_size
,
402 /* Create a PTE encoding */
403 unsigned long flags
= _PAGE_PRESENT
| _PAGE_ACCESSED
| _PAGE_KERNEL_RW
;
405 BUG_ON(radix__map_kernel_page(start
, phys
, __pgprot(flags
), page_size
));
409 #ifdef CONFIG_MEMORY_HOTPLUG
410 void radix__vmemmap_remove_mapping(unsigned long start
, unsigned long page_size
)
412 /* FIXME!! intel does more. We should free page tables mapping vmemmap ? */
417 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
419 unsigned long radix__pmd_hugepage_update(struct mm_struct
*mm
, unsigned long addr
,
420 pmd_t
*pmdp
, unsigned long clr
,
425 #ifdef CONFIG_DEBUG_VM
426 WARN_ON(!radix__pmd_trans_huge(*pmdp
));
427 assert_spin_locked(&mm
->page_table_lock
);
430 old
= radix__pte_update(mm
, addr
, (pte_t
*)pmdp
, clr
, set
, 1);
431 trace_hugepage_update(addr
, old
, clr
, set
);
436 pmd_t
radix__pmdp_collapse_flush(struct vm_area_struct
*vma
, unsigned long address
,
442 VM_BUG_ON(address
& ~HPAGE_PMD_MASK
);
443 VM_BUG_ON(radix__pmd_trans_huge(*pmdp
));
445 * khugepaged calls this for normal pmd
449 /*FIXME!! Verify whether we need this kick below */
450 kick_all_cpus_sync();
451 flush_tlb_range(vma
, address
, address
+ HPAGE_PMD_SIZE
);
456 * For us pgtable_t is pte_t *. Inorder to save the deposisted
457 * page table, we consider the allocated page table as a list
458 * head. On withdraw we need to make sure we zero out the used
459 * list_head memory area.
461 void radix__pgtable_trans_huge_deposit(struct mm_struct
*mm
, pmd_t
*pmdp
,
464 struct list_head
*lh
= (struct list_head
*) pgtable
;
466 assert_spin_locked(pmd_lockptr(mm
, pmdp
));
469 if (!pmd_huge_pte(mm
, pmdp
))
472 list_add(lh
, (struct list_head
*) pmd_huge_pte(mm
, pmdp
));
473 pmd_huge_pte(mm
, pmdp
) = pgtable
;
476 pgtable_t
radix__pgtable_trans_huge_withdraw(struct mm_struct
*mm
, pmd_t
*pmdp
)
480 struct list_head
*lh
;
482 assert_spin_locked(pmd_lockptr(mm
, pmdp
));
485 pgtable
= pmd_huge_pte(mm
, pmdp
);
486 lh
= (struct list_head
*) pgtable
;
488 pmd_huge_pte(mm
, pmdp
) = NULL
;
490 pmd_huge_pte(mm
, pmdp
) = (pgtable_t
) lh
->next
;
493 ptep
= (pte_t
*) pgtable
;
501 pmd_t
radix__pmdp_huge_get_and_clear(struct mm_struct
*mm
,
502 unsigned long addr
, pmd_t
*pmdp
)
507 old
= radix__pmd_hugepage_update(mm
, addr
, pmdp
, ~0UL, 0);
508 old_pmd
= __pmd(old
);
510 * Serialize against find_linux_pte_or_hugepte which does lock-less
511 * lookup in page tables with local interrupts disabled. For huge pages
512 * it casts pmd_t to pte_t. Since format of pte_t is different from
513 * pmd_t we want to prevent transit from pmd pointing to page table
514 * to pmd pointing to huge page (and back) while interrupts are disabled.
515 * We clear pmd to possibly replace it with page table pointer in
516 * different code paths. So make sure we wait for the parallel
517 * find_linux_pte_or_hugepage to finish.
519 kick_all_cpus_sync();
523 int radix__has_transparent_hugepage(void)
525 /* For radix 2M at PMD level means thp */
526 if (mmu_psize_defs
[MMU_PAGE_2M
].shift
== PMD_SHIFT
)
530 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */