arch/powerpc/mm/tlb_32.c

   1 /*
   2  * This file contains the routines for TLB flushing.
   3  * On machines where the MMU uses a hash table to store virtual to
   4  * physical translations, these routines flush entries from the
   5  * hash table also.
   6  *  -- paulus
   7  *
   8  *  Derived from arch/ppc/mm/init.c:
   9  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  10  *
  11  *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  12  *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
  13  *    Copyright (C) 1996 Paul Mackerras
  14  *
  15  *  Derived from "arch/i386/mm/init.c"
  16  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
  17  *
  18  *  This program is free software; you can redistribute it and/or
  19  *  modify it under the terms of the GNU General Public License
  20  *  as published by the Free Software Foundation; either version
  21  *  2 of the License, or (at your option) any later version.
  22  *
  23  */
  24
  25 #include <linux/kernel.h>
  26 #include <linux/mm.h>
  27 #include <linux/init.h>
  28 #include <linux/highmem.h>
  29 #include <asm/tlbflush.h>
  30 #include <asm/tlb.h>
  31
  32 #include "mmu_decl.h"
  33
  34 /*
  35  * Called when unmapping pages to flush entries from the TLB/hash table.
  36  */
  37 void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr)
  38 {
  39         unsigned long ptephys;
  40
  41         if (Hash != 0) {
  42                 ptephys = __pa(ptep) & PAGE_MASK;
  43                 flush_hash_pages(mm->context.id, addr, ptephys, 1);
  44         }
  45 }
  46
  47 /*
  48  * Called by ptep_set_access_flags, must flush on CPUs for which the
  49  * DSI handler can't just "fixup" the TLB on a write fault
  50  */
  51 void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr)
  52 {
  53         if (Hash != 0)
  54                 return;
  55         _tlbie(addr);
  56 }
  57
  58 /*
  59  * Called at the end of a mmu_gather operation to make sure the
  60  * TLB flush is completely done.
  61  */
  62 void tlb_flush(struct mmu_gather *tlb)
  63 {
  64         if (Hash == 0) {
  65                 /*
  66                  * 603 needs to flush the whole TLB here since
  67                  * it doesn't use a hash table.
  68                  */
  69                 _tlbia();
  70         }
  71 }
  72
  73 /*
  74  * TLB flushing:
  75  *
  76  *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
  77  *  - flush_tlb_page(vma, vmaddr) flushes one page
  78  *  - flush_tlb_range(vma, start, end) flushes a range of pages
  79  *  - flush_tlb_kernel_range(start, end) flushes kernel pages
  80  *
  81  * since the hardware hash table functions as an extension of the
  82  * tlb as far as the linux tables are concerned, flush it too.
  83  *    -- Cort
  84  */
  85
  86 /*
  87  * 750 SMP is a Bad Idea because the 750 doesn't broadcast all
  88  * the cache operations on the bus.  Hence we need to use an IPI
  89  * to get the other CPU(s) to invalidate their TLBs.
  90  */
  91 #ifdef CONFIG_SMP_750
  92 #define FINISH_FLUSH    smp_send_tlb_invalidate(0)
  93 #else
  94 #define FINISH_FLUSH    do { } while (0)
  95 #endif
  96
  97 static void flush_range(struct mm_struct *mm, unsigned long start,
  98                         unsigned long end)
  99 {
 100         pmd_t *pmd;
 101         unsigned long pmd_end;
 102         int count;
 103         unsigned int ctx = mm->context.id;
 104
 105         if (Hash == 0) {
 106                 _tlbia();
 107                 return;
 108         }
 109         start &= PAGE_MASK;
 110         if (start >= end)
 111                 return;
 112         end = (end - 1) | ~PAGE_MASK;
 113         pmd = pmd_offset(pud_offset(pgd_offset(mm, start), start), start);
 114         for (;;) {
 115                 pmd_end = ((start + PGDIR_SIZE) & PGDIR_MASK) - 1;
 116                 if (pmd_end > end)
 117                         pmd_end = end;
 118                 if (!pmd_none(*pmd)) {
 119                         count = ((pmd_end - start) >> PAGE_SHIFT) + 1;
 120                         flush_hash_pages(ctx, start, pmd_val(*pmd), count);
 121                 }
 122                 if (pmd_end == end)
 123                         break;
 124                 start = pmd_end + 1;
 125                 ++pmd;
 126         }
 127 }
 128
 129 /*
 130  * Flush kernel TLB entries in the given range
 131  */
 132 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 133 {
 134         flush_range(&init_mm, start, end);
 135         FINISH_FLUSH;
 136 }
 137
 138 /*
 139  * Flush all the (user) entries for the address space described by mm.
 140  */
 141 void flush_tlb_mm(struct mm_struct *mm)
 142 {
 143         struct vm_area_struct *mp;
 144
 145         if (Hash == 0) {
 146                 _tlbia();
 147                 return;
 148         }
 149
 150         /*
 151          * It is safe to go down the mm's list of vmas when called
 152          * from dup_mmap, holding mmap_sem.  It would also be safe from
 153          * unmap_region or exit_mmap, but not from vmtruncate on SMP -
 154          * but it seems dup_mmap is the only SMP case which gets here.
 155          */
 156         for (mp = mm->mmap; mp != NULL; mp = mp->vm_next)
 157                 flush_range(mp->vm_mm, mp->vm_start, mp->vm_end);
 158         FINISH_FLUSH;
 159 }
 160
 161 void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
 162 {
 163         struct mm_struct *mm;
 164         pmd_t *pmd;
 165
 166         if (Hash == 0) {
 167                 _tlbie(vmaddr);
 168                 return;
 169         }
 170         mm = (vmaddr < TASK_SIZE)? vma->vm_mm: &init_mm;
 171         pmd = pmd_offset(pud_offset(pgd_offset(mm, vmaddr), vmaddr), vmaddr);
 172         if (!pmd_none(*pmd))
 173                 flush_hash_pages(mm->context.id, vmaddr, pmd_val(*pmd), 1);
 174         FINISH_FLUSH;
 175 }
 176
 177 /*
 178  * For each address in the range, find the pte for the address
 179  * and check _PAGE_HASHPTE bit; if it is set, find and destroy
 180  * the corresponding HPTE.
 181  */
 182 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
 183                      unsigned long end)
 184 {
 185         flush_range(vma->vm_mm, start, end);
 186         FINISH_FLUSH;
 187 }