arch/powerpc/platforms/85xx/mpc85xx_ds.c

   1 /*
   2  * MPC85xx DS Board Setup
   3  *
   4  * Author Xianghua Xiao (x.xiao@freescale.com)
   5  * Roy Zang <tie-fei.zang@freescale.com>
   6  *      - Add PCI/PCI Exprees support
   7  * Copyright 2007 Freescale Semiconductor Inc.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  */
  14
  15 #include <linux/stddef.h>
  16 #include <linux/kernel.h>
  17 #include <linux/pci.h>
  18 #include <linux/kdev_t.h>
  19 #include <linux/delay.h>
  20 #include <linux/seq_file.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/of_platform.h>
  23
  24 #include <asm/system.h>
  25 #include <asm/time.h>
  26 #include <asm/machdep.h>
  27 #include <asm/pci-bridge.h>
  28 #include <mm/mmu_decl.h>
  29 #include <asm/prom.h>
  30 #include <asm/udbg.h>
  31 #include <asm/mpic.h>
  32 #include <asm/i8259.h>
  33
  34 #include <sysdev/fsl_soc.h>
  35 #include <sysdev/fsl_pci.h>
  36
  37 #undef DEBUG
  38
  39 #ifdef DEBUG
  40 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  41 #else
  42 #define DBG(fmt, args...)
  43 #endif
  44
  45 #ifdef CONFIG_PPC_I8259
  46 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
  47 {
  48         unsigned int cascade_irq = i8259_irq();
  49
  50         if (cascade_irq != NO_IRQ) {
  51                 generic_handle_irq(cascade_irq);
  52         }
  53         desc->chip->eoi(irq);
  54 }
  55 #endif  /* CONFIG_PPC_I8259 */
  56
  57 void __init mpc85xx_ds_pic_init(void)
  58 {
  59         struct mpic *mpic;
  60         struct resource r;
  61         struct device_node *np;
  62 #ifdef CONFIG_PPC_I8259
  63         struct device_node *cascade_node = NULL;
  64         int cascade_irq;
  65 #endif
  66         unsigned long root = of_get_flat_dt_root();
  67
  68         np = of_find_node_by_type(NULL, "open-pic");
  69         if (np == NULL) {
  70                 printk(KERN_ERR "Could not find open-pic node\n");
  71                 return;
  72         }
  73
  74         if (of_address_to_resource(np, 0, &r)) {
  75                 printk(KERN_ERR "Failed to map mpic register space\n");
  76                 of_node_put(np);
  77                 return;
  78         }
  79
  80         if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
  81                 mpic = mpic_alloc(np, r.start,
  82                         MPIC_PRIMARY |
  83                         MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
  84                         0, 256, " OpenPIC  ");
  85         } else {
  86                 mpic = mpic_alloc(np, r.start,
  87                           MPIC_PRIMARY | MPIC_WANTS_RESET |
  88                           MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
  89                           MPIC_SINGLE_DEST_CPU,
  90                         0, 256, " OpenPIC  ");
  91         }
  92
  93         BUG_ON(mpic == NULL);
  94         of_node_put(np);
  95
  96         mpic_init(mpic);
  97
  98 #ifdef CONFIG_PPC_I8259
  99         /* Initialize the i8259 controller */
 100         for_each_node_by_type(np, "interrupt-controller")
 101             if (of_device_is_compatible(np, "chrp,iic")) {
 102                 cascade_node = np;
 103                 break;
 104         }
 105
 106         if (cascade_node == NULL) {
 107                 printk(KERN_DEBUG "Could not find i8259 PIC\n");
 108                 return;
 109         }
 110
 111         cascade_irq = irq_of_parse_and_map(cascade_node, 0);
 112         if (cascade_irq == NO_IRQ) {
 113                 printk(KERN_ERR "Failed to map cascade interrupt\n");
 114                 return;
 115         }
 116
 117         DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
 118
 119         i8259_init(cascade_node, 0);
 120         of_node_put(cascade_node);
 121
 122         set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
 123 #endif  /* CONFIG_PPC_I8259 */
 124 }
 125
 126 #ifdef CONFIG_PCI
 127 static int primary_phb_addr;
 128 extern int uli_exclude_device(struct pci_controller *hose,
 129                                 u_char bus, u_char devfn);
 130
 131 static int mpc85xx_exclude_device(struct pci_controller *hose,
 132                                    u_char bus, u_char devfn)
 133 {
 134         struct device_node* node;
 135         struct resource rsrc;
 136
 137         node = hose->dn;
 138         of_address_to_resource(node, 0, &rsrc);
 139
 140         if ((rsrc.start & 0xfffff) == primary_phb_addr) {
 141                 return uli_exclude_device(hose, bus, devfn);
 142         }
 143
 144         return PCIBIOS_SUCCESSFUL;
 145 }
 146 #endif  /* CONFIG_PCI */
 147
 148 /*
 149  * Setup the architecture
 150  */
 151 #ifdef CONFIG_SMP
 152 extern void __init mpc85xx_smp_init(void);
 153 #endif
 154 static void __init mpc85xx_ds_setup_arch(void)
 155 {
 156 #ifdef CONFIG_PCI
 157         struct device_node *np;
 158 #endif
 159
 160         if (ppc_md.progress)
 161                 ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
 162
 163 #ifdef CONFIG_PCI
 164         for_each_node_by_type(np, "pci") {
 165                 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
 166                     of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
 167                     of_device_is_compatible(np, "fsl,p2020-pcie")) {
 168                         struct resource rsrc;
 169                         of_address_to_resource(np, 0, &rsrc);
 170                         if ((rsrc.start & 0xfffff) == primary_phb_addr)
 171                                 fsl_add_bridge(np, 1);
 172                         else
 173                                 fsl_add_bridge(np, 0);
 174                 }
 175         }
 176
 177         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 178 #endif
 179
 180 #ifdef CONFIG_SMP
 181         mpc85xx_smp_init();
 182 #endif
 183
 184         printk("MPC85xx DS board from Freescale Semiconductor\n");
 185 }
 186
 187 /*
 188  * Called very early, device-tree isn't unflattened
 189  */
 190 static int __init mpc8544_ds_probe(void)
 191 {
 192         unsigned long root = of_get_flat_dt_root();
 193
 194         if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
 195 #ifdef CONFIG_PCI
 196                 primary_phb_addr = 0xb000;
 197 #endif
 198                 return 1;
 199         }
 200
 201         return 0;
 202 }
 203
 204 static struct of_device_id __initdata mpc85xxds_ids[] = {
 205         { .type = "soc", },
 206         { .compatible = "soc", },
 207         { .compatible = "simple-bus", },
 208         { .compatible = "gianfar", },
 209         {},
 210 };
 211
 212 static int __init mpc85xxds_publish_devices(void)
 213 {
 214         return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL);
 215 }
 216 machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
 217 machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
 218 machine_device_initcall(p2020_ds, mpc85xxds_publish_devices);
 219
 220 /*
 221  * Called very early, device-tree isn't unflattened
 222  */
 223 static int __init mpc8572_ds_probe(void)
 224 {
 225         unsigned long root = of_get_flat_dt_root();
 226
 227         if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
 228 #ifdef CONFIG_PCI
 229                 primary_phb_addr = 0x8000;
 230 #endif
 231                 return 1;
 232         }
 233
 234         return 0;
 235 }
 236
 237 /*
 238  * Called very early, device-tree isn't unflattened
 239  */
 240 static int __init p2020_ds_probe(void)
 241 {
 242         unsigned long root = of_get_flat_dt_root();
 243
 244         if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) {
 245 #ifdef CONFIG_PCI
 246                 primary_phb_addr = 0x9000;
 247 #endif
 248                 return 1;
 249         }
 250
 251         return 0;
 252 }
 253
 254 define_machine(mpc8544_ds) {
 255         .name                   = "MPC8544 DS",
 256         .probe                  = mpc8544_ds_probe,
 257         .setup_arch             = mpc85xx_ds_setup_arch,
 258         .init_IRQ               = mpc85xx_ds_pic_init,
 259 #ifdef CONFIG_PCI
 260         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 261 #endif
 262         .get_irq                = mpic_get_irq,
 263         .restart                = fsl_rstcr_restart,
 264         .calibrate_decr         = generic_calibrate_decr,
 265         .progress               = udbg_progress,
 266 };
 267
 268 define_machine(mpc8572_ds) {
 269         .name                   = "MPC8572 DS",
 270         .probe                  = mpc8572_ds_probe,
 271         .setup_arch             = mpc85xx_ds_setup_arch,
 272         .init_IRQ               = mpc85xx_ds_pic_init,
 273 #ifdef CONFIG_PCI
 274         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 275 #endif
 276         .get_irq                = mpic_get_irq,
 277         .restart                = fsl_rstcr_restart,
 278         .calibrate_decr         = generic_calibrate_decr,
 279         .progress               = udbg_progress,
 280 };
 281
 282 define_machine(p2020_ds) {
 283         .name                   = "P2020 DS",
 284         .probe                  = p2020_ds_probe,
 285         .setup_arch             = mpc85xx_ds_setup_arch,
 286         .init_IRQ               = mpc85xx_ds_pic_init,
 287 #ifdef CONFIG_PCI
 288         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 289 #endif
 290         .get_irq                = mpic_get_irq,
 291         .restart                = fsl_rstcr_restart,
 292         .calibrate_decr         = generic_calibrate_decr,
 293         .progress               = udbg_progress,
 294 };