2 * GE Fanuc SBC310 board support
4 * Author: Martyn Welch <martyn.welch@gefanuc.com>
6 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
19 #include <linux/stddef.h>
20 #include <linux/kernel.h>
21 #include <linux/pci.h>
22 #include <linux/kdev_t.h>
23 #include <linux/delay.h>
24 #include <linux/seq_file.h>
25 #include <linux/of_platform.h>
27 #include <asm/system.h>
29 #include <asm/machdep.h>
30 #include <asm/pci-bridge.h>
31 #include <asm/mpc86xx.h>
33 #include <mm/mmu_decl.h>
38 #include <sysdev/fsl_pci.h>
39 #include <sysdev/fsl_soc.h>
47 #define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
49 #define DBG (fmt...) do { } while (0)
52 void __iomem
*sbc310_regs
;
54 static void __init
gef_sbc310_init_irq(void)
56 struct device_node
*cascade_node
= NULL
;
61 * There is a simple interrupt handler in the main FPGA, this needs
62 * to be cascaded into the MPIC
64 cascade_node
= of_find_compatible_node(NULL
, NULL
, "gef,fpga-pic");
66 printk(KERN_WARNING
"SBC310: No FPGA PIC\n");
70 gef_pic_init(cascade_node
);
71 of_node_put(cascade_node
);
74 static void __init
gef_sbc310_setup_arch(void)
76 struct device_node
*regs
;
78 struct device_node
*np
;
80 for_each_compatible_node(np
, "pci", "fsl,mpc8641-pcie") {
81 fsl_add_bridge(np
, 1);
85 printk(KERN_INFO
"GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n");
91 /* Remap basic board registers */
92 regs
= of_find_compatible_node(NULL
, NULL
, "gef,fpga-regs");
94 sbc310_regs
= of_iomap(regs
, 0);
95 if (sbc310_regs
== NULL
)
96 printk(KERN_WARNING
"Unable to map board registers\n");
101 /* Return the PCB revision */
102 static unsigned int gef_sbc310_get_board_id(void)
106 reg
= ioread32(sbc310_regs
);
110 /* Return the PCB revision */
111 static unsigned int gef_sbc310_get_pcb_rev(void)
115 reg
= ioread32(sbc310_regs
);
116 return (reg
>> 8) & 0xff;
119 /* Return the board (software) revision */
120 static unsigned int gef_sbc310_get_board_rev(void)
124 reg
= ioread32(sbc310_regs
);
125 return (reg
>> 16) & 0xff;
128 /* Return the FPGA revision */
129 static unsigned int gef_sbc310_get_fpga_rev(void)
133 reg
= ioread32(sbc310_regs
);
134 return (reg
>> 24) & 0xf;
137 static void gef_sbc310_show_cpuinfo(struct seq_file
*m
)
139 uint svid
= mfspr(SPRN_SVR
);
141 seq_printf(m
, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
143 seq_printf(m
, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
144 seq_printf(m
, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
145 ('A' + gef_sbc310_get_board_rev() - 1));
146 seq_printf(m
, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
148 seq_printf(m
, "SVR\t\t: 0x%x\n", svid
);
152 static void __init
gef_sbc310_nec_fixup(struct pci_dev
*pdev
)
156 printk(KERN_INFO
"Running NEC uPD720101 Fixup\n");
158 /* Ensure only ports 1 & 2 are enabled */
159 pci_read_config_dword(pdev
, 0xe0, &val
);
160 pci_write_config_dword(pdev
, 0xe0, (val
& ~7) | 0x2);
162 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
163 pci_write_config_dword(pdev
, 0xe4, 1 << 5);
165 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC
, PCI_DEVICE_ID_NEC_USB
,
166 gef_sbc310_nec_fixup
);
169 * Called very early, device-tree isn't unflattened
171 * This function is called to determine whether the BSP is compatible with the
172 * supplied device-tree, which is assumed to be the correct one for the actual
173 * board. It is expected thati, in the future, a kernel may support multiple
176 static int __init
gef_sbc310_probe(void)
178 unsigned long root
= of_get_flat_dt_root();
180 if (of_flat_dt_is_compatible(root
, "gef,sbc310"))
186 static long __init
mpc86xx_time_init(void)
190 /* Set the time base to zero */
194 temp
= mfspr(SPRN_HID0
);
196 mtspr(SPRN_HID0
, temp
);
197 asm volatile("isync");
202 static __initdata
struct of_device_id of_bus_ids
[] = {
203 { .compatible
= "simple-bus", },
207 static int __init
declare_of_platform_devices(void)
209 printk(KERN_DEBUG
"Probe platform devices\n");
210 of_platform_bus_probe(NULL
, of_bus_ids
, NULL
);
214 machine_device_initcall(gef_sbc310
, declare_of_platform_devices
);
216 define_machine(gef_sbc310
) {
217 .name
= "GE Fanuc SBC310",
218 .probe
= gef_sbc310_probe
,
219 .setup_arch
= gef_sbc310_setup_arch
,
220 .init_IRQ
= gef_sbc310_init_irq
,
221 .show_cpuinfo
= gef_sbc310_show_cpuinfo
,
222 .get_irq
= mpic_get_irq
,
223 .restart
= fsl_rstcr_restart
,
224 .time_init
= mpc86xx_time_init
,
225 .calibrate_decr
= generic_calibrate_decr
,
226 .progress
= udbg_progress
,
228 .pcibios_fixup_bus
= fsl_pcibios_fixup_bus
,