arch/powerpc/platforms/8xx/mpc86xads_setup.c

   1 /*arch/powerpc/platforms/8xx/mpc86xads_setup.c
   2  *
   3  * Platform setup for the Freescale mpc86xads board
   4  *
   5  * Vitaly Bordug <vbordug@ru.mvista.com>
   6  *
   7  * Copyright 2005 MontaVista Software Inc.
   8  *
   9  * Heavily modified by Scott Wood <scottwood@freescale.com>
  10  * Copyright 2007 Freescale Semiconductor, Inc.
  11  *
  12  * This file is licensed under the terms of the GNU General Public License
  13  * version 2. This program is licensed "as is" without any warranty of any
  14  * kind, whether express or implied.
  15  */
  16
  17 #include <linux/init.h>
  18 #include <linux/of_address.h>
  19 #include <linux/of_fdt.h>
  20 #include <linux/of_platform.h>
  21
  22 #include <asm/io.h>
  23 #include <asm/machdep.h>
  24 #include <asm/time.h>
  25 #include <asm/8xx_immap.h>
  26 #include <asm/cpm1.h>
  27 #include <asm/fs_pd.h>
  28 #include <asm/udbg.h>
  29
  30 #include "mpc86xads.h"
  31 #include "mpc8xx.h"
  32
  33 struct cpm_pin {
  34         int port, pin, flags;
  35 };
  36
  37 static struct cpm_pin mpc866ads_pins[] = {
  38         /* SMC1 */
  39         {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
  40         {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
  41
  42         /* SMC2 */
  43         {CPM_PORTB, 21, CPM_PIN_INPUT}, /* RX */
  44         {CPM_PORTB, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
  45
  46         /* SCC1 */
  47         {CPM_PORTA, 6, CPM_PIN_INPUT}, /* CLK1 */
  48         {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */
  49         {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */
  50         {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */
  51         {CPM_PORTB, 19, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
  52         {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */
  53         {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */
  54
  55         /* MII */
  56         {CPM_PORTD, 3, CPM_PIN_OUTPUT},
  57         {CPM_PORTD, 4, CPM_PIN_OUTPUT},
  58         {CPM_PORTD, 5, CPM_PIN_OUTPUT},
  59         {CPM_PORTD, 6, CPM_PIN_OUTPUT},
  60         {CPM_PORTD, 7, CPM_PIN_OUTPUT},
  61         {CPM_PORTD, 8, CPM_PIN_OUTPUT},
  62         {CPM_PORTD, 9, CPM_PIN_OUTPUT},
  63         {CPM_PORTD, 10, CPM_PIN_OUTPUT},
  64         {CPM_PORTD, 11, CPM_PIN_OUTPUT},
  65         {CPM_PORTD, 12, CPM_PIN_OUTPUT},
  66         {CPM_PORTD, 13, CPM_PIN_OUTPUT},
  67         {CPM_PORTD, 14, CPM_PIN_OUTPUT},
  68         {CPM_PORTD, 15, CPM_PIN_OUTPUT},
  69
  70         /* I2C */
  71         {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
  72         {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
  73 };
  74
  75 static void __init init_ioports(void)
  76 {
  77         int i;
  78
  79         for (i = 0; i < ARRAY_SIZE(mpc866ads_pins); i++) {
  80                 struct cpm_pin *pin = &mpc866ads_pins[i];
  81                 cpm1_set_pin(pin->port, pin->pin, pin->flags);
  82         }
  83
  84         cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
  85         cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX);
  86         cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK1, CPM_CLK_TX);
  87         cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
  88
  89         /* Set FEC1 and FEC2 to MII mode */
  90         clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
  91 }
  92
  93 static void __init mpc86xads_setup_arch(void)
  94 {
  95         struct device_node *np;
  96         u32 __iomem *bcsr_io;
  97
  98         cpm_reset();
  99         init_ioports();
 100
 101         np = of_find_compatible_node(NULL, NULL, "fsl,mpc866ads-bcsr");
 102         if (!np) {
 103                 printk(KERN_CRIT "Could not find fsl,mpc866ads-bcsr node\n");
 104                 return;
 105         }
 106
 107         bcsr_io = of_iomap(np, 0);
 108         of_node_put(np);
 109
 110         if (bcsr_io == NULL) {
 111                 printk(KERN_CRIT "Could not remap BCSR\n");
 112                 return;
 113         }
 114
 115         clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN);
 116         iounmap(bcsr_io);
 117 }
 118
 119 static int __init mpc86xads_probe(void)
 120 {
 121         return of_machine_is_compatible("fsl,mpc866ads");
 122 }
 123
 124 static const struct of_device_id of_bus_ids[] __initconst = {
 125         { .name = "soc", },
 126         { .name = "cpm", },
 127         { .name = "localbus", },
 128         {},
 129 };
 130
 131 static int __init declare_of_platform_devices(void)
 132 {
 133         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 134
 135         return 0;
 136 }
 137 machine_device_initcall(mpc86x_ads, declare_of_platform_devices);
 138
 139 define_machine(mpc86x_ads) {
 140         .name                   = "MPC86x ADS",
 141         .probe                  = mpc86xads_probe,
 142         .setup_arch             = mpc86xads_setup_arch,
 143         .init_IRQ               = mpc8xx_pics_init,
 144         .get_irq                = mpc8xx_get_irq,
 145         .restart                = mpc8xx_restart,
 146         .calibrate_decr         = mpc8xx_calibrate_decr,
 147         .set_rtc_time           = mpc8xx_set_rtc_time,
 148         .get_rtc_time           = mpc8xx_get_rtc_time,
 149         .progress               = udbg_progress,
 150 };