arch/powerpc/platforms/iseries/pci.c

   1 /*
   2  * Copyright (C) 2001 Allan Trautman, IBM Corporation
   3  *
   4  * iSeries specific routines for PCI.
   5  *
   6  * Based on code from pci.c and iSeries_pci.c 32bit
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  */
  22 #include <linux/kernel.h>
  23 #include <linux/list.h>
  24 #include <linux/string.h>
  25 #include <linux/init.h>
  26 #include <linux/module.h>
  27 #include <linux/pci.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31 #include <asm/prom.h>
  32 #include <asm/machdep.h>
  33 #include <asm/pci-bridge.h>
  34 #include <asm/iommu.h>
  35 #include <asm/abs_addr.h>
  36 #include <asm/firmware.h>
  37
  38 #include <asm/iseries/hv_call_xm.h>
  39 #include <asm/iseries/mf.h>
  40 #include <asm/iseries/iommu.h>
  41
  42 #include <asm/ppc-pci.h>
  43
  44 #include "irq.h"
  45 #include "pci.h"
  46 #include "call_pci.h"
  47
  48 #define PCI_RETRY_MAX   3
  49 static int limit_pci_retries = 1;       /* Set Retry Error on. */
  50
  51 /*
  52  * Table defines
  53  * Each Entry size is 4 MB * 1024 Entries = 4GB I/O address space.
  54  */
  55 #define IOMM_TABLE_MAX_ENTRIES  1024
  56 #define IOMM_TABLE_ENTRY_SIZE   0x0000000000400000UL
  57 #define BASE_IO_MEMORY          0xE000000000000000UL
  58
  59 static unsigned long max_io_memory = BASE_IO_MEMORY;
  60 static long current_iomm_table_entry;
  61
  62 /*
  63  * Lookup Tables.
  64  */
  65 static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
  66 static u8 iobar_table[IOMM_TABLE_MAX_ENTRIES];
  67
  68 static const char pci_io_text[] = "iSeries PCI I/O";
  69 static DEFINE_SPINLOCK(iomm_table_lock);
  70
  71 /*
  72  * iomm_table_allocate_entry
  73  *
  74  * Adds pci_dev entry in address translation table
  75  *
  76  * - Allocates the number of entries required in table base on BAR
  77  *   size.
  78  * - Allocates starting at BASE_IO_MEMORY and increases.
  79  * - The size is round up to be a multiple of entry size.
  80  * - CurrentIndex is incremented to keep track of the last entry.
  81  * - Builds the resource entry for allocated BARs.
  82  */
  83 static void __init iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
  84 {
  85         struct resource *bar_res = &dev->resource[bar_num];
  86         long bar_size = pci_resource_len(dev, bar_num);
  87
  88         /*
  89          * No space to allocate, quick exit, skip Allocation.
  90          */
  91         if (bar_size == 0)
  92                 return;
  93         /*
  94          * Set Resource values.
  95          */
  96         spin_lock(&iomm_table_lock);
  97         bar_res->name = pci_io_text;
  98         bar_res->start = BASE_IO_MEMORY +
  99                 IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
 100         bar_res->end = bar_res->start + bar_size - 1;
 101         /*
 102          * Allocate the number of table entries needed for BAR.
 103          */
 104         while (bar_size > 0 ) {
 105                 iomm_table[current_iomm_table_entry] = dev->sysdata;
 106                 iobar_table[current_iomm_table_entry] = bar_num;
 107                 bar_size -= IOMM_TABLE_ENTRY_SIZE;
 108                 ++current_iomm_table_entry;
 109         }
 110         max_io_memory = BASE_IO_MEMORY +
 111                 IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
 112         spin_unlock(&iomm_table_lock);
 113 }
 114
 115 /*
 116  * allocate_device_bars
 117  *
 118  * - Allocates ALL pci_dev BAR's and updates the resources with the
 119  *   BAR value.  BARS with zero length will have the resources
 120  *   The HvCallPci_getBarParms is used to get the size of the BAR
 121  *   space.  It calls iomm_table_allocate_entry to allocate
 122  *   each entry.
 123  * - Loops through The Bar resources(0 - 5) including the ROM
 124  *   is resource(6).
 125  */
 126 static void __init allocate_device_bars(struct pci_dev *dev)
 127 {
 128         int bar_num;
 129
 130         for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num)
 131                 iomm_table_allocate_entry(dev, bar_num);
 132 }
 133
 134 /*
 135  * Log error information to system console.
 136  * Filter out the device not there errors.
 137  * PCI: EADs Connect Failed 0x18.58.10 Rc: 0x00xx
 138  * PCI: Read Vendor Failed 0x18.58.10 Rc: 0x00xx
 139  * PCI: Connect Bus Unit Failed 0x18.58.10 Rc: 0x00xx
 140  */
 141 static void pci_log_error(char *error, int bus, int subbus,
 142                 int agent, int hv_res)
 143 {
 144         if (hv_res == 0x0302)
 145                 return;
 146         printk(KERN_ERR "PCI: %s Failed: 0x%02X.%02X.%02X Rc: 0x%04X",
 147                error, bus, subbus, agent, hv_res);
 148 }
 149
 150 /*
 151  * Look down the chain to find the matching Device Device
 152  */
 153 static struct device_node *find_device_node(int bus, int devfn)
 154 {
 155         struct device_node *node;
 156
 157         for (node = NULL; (node = of_find_all_nodes(node)); ) {
 158                 struct pci_dn *pdn = PCI_DN(node);
 159
 160                 if (pdn && (bus == pdn->busno) && (devfn == pdn->devfn))
 161                         return node;
 162         }
 163         return NULL;
 164 }
 165
 166 /*
 167  * iSeries_pci_final_fixup(void)
 168  */
 169 void __init iSeries_pci_final_fixup(void)
 170 {
 171         struct pci_dev *pdev = NULL;
 172         struct device_node *node;
 173         int num_dev = 0;
 174
 175         /* Fix up at the device node and pci_dev relationship */
 176         mf_display_src(0xC9000100);
 177
 178         printk("pcibios_final_fixup\n");
 179         for_each_pci_dev(pdev) {
 180                 node = find_device_node(pdev->bus->number, pdev->devfn);
 181                 printk("pci dev %p (%x.%x), node %p\n", pdev,
 182                        pdev->bus->number, pdev->devfn, node);
 183
 184                 if (node != NULL) {
 185                         struct pci_dn *pdn = PCI_DN(node);
 186                         const u32 *agent;
 187
 188                         agent = of_get_property(node, "linux,agent-id", NULL);
 189                         if ((pdn != NULL) && (agent != NULL)) {
 190                                 u8 irq = iSeries_allocate_IRQ(pdn->busno, 0,
 191                                                 pdn->bussubno);
 192                                 int err;
 193
 194                                 err = HvCallXm_connectBusUnit(pdn->busno, pdn->bussubno,
 195                                                 *agent, irq);
 196                                 if (err)
 197                                         pci_log_error("Connect Bus Unit",
 198                                                 pdn->busno, pdn->bussubno, *agent, err);
 199                                 else {
 200                                         err = HvCallPci_configStore8(pdn->busno, pdn->bussubno,
 201                                                         *agent,
 202                                                         PCI_INTERRUPT_LINE,
 203                                                         irq);
 204                                         if (err)
 205                                                 pci_log_error("PciCfgStore Irq Failed!",
 206                                                         pdn->busno, pdn->bussubno, *agent, err);
 207                                 }
 208                                 if (!err)
 209                                         pdev->irq = irq;
 210                         }
 211
 212                         ++num_dev;
 213                         pdev->sysdata = node;
 214                         PCI_DN(node)->pcidev = pdev;
 215                         allocate_device_bars(pdev);
 216                         iSeries_Device_Information(pdev, num_dev);
 217                         iommu_devnode_init_iSeries(pdev, node);
 218                 } else
 219                         printk("PCI: Device Tree not found for 0x%016lX\n",
 220                                         (unsigned long)pdev);
 221         }
 222         iSeries_activate_IRQs();
 223         mf_display_src(0xC9000200);
 224 }
 225
 226 /*
 227  * Config space read and write functions.
 228  * For now at least, we look for the device node for the bus and devfn
 229  * that we are asked to access.  It may be possible to translate the devfn
 230  * to a subbus and deviceid more directly.
 231  */
 232 static u64 hv_cfg_read_func[4]  = {
 233         HvCallPciConfigLoad8, HvCallPciConfigLoad16,
 234         HvCallPciConfigLoad32, HvCallPciConfigLoad32
 235 };
 236
 237 static u64 hv_cfg_write_func[4] = {
 238         HvCallPciConfigStore8, HvCallPciConfigStore16,
 239         HvCallPciConfigStore32, HvCallPciConfigStore32
 240 };
 241
 242 /*
 243  * Read PCI config space
 244  */
 245 static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
 246                 int offset, int size, u32 *val)
 247 {
 248         struct device_node *node = find_device_node(bus->number, devfn);
 249         u64 fn;
 250         struct HvCallPci_LoadReturn ret;
 251
 252         if (node == NULL)
 253                 return PCIBIOS_DEVICE_NOT_FOUND;
 254         if (offset > 255) {
 255                 *val = ~0;
 256                 return PCIBIOS_BAD_REGISTER_NUMBER;
 257         }
 258
 259         fn = hv_cfg_read_func[(size - 1) & 3];
 260         HvCall3Ret16(fn, &ret, iseries_ds_addr(node), offset, 0);
 261
 262         if (ret.rc != 0) {
 263                 *val = ~0;
 264                 return PCIBIOS_DEVICE_NOT_FOUND;        /* or something */
 265         }
 266
 267         *val = ret.value;
 268         return 0;
 269 }
 270
 271 /*
 272  * Write PCI config space
 273  */
 274
 275 static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
 276                 int offset, int size, u32 val)
 277 {
 278         struct device_node *node = find_device_node(bus->number, devfn);
 279         u64 fn;
 280         u64 ret;
 281
 282         if (node == NULL)
 283                 return PCIBIOS_DEVICE_NOT_FOUND;
 284         if (offset > 255)
 285                 return PCIBIOS_BAD_REGISTER_NUMBER;
 286
 287         fn = hv_cfg_write_func[(size - 1) & 3];
 288         ret = HvCall4(fn, iseries_ds_addr(node), offset, val, 0);
 289
 290         if (ret != 0)
 291                 return PCIBIOS_DEVICE_NOT_FOUND;
 292
 293         return 0;
 294 }
 295
 296 static struct pci_ops iSeries_pci_ops = {
 297         .read = iSeries_pci_read_config,
 298         .write = iSeries_pci_write_config
 299 };
 300
 301 /*
 302  * Check Return Code
 303  * -> On Failure, print and log information.
 304  *    Increment Retry Count, if exceeds max, panic partition.
 305  *
 306  * PCI: Device 23.90 ReadL I/O Error( 0): 0x1234
 307  * PCI: Device 23.90 ReadL Retry( 1)
 308  * PCI: Device 23.90 ReadL Retry Successful(1)
 309  */
 310 static int check_return_code(char *type, struct device_node *dn,
 311                 int *retry, u64 ret)
 312 {
 313         if (ret != 0)  {
 314                 struct pci_dn *pdn = PCI_DN(dn);
 315
 316                 (*retry)++;
 317                 printk("PCI: %s: Device 0x%04X:%02X  I/O Error(%2d): 0x%04X\n",
 318                                 type, pdn->busno, pdn->devfn,
 319                                 *retry, (int)ret);
 320                 /*
 321                  * Bump the retry and check for retry count exceeded.
 322                  * If, Exceeded, panic the system.
 323                  */
 324                 if (((*retry) > PCI_RETRY_MAX) &&
 325                                 (limit_pci_retries > 0)) {
 326                         mf_display_src(0xB6000103);
 327                         panic_timeout = 0;
 328                         panic("PCI: Hardware I/O Error, SRC B6000103, "
 329                                         "Automatic Reboot Disabled.\n");
 330                 }
 331                 return -1;      /* Retry Try */
 332         }
 333         return 0;
 334 }
 335
 336 /*
 337  * Translate the I/O Address into a device node, bar, and bar offset.
 338  * Note: Make sure the passed variable end up on the stack to avoid
 339  * the exposure of being device global.
 340  */
 341 static inline struct device_node *xlate_iomm_address(
 342                 const volatile void __iomem *addr,
 343                 u64 *dsaptr, u64 *bar_offset)
 344 {
 345         unsigned long orig_addr;
 346         unsigned long base_addr;
 347         unsigned long ind;
 348         struct device_node *dn;
 349
 350         orig_addr = (unsigned long __force)addr;
 351         if ((orig_addr < BASE_IO_MEMORY) || (orig_addr >= max_io_memory))
 352                 return NULL;
 353         base_addr = orig_addr - BASE_IO_MEMORY;
 354         ind = base_addr / IOMM_TABLE_ENTRY_SIZE;
 355         dn = iomm_table[ind];
 356
 357         if (dn != NULL) {
 358                 int barnum = iobar_table[ind];
 359                 *dsaptr = iseries_ds_addr(dn) | (barnum << 24);
 360                 *bar_offset = base_addr % IOMM_TABLE_ENTRY_SIZE;
 361         } else
 362                 panic("PCI: Invalid PCI IO address detected!\n");
 363         return dn;
 364 }
 365
 366 /*
 367  * Read MM I/O Instructions for the iSeries
 368  * On MM I/O error, all ones are returned and iSeries_pci_IoError is cal
 369  * else, data is returned in Big Endian format.
 370  */
 371 static u8 iSeries_read_byte(const volatile void __iomem *addr)
 372 {
 373         u64 bar_offset;
 374         u64 dsa;
 375         int retry = 0;
 376         struct HvCallPci_LoadReturn ret;
 377         struct device_node *dn =
 378                 xlate_iomm_address(addr, &dsa, &bar_offset);
 379
 380         if (dn == NULL) {
 381                 static unsigned long last_jiffies;
 382                 static int num_printed;
 383
 384                 if ((jiffies - last_jiffies) > 60 * HZ) {
 385                         last_jiffies = jiffies;
 386                         num_printed = 0;
 387                 }
 388                 if (num_printed++ < 10)
 389                         printk(KERN_ERR "iSeries_read_byte: invalid access at IO address %p\n",
 390                                addr);
 391                 return 0xff;
 392         }
 393         do {
 394                 HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, bar_offset, 0);
 395         } while (check_return_code("RDB", dn, &retry, ret.rc) != 0);
 396
 397         return ret.value;
 398 }
 399
 400 static u16 iSeries_read_word(const volatile void __iomem *addr)
 401 {
 402         u64 bar_offset;
 403         u64 dsa;
 404         int retry = 0;
 405         struct HvCallPci_LoadReturn ret;
 406         struct device_node *dn =
 407                 xlate_iomm_address(addr, &dsa, &bar_offset);
 408
 409         if (dn == NULL) {
 410                 static unsigned long last_jiffies;
 411                 static int num_printed;
 412
 413                 if ((jiffies - last_jiffies) > 60 * HZ) {
 414                         last_jiffies = jiffies;
 415                         num_printed = 0;
 416                 }
 417                 if (num_printed++ < 10)
 418                         printk(KERN_ERR "iSeries_read_word: invalid access at IO address %p\n",
 419                                addr);
 420                 return 0xffff;
 421         }
 422         do {
 423                 HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
 424                                 bar_offset, 0);
 425         } while (check_return_code("RDW", dn, &retry, ret.rc) != 0);
 426
 427         return ret.value;
 428 }
 429
 430 static u32 iSeries_read_long(const volatile void __iomem *addr)
 431 {
 432         u64 bar_offset;
 433         u64 dsa;
 434         int retry = 0;
 435         struct HvCallPci_LoadReturn ret;
 436         struct device_node *dn =
 437                 xlate_iomm_address(addr, &dsa, &bar_offset);
 438
 439         if (dn == NULL) {
 440                 static unsigned long last_jiffies;
 441                 static int num_printed;
 442
 443                 if ((jiffies - last_jiffies) > 60 * HZ) {
 444                         last_jiffies = jiffies;
 445                         num_printed = 0;
 446                 }
 447                 if (num_printed++ < 10)
 448                         printk(KERN_ERR "iSeries_read_long: invalid access at IO address %p\n",
 449                                addr);
 450                 return 0xffffffff;
 451         }
 452         do {
 453                 HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
 454                                 bar_offset, 0);
 455         } while (check_return_code("RDL", dn, &retry, ret.rc) != 0);
 456
 457         return ret.value;
 458 }
 459
 460 /*
 461  * Write MM I/O Instructions for the iSeries
 462  *
 463  */
 464 static void iSeries_write_byte(u8 data, volatile void __iomem *addr)
 465 {
 466         u64 bar_offset;
 467         u64 dsa;
 468         int retry = 0;
 469         u64 rc;
 470         struct device_node *dn =
 471                 xlate_iomm_address(addr, &dsa, &bar_offset);
 472
 473         if (dn == NULL) {
 474                 static unsigned long last_jiffies;
 475                 static int num_printed;
 476
 477                 if ((jiffies - last_jiffies) > 60 * HZ) {
 478                         last_jiffies = jiffies;
 479                         num_printed = 0;
 480                 }
 481                 if (num_printed++ < 10)
 482                         printk(KERN_ERR "iSeries_write_byte: invalid access at IO address %p\n", addr);
 483                 return;
 484         }
 485         do {
 486                 rc = HvCall4(HvCallPciBarStore8, dsa, bar_offset, data, 0);
 487         } while (check_return_code("WWB", dn, &retry, rc) != 0);
 488 }
 489
 490 static void iSeries_write_word(u16 data, volatile void __iomem *addr)
 491 {
 492         u64 bar_offset;
 493         u64 dsa;
 494         int retry = 0;
 495         u64 rc;
 496         struct device_node *dn =
 497                 xlate_iomm_address(addr, &dsa, &bar_offset);
 498
 499         if (dn == NULL) {
 500                 static unsigned long last_jiffies;
 501                 static int num_printed;
 502
 503                 if ((jiffies - last_jiffies) > 60 * HZ) {
 504                         last_jiffies = jiffies;
 505                         num_printed = 0;
 506                 }
 507                 if (num_printed++ < 10)
 508                         printk(KERN_ERR "iSeries_write_word: invalid access at IO address %p\n",
 509                                addr);
 510                 return;
 511         }
 512         do {
 513                 rc = HvCall4(HvCallPciBarStore16, dsa, bar_offset, data, 0);
 514         } while (check_return_code("WWW", dn, &retry, rc) != 0);
 515 }
 516
 517 static void iSeries_write_long(u32 data, volatile void __iomem *addr)
 518 {
 519         u64 bar_offset;
 520         u64 dsa;
 521         int retry = 0;
 522         u64 rc;
 523         struct device_node *dn =
 524                 xlate_iomm_address(addr, &dsa, &bar_offset);
 525
 526         if (dn == NULL) {
 527                 static unsigned long last_jiffies;
 528                 static int num_printed;
 529
 530                 if ((jiffies - last_jiffies) > 60 * HZ) {
 531                         last_jiffies = jiffies;
 532                         num_printed = 0;
 533                 }
 534                 if (num_printed++ < 10)
 535                         printk(KERN_ERR "iSeries_write_long: invalid access at IO address %p\n",
 536                                addr);
 537                 return;
 538         }
 539         do {
 540                 rc = HvCall4(HvCallPciBarStore32, dsa, bar_offset, data, 0);
 541         } while (check_return_code("WWL", dn, &retry, rc) != 0);
 542 }
 543
 544 static u8 iseries_readb(const volatile void __iomem *addr)
 545 {
 546         return iSeries_read_byte(addr);
 547 }
 548
 549 static u16 iseries_readw(const volatile void __iomem *addr)
 550 {
 551         return le16_to_cpu(iSeries_read_word(addr));
 552 }
 553
 554 static u32 iseries_readl(const volatile void __iomem *addr)
 555 {
 556         return le32_to_cpu(iSeries_read_long(addr));
 557 }
 558
 559 static u16 iseries_readw_be(const volatile void __iomem *addr)
 560 {
 561         return iSeries_read_word(addr);
 562 }
 563
 564 static u32 iseries_readl_be(const volatile void __iomem *addr)
 565 {
 566         return iSeries_read_long(addr);
 567 }
 568
 569 static void iseries_writeb(u8 data, volatile void __iomem *addr)
 570 {
 571         iSeries_write_byte(data, addr);
 572 }
 573
 574 static void iseries_writew(u16 data, volatile void __iomem *addr)
 575 {
 576         iSeries_write_word(cpu_to_le16(data), addr);
 577 }
 578
 579 static void iseries_writel(u32 data, volatile void __iomem *addr)
 580 {
 581         iSeries_write_long(cpu_to_le32(data), addr);
 582 }
 583
 584 static void iseries_writew_be(u16 data, volatile void __iomem *addr)
 585 {
 586         iSeries_write_word(data, addr);
 587 }
 588
 589 static void iseries_writel_be(u32 data, volatile void __iomem *addr)
 590 {
 591         iSeries_write_long(data, addr);
 592 }
 593
 594 static void iseries_readsb(const volatile void __iomem *addr, void *buf,
 595                            unsigned long count)
 596 {
 597         u8 *dst = buf;
 598         while(count-- > 0)
 599                 *(dst++) = iSeries_read_byte(addr);
 600 }
 601
 602 static void iseries_readsw(const volatile void __iomem *addr, void *buf,
 603                            unsigned long count)
 604 {
 605         u16 *dst = buf;
 606         while(count-- > 0)
 607                 *(dst++) = iSeries_read_word(addr);
 608 }
 609
 610 static void iseries_readsl(const volatile void __iomem *addr, void *buf,
 611                            unsigned long count)
 612 {
 613         u32 *dst = buf;
 614         while(count-- > 0)
 615                 *(dst++) = iSeries_read_long(addr);
 616 }
 617
 618 static void iseries_writesb(volatile void __iomem *addr, const void *buf,
 619                             unsigned long count)
 620 {
 621         const u8 *src = buf;
 622         while(count-- > 0)
 623                 iSeries_write_byte(*(src++), addr);
 624 }
 625
 626 static void iseries_writesw(volatile void __iomem *addr, const void *buf,
 627                             unsigned long count)
 628 {
 629         const u16 *src = buf;
 630         while(count-- > 0)
 631                 iSeries_write_word(*(src++), addr);
 632 }
 633
 634 static void iseries_writesl(volatile void __iomem *addr, const void *buf,
 635                             unsigned long count)
 636 {
 637         const u32 *src = buf;
 638         while(count-- > 0)
 639                 iSeries_write_long(*(src++), addr);
 640 }
 641
 642 static void iseries_memset_io(volatile void __iomem *addr, int c,
 643                               unsigned long n)
 644 {
 645         volatile char __iomem *d = addr;
 646
 647         while (n-- > 0)
 648                 iSeries_write_byte(c, d++);
 649 }
 650
 651 static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
 652                                   unsigned long n)
 653 {
 654         char *d = dest;
 655         const volatile char __iomem *s = src;
 656
 657         while (n-- > 0)
 658                 *d++ = iSeries_read_byte(s++);
 659 }
 660
 661 static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
 662                                 unsigned long n)
 663 {
 664         const char *s = src;
 665         volatile char __iomem *d = dest;
 666
 667         while (n-- > 0)
 668                 iSeries_write_byte(*s++, d++);
 669 }
 670
 671 /* We only set MMIO ops. The default PIO ops will be default
 672  * to the MMIO ops + pci_io_base which is 0 on iSeries as
 673  * expected so both should work.
 674  *
 675  * Note that we don't implement the readq/writeq versions as
 676  * I don't know of an HV call for doing so. Thus, the default
 677  * operation will be used instead, which will fault a the value
 678  * return by iSeries for MMIO addresses always hits a non mapped
 679  * area. This is as good as the BUG() we used to have there.
 680  */
 681 static struct ppc_pci_io __initdata iseries_pci_io = {
 682         .readb = iseries_readb,
 683         .readw = iseries_readw,
 684         .readl = iseries_readl,
 685         .readw_be = iseries_readw_be,
 686         .readl_be = iseries_readl_be,
 687         .writeb = iseries_writeb,
 688         .writew = iseries_writew,
 689         .writel = iseries_writel,
 690         .writew_be = iseries_writew_be,
 691         .writel_be = iseries_writel_be,
 692         .readsb = iseries_readsb,
 693         .readsw = iseries_readsw,
 694         .readsl = iseries_readsl,
 695         .writesb = iseries_writesb,
 696         .writesw = iseries_writesw,
 697         .writesl = iseries_writesl,
 698         .memset_io = iseries_memset_io,
 699         .memcpy_fromio = iseries_memcpy_fromio,
 700         .memcpy_toio = iseries_memcpy_toio,
 701 };
 702
 703 /*
 704  * iSeries_pcibios_init
 705  *
 706  * Description:
 707  *   This function checks for all possible system PCI host bridges that connect
 708  *   PCI buses.  The system hypervisor is queried as to the guest partition
 709  *   ownership status.  A pci_controller is built for any bus which is partially
 710  *   owned or fully owned by this guest partition.
 711  */
 712 void __init iSeries_pcibios_init(void)
 713 {
 714         struct pci_controller *phb;
 715         struct device_node *root = of_find_node_by_path("/");
 716         struct device_node *node = NULL;
 717
 718         /* Install IO hooks */
 719         ppc_pci_io = iseries_pci_io;
 720
 721         /* iSeries has no IO space in the common sense, it needs to set
 722          * the IO base to 0
 723          */
 724         pci_io_base = 0;
 725
 726         if (root == NULL) {
 727                 printk(KERN_CRIT "iSeries_pcibios_init: can't find root "
 728                                 "of device tree\n");
 729                 return;
 730         }
 731         while ((node = of_get_next_child(root, node)) != NULL) {
 732                 HvBusNumber bus;
 733                 const u32 *busp;
 734
 735                 if ((node->type == NULL) || (strcmp(node->type, "pci") != 0))
 736                         continue;
 737
 738                 busp = of_get_property(node, "bus-range", NULL);
 739                 if (busp == NULL)
 740                         continue;
 741                 bus = *busp;
 742                 printk("bus %d appears to exist\n", bus);
 743                 phb = pcibios_alloc_controller(node);
 744                 if (phb == NULL)
 745                         continue;
 746
 747                 phb->pci_mem_offset = bus;
 748                 phb->first_busno = bus;
 749                 phb->last_busno = bus;
 750                 phb->ops = &iSeries_pci_ops;
 751         }
 752
 753         of_node_put(root);
 754
 755         pci_devs_phb_init();
 756 }
 757