074d1d9497081caf64314e4bf8ffdd06ecb47882
[deliverable/linux.git] / arch / powerpc / platforms / iseries / setup.c
1 /*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4 *
5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17 #undef DEBUG
18
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/initrd.h>
26 #include <linux/seq_file.h>
27 #include <linux/kdev_t.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30 #include <linux/kernel.h>
31 #include <linux/if_ether.h> /* ETH_ALEN */
32
33 #include <asm/processor.h>
34 #include <asm/machdep.h>
35 #include <asm/page.h>
36 #include <asm/mmu.h>
37 #include <asm/pgtable.h>
38 #include <asm/mmu_context.h>
39 #include <asm/cputable.h>
40 #include <asm/sections.h>
41 #include <asm/iommu.h>
42 #include <asm/firmware.h>
43 #include <asm/system.h>
44 #include <asm/time.h>
45 #include <asm/paca.h>
46 #include <asm/cache.h>
47 #include <asm/sections.h>
48 #include <asm/abs_addr.h>
49 #include <asm/iseries/hv_types.h>
50 #include <asm/iseries/hv_lp_config.h>
51 #include <asm/iseries/hv_call_event.h>
52 #include <asm/iseries/hv_call_xm.h>
53 #include <asm/iseries/it_lp_queue.h>
54 #include <asm/iseries/mf.h>
55 #include <asm/iseries/it_exp_vpd_panel.h>
56 #include <asm/iseries/hv_lp_event.h>
57 #include <asm/iseries/lpar_map.h>
58 #include <asm/udbg.h>
59 #include <asm/irq.h>
60
61 #include "naca.h"
62 #include "setup.h"
63 #include "irq.h"
64 #include "vpd_areas.h"
65 #include "processor_vpd.h"
66 #include "main_store.h"
67 #include "call_sm.h"
68 #include "call_hpt.h"
69
70 #ifdef DEBUG
71 #define DBG(fmt...) udbg_printf(fmt)
72 #else
73 #define DBG(fmt...)
74 #endif
75
76 /* Function Prototypes */
77 static unsigned long build_iSeries_Memory_Map(void);
78 static void iseries_shared_idle(void);
79 static void iseries_dedicated_idle(void);
80 #ifdef CONFIG_PCI
81 extern void iSeries_pci_final_fixup(void);
82 #else
83 static void iSeries_pci_final_fixup(void) { }
84 #endif
85
86 extern int rd_size; /* Defined in drivers/block/rd.c */
87 extern unsigned long embedded_sysmap_start;
88 extern unsigned long embedded_sysmap_end;
89
90 extern unsigned long iSeries_recal_tb;
91 extern unsigned long iSeries_recal_titan;
92
93 static unsigned long cmd_mem_limit;
94
95 struct MemoryBlock {
96 unsigned long absStart;
97 unsigned long absEnd;
98 unsigned long logicalStart;
99 unsigned long logicalEnd;
100 };
101
102 /*
103 * Process the main store vpd to determine where the holes in memory are
104 * and return the number of physical blocks and fill in the array of
105 * block data.
106 */
107 static unsigned long iSeries_process_Condor_mainstore_vpd(
108 struct MemoryBlock *mb_array, unsigned long max_entries)
109 {
110 unsigned long holeFirstChunk, holeSizeChunks;
111 unsigned long numMemoryBlocks = 1;
112 struct IoHriMainStoreSegment4 *msVpd =
113 (struct IoHriMainStoreSegment4 *)xMsVpd;
114 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
115 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
116 unsigned long holeSize = holeEnd - holeStart;
117
118 printk("Mainstore_VPD: Condor\n");
119 /*
120 * Determine if absolute memory has any
121 * holes so that we can interpret the
122 * access map we get back from the hypervisor
123 * correctly.
124 */
125 mb_array[0].logicalStart = 0;
126 mb_array[0].logicalEnd = 0x100000000;
127 mb_array[0].absStart = 0;
128 mb_array[0].absEnd = 0x100000000;
129
130 if (holeSize) {
131 numMemoryBlocks = 2;
132 holeStart = holeStart & 0x000fffffffffffff;
133 holeStart = addr_to_chunk(holeStart);
134 holeFirstChunk = holeStart;
135 holeSize = addr_to_chunk(holeSize);
136 holeSizeChunks = holeSize;
137 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
138 holeFirstChunk, holeSizeChunks );
139 mb_array[0].logicalEnd = holeFirstChunk;
140 mb_array[0].absEnd = holeFirstChunk;
141 mb_array[1].logicalStart = holeFirstChunk;
142 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
143 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
144 mb_array[1].absEnd = 0x100000000;
145 }
146 return numMemoryBlocks;
147 }
148
149 #define MaxSegmentAreas 32
150 #define MaxSegmentAdrRangeBlocks 128
151 #define MaxAreaRangeBlocks 4
152
153 static unsigned long iSeries_process_Regatta_mainstore_vpd(
154 struct MemoryBlock *mb_array, unsigned long max_entries)
155 {
156 struct IoHriMainStoreSegment5 *msVpdP =
157 (struct IoHriMainStoreSegment5 *)xMsVpd;
158 unsigned long numSegmentBlocks = 0;
159 u32 existsBits = msVpdP->msAreaExists;
160 unsigned long area_num;
161
162 printk("Mainstore_VPD: Regatta\n");
163
164 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
165 unsigned long numAreaBlocks;
166 struct IoHriMainStoreArea4 *currentArea;
167
168 if (existsBits & 0x80000000) {
169 unsigned long block_num;
170
171 currentArea = &msVpdP->msAreaArray[area_num];
172 numAreaBlocks = currentArea->numAdrRangeBlocks;
173 printk("ms_vpd: processing area %2ld blocks=%ld",
174 area_num, numAreaBlocks);
175 for (block_num = 0; block_num < numAreaBlocks;
176 ++block_num ) {
177 /* Process an address range block */
178 struct MemoryBlock tempBlock;
179 unsigned long i;
180
181 tempBlock.absStart =
182 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
183 tempBlock.absEnd =
184 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
185 tempBlock.logicalStart = 0;
186 tempBlock.logicalEnd = 0;
187 printk("\n block %ld absStart=%016lx absEnd=%016lx",
188 block_num, tempBlock.absStart,
189 tempBlock.absEnd);
190
191 for (i = 0; i < numSegmentBlocks; ++i) {
192 if (mb_array[i].absStart ==
193 tempBlock.absStart)
194 break;
195 }
196 if (i == numSegmentBlocks) {
197 if (numSegmentBlocks == max_entries)
198 panic("iSeries_process_mainstore_vpd: too many memory blocks");
199 mb_array[numSegmentBlocks] = tempBlock;
200 ++numSegmentBlocks;
201 } else
202 printk(" (duplicate)");
203 }
204 printk("\n");
205 }
206 existsBits <<= 1;
207 }
208 /* Now sort the blocks found into ascending sequence */
209 if (numSegmentBlocks > 1) {
210 unsigned long m, n;
211
212 for (m = 0; m < numSegmentBlocks - 1; ++m) {
213 for (n = numSegmentBlocks - 1; m < n; --n) {
214 if (mb_array[n].absStart <
215 mb_array[n-1].absStart) {
216 struct MemoryBlock tempBlock;
217
218 tempBlock = mb_array[n];
219 mb_array[n] = mb_array[n-1];
220 mb_array[n-1] = tempBlock;
221 }
222 }
223 }
224 }
225 /*
226 * Assign "logical" addresses to each block. These
227 * addresses correspond to the hypervisor "bitmap" space.
228 * Convert all addresses into units of 256K chunks.
229 */
230 {
231 unsigned long i, nextBitmapAddress;
232
233 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
234 nextBitmapAddress = 0;
235 for (i = 0; i < numSegmentBlocks; ++i) {
236 unsigned long length = mb_array[i].absEnd -
237 mb_array[i].absStart;
238
239 mb_array[i].logicalStart = nextBitmapAddress;
240 mb_array[i].logicalEnd = nextBitmapAddress + length;
241 nextBitmapAddress += length;
242 printk(" Bitmap range: %016lx - %016lx\n"
243 " Absolute range: %016lx - %016lx\n",
244 mb_array[i].logicalStart,
245 mb_array[i].logicalEnd,
246 mb_array[i].absStart, mb_array[i].absEnd);
247 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
248 0x000fffffffffffff);
249 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
250 0x000fffffffffffff);
251 mb_array[i].logicalStart =
252 addr_to_chunk(mb_array[i].logicalStart);
253 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
254 }
255 }
256
257 return numSegmentBlocks;
258 }
259
260 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
261 unsigned long max_entries)
262 {
263 unsigned long i;
264 unsigned long mem_blocks = 0;
265
266 if (cpu_has_feature(CPU_FTR_SLB))
267 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
268 max_entries);
269 else
270 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
271 max_entries);
272
273 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
274 for (i = 0; i < mem_blocks; ++i) {
275 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
276 " abs chunks %016lx - %016lx\n",
277 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
278 mb_array[i].absStart, mb_array[i].absEnd);
279 }
280 return mem_blocks;
281 }
282
283 static void __init iSeries_get_cmdline(void)
284 {
285 char *p, *q;
286
287 /* copy the command line parameter from the primary VSP */
288 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
289 HvLpDma_Direction_RemoteToLocal);
290
291 p = cmd_line;
292 q = cmd_line + 255;
293 while(p < q) {
294 if (!*p || *p == '\n')
295 break;
296 ++p;
297 }
298 *p = 0;
299 }
300
301 static void __init iSeries_init_early(void)
302 {
303 DBG(" -> iSeries_init_early()\n");
304
305 ppc64_interrupt_controller = IC_ISERIES;
306
307 #if defined(CONFIG_BLK_DEV_INITRD)
308 /*
309 * If the init RAM disk has been configured and there is
310 * a non-zero starting address for it, set it up
311 */
312 if (naca.xRamDisk) {
313 initrd_start = (unsigned long)__va(naca.xRamDisk);
314 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
315 initrd_below_start_ok = 1; // ramdisk in kernel space
316 ROOT_DEV = Root_RAM0;
317 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
318 rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
319 } else
320 #endif /* CONFIG_BLK_DEV_INITRD */
321 {
322 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
323 }
324
325 iSeries_recal_tb = get_tb();
326 iSeries_recal_titan = HvCallXm_loadTod();
327
328 /*
329 * Initialize the hash table management pointers
330 */
331 hpte_init_iSeries();
332
333 /*
334 * Initialize the DMA/TCE management
335 */
336 iommu_init_early_iSeries();
337
338 /* Initialize machine-dependency vectors */
339 #ifdef CONFIG_SMP
340 smp_init_iSeries();
341 #endif
342
343 /* Associate Lp Event Queue 0 with processor 0 */
344 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
345
346 mf_init();
347
348 /* If we were passed an initrd, set the ROOT_DEV properly if the values
349 * look sensible. If not, clear initrd reference.
350 */
351 #ifdef CONFIG_BLK_DEV_INITRD
352 if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
353 initrd_end > initrd_start)
354 ROOT_DEV = Root_RAM0;
355 else
356 initrd_start = initrd_end = 0;
357 #endif /* CONFIG_BLK_DEV_INITRD */
358
359 DBG(" <- iSeries_init_early()\n");
360 }
361
362 struct mschunks_map mschunks_map = {
363 /* XXX We don't use these, but Piranha might need them. */
364 .chunk_size = MSCHUNKS_CHUNK_SIZE,
365 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
366 .chunk_mask = MSCHUNKS_OFFSET_MASK,
367 };
368 EXPORT_SYMBOL(mschunks_map);
369
370 void mschunks_alloc(unsigned long num_chunks)
371 {
372 klimit = _ALIGN(klimit, sizeof(u32));
373 mschunks_map.mapping = (u32 *)klimit;
374 klimit += num_chunks * sizeof(u32);
375 mschunks_map.num_chunks = num_chunks;
376 }
377
378 /*
379 * The iSeries may have very large memories ( > 128 GB ) and a partition
380 * may get memory in "chunks" that may be anywhere in the 2**52 real
381 * address space. The chunks are 256K in size. To map this to the
382 * memory model Linux expects, the AS/400 specific code builds a
383 * translation table to translate what Linux thinks are "physical"
384 * addresses to the actual real addresses. This allows us to make
385 * it appear to Linux that we have contiguous memory starting at
386 * physical address zero while in fact this could be far from the truth.
387 * To avoid confusion, I'll let the words physical and/or real address
388 * apply to the Linux addresses while I'll use "absolute address" to
389 * refer to the actual hardware real address.
390 *
391 * build_iSeries_Memory_Map gets information from the Hypervisor and
392 * looks at the Main Store VPD to determine the absolute addresses
393 * of the memory that has been assigned to our partition and builds
394 * a table used to translate Linux's physical addresses to these
395 * absolute addresses. Absolute addresses are needed when
396 * communicating with the hypervisor (e.g. to build HPT entries)
397 *
398 * Returns the physical memory size
399 */
400
401 static unsigned long __init build_iSeries_Memory_Map(void)
402 {
403 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
404 u32 nextPhysChunk;
405 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
406 u32 totalChunks,moreChunks;
407 u32 currChunk, thisChunk, absChunk;
408 u32 currDword;
409 u32 chunkBit;
410 u64 map;
411 struct MemoryBlock mb[32];
412 unsigned long numMemoryBlocks, curBlock;
413
414 /* Chunk size on iSeries is 256K bytes */
415 totalChunks = (u32)HvLpConfig_getMsChunks();
416 mschunks_alloc(totalChunks);
417
418 /*
419 * Get absolute address of our load area
420 * and map it to physical address 0
421 * This guarantees that the loadarea ends up at physical 0
422 * otherwise, it might not be returned by PLIC as the first
423 * chunks
424 */
425
426 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
427 loadAreaSize = itLpNaca.xLoadAreaChunks;
428
429 /*
430 * Only add the pages already mapped here.
431 * Otherwise we might add the hpt pages
432 * The rest of the pages of the load area
433 * aren't in the HPT yet and can still
434 * be assigned an arbitrary physical address
435 */
436 if ((loadAreaSize * 64) > HvPagesToMap)
437 loadAreaSize = HvPagesToMap / 64;
438
439 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
440
441 /*
442 * TODO Do we need to do something if the HPT is in the 64MB load area?
443 * This would be required if the itLpNaca.xLoadAreaChunks includes
444 * the HPT size
445 */
446
447 printk("Mapping load area - physical addr = 0000000000000000\n"
448 " absolute addr = %016lx\n",
449 chunk_to_addr(loadAreaFirstChunk));
450 printk("Load area size %dK\n", loadAreaSize * 256);
451
452 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
453 mschunks_map.mapping[nextPhysChunk] =
454 loadAreaFirstChunk + nextPhysChunk;
455
456 /*
457 * Get absolute address of our HPT and remember it so
458 * we won't map it to any physical address
459 */
460 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
461 hptSizePages = (u32)HvCallHpt_getHptPages();
462 hptSizeChunks = hptSizePages >>
463 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
464 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
465
466 printk("HPT absolute addr = %016lx, size = %dK\n",
467 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
468
469 /*
470 * Determine if absolute memory has any
471 * holes so that we can interpret the
472 * access map we get back from the hypervisor
473 * correctly.
474 */
475 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
476
477 /*
478 * Process the main store access map from the hypervisor
479 * to build up our physical -> absolute translation table
480 */
481 curBlock = 0;
482 currChunk = 0;
483 currDword = 0;
484 moreChunks = totalChunks;
485
486 while (moreChunks) {
487 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
488 currDword);
489 thisChunk = currChunk;
490 while (map) {
491 chunkBit = map >> 63;
492 map <<= 1;
493 if (chunkBit) {
494 --moreChunks;
495 while (thisChunk >= mb[curBlock].logicalEnd) {
496 ++curBlock;
497 if (curBlock >= numMemoryBlocks)
498 panic("out of memory blocks");
499 }
500 if (thisChunk < mb[curBlock].logicalStart)
501 panic("memory block error");
502
503 absChunk = mb[curBlock].absStart +
504 (thisChunk - mb[curBlock].logicalStart);
505 if (((absChunk < hptFirstChunk) ||
506 (absChunk > hptLastChunk)) &&
507 ((absChunk < loadAreaFirstChunk) ||
508 (absChunk > loadAreaLastChunk))) {
509 mschunks_map.mapping[nextPhysChunk] =
510 absChunk;
511 ++nextPhysChunk;
512 }
513 }
514 ++thisChunk;
515 }
516 ++currDword;
517 currChunk += 64;
518 }
519
520 /*
521 * main store size (in chunks) is
522 * totalChunks - hptSizeChunks
523 * which should be equal to
524 * nextPhysChunk
525 */
526 return chunk_to_addr(nextPhysChunk);
527 }
528
529 /*
530 * Document me.
531 */
532 static void __init iSeries_setup_arch(void)
533 {
534 if (get_lppaca()->shared_proc) {
535 ppc_md.idle_loop = iseries_shared_idle;
536 printk(KERN_DEBUG "Using shared processor idle loop\n");
537 } else {
538 ppc_md.idle_loop = iseries_dedicated_idle;
539 printk(KERN_DEBUG "Using dedicated idle loop\n");
540 }
541
542 /* Setup the Lp Event Queue */
543 setup_hvlpevent_queue();
544
545 printk("Max logical processors = %d\n",
546 itVpdAreas.xSlicMaxLogicalProcs);
547 printk("Max physical processors = %d\n",
548 itVpdAreas.xSlicMaxPhysicalProcs);
549 }
550
551 static void iSeries_show_cpuinfo(struct seq_file *m)
552 {
553 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
554 }
555
556 static void __init iSeries_progress(char * st, unsigned short code)
557 {
558 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
559 mf_display_progress(code);
560 }
561
562 static void __init iSeries_fixup_klimit(void)
563 {
564 /*
565 * Change klimit to take into account any ram disk
566 * that may be included
567 */
568 if (naca.xRamDisk)
569 klimit = KERNELBASE + (u64)naca.xRamDisk +
570 (naca.xRamDiskSize * HW_PAGE_SIZE);
571 else {
572 /*
573 * No ram disk was included - check and see if there
574 * was an embedded system map. Change klimit to take
575 * into account any embedded system map
576 */
577 if (embedded_sysmap_end)
578 klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
579 0xfffffffffffff000);
580 }
581 }
582
583 static int __init iSeries_src_init(void)
584 {
585 /* clear the progress line */
586 ppc_md.progress(" ", 0xffff);
587 return 0;
588 }
589
590 late_initcall(iSeries_src_init);
591
592 static inline void process_iSeries_events(void)
593 {
594 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
595 }
596
597 static void yield_shared_processor(void)
598 {
599 unsigned long tb;
600
601 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
602 HvCall_MaskLpEvent |
603 HvCall_MaskLpProd |
604 HvCall_MaskTimeout);
605
606 tb = get_tb();
607 /* Compute future tb value when yield should expire */
608 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
609
610 /*
611 * The decrementer stops during the yield. Force a fake decrementer
612 * here and let the timer_interrupt code sort out the actual time.
613 */
614 get_lppaca()->int_dword.fields.decr_int = 1;
615 ppc64_runlatch_on();
616 process_iSeries_events();
617 }
618
619 static void iseries_shared_idle(void)
620 {
621 while (1) {
622 while (!need_resched() && !hvlpevent_is_pending()) {
623 local_irq_disable();
624 ppc64_runlatch_off();
625
626 /* Recheck with irqs off */
627 if (!need_resched() && !hvlpevent_is_pending())
628 yield_shared_processor();
629
630 HMT_medium();
631 local_irq_enable();
632 }
633
634 ppc64_runlatch_on();
635
636 if (hvlpevent_is_pending())
637 process_iSeries_events();
638
639 preempt_enable_no_resched();
640 schedule();
641 preempt_disable();
642 }
643 }
644
645 static void iseries_dedicated_idle(void)
646 {
647 set_thread_flag(TIF_POLLING_NRFLAG);
648
649 while (1) {
650 if (!need_resched()) {
651 while (!need_resched()) {
652 ppc64_runlatch_off();
653 HMT_low();
654
655 if (hvlpevent_is_pending()) {
656 HMT_medium();
657 ppc64_runlatch_on();
658 process_iSeries_events();
659 }
660 }
661
662 HMT_medium();
663 }
664
665 ppc64_runlatch_on();
666 preempt_enable_no_resched();
667 schedule();
668 preempt_disable();
669 }
670 }
671
672 #ifndef CONFIG_PCI
673 void __init iSeries_init_IRQ(void) { }
674 #endif
675
676 static int __init iseries_probe(void)
677 {
678 unsigned long root = of_get_flat_dt_root();
679 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
680 return 0;
681
682 powerpc_firmware_features |= FW_FEATURE_ISERIES;
683 powerpc_firmware_features |= FW_FEATURE_LPAR;
684
685 /*
686 * The Hypervisor only allows us up to 256 interrupt
687 * sources (the irq number is passed in a u8).
688 */
689 virt_irq_max = 255;
690
691 return 1;
692 }
693
694 define_machine(iseries) {
695 .name = "iSeries",
696 .setup_arch = iSeries_setup_arch,
697 .show_cpuinfo = iSeries_show_cpuinfo,
698 .init_IRQ = iSeries_init_IRQ,
699 .get_irq = iSeries_get_irq,
700 .init_early = iSeries_init_early,
701 .pcibios_fixup = iSeries_pci_final_fixup,
702 .restart = mf_reboot,
703 .power_off = mf_power_off,
704 .halt = mf_power_off,
705 .get_boot_time = iSeries_get_boot_time,
706 .set_rtc_time = iSeries_set_rtc_time,
707 .get_rtc_time = iSeries_get_rtc_time,
708 .calibrate_decr = generic_calibrate_decr,
709 .progress = iSeries_progress,
710 .probe = iseries_probe,
711 /* XXX Implement enable_pmcs for iSeries */
712 };
713
714 struct blob {
715 unsigned char data[PAGE_SIZE * 2];
716 unsigned long next;
717 };
718
719 struct iseries_flat_dt {
720 struct boot_param_header header;
721 u64 reserve_map[2];
722 struct blob dt;
723 struct blob strings;
724 };
725
726 struct iseries_flat_dt iseries_dt;
727
728 void dt_init(struct iseries_flat_dt *dt)
729 {
730 dt->header.off_mem_rsvmap =
731 offsetof(struct iseries_flat_dt, reserve_map);
732 dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
733 dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
734 dt->header.totalsize = sizeof(struct iseries_flat_dt);
735 dt->header.dt_strings_size = sizeof(struct blob);
736
737 /* There is no notion of hardware cpu id on iSeries */
738 dt->header.boot_cpuid_phys = smp_processor_id();
739
740 dt->dt.next = (unsigned long)&dt->dt.data;
741 dt->strings.next = (unsigned long)&dt->strings.data;
742
743 dt->header.magic = OF_DT_HEADER;
744 dt->header.version = 0x10;
745 dt->header.last_comp_version = 0x10;
746
747 dt->reserve_map[0] = 0;
748 dt->reserve_map[1] = 0;
749 }
750
751 void dt_check_blob(struct blob *b)
752 {
753 if (b->next >= (unsigned long)&b->next) {
754 DBG("Ran out of space in flat device tree blob!\n");
755 BUG();
756 }
757 }
758
759 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
760 {
761 *((u32*)dt->dt.next) = value;
762 dt->dt.next += sizeof(u32);
763
764 dt_check_blob(&dt->dt);
765 }
766
767 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
768 {
769 *((u64*)dt->dt.next) = value;
770 dt->dt.next += sizeof(u64);
771
772 dt_check_blob(&dt->dt);
773 }
774
775 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
776 {
777 unsigned long start = blob->next - (unsigned long)blob->data;
778
779 memcpy((char *)blob->next, data, len);
780 blob->next = _ALIGN(blob->next + len, 4);
781
782 dt_check_blob(blob);
783
784 return start;
785 }
786
787 void dt_start_node(struct iseries_flat_dt *dt, char *name)
788 {
789 dt_push_u32(dt, OF_DT_BEGIN_NODE);
790 dt_push_bytes(&dt->dt, name, strlen(name) + 1);
791 }
792
793 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
794
795 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
796 {
797 unsigned long offset;
798
799 dt_push_u32(dt, OF_DT_PROP);
800
801 /* Length of the data */
802 dt_push_u32(dt, len);
803
804 /* Put the property name in the string blob. */
805 offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
806
807 /* The offset of the properties name in the string blob. */
808 dt_push_u32(dt, (u32)offset);
809
810 /* The actual data. */
811 dt_push_bytes(&dt->dt, data, len);
812 }
813
814 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
815 {
816 dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
817 }
818
819 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
820 {
821 dt_prop(dt, name, (char *)&data, sizeof(u32));
822 }
823
824 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
825 {
826 dt_prop(dt, name, (char *)&data, sizeof(u64));
827 }
828
829 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
830 {
831 dt_prop(dt, name, (char *)data, sizeof(u64) * n);
832 }
833
834 void dt_prop_u32_list(struct iseries_flat_dt *dt, char *name, u32 *data, int n)
835 {
836 dt_prop(dt, name, (char *)data, sizeof(u32) * n);
837 }
838
839 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
840 {
841 dt_prop(dt, name, NULL, 0);
842 }
843
844 void dt_cpus(struct iseries_flat_dt *dt)
845 {
846 unsigned char buf[32];
847 unsigned char *p;
848 unsigned int i, index;
849 struct IoHriProcessorVpd *d;
850 u32 pft_size[2];
851
852 /* yuck */
853 snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
854 p = strchr(buf, ' ');
855 if (!p) p = buf + strlen(buf);
856
857 dt_start_node(dt, "cpus");
858 dt_prop_u32(dt, "#address-cells", 1);
859 dt_prop_u32(dt, "#size-cells", 0);
860
861 pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */
862 pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE);
863
864 for (i = 0; i < NR_CPUS; i++) {
865 if (lppaca[i].dyn_proc_status >= 2)
866 continue;
867
868 snprintf(p, 32 - (p - buf), "@%d", i);
869 dt_start_node(dt, buf);
870
871 dt_prop_str(dt, "device_type", "cpu");
872
873 index = lppaca[i].dyn_hv_phys_proc_index;
874 d = &xIoHriProcessorVpd[index];
875
876 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
877 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
878
879 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
880 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
881
882 /* magic conversions to Hz copied from old code */
883 dt_prop_u32(dt, "clock-frequency",
884 ((1UL << 34) * 1000000) / d->xProcFreq);
885 dt_prop_u32(dt, "timebase-frequency",
886 ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
887
888 dt_prop_u32(dt, "reg", i);
889
890 dt_prop_u32_list(dt, "ibm,pft-size", pft_size, 2);
891
892 dt_end_node(dt);
893 }
894
895 dt_end_node(dt);
896 }
897
898 void dt_model(struct iseries_flat_dt *dt)
899 {
900 char buf[16] = "IBM,";
901
902 /* "IBM," + mfgId[2:3] + systemSerial[1:5] */
903 strne2a(buf + 4, xItExtVpdPanel.mfgID + 2, 2);
904 strne2a(buf + 6, xItExtVpdPanel.systemSerial + 1, 5);
905 buf[11] = '\0';
906 dt_prop_str(dt, "system-id", buf);
907
908 /* "IBM," + machineType[0:4] */
909 strne2a(buf + 4, xItExtVpdPanel.machineType, 4);
910 buf[8] = '\0';
911 dt_prop_str(dt, "model", buf);
912
913 dt_prop_str(dt, "compatible", "IBM,iSeries");
914 }
915
916 void dt_vdevices(struct iseries_flat_dt *dt)
917 {
918 u32 reg = 0;
919 HvLpIndexMap vlan_map;
920 int i;
921 char buf[32];
922
923 dt_start_node(dt, "vdevice");
924 dt_prop_str(dt, "device_type", "vdevice");
925 dt_prop_str(dt, "compatible", "IBM,iSeries-vdevice");
926 dt_prop_u32(dt, "#address-cells", 1);
927 dt_prop_u32(dt, "#size-cells", 0);
928
929 snprintf(buf, sizeof(buf), "vty@%08x", reg);
930 dt_start_node(dt, buf);
931 dt_prop_str(dt, "device_type", "serial");
932 dt_prop_u32(dt, "reg", reg);
933 dt_end_node(dt);
934 reg++;
935
936 snprintf(buf, sizeof(buf), "v-scsi@%08x", reg);
937 dt_start_node(dt, buf);
938 dt_prop_str(dt, "device_type", "vscsi");
939 dt_prop_str(dt, "compatible", "IBM,v-scsi");
940 dt_prop_u32(dt, "reg", reg);
941 dt_end_node(dt);
942 reg++;
943
944 vlan_map = HvLpConfig_getVirtualLanIndexMap();
945 for (i = 0; i < HVMAXARCHITECTEDVIRTUALLANS; i++) {
946 unsigned char mac_addr[ETH_ALEN];
947
948 if ((vlan_map & (0x8000 >> i)) == 0)
949 continue;
950 snprintf(buf, 32, "l-lan@%08x", reg + i);
951 dt_start_node(dt, buf);
952 dt_prop_str(dt, "device_type", "network");
953 dt_prop_str(dt, "compatible", "IBM,iSeries-l-lan");
954 dt_prop_u32(dt, "reg", reg + i);
955 dt_prop_u32(dt, "linux,unit_address", i);
956
957 mac_addr[0] = 0x02;
958 mac_addr[1] = 0x01;
959 mac_addr[2] = 0xff;
960 mac_addr[3] = i;
961 mac_addr[4] = 0xff;
962 mac_addr[5] = HvLpConfig_getLpIndex_outline();
963 dt_prop(dt, "local-mac-address", (char *)mac_addr, ETH_ALEN);
964 dt_prop(dt, "mac-address", (char *)mac_addr, ETH_ALEN);
965 dt_prop_u32(dt, "max-frame-size", 9000);
966 dt_prop_u32(dt, "address-bits", 48);
967
968 dt_end_node(dt);
969 }
970 reg += HVMAXARCHITECTEDVIRTUALLANS;
971
972 for (i = 0; i < HVMAXARCHITECTEDVIRTUALDISKS; i++) {
973 snprintf(buf, 32, "viodasd@%08x", reg + i);
974 dt_start_node(dt, buf);
975 dt_prop_str(dt, "device_type", "block");
976 dt_prop_str(dt, "compatible", "IBM,iSeries-viodasd");
977 dt_prop_u32(dt, "reg", reg + i);
978 dt_prop_u32(dt, "linux,unit_address", i);
979 dt_end_node(dt);
980 }
981 reg += HVMAXARCHITECTEDVIRTUALDISKS;
982 for (i = 0; i < HVMAXARCHITECTEDVIRTUALCDROMS; i++) {
983 snprintf(buf, 32, "viocd@%08x", reg + i);
984 dt_start_node(dt, buf);
985 dt_prop_str(dt, "device_type", "block");
986 dt_prop_str(dt, "compatible", "IBM,iSeries-viocd");
987 dt_prop_u32(dt, "reg", reg + i);
988 dt_prop_u32(dt, "linux,unit_address", i);
989 dt_end_node(dt);
990 }
991 reg += HVMAXARCHITECTEDVIRTUALCDROMS;
992 for (i = 0; i < HVMAXARCHITECTEDVIRTUALTAPES; i++) {
993 snprintf(buf, 32, "viotape@%08x", reg + i);
994 dt_start_node(dt, buf);
995 dt_prop_str(dt, "device_type", "byte");
996 dt_prop_str(dt, "compatible", "IBM,iSeries-viotape");
997 dt_prop_u32(dt, "reg", reg + i);
998 dt_prop_u32(dt, "linux,unit_address", i);
999 dt_end_node(dt);
1000 }
1001
1002 dt_end_node(dt);
1003 }
1004
1005 void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
1006 {
1007 u64 tmp[2];
1008
1009 dt_init(dt);
1010
1011 dt_start_node(dt, "");
1012
1013 dt_prop_u32(dt, "#address-cells", 2);
1014 dt_prop_u32(dt, "#size-cells", 2);
1015 dt_model(dt);
1016
1017 /* /memory */
1018 dt_start_node(dt, "memory@0");
1019 dt_prop_str(dt, "name", "memory");
1020 dt_prop_str(dt, "device_type", "memory");
1021 tmp[0] = 0;
1022 tmp[1] = phys_mem_size;
1023 dt_prop_u64_list(dt, "reg", tmp, 2);
1024 dt_end_node(dt);
1025
1026 /* /chosen */
1027 dt_start_node(dt, "chosen");
1028 dt_prop_str(dt, "bootargs", cmd_line);
1029 if (cmd_mem_limit)
1030 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
1031 dt_end_node(dt);
1032
1033 dt_cpus(dt);
1034
1035 dt_vdevices(dt);
1036
1037 dt_end_node(dt);
1038
1039 dt_push_u32(dt, OF_DT_END);
1040 }
1041
1042 void * __init iSeries_early_setup(void)
1043 {
1044 unsigned long phys_mem_size;
1045
1046 iSeries_fixup_klimit();
1047
1048 /*
1049 * Initialize the table which translate Linux physical addresses to
1050 * AS/400 absolute addresses
1051 */
1052 phys_mem_size = build_iSeries_Memory_Map();
1053
1054 iSeries_get_cmdline();
1055
1056 /* Save unparsed command line copy for /proc/cmdline */
1057 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
1058
1059 /* Parse early parameters, in particular mem=x */
1060 parse_early_param();
1061
1062 build_flat_dt(&iseries_dt, phys_mem_size);
1063
1064 return (void *) __pa(&iseries_dt);
1065 }
1066
1067 /*
1068 * On iSeries we just parse the mem=X option from the command line.
1069 * On pSeries it's a bit more complicated, see prom_init_mem()
1070 */
1071 static int __init early_parsemem(char *p)
1072 {
1073 if (p)
1074 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
1075 return 0;
1076 }
1077 early_param("mem", early_parsemem);
1078
1079 static void hvputc(char c)
1080 {
1081 if (c == '\n')
1082 hvputc('\r');
1083
1084 HvCall_writeLogBuffer(&c, 1);
1085 }
1086
1087 void __init udbg_init_iseries(void)
1088 {
1089 udbg_putc = hvputc;
1090 }
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