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Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
[deliverable/linux.git] / arch / powerpc / platforms / iseries / setup.c
1 /*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4 *
5 * Description:
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9 * <dan@net4x.com>.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17 #undef DEBUG
18
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/initrd.h>
26 #include <linux/seq_file.h>
27 #include <linux/kdev_t.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30 #include <linux/kernel.h>
31
32 #include <asm/processor.h>
33 #include <asm/machdep.h>
34 #include <asm/page.h>
35 #include <asm/mmu.h>
36 #include <asm/pgtable.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
39 #include <asm/sections.h>
40 #include <asm/iommu.h>
41 #include <asm/firmware.h>
42 #include <asm/system.h>
43 #include <asm/time.h>
44 #include <asm/paca.h>
45 #include <asm/cache.h>
46 #include <asm/sections.h>
47 #include <asm/abs_addr.h>
48 #include <asm/iseries/hv_lp_config.h>
49 #include <asm/iseries/hv_call_event.h>
50 #include <asm/iseries/hv_call_xm.h>
51 #include <asm/iseries/it_lp_queue.h>
52 #include <asm/iseries/mf.h>
53 #include <asm/iseries/hv_lp_event.h>
54 #include <asm/iseries/lpar_map.h>
55 #include <asm/udbg.h>
56 #include <asm/irq.h>
57
58 #include "naca.h"
59 #include "setup.h"
60 #include "irq.h"
61 #include "vpd_areas.h"
62 #include "processor_vpd.h"
63 #include "main_store.h"
64 #include "call_sm.h"
65 #include "call_hpt.h"
66
67 #ifdef DEBUG
68 #define DBG(fmt...) udbg_printf(fmt)
69 #else
70 #define DBG(fmt...)
71 #endif
72
73 /* Function Prototypes */
74 static unsigned long build_iSeries_Memory_Map(void);
75 static void iseries_shared_idle(void);
76 static void iseries_dedicated_idle(void);
77 #ifdef CONFIG_PCI
78 extern void iSeries_pci_final_fixup(void);
79 #else
80 static void iSeries_pci_final_fixup(void) { }
81 #endif
82
83 extern int rd_size; /* Defined in drivers/block/rd.c */
84 extern unsigned long embedded_sysmap_start;
85 extern unsigned long embedded_sysmap_end;
86
87 extern unsigned long iSeries_recal_tb;
88 extern unsigned long iSeries_recal_titan;
89
90 struct MemoryBlock {
91 unsigned long absStart;
92 unsigned long absEnd;
93 unsigned long logicalStart;
94 unsigned long logicalEnd;
95 };
96
97 /*
98 * Process the main store vpd to determine where the holes in memory are
99 * and return the number of physical blocks and fill in the array of
100 * block data.
101 */
102 static unsigned long iSeries_process_Condor_mainstore_vpd(
103 struct MemoryBlock *mb_array, unsigned long max_entries)
104 {
105 unsigned long holeFirstChunk, holeSizeChunks;
106 unsigned long numMemoryBlocks = 1;
107 struct IoHriMainStoreSegment4 *msVpd =
108 (struct IoHriMainStoreSegment4 *)xMsVpd;
109 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
110 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
111 unsigned long holeSize = holeEnd - holeStart;
112
113 printk("Mainstore_VPD: Condor\n");
114 /*
115 * Determine if absolute memory has any
116 * holes so that we can interpret the
117 * access map we get back from the hypervisor
118 * correctly.
119 */
120 mb_array[0].logicalStart = 0;
121 mb_array[0].logicalEnd = 0x100000000;
122 mb_array[0].absStart = 0;
123 mb_array[0].absEnd = 0x100000000;
124
125 if (holeSize) {
126 numMemoryBlocks = 2;
127 holeStart = holeStart & 0x000fffffffffffff;
128 holeStart = addr_to_chunk(holeStart);
129 holeFirstChunk = holeStart;
130 holeSize = addr_to_chunk(holeSize);
131 holeSizeChunks = holeSize;
132 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
133 holeFirstChunk, holeSizeChunks );
134 mb_array[0].logicalEnd = holeFirstChunk;
135 mb_array[0].absEnd = holeFirstChunk;
136 mb_array[1].logicalStart = holeFirstChunk;
137 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
138 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
139 mb_array[1].absEnd = 0x100000000;
140 }
141 return numMemoryBlocks;
142 }
143
144 #define MaxSegmentAreas 32
145 #define MaxSegmentAdrRangeBlocks 128
146 #define MaxAreaRangeBlocks 4
147
148 static unsigned long iSeries_process_Regatta_mainstore_vpd(
149 struct MemoryBlock *mb_array, unsigned long max_entries)
150 {
151 struct IoHriMainStoreSegment5 *msVpdP =
152 (struct IoHriMainStoreSegment5 *)xMsVpd;
153 unsigned long numSegmentBlocks = 0;
154 u32 existsBits = msVpdP->msAreaExists;
155 unsigned long area_num;
156
157 printk("Mainstore_VPD: Regatta\n");
158
159 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
160 unsigned long numAreaBlocks;
161 struct IoHriMainStoreArea4 *currentArea;
162
163 if (existsBits & 0x80000000) {
164 unsigned long block_num;
165
166 currentArea = &msVpdP->msAreaArray[area_num];
167 numAreaBlocks = currentArea->numAdrRangeBlocks;
168 printk("ms_vpd: processing area %2ld blocks=%ld",
169 area_num, numAreaBlocks);
170 for (block_num = 0; block_num < numAreaBlocks;
171 ++block_num ) {
172 /* Process an address range block */
173 struct MemoryBlock tempBlock;
174 unsigned long i;
175
176 tempBlock.absStart =
177 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
178 tempBlock.absEnd =
179 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
180 tempBlock.logicalStart = 0;
181 tempBlock.logicalEnd = 0;
182 printk("\n block %ld absStart=%016lx absEnd=%016lx",
183 block_num, tempBlock.absStart,
184 tempBlock.absEnd);
185
186 for (i = 0; i < numSegmentBlocks; ++i) {
187 if (mb_array[i].absStart ==
188 tempBlock.absStart)
189 break;
190 }
191 if (i == numSegmentBlocks) {
192 if (numSegmentBlocks == max_entries)
193 panic("iSeries_process_mainstore_vpd: too many memory blocks");
194 mb_array[numSegmentBlocks] = tempBlock;
195 ++numSegmentBlocks;
196 } else
197 printk(" (duplicate)");
198 }
199 printk("\n");
200 }
201 existsBits <<= 1;
202 }
203 /* Now sort the blocks found into ascending sequence */
204 if (numSegmentBlocks > 1) {
205 unsigned long m, n;
206
207 for (m = 0; m < numSegmentBlocks - 1; ++m) {
208 for (n = numSegmentBlocks - 1; m < n; --n) {
209 if (mb_array[n].absStart <
210 mb_array[n-1].absStart) {
211 struct MemoryBlock tempBlock;
212
213 tempBlock = mb_array[n];
214 mb_array[n] = mb_array[n-1];
215 mb_array[n-1] = tempBlock;
216 }
217 }
218 }
219 }
220 /*
221 * Assign "logical" addresses to each block. These
222 * addresses correspond to the hypervisor "bitmap" space.
223 * Convert all addresses into units of 256K chunks.
224 */
225 {
226 unsigned long i, nextBitmapAddress;
227
228 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
229 nextBitmapAddress = 0;
230 for (i = 0; i < numSegmentBlocks; ++i) {
231 unsigned long length = mb_array[i].absEnd -
232 mb_array[i].absStart;
233
234 mb_array[i].logicalStart = nextBitmapAddress;
235 mb_array[i].logicalEnd = nextBitmapAddress + length;
236 nextBitmapAddress += length;
237 printk(" Bitmap range: %016lx - %016lx\n"
238 " Absolute range: %016lx - %016lx\n",
239 mb_array[i].logicalStart,
240 mb_array[i].logicalEnd,
241 mb_array[i].absStart, mb_array[i].absEnd);
242 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
243 0x000fffffffffffff);
244 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
245 0x000fffffffffffff);
246 mb_array[i].logicalStart =
247 addr_to_chunk(mb_array[i].logicalStart);
248 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
249 }
250 }
251
252 return numSegmentBlocks;
253 }
254
255 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
256 unsigned long max_entries)
257 {
258 unsigned long i;
259 unsigned long mem_blocks = 0;
260
261 if (cpu_has_feature(CPU_FTR_SLB))
262 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
263 max_entries);
264 else
265 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
266 max_entries);
267
268 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
269 for (i = 0; i < mem_blocks; ++i) {
270 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
271 " abs chunks %016lx - %016lx\n",
272 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
273 mb_array[i].absStart, mb_array[i].absEnd);
274 }
275 return mem_blocks;
276 }
277
278 static void __init iSeries_get_cmdline(void)
279 {
280 char *p, *q;
281
282 /* copy the command line parameter from the primary VSP */
283 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
284 HvLpDma_Direction_RemoteToLocal);
285
286 p = cmd_line;
287 q = cmd_line + 255;
288 while(p < q) {
289 if (!*p || *p == '\n')
290 break;
291 ++p;
292 }
293 *p = 0;
294 }
295
296 static void __init iSeries_init_early(void)
297 {
298 DBG(" -> iSeries_init_early()\n");
299
300 ppc64_interrupt_controller = IC_ISERIES;
301
302 #if defined(CONFIG_BLK_DEV_INITRD)
303 /*
304 * If the init RAM disk has been configured and there is
305 * a non-zero starting address for it, set it up
306 */
307 if (naca.xRamDisk) {
308 initrd_start = (unsigned long)__va(naca.xRamDisk);
309 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
310 initrd_below_start_ok = 1; // ramdisk in kernel space
311 ROOT_DEV = Root_RAM0;
312 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
313 rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
314 } else
315 #endif /* CONFIG_BLK_DEV_INITRD */
316 {
317 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
318 }
319
320 iSeries_recal_tb = get_tb();
321 iSeries_recal_titan = HvCallXm_loadTod();
322
323 /*
324 * Initialize the hash table management pointers
325 */
326 hpte_init_iSeries();
327
328 /*
329 * Initialize the DMA/TCE management
330 */
331 iommu_init_early_iSeries();
332
333 /* Initialize machine-dependency vectors */
334 #ifdef CONFIG_SMP
335 smp_init_iSeries();
336 #endif
337
338 /* Associate Lp Event Queue 0 with processor 0 */
339 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
340
341 mf_init();
342
343 /* If we were passed an initrd, set the ROOT_DEV properly if the values
344 * look sensible. If not, clear initrd reference.
345 */
346 #ifdef CONFIG_BLK_DEV_INITRD
347 if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
348 initrd_end > initrd_start)
349 ROOT_DEV = Root_RAM0;
350 else
351 initrd_start = initrd_end = 0;
352 #endif /* CONFIG_BLK_DEV_INITRD */
353
354 DBG(" <- iSeries_init_early()\n");
355 }
356
357 struct mschunks_map mschunks_map = {
358 /* XXX We don't use these, but Piranha might need them. */
359 .chunk_size = MSCHUNKS_CHUNK_SIZE,
360 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
361 .chunk_mask = MSCHUNKS_OFFSET_MASK,
362 };
363 EXPORT_SYMBOL(mschunks_map);
364
365 void mschunks_alloc(unsigned long num_chunks)
366 {
367 klimit = _ALIGN(klimit, sizeof(u32));
368 mschunks_map.mapping = (u32 *)klimit;
369 klimit += num_chunks * sizeof(u32);
370 mschunks_map.num_chunks = num_chunks;
371 }
372
373 /*
374 * The iSeries may have very large memories ( > 128 GB ) and a partition
375 * may get memory in "chunks" that may be anywhere in the 2**52 real
376 * address space. The chunks are 256K in size. To map this to the
377 * memory model Linux expects, the AS/400 specific code builds a
378 * translation table to translate what Linux thinks are "physical"
379 * addresses to the actual real addresses. This allows us to make
380 * it appear to Linux that we have contiguous memory starting at
381 * physical address zero while in fact this could be far from the truth.
382 * To avoid confusion, I'll let the words physical and/or real address
383 * apply to the Linux addresses while I'll use "absolute address" to
384 * refer to the actual hardware real address.
385 *
386 * build_iSeries_Memory_Map gets information from the Hypervisor and
387 * looks at the Main Store VPD to determine the absolute addresses
388 * of the memory that has been assigned to our partition and builds
389 * a table used to translate Linux's physical addresses to these
390 * absolute addresses. Absolute addresses are needed when
391 * communicating with the hypervisor (e.g. to build HPT entries)
392 *
393 * Returns the physical memory size
394 */
395
396 static unsigned long __init build_iSeries_Memory_Map(void)
397 {
398 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
399 u32 nextPhysChunk;
400 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
401 u32 totalChunks,moreChunks;
402 u32 currChunk, thisChunk, absChunk;
403 u32 currDword;
404 u32 chunkBit;
405 u64 map;
406 struct MemoryBlock mb[32];
407 unsigned long numMemoryBlocks, curBlock;
408
409 /* Chunk size on iSeries is 256K bytes */
410 totalChunks = (u32)HvLpConfig_getMsChunks();
411 mschunks_alloc(totalChunks);
412
413 /*
414 * Get absolute address of our load area
415 * and map it to physical address 0
416 * This guarantees that the loadarea ends up at physical 0
417 * otherwise, it might not be returned by PLIC as the first
418 * chunks
419 */
420
421 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
422 loadAreaSize = itLpNaca.xLoadAreaChunks;
423
424 /*
425 * Only add the pages already mapped here.
426 * Otherwise we might add the hpt pages
427 * The rest of the pages of the load area
428 * aren't in the HPT yet and can still
429 * be assigned an arbitrary physical address
430 */
431 if ((loadAreaSize * 64) > HvPagesToMap)
432 loadAreaSize = HvPagesToMap / 64;
433
434 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
435
436 /*
437 * TODO Do we need to do something if the HPT is in the 64MB load area?
438 * This would be required if the itLpNaca.xLoadAreaChunks includes
439 * the HPT size
440 */
441
442 printk("Mapping load area - physical addr = 0000000000000000\n"
443 " absolute addr = %016lx\n",
444 chunk_to_addr(loadAreaFirstChunk));
445 printk("Load area size %dK\n", loadAreaSize * 256);
446
447 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
448 mschunks_map.mapping[nextPhysChunk] =
449 loadAreaFirstChunk + nextPhysChunk;
450
451 /*
452 * Get absolute address of our HPT and remember it so
453 * we won't map it to any physical address
454 */
455 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
456 hptSizePages = (u32)HvCallHpt_getHptPages();
457 hptSizeChunks = hptSizePages >>
458 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
459 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
460
461 printk("HPT absolute addr = %016lx, size = %dK\n",
462 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
463
464 /*
465 * Determine if absolute memory has any
466 * holes so that we can interpret the
467 * access map we get back from the hypervisor
468 * correctly.
469 */
470 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
471
472 /*
473 * Process the main store access map from the hypervisor
474 * to build up our physical -> absolute translation table
475 */
476 curBlock = 0;
477 currChunk = 0;
478 currDword = 0;
479 moreChunks = totalChunks;
480
481 while (moreChunks) {
482 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
483 currDword);
484 thisChunk = currChunk;
485 while (map) {
486 chunkBit = map >> 63;
487 map <<= 1;
488 if (chunkBit) {
489 --moreChunks;
490 while (thisChunk >= mb[curBlock].logicalEnd) {
491 ++curBlock;
492 if (curBlock >= numMemoryBlocks)
493 panic("out of memory blocks");
494 }
495 if (thisChunk < mb[curBlock].logicalStart)
496 panic("memory block error");
497
498 absChunk = mb[curBlock].absStart +
499 (thisChunk - mb[curBlock].logicalStart);
500 if (((absChunk < hptFirstChunk) ||
501 (absChunk > hptLastChunk)) &&
502 ((absChunk < loadAreaFirstChunk) ||
503 (absChunk > loadAreaLastChunk))) {
504 mschunks_map.mapping[nextPhysChunk] =
505 absChunk;
506 ++nextPhysChunk;
507 }
508 }
509 ++thisChunk;
510 }
511 ++currDword;
512 currChunk += 64;
513 }
514
515 /*
516 * main store size (in chunks) is
517 * totalChunks - hptSizeChunks
518 * which should be equal to
519 * nextPhysChunk
520 */
521 return chunk_to_addr(nextPhysChunk);
522 }
523
524 /*
525 * Document me.
526 */
527 static void __init iSeries_setup_arch(void)
528 {
529 if (get_lppaca()->shared_proc) {
530 ppc_md.idle_loop = iseries_shared_idle;
531 printk(KERN_DEBUG "Using shared processor idle loop\n");
532 } else {
533 ppc_md.idle_loop = iseries_dedicated_idle;
534 printk(KERN_DEBUG "Using dedicated idle loop\n");
535 }
536
537 /* Setup the Lp Event Queue */
538 setup_hvlpevent_queue();
539
540 printk("Max logical processors = %d\n",
541 itVpdAreas.xSlicMaxLogicalProcs);
542 printk("Max physical processors = %d\n",
543 itVpdAreas.xSlicMaxPhysicalProcs);
544 }
545
546 static void iSeries_show_cpuinfo(struct seq_file *m)
547 {
548 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
549 }
550
551 static void __init iSeries_progress(char * st, unsigned short code)
552 {
553 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
554 mf_display_progress(code);
555 }
556
557 static void __init iSeries_fixup_klimit(void)
558 {
559 /*
560 * Change klimit to take into account any ram disk
561 * that may be included
562 */
563 if (naca.xRamDisk)
564 klimit = KERNELBASE + (u64)naca.xRamDisk +
565 (naca.xRamDiskSize * HW_PAGE_SIZE);
566 else {
567 /*
568 * No ram disk was included - check and see if there
569 * was an embedded system map. Change klimit to take
570 * into account any embedded system map
571 */
572 if (embedded_sysmap_end)
573 klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
574 0xfffffffffffff000);
575 }
576 }
577
578 static int __init iSeries_src_init(void)
579 {
580 /* clear the progress line */
581 ppc_md.progress(" ", 0xffff);
582 return 0;
583 }
584
585 late_initcall(iSeries_src_init);
586
587 static inline void process_iSeries_events(void)
588 {
589 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
590 }
591
592 static void yield_shared_processor(void)
593 {
594 unsigned long tb;
595
596 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
597 HvCall_MaskLpEvent |
598 HvCall_MaskLpProd |
599 HvCall_MaskTimeout);
600
601 tb = get_tb();
602 /* Compute future tb value when yield should expire */
603 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
604
605 /*
606 * The decrementer stops during the yield. Force a fake decrementer
607 * here and let the timer_interrupt code sort out the actual time.
608 */
609 get_lppaca()->int_dword.fields.decr_int = 1;
610 ppc64_runlatch_on();
611 process_iSeries_events();
612 }
613
614 static void iseries_shared_idle(void)
615 {
616 while (1) {
617 while (!need_resched() && !hvlpevent_is_pending()) {
618 local_irq_disable();
619 ppc64_runlatch_off();
620
621 /* Recheck with irqs off */
622 if (!need_resched() && !hvlpevent_is_pending())
623 yield_shared_processor();
624
625 HMT_medium();
626 local_irq_enable();
627 }
628
629 ppc64_runlatch_on();
630
631 if (hvlpevent_is_pending())
632 process_iSeries_events();
633
634 preempt_enable_no_resched();
635 schedule();
636 preempt_disable();
637 }
638 }
639
640 static void iseries_dedicated_idle(void)
641 {
642 set_thread_flag(TIF_POLLING_NRFLAG);
643
644 while (1) {
645 if (!need_resched()) {
646 while (!need_resched()) {
647 ppc64_runlatch_off();
648 HMT_low();
649
650 if (hvlpevent_is_pending()) {
651 HMT_medium();
652 ppc64_runlatch_on();
653 process_iSeries_events();
654 }
655 }
656
657 HMT_medium();
658 }
659
660 ppc64_runlatch_on();
661 preempt_enable_no_resched();
662 schedule();
663 preempt_disable();
664 }
665 }
666
667 #ifndef CONFIG_PCI
668 void __init iSeries_init_IRQ(void) { }
669 #endif
670
671 static int __init iseries_probe(void)
672 {
673 unsigned long root = of_get_flat_dt_root();
674 if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
675 return 0;
676
677 powerpc_firmware_features |= FW_FEATURE_ISERIES;
678 powerpc_firmware_features |= FW_FEATURE_LPAR;
679
680 /*
681 * The Hypervisor only allows us up to 256 interrupt
682 * sources (the irq number is passed in a u8).
683 */
684 virt_irq_max = 255;
685
686 return 1;
687 }
688
689 define_machine(iseries) {
690 .name = "iSeries",
691 .setup_arch = iSeries_setup_arch,
692 .show_cpuinfo = iSeries_show_cpuinfo,
693 .init_IRQ = iSeries_init_IRQ,
694 .get_irq = iSeries_get_irq,
695 .init_early = iSeries_init_early,
696 .pcibios_fixup = iSeries_pci_final_fixup,
697 .restart = mf_reboot,
698 .power_off = mf_power_off,
699 .halt = mf_power_off,
700 .get_boot_time = iSeries_get_boot_time,
701 .set_rtc_time = iSeries_set_rtc_time,
702 .get_rtc_time = iSeries_get_rtc_time,
703 .calibrate_decr = generic_calibrate_decr,
704 .progress = iSeries_progress,
705 .probe = iseries_probe,
706 /* XXX Implement enable_pmcs for iSeries */
707 };
708
709 void * __init iSeries_early_setup(void)
710 {
711 unsigned long phys_mem_size;
712
713 iSeries_fixup_klimit();
714
715 /*
716 * Initialize the table which translate Linux physical addresses to
717 * AS/400 absolute addresses
718 */
719 phys_mem_size = build_iSeries_Memory_Map();
720
721 iSeries_get_cmdline();
722
723 return (void *) __pa(build_flat_dt(phys_mem_size));
724 }
725
726 static void hvputc(char c)
727 {
728 if (c == '\n')
729 hvputc('\r');
730
731 HvCall_writeLogBuffer(&c, 1);
732 }
733
734 void __init udbg_init_iseries(void)
735 {
736 udbg_putc = hvputc;
737 }
Linux kernel - Deliverables
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