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powerpc/pmac: Fix issues with sleep on some powerbooks
[deliverable/linux.git] / arch / powerpc / platforms / powermac / low_i2c.c
1 /*
2 * arch/powerpc/platforms/powermac/low_i2c.c
3 *
4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * The linux i2c layer isn't completely suitable for our needs for various
12 * reasons ranging from too late initialisation to semantics not perfectly
13 * matching some requirements of the apple platform functions etc...
14 *
15 * This file thus provides a simple low level unified i2c interface for
16 * powermac that covers the various types of i2c busses used in Apple machines.
17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18 * banging busses found on older chipstes in earlier machines if we ever need
19 * one of them.
20 *
21 * The drivers in this file are synchronous/blocking. In addition, the
22 * keywest one is fairly slow due to the use of msleep instead of interrupts
23 * as the interrupt is currently used by i2c-keywest. In the long run, we
24 * might want to get rid of those high-level interfaces to linux i2c layer
25 * either completely (converting all drivers) or replacing them all with a
26 * single stub driver on top of this one. Once done, the interrupt will be
27 * available for our use.
28 */
29
30 #undef DEBUG
31 #undef DEBUG_LOW
32
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/module.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/timer.h>
44 #include <linux/mutex.h>
45 #include <asm/keylargo.h>
46 #include <asm/uninorth.h>
47 #include <asm/io.h>
48 #include <asm/prom.h>
49 #include <asm/machdep.h>
50 #include <asm/smu.h>
51 #include <asm/pmac_pfunc.h>
52 #include <asm/pmac_low_i2c.h>
53
54 #ifdef DEBUG
55 #define DBG(x...) do {\
56 printk(KERN_DEBUG "low_i2c:" x); \
57 } while(0)
58 #else
59 #define DBG(x...)
60 #endif
61
62 #ifdef DEBUG_LOW
63 #define DBG_LOW(x...) do {\
64 printk(KERN_DEBUG "low_i2c:" x); \
65 } while(0)
66 #else
67 #define DBG_LOW(x...)
68 #endif
69
70
71 static int pmac_i2c_force_poll = 1;
72
73 /*
74 * A bus structure. Each bus in the system has such a structure associated.
75 */
76 struct pmac_i2c_bus
77 {
78 struct list_head link;
79 struct device_node *controller;
80 struct device_node *busnode;
81 int type;
82 int flags;
83 struct i2c_adapter *adapter;
84 void *hostdata;
85 int channel; /* some hosts have multiple */
86 int mode; /* current mode */
87 struct mutex mutex;
88 int opened;
89 int polled; /* open mode */
90 struct platform_device *platform_dev;
91
92 /* ops */
93 int (*open)(struct pmac_i2c_bus *bus);
94 void (*close)(struct pmac_i2c_bus *bus);
95 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
96 u32 subaddr, u8 *data, int len);
97 };
98
99 static LIST_HEAD(pmac_i2c_busses);
100
101 /*
102 * Keywest implementation
103 */
104
105 struct pmac_i2c_host_kw
106 {
107 struct mutex mutex; /* Access mutex for use by
108 * i2c-keywest */
109 void __iomem *base; /* register base address */
110 int bsteps; /* register stepping */
111 int speed; /* speed */
112 int irq;
113 u8 *data;
114 unsigned len;
115 int state;
116 int rw;
117 int polled;
118 int result;
119 struct completion complete;
120 spinlock_t lock;
121 struct timer_list timeout_timer;
122 };
123
124 /* Register indices */
125 typedef enum {
126 reg_mode = 0,
127 reg_control,
128 reg_status,
129 reg_isr,
130 reg_ier,
131 reg_addr,
132 reg_subaddr,
133 reg_data
134 } reg_t;
135
136 /* The Tumbler audio equalizer can be really slow sometimes */
137 #define KW_POLL_TIMEOUT (2*HZ)
138
139 /* Mode register */
140 #define KW_I2C_MODE_100KHZ 0x00
141 #define KW_I2C_MODE_50KHZ 0x01
142 #define KW_I2C_MODE_25KHZ 0x02
143 #define KW_I2C_MODE_DUMB 0x00
144 #define KW_I2C_MODE_STANDARD 0x04
145 #define KW_I2C_MODE_STANDARDSUB 0x08
146 #define KW_I2C_MODE_COMBINED 0x0C
147 #define KW_I2C_MODE_MODE_MASK 0x0C
148 #define KW_I2C_MODE_CHAN_MASK 0xF0
149
150 /* Control register */
151 #define KW_I2C_CTL_AAK 0x01
152 #define KW_I2C_CTL_XADDR 0x02
153 #define KW_I2C_CTL_STOP 0x04
154 #define KW_I2C_CTL_START 0x08
155
156 /* Status register */
157 #define KW_I2C_STAT_BUSY 0x01
158 #define KW_I2C_STAT_LAST_AAK 0x02
159 #define KW_I2C_STAT_LAST_RW 0x04
160 #define KW_I2C_STAT_SDA 0x08
161 #define KW_I2C_STAT_SCL 0x10
162
163 /* IER & ISR registers */
164 #define KW_I2C_IRQ_DATA 0x01
165 #define KW_I2C_IRQ_ADDR 0x02
166 #define KW_I2C_IRQ_STOP 0x04
167 #define KW_I2C_IRQ_START 0x08
168 #define KW_I2C_IRQ_MASK 0x0F
169
170 /* State machine states */
171 enum {
172 state_idle,
173 state_addr,
174 state_read,
175 state_write,
176 state_stop,
177 state_dead
178 };
179
180 #define WRONG_STATE(name) do {\
181 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
182 "(isr: %02x)\n", \
183 name, __kw_state_names[host->state], isr); \
184 } while(0)
185
186 static const char *__kw_state_names[] = {
187 "state_idle",
188 "state_addr",
189 "state_read",
190 "state_write",
191 "state_stop",
192 "state_dead"
193 };
194
195 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
196 {
197 return readb(host->base + (((unsigned int)reg) << host->bsteps));
198 }
199
200 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
201 reg_t reg, u8 val)
202 {
203 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
204 (void)__kw_read_reg(host, reg_subaddr);
205 }
206
207 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
208 #define kw_read_reg(reg) __kw_read_reg(host, reg)
209
210 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
211 {
212 int i, j;
213 u8 isr;
214
215 for (i = 0; i < 1000; i++) {
216 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
217 if (isr != 0)
218 return isr;
219
220 /* This code is used with the timebase frozen, we cannot rely
221 * on udelay nor schedule when in polled mode !
222 * For now, just use a bogus loop....
223 */
224 if (host->polled) {
225 for (j = 1; j < 100000; j++)
226 mb();
227 } else
228 msleep(1);
229 }
230 return isr;
231 }
232
233 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
234 {
235 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
236 host->state = state_stop;
237 host->result = result;
238 }
239
240
241 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
242 {
243 u8 ack;
244
245 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
246 __kw_state_names[host->state], isr);
247
248 if (host->state == state_idle) {
249 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
250 " interrupt, ignoring\n");
251 kw_write_reg(reg_isr, isr);
252 return;
253 }
254
255 if (isr == 0) {
256 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
257 " on keywest !\n");
258 if (host->state != state_stop) {
259 kw_i2c_do_stop(host, -EIO);
260 return;
261 }
262 ack = kw_read_reg(reg_status);
263 if (ack & KW_I2C_STAT_BUSY)
264 kw_write_reg(reg_status, 0);
265 host->state = state_idle;
266 kw_write_reg(reg_ier, 0x00);
267 if (!host->polled)
268 complete(&host->complete);
269 return;
270 }
271
272 if (isr & KW_I2C_IRQ_ADDR) {
273 ack = kw_read_reg(reg_status);
274 if (host->state != state_addr) {
275 WRONG_STATE("KW_I2C_IRQ_ADDR");
276 kw_i2c_do_stop(host, -EIO);
277 }
278 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
279 host->result = -ENXIO;
280 host->state = state_stop;
281 DBG_LOW("KW: NAK on address\n");
282 } else {
283 if (host->len == 0)
284 kw_i2c_do_stop(host, 0);
285 else if (host->rw) {
286 host->state = state_read;
287 if (host->len > 1)
288 kw_write_reg(reg_control,
289 KW_I2C_CTL_AAK);
290 } else {
291 host->state = state_write;
292 kw_write_reg(reg_data, *(host->data++));
293 host->len--;
294 }
295 }
296 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
297 }
298
299 if (isr & KW_I2C_IRQ_DATA) {
300 if (host->state == state_read) {
301 *(host->data++) = kw_read_reg(reg_data);
302 host->len--;
303 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
304 if (host->len == 0)
305 host->state = state_stop;
306 else if (host->len == 1)
307 kw_write_reg(reg_control, 0);
308 } else if (host->state == state_write) {
309 ack = kw_read_reg(reg_status);
310 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
311 DBG_LOW("KW: nack on data write\n");
312 host->result = -EFBIG;
313 host->state = state_stop;
314 } else if (host->len) {
315 kw_write_reg(reg_data, *(host->data++));
316 host->len--;
317 } else
318 kw_i2c_do_stop(host, 0);
319 } else {
320 WRONG_STATE("KW_I2C_IRQ_DATA");
321 if (host->state != state_stop)
322 kw_i2c_do_stop(host, -EIO);
323 }
324 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
325 }
326
327 if (isr & KW_I2C_IRQ_STOP) {
328 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
329 if (host->state != state_stop) {
330 WRONG_STATE("KW_I2C_IRQ_STOP");
331 host->result = -EIO;
332 }
333 host->state = state_idle;
334 if (!host->polled)
335 complete(&host->complete);
336 }
337
338 /* Below should only happen in manual mode which we don't use ... */
339 if (isr & KW_I2C_IRQ_START)
340 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
341
342 }
343
344 /* Interrupt handler */
345 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
346 {
347 struct pmac_i2c_host_kw *host = dev_id;
348 unsigned long flags;
349
350 spin_lock_irqsave(&host->lock, flags);
351 del_timer(&host->timeout_timer);
352 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
353 if (host->state != state_idle) {
354 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
355 add_timer(&host->timeout_timer);
356 }
357 spin_unlock_irqrestore(&host->lock, flags);
358 return IRQ_HANDLED;
359 }
360
361 static void kw_i2c_timeout(unsigned long data)
362 {
363 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
364 unsigned long flags;
365
366 spin_lock_irqsave(&host->lock, flags);
367 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
368 if (host->state != state_idle) {
369 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
370 add_timer(&host->timeout_timer);
371 }
372 spin_unlock_irqrestore(&host->lock, flags);
373 }
374
375 static int kw_i2c_open(struct pmac_i2c_bus *bus)
376 {
377 struct pmac_i2c_host_kw *host = bus->hostdata;
378 mutex_lock(&host->mutex);
379 return 0;
380 }
381
382 static void kw_i2c_close(struct pmac_i2c_bus *bus)
383 {
384 struct pmac_i2c_host_kw *host = bus->hostdata;
385 mutex_unlock(&host->mutex);
386 }
387
388 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
389 u32 subaddr, u8 *data, int len)
390 {
391 struct pmac_i2c_host_kw *host = bus->hostdata;
392 u8 mode_reg = host->speed;
393 int use_irq = host->irq != NO_IRQ && !bus->polled;
394
395 /* Setup mode & subaddress if any */
396 switch(bus->mode) {
397 case pmac_i2c_mode_dumb:
398 return -EINVAL;
399 case pmac_i2c_mode_std:
400 mode_reg |= KW_I2C_MODE_STANDARD;
401 if (subsize != 0)
402 return -EINVAL;
403 break;
404 case pmac_i2c_mode_stdsub:
405 mode_reg |= KW_I2C_MODE_STANDARDSUB;
406 if (subsize != 1)
407 return -EINVAL;
408 break;
409 case pmac_i2c_mode_combined:
410 mode_reg |= KW_I2C_MODE_COMBINED;
411 if (subsize != 1)
412 return -EINVAL;
413 break;
414 }
415
416 /* Setup channel & clear pending irqs */
417 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
418 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
419 kw_write_reg(reg_status, 0);
420
421 /* Set up address and r/w bit, strip possible stale bus number from
422 * address top bits
423 */
424 kw_write_reg(reg_addr, addrdir & 0xff);
425
426 /* Set up the sub address */
427 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
428 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
429 kw_write_reg(reg_subaddr, subaddr);
430
431 /* Prepare for async operations */
432 host->data = data;
433 host->len = len;
434 host->state = state_addr;
435 host->result = 0;
436 host->rw = (addrdir & 1);
437 host->polled = bus->polled;
438
439 /* Enable interrupt if not using polled mode and interrupt is
440 * available
441 */
442 if (use_irq) {
443 /* Clear completion */
444 INIT_COMPLETION(host->complete);
445 /* Ack stale interrupts */
446 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
447 /* Arm timeout */
448 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
449 add_timer(&host->timeout_timer);
450 /* Enable emission */
451 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
452 }
453
454 /* Start sending address */
455 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
456
457 /* Wait for completion */
458 if (use_irq)
459 wait_for_completion(&host->complete);
460 else {
461 while(host->state != state_idle) {
462 unsigned long flags;
463
464 u8 isr = kw_i2c_wait_interrupt(host);
465 spin_lock_irqsave(&host->lock, flags);
466 kw_i2c_handle_interrupt(host, isr);
467 spin_unlock_irqrestore(&host->lock, flags);
468 }
469 }
470
471 /* Disable emission */
472 kw_write_reg(reg_ier, 0);
473
474 return host->result;
475 }
476
477 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
478 {
479 struct pmac_i2c_host_kw *host;
480 const u32 *psteps, *prate, *addrp;
481 u32 steps;
482
483 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
484 if (host == NULL) {
485 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
486 np->full_name);
487 return NULL;
488 }
489
490 /* Apple is kind enough to provide a valid AAPL,address property
491 * on all i2c keywest nodes so far ... we would have to fallback
492 * to macio parsing if that wasn't the case
493 */
494 addrp = of_get_property(np, "AAPL,address", NULL);
495 if (addrp == NULL) {
496 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
497 np->full_name);
498 kfree(host);
499 return NULL;
500 }
501 mutex_init(&host->mutex);
502 init_completion(&host->complete);
503 spin_lock_init(&host->lock);
504 init_timer(&host->timeout_timer);
505 host->timeout_timer.function = kw_i2c_timeout;
506 host->timeout_timer.data = (unsigned long)host;
507
508 psteps = of_get_property(np, "AAPL,address-step", NULL);
509 steps = psteps ? (*psteps) : 0x10;
510 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
511 steps >>= 1;
512 /* Select interface rate */
513 host->speed = KW_I2C_MODE_25KHZ;
514 prate = of_get_property(np, "AAPL,i2c-rate", NULL);
515 if (prate) switch(*prate) {
516 case 100:
517 host->speed = KW_I2C_MODE_100KHZ;
518 break;
519 case 50:
520 host->speed = KW_I2C_MODE_50KHZ;
521 break;
522 case 25:
523 host->speed = KW_I2C_MODE_25KHZ;
524 break;
525 }
526 host->irq = irq_of_parse_and_map(np, 0);
527 if (host->irq == NO_IRQ)
528 printk(KERN_WARNING
529 "low_i2c: Failed to map interrupt for %s\n",
530 np->full_name);
531
532 host->base = ioremap((*addrp), 0x1000);
533 if (host->base == NULL) {
534 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
535 np->full_name);
536 kfree(host);
537 return NULL;
538 }
539
540 /* Make sure IRQ is disabled */
541 kw_write_reg(reg_ier, 0);
542
543 /* Request chip interrupt. We set IRQF_TIMER because we don't
544 * want that interrupt disabled between the 2 passes of driver
545 * suspend or we'll have issues running the pfuncs
546 */
547 if (request_irq(host->irq, kw_i2c_irq, IRQF_TIMER, "keywest i2c", host))
548 host->irq = NO_IRQ;
549
550 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
551 *addrp, host->irq, np->full_name);
552
553 return host;
554 }
555
556
557 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
558 struct device_node *controller,
559 struct device_node *busnode,
560 int channel)
561 {
562 struct pmac_i2c_bus *bus;
563
564 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
565 if (bus == NULL)
566 return;
567
568 bus->controller = of_node_get(controller);
569 bus->busnode = of_node_get(busnode);
570 bus->type = pmac_i2c_bus_keywest;
571 bus->hostdata = host;
572 bus->channel = channel;
573 bus->mode = pmac_i2c_mode_std;
574 bus->open = kw_i2c_open;
575 bus->close = kw_i2c_close;
576 bus->xfer = kw_i2c_xfer;
577 mutex_init(&bus->mutex);
578 if (controller == busnode)
579 bus->flags = pmac_i2c_multibus;
580 list_add(&bus->link, &pmac_i2c_busses);
581
582 printk(KERN_INFO " channel %d bus %s\n", channel,
583 (controller == busnode) ? "<multibus>" : busnode->full_name);
584 }
585
586 static void __init kw_i2c_probe(void)
587 {
588 struct device_node *np, *child, *parent;
589
590 /* Probe keywest-i2c busses */
591 for_each_compatible_node(np, "i2c","keywest-i2c") {
592 struct pmac_i2c_host_kw *host;
593 int multibus, chans, i;
594
595 /* Found one, init a host structure */
596 host = kw_i2c_host_init(np);
597 if (host == NULL)
598 continue;
599
600 /* Now check if we have a multibus setup (old style) or if we
601 * have proper bus nodes. Note that the "new" way (proper bus
602 * nodes) might cause us to not create some busses that are
603 * kept hidden in the device-tree. In the future, we might
604 * want to work around that by creating busses without a node
605 * but not for now
606 */
607 child = of_get_next_child(np, NULL);
608 multibus = !child || strcmp(child->name, "i2c-bus");
609 of_node_put(child);
610
611 /* For a multibus setup, we get the bus count based on the
612 * parent type
613 */
614 if (multibus) {
615 parent = of_get_parent(np);
616 if (parent == NULL)
617 continue;
618 chans = parent->name[0] == 'u' ? 2 : 1;
619 for (i = 0; i < chans; i++)
620 kw_i2c_add(host, np, np, i);
621 } else {
622 for (child = NULL;
623 (child = of_get_next_child(np, child)) != NULL;) {
624 const u32 *reg = of_get_property(child,
625 "reg", NULL);
626 if (reg == NULL)
627 continue;
628 kw_i2c_add(host, np, child, *reg);
629 }
630 }
631 }
632 }
633
634
635 /*
636 *
637 * PMU implementation
638 *
639 */
640
641 #ifdef CONFIG_ADB_PMU
642
643 /*
644 * i2c command block to the PMU
645 */
646 struct pmu_i2c_hdr {
647 u8 bus;
648 u8 mode;
649 u8 bus2;
650 u8 address;
651 u8 sub_addr;
652 u8 comb_addr;
653 u8 count;
654 u8 data[];
655 };
656
657 static void pmu_i2c_complete(struct adb_request *req)
658 {
659 complete(req->arg);
660 }
661
662 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
663 u32 subaddr, u8 *data, int len)
664 {
665 struct adb_request *req = bus->hostdata;
666 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
667 struct completion comp;
668 int read = addrdir & 1;
669 int retry;
670 int rc = 0;
671
672 /* For now, limit ourselves to 16 bytes transfers */
673 if (len > 16)
674 return -EINVAL;
675
676 init_completion(&comp);
677
678 for (retry = 0; retry < 16; retry++) {
679 memset(req, 0, sizeof(struct adb_request));
680 hdr->bus = bus->channel;
681 hdr->count = len;
682
683 switch(bus->mode) {
684 case pmac_i2c_mode_std:
685 if (subsize != 0)
686 return -EINVAL;
687 hdr->address = addrdir;
688 hdr->mode = PMU_I2C_MODE_SIMPLE;
689 break;
690 case pmac_i2c_mode_stdsub:
691 case pmac_i2c_mode_combined:
692 if (subsize != 1)
693 return -EINVAL;
694 hdr->address = addrdir & 0xfe;
695 hdr->comb_addr = addrdir;
696 hdr->sub_addr = subaddr;
697 if (bus->mode == pmac_i2c_mode_stdsub)
698 hdr->mode = PMU_I2C_MODE_STDSUB;
699 else
700 hdr->mode = PMU_I2C_MODE_COMBINED;
701 break;
702 default:
703 return -EINVAL;
704 }
705
706 INIT_COMPLETION(comp);
707 req->data[0] = PMU_I2C_CMD;
708 req->reply[0] = 0xff;
709 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
710 req->done = pmu_i2c_complete;
711 req->arg = &comp;
712 if (!read && len) {
713 memcpy(hdr->data, data, len);
714 req->nbytes += len;
715 }
716 rc = pmu_queue_request(req);
717 if (rc)
718 return rc;
719 wait_for_completion(&comp);
720 if (req->reply[0] == PMU_I2C_STATUS_OK)
721 break;
722 msleep(15);
723 }
724 if (req->reply[0] != PMU_I2C_STATUS_OK)
725 return -EIO;
726
727 for (retry = 0; retry < 16; retry++) {
728 memset(req, 0, sizeof(struct adb_request));
729
730 /* I know that looks like a lot, slow as hell, but darwin
731 * does it so let's be on the safe side for now
732 */
733 msleep(15);
734
735 hdr->bus = PMU_I2C_BUS_STATUS;
736
737 INIT_COMPLETION(comp);
738 req->data[0] = PMU_I2C_CMD;
739 req->reply[0] = 0xff;
740 req->nbytes = 2;
741 req->done = pmu_i2c_complete;
742 req->arg = &comp;
743 rc = pmu_queue_request(req);
744 if (rc)
745 return rc;
746 wait_for_completion(&comp);
747
748 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
749 return 0;
750 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
751 int rlen = req->reply_len - 1;
752
753 if (rlen != len) {
754 printk(KERN_WARNING "low_i2c: PMU returned %d"
755 " bytes, expected %d !\n", rlen, len);
756 return -EIO;
757 }
758 if (len)
759 memcpy(data, &req->reply[1], len);
760 return 0;
761 }
762 }
763 return -EIO;
764 }
765
766 static void __init pmu_i2c_probe(void)
767 {
768 struct pmac_i2c_bus *bus;
769 struct device_node *busnode;
770 int channel, sz;
771
772 if (!pmu_present())
773 return;
774
775 /* There might or might not be a "pmu-i2c" node, we use that
776 * or via-pmu itself, whatever we find. I haven't seen a machine
777 * with separate bus nodes, so we assume a multibus setup
778 */
779 busnode = of_find_node_by_name(NULL, "pmu-i2c");
780 if (busnode == NULL)
781 busnode = of_find_node_by_name(NULL, "via-pmu");
782 if (busnode == NULL)
783 return;
784
785 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
786
787 /*
788 * We add bus 1 and 2 only for now, bus 0 is "special"
789 */
790 for (channel = 1; channel <= 2; channel++) {
791 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
792 bus = kzalloc(sz, GFP_KERNEL);
793 if (bus == NULL)
794 return;
795
796 bus->controller = busnode;
797 bus->busnode = busnode;
798 bus->type = pmac_i2c_bus_pmu;
799 bus->channel = channel;
800 bus->mode = pmac_i2c_mode_std;
801 bus->hostdata = bus + 1;
802 bus->xfer = pmu_i2c_xfer;
803 mutex_init(&bus->mutex);
804 bus->flags = pmac_i2c_multibus;
805 list_add(&bus->link, &pmac_i2c_busses);
806
807 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
808 }
809 }
810
811 #endif /* CONFIG_ADB_PMU */
812
813
814 /*
815 *
816 * SMU implementation
817 *
818 */
819
820 #ifdef CONFIG_PMAC_SMU
821
822 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
823 {
824 complete(misc);
825 }
826
827 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
828 u32 subaddr, u8 *data, int len)
829 {
830 struct smu_i2c_cmd *cmd = bus->hostdata;
831 struct completion comp;
832 int read = addrdir & 1;
833 int rc = 0;
834
835 if ((read && len > SMU_I2C_READ_MAX) ||
836 ((!read) && len > SMU_I2C_WRITE_MAX))
837 return -EINVAL;
838
839 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
840 cmd->info.bus = bus->channel;
841 cmd->info.devaddr = addrdir;
842 cmd->info.datalen = len;
843
844 switch(bus->mode) {
845 case pmac_i2c_mode_std:
846 if (subsize != 0)
847 return -EINVAL;
848 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
849 break;
850 case pmac_i2c_mode_stdsub:
851 case pmac_i2c_mode_combined:
852 if (subsize > 3 || subsize < 1)
853 return -EINVAL;
854 cmd->info.sublen = subsize;
855 /* that's big-endian only but heh ! */
856 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
857 subsize);
858 if (bus->mode == pmac_i2c_mode_stdsub)
859 cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
860 else
861 cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
862 break;
863 default:
864 return -EINVAL;
865 }
866 if (!read && len)
867 memcpy(cmd->info.data, data, len);
868
869 init_completion(&comp);
870 cmd->done = smu_i2c_complete;
871 cmd->misc = &comp;
872 rc = smu_queue_i2c(cmd);
873 if (rc < 0)
874 return rc;
875 wait_for_completion(&comp);
876 rc = cmd->status;
877
878 if (read && len)
879 memcpy(data, cmd->info.data, len);
880 return rc < 0 ? rc : 0;
881 }
882
883 static void __init smu_i2c_probe(void)
884 {
885 struct device_node *controller, *busnode;
886 struct pmac_i2c_bus *bus;
887 const u32 *reg;
888 int sz;
889
890 if (!smu_present())
891 return;
892
893 controller = of_find_node_by_name(NULL, "smu-i2c-control");
894 if (controller == NULL)
895 controller = of_find_node_by_name(NULL, "smu");
896 if (controller == NULL)
897 return;
898
899 printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
900
901 /* Look for childs, note that they might not be of the right
902 * type as older device trees mix i2c busses and other thigns
903 * at the same level
904 */
905 for (busnode = NULL;
906 (busnode = of_get_next_child(controller, busnode)) != NULL;) {
907 if (strcmp(busnode->type, "i2c") &&
908 strcmp(busnode->type, "i2c-bus"))
909 continue;
910 reg = of_get_property(busnode, "reg", NULL);
911 if (reg == NULL)
912 continue;
913
914 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
915 bus = kzalloc(sz, GFP_KERNEL);
916 if (bus == NULL)
917 return;
918
919 bus->controller = controller;
920 bus->busnode = of_node_get(busnode);
921 bus->type = pmac_i2c_bus_smu;
922 bus->channel = *reg;
923 bus->mode = pmac_i2c_mode_std;
924 bus->hostdata = bus + 1;
925 bus->xfer = smu_i2c_xfer;
926 mutex_init(&bus->mutex);
927 bus->flags = 0;
928 list_add(&bus->link, &pmac_i2c_busses);
929
930 printk(KERN_INFO " channel %x bus %s\n",
931 bus->channel, busnode->full_name);
932 }
933 }
934
935 #endif /* CONFIG_PMAC_SMU */
936
937 /*
938 *
939 * Core code
940 *
941 */
942
943
944 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
945 {
946 struct device_node *p = of_node_get(node);
947 struct device_node *prev = NULL;
948 struct pmac_i2c_bus *bus;
949
950 while(p) {
951 list_for_each_entry(bus, &pmac_i2c_busses, link) {
952 if (p == bus->busnode) {
953 if (prev && bus->flags & pmac_i2c_multibus) {
954 const u32 *reg;
955 reg = of_get_property(prev, "reg",
956 NULL);
957 if (!reg)
958 continue;
959 if (((*reg) >> 8) != bus->channel)
960 continue;
961 }
962 of_node_put(p);
963 of_node_put(prev);
964 return bus;
965 }
966 }
967 of_node_put(prev);
968 prev = p;
969 p = of_get_parent(p);
970 }
971 return NULL;
972 }
973 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
974
975 u8 pmac_i2c_get_dev_addr(struct device_node *device)
976 {
977 const u32 *reg = of_get_property(device, "reg", NULL);
978
979 if (reg == NULL)
980 return 0;
981
982 return (*reg) & 0xff;
983 }
984 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
985
986 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
987 {
988 return bus->controller;
989 }
990 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
991
992 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
993 {
994 return bus->busnode;
995 }
996 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
997
998 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
999 {
1000 return bus->type;
1001 }
1002 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1003
1004 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1005 {
1006 return bus->flags;
1007 }
1008 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1009
1010 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1011 {
1012 return bus->channel;
1013 }
1014 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1015
1016
1017 void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus,
1018 struct i2c_adapter *adapter)
1019 {
1020 WARN_ON(bus->adapter != NULL);
1021 bus->adapter = adapter;
1022 }
1023 EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter);
1024
1025 void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus,
1026 struct i2c_adapter *adapter)
1027 {
1028 WARN_ON(bus->adapter != adapter);
1029 bus->adapter = NULL;
1030 }
1031 EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter);
1032
1033 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1034 {
1035 return bus->adapter;
1036 }
1037 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1038
1039 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1040 {
1041 struct pmac_i2c_bus *bus;
1042
1043 list_for_each_entry(bus, &pmac_i2c_busses, link)
1044 if (bus->adapter == adapter)
1045 return bus;
1046 return NULL;
1047 }
1048 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1049
1050 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1051 {
1052 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1053
1054 if (bus == NULL)
1055 return 0;
1056 return (bus->adapter == adapter);
1057 }
1058 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1059
1060 int pmac_low_i2c_lock(struct device_node *np)
1061 {
1062 struct pmac_i2c_bus *bus, *found = NULL;
1063
1064 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1065 if (np == bus->controller) {
1066 found = bus;
1067 break;
1068 }
1069 }
1070 if (!found)
1071 return -ENODEV;
1072 return pmac_i2c_open(bus, 0);
1073 }
1074 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1075
1076 int pmac_low_i2c_unlock(struct device_node *np)
1077 {
1078 struct pmac_i2c_bus *bus, *found = NULL;
1079
1080 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1081 if (np == bus->controller) {
1082 found = bus;
1083 break;
1084 }
1085 }
1086 if (!found)
1087 return -ENODEV;
1088 pmac_i2c_close(bus);
1089 return 0;
1090 }
1091 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1092
1093
1094 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1095 {
1096 int rc;
1097
1098 mutex_lock(&bus->mutex);
1099 bus->polled = polled || pmac_i2c_force_poll;
1100 bus->opened = 1;
1101 bus->mode = pmac_i2c_mode_std;
1102 if (bus->open && (rc = bus->open(bus)) != 0) {
1103 bus->opened = 0;
1104 mutex_unlock(&bus->mutex);
1105 return rc;
1106 }
1107 return 0;
1108 }
1109 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1110
1111 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1112 {
1113 WARN_ON(!bus->opened);
1114 if (bus->close)
1115 bus->close(bus);
1116 bus->opened = 0;
1117 mutex_unlock(&bus->mutex);
1118 }
1119 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1120
1121 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1122 {
1123 WARN_ON(!bus->opened);
1124
1125 /* Report me if you see the error below as there might be a new
1126 * "combined4" mode that I need to implement for the SMU bus
1127 */
1128 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1129 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1130 " bus %s !\n", mode, bus->busnode->full_name);
1131 return -EINVAL;
1132 }
1133 bus->mode = mode;
1134
1135 return 0;
1136 }
1137 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1138
1139 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1140 u32 subaddr, u8 *data, int len)
1141 {
1142 int rc;
1143
1144 WARN_ON(!bus->opened);
1145
1146 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1147 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1148 subaddr, len, bus->busnode->full_name);
1149
1150 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1151
1152 #ifdef DEBUG
1153 if (rc)
1154 DBG("xfer error %d\n", rc);
1155 #endif
1156 return rc;
1157 }
1158 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1159
1160 /* some quirks for platform function decoding */
1161 enum {
1162 pmac_i2c_quirk_invmask = 0x00000001u,
1163 pmac_i2c_quirk_skip = 0x00000002u,
1164 };
1165
1166 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1167 int quirks))
1168 {
1169 struct pmac_i2c_bus *bus;
1170 struct device_node *np;
1171 static struct whitelist_ent {
1172 char *name;
1173 char *compatible;
1174 int quirks;
1175 } whitelist[] = {
1176 /* XXX Study device-tree's & apple drivers are get the quirks
1177 * right !
1178 */
1179 /* Workaround: It seems that running the clockspreading
1180 * properties on the eMac will cause lockups during boot.
1181 * The machine seems to work fine without that. So for now,
1182 * let's make sure i2c-hwclock doesn't match about "imic"
1183 * clocks and we'll figure out if we really need to do
1184 * something special about those later.
1185 */
1186 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1187 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1188 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1189 { "i2c-cpu-voltage", NULL, 0},
1190 { "temp-monitor", NULL, 0 },
1191 { "supply-monitor", NULL, 0 },
1192 { NULL, NULL, 0 },
1193 };
1194
1195 /* Only some devices need to have platform functions instanciated
1196 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1197 * on Xserve, if we ever do a driver for them, will use their own
1198 * platform function instance
1199 */
1200 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1201 for (np = NULL;
1202 (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1203 struct whitelist_ent *p;
1204 /* If multibus, check if device is on that bus */
1205 if (bus->flags & pmac_i2c_multibus)
1206 if (bus != pmac_i2c_find_bus(np))
1207 continue;
1208 for (p = whitelist; p->name != NULL; p++) {
1209 if (strcmp(np->name, p->name))
1210 continue;
1211 if (p->compatible &&
1212 !of_device_is_compatible(np, p->compatible))
1213 continue;
1214 if (p->quirks & pmac_i2c_quirk_skip)
1215 break;
1216 callback(np, p->quirks);
1217 break;
1218 }
1219 }
1220 }
1221 }
1222
1223 #define MAX_I2C_DATA 64
1224
1225 struct pmac_i2c_pf_inst
1226 {
1227 struct pmac_i2c_bus *bus;
1228 u8 addr;
1229 u8 buffer[MAX_I2C_DATA];
1230 u8 scratch[MAX_I2C_DATA];
1231 int bytes;
1232 int quirks;
1233 };
1234
1235 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1236 {
1237 struct pmac_i2c_pf_inst *inst;
1238 struct pmac_i2c_bus *bus;
1239
1240 bus = pmac_i2c_find_bus(func->node);
1241 if (bus == NULL) {
1242 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1243 func->node->full_name);
1244 return NULL;
1245 }
1246 if (pmac_i2c_open(bus, 0)) {
1247 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1248 func->node->full_name);
1249 return NULL;
1250 }
1251
1252 /* XXX might need GFP_ATOMIC when called during the suspend process,
1253 * but then, there are already lots of issues with suspending when
1254 * near OOM that need to be resolved, the allocator itself should
1255 * probably make GFP_NOIO implicit during suspend
1256 */
1257 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1258 if (inst == NULL) {
1259 pmac_i2c_close(bus);
1260 return NULL;
1261 }
1262 inst->bus = bus;
1263 inst->addr = pmac_i2c_get_dev_addr(func->node);
1264 inst->quirks = (int)(long)func->driver_data;
1265 return inst;
1266 }
1267
1268 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1269 {
1270 struct pmac_i2c_pf_inst *inst = instdata;
1271
1272 if (inst == NULL)
1273 return;
1274 pmac_i2c_close(inst->bus);
1275 if (inst)
1276 kfree(inst);
1277 }
1278
1279 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1280 {
1281 struct pmac_i2c_pf_inst *inst = instdata;
1282
1283 inst->bytes = len;
1284 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1285 inst->buffer, len);
1286 }
1287
1288 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1289 {
1290 struct pmac_i2c_pf_inst *inst = instdata;
1291
1292 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1293 (u8 *)data, len);
1294 }
1295
1296 /* This function is used to do the masking & OR'ing for the "rmw" type
1297 * callbacks. Ze should apply the mask and OR in the values in the
1298 * buffer before writing back. The problem is that it seems that
1299 * various darwin drivers implement the mask/or differently, thus
1300 * we need to check the quirks first
1301 */
1302 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1303 u32 len, const u8 *mask, const u8 *val)
1304 {
1305 int i;
1306
1307 if (inst->quirks & pmac_i2c_quirk_invmask) {
1308 for (i = 0; i < len; i ++)
1309 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1310 } else {
1311 for (i = 0; i < len; i ++)
1312 inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1313 | (val[i] & mask[i]);
1314 }
1315 }
1316
1317 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1318 u32 totallen, const u8 *maskdata,
1319 const u8 *valuedata)
1320 {
1321 struct pmac_i2c_pf_inst *inst = instdata;
1322
1323 if (masklen > inst->bytes || valuelen > inst->bytes ||
1324 totallen > inst->bytes || valuelen > masklen)
1325 return -EINVAL;
1326
1327 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1328
1329 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1330 inst->scratch, totallen);
1331 }
1332
1333 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1334 {
1335 struct pmac_i2c_pf_inst *inst = instdata;
1336
1337 inst->bytes = len;
1338 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1339 inst->buffer, len);
1340 }
1341
1342 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1343 const u8 *data)
1344 {
1345 struct pmac_i2c_pf_inst *inst = instdata;
1346
1347 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1348 subaddr, (u8 *)data, len);
1349 }
1350
1351 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1352 {
1353 struct pmac_i2c_pf_inst *inst = instdata;
1354
1355 return pmac_i2c_setmode(inst->bus, mode);
1356 }
1357
1358 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1359 u32 valuelen, u32 totallen, const u8 *maskdata,
1360 const u8 *valuedata)
1361 {
1362 struct pmac_i2c_pf_inst *inst = instdata;
1363
1364 if (masklen > inst->bytes || valuelen > inst->bytes ||
1365 totallen > inst->bytes || valuelen > masklen)
1366 return -EINVAL;
1367
1368 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1369
1370 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1371 subaddr, inst->scratch, totallen);
1372 }
1373
1374 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1375 const u8 *maskdata,
1376 const u8 *valuedata)
1377 {
1378 struct pmac_i2c_pf_inst *inst = instdata;
1379 int i, match;
1380
1381 /* Get return value pointer, it's assumed to be a u32 */
1382 if (!args || !args->count || !args->u[0].p)
1383 return -EINVAL;
1384
1385 /* Check buffer */
1386 if (len > inst->bytes)
1387 return -EINVAL;
1388
1389 for (i = 0, match = 1; match && i < len; i ++)
1390 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1391 match = 0;
1392 *args->u[0].p = match;
1393 return 0;
1394 }
1395
1396 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1397 {
1398 msleep((duration + 999) / 1000);
1399 return 0;
1400 }
1401
1402
1403 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1404 .begin = pmac_i2c_do_begin,
1405 .end = pmac_i2c_do_end,
1406 .read_i2c = pmac_i2c_do_read,
1407 .write_i2c = pmac_i2c_do_write,
1408 .rmw_i2c = pmac_i2c_do_rmw,
1409 .read_i2c_sub = pmac_i2c_do_read_sub,
1410 .write_i2c_sub = pmac_i2c_do_write_sub,
1411 .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
1412 .set_i2c_mode = pmac_i2c_do_set_mode,
1413 .mask_and_compare = pmac_i2c_do_mask_and_comp,
1414 .delay = pmac_i2c_do_delay,
1415 };
1416
1417 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1418 {
1419 DBG("dev_create(%s)\n", np->full_name);
1420
1421 pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1422 (void *)(long)quirks);
1423 }
1424
1425 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1426 {
1427 DBG("dev_create(%s)\n", np->full_name);
1428
1429 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1430 }
1431
1432 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1433 {
1434 DBG("dev_suspend(%s)\n", np->full_name);
1435 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1436 }
1437
1438 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1439 {
1440 DBG("dev_resume(%s)\n", np->full_name);
1441 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1442 }
1443
1444 void pmac_pfunc_i2c_suspend(void)
1445 {
1446 pmac_i2c_devscan(pmac_i2c_dev_suspend);
1447 }
1448
1449 void pmac_pfunc_i2c_resume(void)
1450 {
1451 pmac_i2c_devscan(pmac_i2c_dev_resume);
1452 }
1453
1454 /*
1455 * Initialize us: probe all i2c busses on the machine, instantiate
1456 * busses and platform functions as needed.
1457 */
1458 /* This is non-static as it might be called early by smp code */
1459 int __init pmac_i2c_init(void)
1460 {
1461 static int i2c_inited;
1462
1463 if (i2c_inited)
1464 return 0;
1465 i2c_inited = 1;
1466
1467 /* Probe keywest-i2c busses */
1468 kw_i2c_probe();
1469
1470 #ifdef CONFIG_ADB_PMU
1471 /* Probe PMU i2c busses */
1472 pmu_i2c_probe();
1473 #endif
1474
1475 #ifdef CONFIG_PMAC_SMU
1476 /* Probe SMU i2c busses */
1477 smu_i2c_probe();
1478 #endif
1479
1480 /* Now add plaform functions for some known devices */
1481 pmac_i2c_devscan(pmac_i2c_dev_create);
1482
1483 return 0;
1484 }
1485 machine_arch_initcall(powermac, pmac_i2c_init);
1486
1487 /* Since pmac_i2c_init can be called too early for the platform device
1488 * registration, we need to do it at a later time. In our case, subsys
1489 * happens to fit well, though I agree it's a bit of a hack...
1490 */
1491 static int __init pmac_i2c_create_platform_devices(void)
1492 {
1493 struct pmac_i2c_bus *bus;
1494 int i = 0;
1495
1496 /* In the case where we are initialized from smp_init(), we must
1497 * not use the timer (and thus the irq). It's safe from now on
1498 * though
1499 */
1500 pmac_i2c_force_poll = 0;
1501
1502 /* Create platform devices */
1503 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1504 bus->platform_dev =
1505 platform_device_alloc("i2c-powermac", i++);
1506 if (bus->platform_dev == NULL)
1507 return -ENOMEM;
1508 bus->platform_dev->dev.platform_data = bus;
1509 platform_device_add(bus->platform_dev);
1510 }
1511
1512 /* Now call platform "init" functions */
1513 pmac_i2c_devscan(pmac_i2c_dev_init);
1514
1515 return 0;
1516 }
1517 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
Linux kernel - Deliverables
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