2 * The file intends to implement the platform dependent EEH operations on
3 * powernv platform. Actually, the powernv was created in order to fully
6 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2013.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/atomic.h>
15 #include <linux/delay.h>
16 #include <linux/export.h>
17 #include <linux/init.h>
18 #include <linux/list.h>
19 #include <linux/msi.h>
21 #include <linux/pci.h>
22 #include <linux/proc_fs.h>
23 #include <linux/rbtree.h>
24 #include <linux/sched.h>
25 #include <linux/seq_file.h>
26 #include <linux/spinlock.h>
29 #include <asm/eeh_event.h>
30 #include <asm/firmware.h>
32 #include <asm/iommu.h>
33 #include <asm/machdep.h>
34 #include <asm/msi_bitmap.h>
36 #include <asm/ppc-pci.h>
42 * powernv_eeh_init - EEH platform dependent initialization
44 * EEH platform dependent initialization on powernv
46 static int powernv_eeh_init(void)
48 /* We require OPALv3 */
49 if (!firmware_has_feature(FW_FEATURE_OPALv3
)) {
50 pr_warning("%s: OPALv3 is required !\n", __func__
);
54 /* Set EEH probe mode */
55 eeh_probe_mode_set(EEH_PROBE_MODE_DEV
);
61 * powernv_eeh_post_init - EEH platform dependent post initialization
63 * EEH platform dependent post initialization on powernv. When
64 * the function is called, the EEH PEs and devices should have
65 * been built. If the I/O cache staff has been built, EEH is
66 * ready to supply service.
68 static int powernv_eeh_post_init(void)
70 struct pci_controller
*hose
;
74 list_for_each_entry(hose
, &hose_list
, list_node
) {
75 phb
= hose
->private_data
;
77 if (phb
->eeh_ops
&& phb
->eeh_ops
->post_init
) {
78 ret
= phb
->eeh_ops
->post_init(hose
);
88 * powernv_eeh_dev_probe - Do probe on PCI device
92 * When EEH module is installed during system boot, all PCI devices
93 * are checked one by one to see if it supports EEH. The function
94 * is introduced for the purpose. By default, EEH has been enabled
95 * on all PCI devices. That's to say, we only need do necessary
96 * initialization on the corresponding eeh device and create PE
99 * It's notable that's unsafe to retrieve the EEH device through
100 * the corresponding PCI device. During the PCI device hotplug, which
101 * was possiblly triggered by EEH core, the binding between EEH device
102 * and the PCI device isn't built yet.
104 static int powernv_eeh_dev_probe(struct pci_dev
*dev
, void *flag
)
106 struct pci_controller
*hose
= pci_bus_to_host(dev
->bus
);
107 struct pnv_phb
*phb
= hose
->private_data
;
108 struct device_node
*dn
= pci_device_to_OF_node(dev
);
109 struct eeh_dev
*edev
= of_node_to_eeh_dev(dn
);
112 * When probing the root bridge, which doesn't have any
113 * subordinate PCI devices. We don't have OF node for
114 * the root bridge. So it's not reasonable to continue
120 /* Skip for PCI-ISA bridge */
121 if ((dev
->class >> 8) == PCI_CLASS_BRIDGE_ISA
)
124 /* Initialize eeh device */
125 edev
->class_code
= dev
->class;
127 edev
->config_addr
= ((dev
->bus
->number
<< 8) | dev
->devfn
);
128 edev
->pe_config_addr
= phb
->bdfn_to_pe(phb
, dev
->bus
, dev
->devfn
& 0xff);
131 eeh_add_to_parent_pe(edev
);
134 * Enable EEH explicitly so that we will do EEH check
135 * while accessing I/O stuff
137 * FIXME: Enable that for PHB3 later
139 if (phb
->type
== PNV_PHB_IODA1
)
140 eeh_subsystem_enabled
= 1;
142 /* Save memory bars */
149 * powernv_eeh_set_option - Initialize EEH or MMIO/DMA reenable
151 * @option: operation to be issued
153 * The function is used to control the EEH functionality globally.
154 * Currently, following options are support according to PAPR:
155 * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
157 static int powernv_eeh_set_option(struct eeh_pe
*pe
, int option
)
159 struct pci_controller
*hose
= pe
->phb
;
160 struct pnv_phb
*phb
= hose
->private_data
;
164 * What we need do is pass it down for hardware
165 * implementation to handle it.
167 if (phb
->eeh_ops
&& phb
->eeh_ops
->set_option
)
168 ret
= phb
->eeh_ops
->set_option(pe
, option
);
174 * powernv_eeh_get_pe_addr - Retrieve PE address
177 * Retrieve the PE address according to the given tranditional
178 * PCI BDF (Bus/Device/Function) address.
180 static int powernv_eeh_get_pe_addr(struct eeh_pe
*pe
)
186 * powernv_eeh_get_state - Retrieve PE state
188 * @delay: delay while PE state is temporarily unavailable
190 * Retrieve the state of the specified PE. For IODA-compitable
191 * platform, it should be retrieved from IODA table. Therefore,
192 * we prefer passing down to hardware implementation to handle
195 static int powernv_eeh_get_state(struct eeh_pe
*pe
, int *delay
)
197 struct pci_controller
*hose
= pe
->phb
;
198 struct pnv_phb
*phb
= hose
->private_data
;
199 int ret
= EEH_STATE_NOT_SUPPORT
;
201 if (phb
->eeh_ops
&& phb
->eeh_ops
->get_state
) {
202 ret
= phb
->eeh_ops
->get_state(pe
);
205 * If the PE state is temporarily unavailable,
206 * to inform the EEH core delay for default
211 if (ret
& EEH_STATE_UNAVAILABLE
)
220 * powernv_eeh_reset - Reset the specified PE
222 * @option: reset option
224 * Reset the specified PE
226 static int powernv_eeh_reset(struct eeh_pe
*pe
, int option
)
228 struct pci_controller
*hose
= pe
->phb
;
229 struct pnv_phb
*phb
= hose
->private_data
;
232 if (phb
->eeh_ops
&& phb
->eeh_ops
->reset
)
233 ret
= phb
->eeh_ops
->reset(pe
, option
);
239 * powernv_eeh_wait_state - Wait for PE state
241 * @max_wait: maximal period in microsecond
243 * Wait for the state of associated PE. It might take some time
244 * to retrieve the PE's state.
246 static int powernv_eeh_wait_state(struct eeh_pe
*pe
, int max_wait
)
252 ret
= powernv_eeh_get_state(pe
, &mwait
);
255 * If the PE's state is temporarily unavailable,
256 * we have to wait for the specified time. Otherwise,
257 * the PE's state will be returned immediately.
259 if (ret
!= EEH_STATE_UNAVAILABLE
)
264 pr_warning("%s: Timeout getting PE#%x's state (%d)\n",
265 __func__
, pe
->addr
, max_wait
);
266 return EEH_STATE_NOT_SUPPORT
;
272 return EEH_STATE_NOT_SUPPORT
;
276 * powernv_eeh_get_log - Retrieve error log
278 * @severity: temporary or permanent error log
279 * @drv_log: driver log to be combined with retrieved error log
280 * @len: length of driver log
282 * Retrieve the temporary or permanent error from the PE.
284 static int powernv_eeh_get_log(struct eeh_pe
*pe
, int severity
,
285 char *drv_log
, unsigned long len
)
287 struct pci_controller
*hose
= pe
->phb
;
288 struct pnv_phb
*phb
= hose
->private_data
;
291 if (phb
->eeh_ops
&& phb
->eeh_ops
->get_log
)
292 ret
= phb
->eeh_ops
->get_log(pe
, severity
, drv_log
, len
);
298 * powernv_eeh_configure_bridge - Configure PCI bridges in the indicated PE
301 * The function will be called to reconfigure the bridges included
302 * in the specified PE so that the mulfunctional PE would be recovered
305 static int powernv_eeh_configure_bridge(struct eeh_pe
*pe
)
307 struct pci_controller
*hose
= pe
->phb
;
308 struct pnv_phb
*phb
= hose
->private_data
;
311 if (phb
->eeh_ops
&& phb
->eeh_ops
->configure_bridge
)
312 ret
= phb
->eeh_ops
->configure_bridge(pe
);
318 * powernv_eeh_read_config - Read PCI config space
320 * @where: PCI address
321 * @size: size to read
324 * Read config space from the speicifed device
326 static int powernv_eeh_read_config(struct device_node
*dn
, int where
,
329 struct eeh_dev
*edev
= of_node_to_eeh_dev(dn
);
330 struct pci_dev
*dev
= eeh_dev_to_pci_dev(edev
);
331 struct pci_controller
*hose
= edev
->phb
;
333 return hose
->ops
->read(dev
->bus
, dev
->devfn
, where
, size
, val
);
337 * powernv_eeh_write_config - Write PCI config space
339 * @where: PCI address
340 * @size: size to write
341 * @val: value to be written
343 * Write config space to the specified device
345 static int powernv_eeh_write_config(struct device_node
*dn
, int where
,
348 struct eeh_dev
*edev
= of_node_to_eeh_dev(dn
);
349 struct pci_dev
*dev
= eeh_dev_to_pci_dev(edev
);
350 struct pci_controller
*hose
= edev
->phb
;
352 hose
= pci_bus_to_host(dev
->bus
);
354 return hose
->ops
->write(dev
->bus
, dev
->devfn
, where
, size
, val
);
358 * powernv_eeh_next_error - Retrieve next EEH error to handle
361 * Using OPAL API, to retrieve next EEH error for EEH core to handle
363 static int powernv_eeh_next_error(struct eeh_pe
**pe
)
365 struct pci_controller
*hose
;
366 struct pnv_phb
*phb
= NULL
;
368 list_for_each_entry(hose
, &hose_list
, list_node
) {
369 phb
= hose
->private_data
;
373 if (phb
&& phb
->eeh_ops
->next_error
)
374 return phb
->eeh_ops
->next_error(pe
);
379 static struct eeh_ops powernv_eeh_ops
= {
381 .init
= powernv_eeh_init
,
382 .post_init
= powernv_eeh_post_init
,
384 .dev_probe
= powernv_eeh_dev_probe
,
385 .set_option
= powernv_eeh_set_option
,
386 .get_pe_addr
= powernv_eeh_get_pe_addr
,
387 .get_state
= powernv_eeh_get_state
,
388 .reset
= powernv_eeh_reset
,
389 .wait_state
= powernv_eeh_wait_state
,
390 .get_log
= powernv_eeh_get_log
,
391 .configure_bridge
= powernv_eeh_configure_bridge
,
392 .read_config
= powernv_eeh_read_config
,
393 .write_config
= powernv_eeh_write_config
,
394 .next_error
= powernv_eeh_next_error
398 * eeh_powernv_init - Register platform dependent EEH operations
400 * EEH initialization on powernv platform. This function should be
401 * called before any EEH related functions.
403 static int __init
eeh_powernv_init(void)
407 if (!machine_is(powernv
))
410 ret
= eeh_ops_register(&powernv_eeh_ops
);
412 pr_info("EEH: PowerNV platform initialized\n");
414 pr_info("EEH: Failed to initialize PowerNV platform (%d)\n", ret
);
419 early_initcall(eeh_powernv_init
);