arch/powerpc/platforms/powernv/smp.c

   1 /*
   2  * SMP support for PowerNV machines.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/sched.h>
  15 #include <linux/smp.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/init.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/cpu.h>
  21
  22 #include <asm/irq.h>
  23 #include <asm/smp.h>
  24 #include <asm/paca.h>
  25 #include <asm/machdep.h>
  26 #include <asm/cputable.h>
  27 #include <asm/firmware.h>
  28 #include <asm/vdso_datapage.h>
  29 #include <asm/cputhreads.h>
  30 #include <asm/xics.h>
  31 #include <asm/opal.h>
  32 #include <asm/runlatch.h>
  33 #include <asm/code-patching.h>
  34 #include <asm/dbell.h>
  35 #include <asm/kvm_ppc.h>
  36 #include <asm/ppc-opcode.h>
  37
  38 #include "powernv.h"
  39
  40 #ifdef DEBUG
  41 #include <asm/udbg.h>
  42 #define DBG(fmt...) udbg_printf(fmt)
  43 #else
  44 #define DBG(fmt...)
  45 #endif
  46
  47 static void pnv_smp_setup_cpu(int cpu)
  48 {
  49         if (cpu != boot_cpuid)
  50                 xics_setup_cpu();
  51
  52 #ifdef CONFIG_PPC_DOORBELL
  53         if (cpu_has_feature(CPU_FTR_DBELL))
  54                 doorbell_setup_this_cpu();
  55 #endif
  56 }
  57
  58 static int pnv_smp_kick_cpu(int nr)
  59 {
  60         unsigned int pcpu = get_hard_smp_processor_id(nr);
  61         unsigned long start_here =
  62                         __pa(ppc_function_entry(generic_secondary_smp_init));
  63         long rc;
  64
  65         BUG_ON(nr < 0 || nr >= NR_CPUS);
  66
  67         /*
  68          * If we already started or OPALv2 is not supported, we just
  69          * kick the CPU via the PACA
  70          */
  71         if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv2))
  72                 goto kick;
  73
  74         /*
  75          * At this point, the CPU can either be spinning on the way in
  76          * from kexec or be inside OPAL waiting to be started for the
  77          * first time. OPAL v3 allows us to query OPAL to know if it
  78          * has the CPUs, so we do that
  79          */
  80         if (firmware_has_feature(FW_FEATURE_OPALv3)) {
  81                 uint8_t status;
  82
  83                 rc = opal_query_cpu_status(pcpu, &status);
  84                 if (rc != OPAL_SUCCESS) {
  85                         pr_warn("OPAL Error %ld querying CPU %d state\n",
  86                                 rc, nr);
  87                         return -ENODEV;
  88                 }
  89
  90                 /*
  91                  * Already started, just kick it, probably coming from
  92                  * kexec and spinning
  93                  */
  94                 if (status == OPAL_THREAD_STARTED)
  95                         goto kick;
  96
  97                 /*
  98                  * Available/inactive, let's kick it
  99                  */
 100                 if (status == OPAL_THREAD_INACTIVE) {
 101                         pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
 102                                  nr, pcpu);
 103                         rc = opal_start_cpu(pcpu, start_here);
 104                         if (rc != OPAL_SUCCESS) {
 105                                 pr_warn("OPAL Error %ld starting CPU %d\n",
 106                                         rc, nr);
 107                                 return -ENODEV;
 108                         }
 109                 } else {
 110                         /*
 111                          * An unavailable CPU (or any other unknown status)
 112                          * shouldn't be started. It should also
 113                          * not be in the possible map but currently it can
 114                          * happen
 115                          */
 116                         pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
 117                                  " (status %d)...\n", nr, pcpu, status);
 118                         return -ENODEV;
 119                 }
 120         } else {
 121                 /*
 122                  * On OPAL v2, we just kick it and hope for the best,
 123                  * we must not test the error from opal_start_cpu() or
 124                  * we would fail to get CPUs from kexec.
 125                  */
 126                 opal_start_cpu(pcpu, start_here);
 127         }
 128  kick:
 129         return smp_generic_kick_cpu(nr);
 130 }
 131
 132 #ifdef CONFIG_HOTPLUG_CPU
 133
 134 static int pnv_smp_cpu_disable(void)
 135 {
 136         int cpu = smp_processor_id();
 137
 138         /* This is identical to pSeries... might consolidate by
 139          * moving migrate_irqs_away to a ppc_md with default to
 140          * the generic fixup_irqs. --BenH.
 141          */
 142         set_cpu_online(cpu, false);
 143         vdso_data->processorCount--;
 144         if (cpu == boot_cpuid)
 145                 boot_cpuid = cpumask_any(cpu_online_mask);
 146         xics_migrate_irqs_away();
 147         return 0;
 148 }
 149
 150 static void pnv_smp_cpu_kill_self(void)
 151 {
 152         unsigned int cpu;
 153         unsigned long srr1, wmask;
 154         u32 idle_states;
 155
 156         /* Standard hot unplug procedure */
 157         local_irq_disable();
 158         idle_task_exit();
 159         current->active_mm = NULL; /* for sanity */
 160         cpu = smp_processor_id();
 161         DBG("CPU%d offline\n", cpu);
 162         generic_set_cpu_dead(cpu);
 163         smp_wmb();
 164
 165         wmask = SRR1_WAKEMASK;
 166         if (cpu_has_feature(CPU_FTR_ARCH_207S))
 167                 wmask = SRR1_WAKEMASK_P8;
 168
 169         idle_states = pnv_get_supported_cpuidle_states();
 170         /* We don't want to take decrementer interrupts while we are offline,
 171          * so clear LPCR:PECE1. We keep PECE2 enabled.
 172          */
 173         mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
 174         while (!generic_check_cpu_restart(cpu)) {
 175
 176                 ppc64_runlatch_off();
 177
 178                 if (idle_states & OPAL_PM_WINKLE_ENABLED)
 179                         srr1 = power7_winkle();
 180                 else if ((idle_states & OPAL_PM_SLEEP_ENABLED) ||
 181                                 (idle_states & OPAL_PM_SLEEP_ENABLED_ER1))
 182                         srr1 = power7_sleep();
 183                 else
 184                         srr1 = power7_nap(1);
 185
 186                 ppc64_runlatch_on();
 187
 188                 /*
 189                  * If the SRR1 value indicates that we woke up due to
 190                  * an external interrupt, then clear the interrupt.
 191                  * We clear the interrupt before checking for the
 192                  * reason, so as to avoid a race where we wake up for
 193                  * some other reason, find nothing and clear the interrupt
 194                  * just as some other cpu is sending us an interrupt.
 195                  * If we returned from power7_nap as a result of
 196                  * having finished executing in a KVM guest, then srr1
 197                  * contains 0.
 198                  */
 199                 if ((srr1 & wmask) == SRR1_WAKEEE) {
 200                         icp_native_flush_interrupt();
 201                         local_paca->irq_happened &= PACA_IRQ_HARD_DIS;
 202                         smp_mb();
 203                 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
 204                         unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
 205                         asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
 206                         kvmppc_set_host_ipi(cpu, 0);
 207                 }
 208
 209                 if (cpu_core_split_required())
 210                         continue;
 211
 212                 if (!generic_check_cpu_restart(cpu))
 213                         DBG("CPU%d Unexpected exit while offline !\n", cpu);
 214         }
 215         mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
 216         DBG("CPU%d coming online...\n", cpu);
 217 }
 218
 219 #endif /* CONFIG_HOTPLUG_CPU */
 220
 221 static int pnv_cpu_bootable(unsigned int nr)
 222 {
 223         /*
 224          * Starting with POWER8, the subcore logic relies on all threads of a
 225          * core being booted so that they can participate in split mode
 226          * switches. So on those machines we ignore the smt_enabled_at_boot
 227          * setting (smt-enabled on the kernel command line).
 228          */
 229         if (cpu_has_feature(CPU_FTR_ARCH_207S))
 230                 return 1;
 231
 232         return smp_generic_cpu_bootable(nr);
 233 }
 234
 235 static struct smp_ops_t pnv_smp_ops = {
 236         .message_pass   = smp_muxed_ipi_message_pass,
 237         .cause_ipi      = NULL, /* Filled at runtime by xics_smp_probe() */
 238         .probe          = xics_smp_probe,
 239         .kick_cpu       = pnv_smp_kick_cpu,
 240         .setup_cpu      = pnv_smp_setup_cpu,
 241         .cpu_bootable   = pnv_cpu_bootable,
 242 #ifdef CONFIG_HOTPLUG_CPU
 243         .cpu_disable    = pnv_smp_cpu_disable,
 244         .cpu_die        = generic_cpu_die,
 245 #endif /* CONFIG_HOTPLUG_CPU */
 246 };
 247
 248 /* This is called very early during platform setup_arch */
 249 void __init pnv_smp_init(void)
 250 {
 251         smp_ops = &pnv_smp_ops;
 252
 253 #ifdef CONFIG_HOTPLUG_CPU
 254         ppc_md.cpu_die  = pnv_smp_cpu_kill_self;
 255 #endif
 256 }