arch/powerpc/platforms/pseries/xics.c

   1 /*
   2  * arch/powerpc/platforms/pseries/xics.c
   3  *
   4  * Copyright 2000 IBM Corporation.
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/types.h>
  13 #include <linux/threads.h>
  14 #include <linux/kernel.h>
  15 #include <linux/irq.h>
  16 #include <linux/smp.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/init.h>
  19 #include <linux/radix-tree.h>
  20 #include <linux/cpu.h>
  21 #include <linux/of.h>
  22
  23 #include <asm/firmware.h>
  24 #include <asm/io.h>
  25 #include <asm/pgtable.h>
  26 #include <asm/smp.h>
  27 #include <asm/rtas.h>
  28 #include <asm/hvcall.h>
  29 #include <asm/machdep.h>
  30
  31 #include "xics.h"
  32 #include "plpar_wrappers.h"
  33
  34 static struct irq_host *xics_host;
  35
  36 #define XICS_IPI                2
  37 #define XICS_IRQ_SPURIOUS       0
  38
  39 /* Want a priority other than 0.  Various HW issues require this. */
  40 #define DEFAULT_PRIORITY        5
  41
  42 /*
  43  * Mark IPIs as higher priority so we can take them inside interrupts that
  44  * arent marked IRQF_DISABLED
  45  */
  46 #define IPI_PRIORITY            4
  47
  48 static unsigned int default_server = 0xFF;
  49 static unsigned int default_distrib_server = 0;
  50 static unsigned int interrupt_server_size = 8;
  51
  52 /* RTAS service tokens */
  53 static int ibm_get_xive;
  54 static int ibm_set_xive;
  55 static int ibm_int_on;
  56 static int ibm_int_off;
  57
  58
  59 /* Direct hardware low level accessors */
  60
  61 /* The part of the interrupt presentation layer that we care about */
  62 struct xics_ipl {
  63         union {
  64                 u32 word;
  65                 u8 bytes[4];
  66         } xirr_poll;
  67         union {
  68                 u32 word;
  69                 u8 bytes[4];
  70         } xirr;
  71         u32 dummy;
  72         union {
  73                 u32 word;
  74                 u8 bytes[4];
  75         } qirr;
  76 };
  77
  78 static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
  79
  80 static inline unsigned int direct_xirr_info_get(void)
  81 {
  82         int cpu = smp_processor_id();
  83
  84         return in_be32(&xics_per_cpu[cpu]->xirr.word);
  85 }
  86
  87 static inline void direct_xirr_info_set(unsigned int value)
  88 {
  89         int cpu = smp_processor_id();
  90
  91         out_be32(&xics_per_cpu[cpu]->xirr.word, value);
  92 }
  93
  94 static inline void direct_cppr_info(u8 value)
  95 {
  96         int cpu = smp_processor_id();
  97
  98         out_8(&xics_per_cpu[cpu]->xirr.bytes[0], value);
  99 }
 100
 101 static inline void direct_qirr_info(int n_cpu, u8 value)
 102 {
 103         out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
 104 }
 105
 106
 107 /* LPAR low level accessors */
 108
 109 static inline unsigned int lpar_xirr_info_get(void)
 110 {
 111         unsigned long lpar_rc;
 112         unsigned long return_value;
 113
 114         lpar_rc = plpar_xirr(&return_value);
 115         if (lpar_rc != H_SUCCESS)
 116                 panic(" bad return code xirr - rc = %lx \n", lpar_rc);
 117         return (unsigned int)return_value;
 118 }
 119
 120 static inline void lpar_xirr_info_set(unsigned int value)
 121 {
 122         unsigned long lpar_rc;
 123
 124         lpar_rc = plpar_eoi(value);
 125         if (lpar_rc != H_SUCCESS)
 126                 panic("bad return code EOI - rc = %ld, value=%x\n", lpar_rc,
 127                       value);
 128 }
 129
 130 static inline void lpar_cppr_info(u8 value)
 131 {
 132         unsigned long lpar_rc;
 133
 134         lpar_rc = plpar_cppr(value);
 135         if (lpar_rc != H_SUCCESS)
 136                 panic("bad return code cppr - rc = %lx\n", lpar_rc);
 137 }
 138
 139 static inline void lpar_qirr_info(int n_cpu , u8 value)
 140 {
 141         unsigned long lpar_rc;
 142
 143         lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
 144         if (lpar_rc != H_SUCCESS)
 145                 panic("bad return code qirr - rc = %lx\n", lpar_rc);
 146 }
 147
 148
 149 /* Interface to generic irq subsystem */
 150
 151 #ifdef CONFIG_SMP
 152 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 153 {
 154         int server;
 155         /* For the moment only implement delivery to all cpus or one cpu */
 156         cpumask_t cpumask = irq_desc[virq].affinity;
 157         cpumask_t tmp = CPU_MASK_NONE;
 158
 159         if (!distribute_irqs)
 160                 return default_server;
 161
 162         if (!cpus_equal(cpumask, CPU_MASK_ALL)) {
 163                 cpus_and(tmp, cpu_online_map, cpumask);
 164
 165                 server = first_cpu(tmp);
 166
 167                 if (server < NR_CPUS)
 168                         return get_hard_smp_processor_id(server);
 169
 170                 if (strict_check)
 171                         return -1;
 172         }
 173
 174         if (cpus_equal(cpu_online_map, cpu_present_map))
 175                 return default_distrib_server;
 176
 177         return default_server;
 178 }
 179 #else
 180 static int get_irq_server(unsigned int virq, unsigned int strict_check)
 181 {
 182         return default_server;
 183 }
 184 #endif
 185
 186 static void xics_unmask_irq(unsigned int virq)
 187 {
 188         unsigned int irq;
 189         int call_status;
 190         int server;
 191
 192         pr_debug("xics: unmask virq %d\n", virq);
 193
 194         irq = (unsigned int)irq_map[virq].hwirq;
 195         pr_debug(" -> map to hwirq 0x%x\n", irq);
 196         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 197                 return;
 198
 199         server = get_irq_server(virq, 0);
 200
 201         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
 202                                 DEFAULT_PRIORITY);
 203         if (call_status != 0) {
 204                 printk(KERN_ERR
 205                         "%s: ibm_set_xive irq %u server %x returned %d\n",
 206                         __func__, irq, server, call_status);
 207                 return;
 208         }
 209
 210         /* Now unmask the interrupt (often a no-op) */
 211         call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
 212         if (call_status != 0) {
 213                 printk(KERN_ERR "%s: ibm_int_on irq=%u returned %d\n",
 214                         __func__, irq, call_status);
 215                 return;
 216         }
 217 }
 218
 219 static unsigned int xics_startup(unsigned int virq)
 220 {
 221         /* unmask it */
 222         xics_unmask_irq(virq);
 223         return 0;
 224 }
 225
 226 static void xics_mask_real_irq(unsigned int irq)
 227 {
 228         int call_status;
 229
 230         if (irq == XICS_IPI)
 231                 return;
 232
 233         call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
 234         if (call_status != 0) {
 235                 printk(KERN_ERR "%s: ibm_int_off irq=%u returned %d\n",
 236                         __func__, irq, call_status);
 237                 return;
 238         }
 239
 240         /* Have to set XIVE to 0xff to be able to remove a slot */
 241         call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq,
 242                                 default_server, 0xff);
 243         if (call_status != 0) {
 244                 printk(KERN_ERR "%s: ibm_set_xive(0xff) irq=%u returned %d\n",
 245                         __func__, irq, call_status);
 246                 return;
 247         }
 248 }
 249
 250 static void xics_mask_irq(unsigned int virq)
 251 {
 252         unsigned int irq;
 253
 254         pr_debug("xics: mask virq %d\n", virq);
 255
 256         irq = (unsigned int)irq_map[virq].hwirq;
 257         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 258                 return;
 259         xics_mask_real_irq(irq);
 260 }
 261
 262 static void xics_mask_unknown_vec(unsigned int vec)
 263 {
 264         printk(KERN_ERR "Interrupt %u (real) is invalid, disabling it.\n", vec);
 265         xics_mask_real_irq(vec);
 266 }
 267
 268 static inline unsigned int xics_xirr_vector(unsigned int xirr)
 269 {
 270         /*
 271          * The top byte is the old cppr, to be restored on EOI.
 272          * The remaining 24 bits are the vector.
 273          */
 274         return xirr & 0x00ffffff;
 275 }
 276
 277 static unsigned int xics_get_irq_direct(void)
 278 {
 279         unsigned int xirr = direct_xirr_info_get();
 280         unsigned int vec = xics_xirr_vector(xirr);
 281         unsigned int irq;
 282
 283         if (vec == XICS_IRQ_SPURIOUS)
 284                 return NO_IRQ;
 285
 286         irq = irq_radix_revmap_lookup(xics_host, vec);
 287         if (likely(irq != NO_IRQ))
 288                 return irq;
 289
 290         /* We don't have a linux mapping, so have rtas mask it. */
 291         xics_mask_unknown_vec(vec);
 292
 293         /* We might learn about it later, so EOI it */
 294         direct_xirr_info_set(xirr);
 295         return NO_IRQ;
 296 }
 297
 298 static unsigned int xics_get_irq_lpar(void)
 299 {
 300         unsigned int xirr = lpar_xirr_info_get();
 301         unsigned int vec = xics_xirr_vector(xirr);
 302         unsigned int irq;
 303
 304         if (vec == XICS_IRQ_SPURIOUS)
 305                 return NO_IRQ;
 306
 307         irq = irq_radix_revmap_lookup(xics_host, vec);
 308         if (likely(irq != NO_IRQ))
 309                 return irq;
 310
 311         /* We don't have a linux mapping, so have RTAS mask it. */
 312         xics_mask_unknown_vec(vec);
 313
 314         /* We might learn about it later, so EOI it */
 315         lpar_xirr_info_set(xirr);
 316         return NO_IRQ;
 317 }
 318
 319 static void xics_eoi_direct(unsigned int virq)
 320 {
 321         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 322
 323         iosync();
 324         direct_xirr_info_set((0xff << 24) | irq);
 325 }
 326
 327 static void xics_eoi_lpar(unsigned int virq)
 328 {
 329         unsigned int irq = (unsigned int)irq_map[virq].hwirq;
 330
 331         iosync();
 332         lpar_xirr_info_set((0xff << 24) | irq);
 333 }
 334
 335 static void xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
 336 {
 337         unsigned int irq;
 338         int status;
 339         int xics_status[2];
 340         int irq_server;
 341
 342         irq = (unsigned int)irq_map[virq].hwirq;
 343         if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 344                 return;
 345
 346         status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 347
 348         if (status) {
 349                 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
 350                         __func__, irq, status);
 351                 return;
 352         }
 353
 354         /*
 355          * For the moment only implement delivery to all cpus or one cpu.
 356          * Get current irq_server for the given irq
 357          */
 358         irq_server = get_irq_server(virq, 1);
 359         if (irq_server == -1) {
 360                 char cpulist[128];
 361                 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
 362                 printk(KERN_WARNING
 363                         "%s: No online cpus in the mask %s for irq %d\n",
 364                         __func__, cpulist, virq);
 365                 return;
 366         }
 367
 368         status = rtas_call(ibm_set_xive, 3, 1, NULL,
 369                                 irq, irq_server, xics_status[1]);
 370
 371         if (status) {
 372                 printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
 373                         __func__, irq, status);
 374                 return;
 375         }
 376 }
 377
 378 static struct irq_chip xics_pic_direct = {
 379         .typename = " XICS     ",
 380         .startup = xics_startup,
 381         .mask = xics_mask_irq,
 382         .unmask = xics_unmask_irq,
 383         .eoi = xics_eoi_direct,
 384         .set_affinity = xics_set_affinity
 385 };
 386
 387 static struct irq_chip xics_pic_lpar = {
 388         .typename = " XICS     ",
 389         .startup = xics_startup,
 390         .mask = xics_mask_irq,
 391         .unmask = xics_unmask_irq,
 392         .eoi = xics_eoi_lpar,
 393         .set_affinity = xics_set_affinity
 394 };
 395
 396
 397 /* Interface to arch irq controller subsystem layer */
 398
 399 /* Points to the irq_chip we're actually using */
 400 static struct irq_chip *xics_irq_chip;
 401
 402 static int xics_host_match(struct irq_host *h, struct device_node *node)
 403 {
 404         /* IBM machines have interrupt parents of various funky types for things
 405          * like vdevices, events, etc... The trick we use here is to match
 406          * everything here except the legacy 8259 which is compatible "chrp,iic"
 407          */
 408         return !of_device_is_compatible(node, "chrp,iic");
 409 }
 410
 411 static int xics_host_map(struct irq_host *h, unsigned int virq,
 412                          irq_hw_number_t hw)
 413 {
 414         pr_debug("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
 415
 416         /* Insert the interrupt mapping into the radix tree for fast lookup */
 417         irq_radix_revmap_insert(xics_host, virq, hw);
 418
 419         get_irq_desc(virq)->status |= IRQ_LEVEL;
 420         set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq);
 421         return 0;
 422 }
 423
 424 static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
 425                            u32 *intspec, unsigned int intsize,
 426                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 427
 428 {
 429         /* Current xics implementation translates everything
 430          * to level. It is not technically right for MSIs but this
 431          * is irrelevant at this point. We might get smarter in the future
 432          */
 433         *out_hwirq = intspec[0];
 434         *out_flags = IRQ_TYPE_LEVEL_LOW;
 435
 436         return 0;
 437 }
 438
 439 static struct irq_host_ops xics_host_ops = {
 440         .match = xics_host_match,
 441         .map = xics_host_map,
 442         .xlate = xics_host_xlate,
 443 };
 444
 445 static void __init xics_init_host(void)
 446 {
 447         if (firmware_has_feature(FW_FEATURE_LPAR))
 448                 xics_irq_chip = &xics_pic_lpar;
 449         else
 450                 xics_irq_chip = &xics_pic_direct;
 451
 452         xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
 453                                    XICS_IRQ_SPURIOUS);
 454         BUG_ON(xics_host == NULL);
 455         irq_set_default_host(xics_host);
 456 }
 457
 458
 459 /* Inter-processor interrupt support */
 460
 461 #ifdef CONFIG_SMP
 462 /*
 463  * XICS only has a single IPI, so encode the messages per CPU
 464  */
 465 struct xics_ipi_struct {
 466         unsigned long value;
 467         } ____cacheline_aligned;
 468
 469 static struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
 470
 471 static inline void smp_xics_do_message(int cpu, int msg)
 472 {
 473         set_bit(msg, &xics_ipi_message[cpu].value);
 474         mb();
 475         if (firmware_has_feature(FW_FEATURE_LPAR))
 476                 lpar_qirr_info(cpu, IPI_PRIORITY);
 477         else
 478                 direct_qirr_info(cpu, IPI_PRIORITY);
 479 }
 480
 481 void smp_xics_message_pass(int target, int msg)
 482 {
 483         unsigned int i;
 484
 485         if (target < NR_CPUS) {
 486                 smp_xics_do_message(target, msg);
 487         } else {
 488                 for_each_online_cpu(i) {
 489                         if (target == MSG_ALL_BUT_SELF
 490                             && i == smp_processor_id())
 491                                 continue;
 492                         smp_xics_do_message(i, msg);
 493                 }
 494         }
 495 }
 496
 497 static irqreturn_t xics_ipi_dispatch(int cpu)
 498 {
 499         WARN_ON(cpu_is_offline(cpu));
 500
 501         mb();   /* order mmio clearing qirr */
 502         while (xics_ipi_message[cpu].value) {
 503                 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION,
 504                                        &xics_ipi_message[cpu].value)) {
 505                         smp_message_recv(PPC_MSG_CALL_FUNCTION);
 506                 }
 507                 if (test_and_clear_bit(PPC_MSG_RESCHEDULE,
 508                                        &xics_ipi_message[cpu].value)) {
 509                         smp_message_recv(PPC_MSG_RESCHEDULE);
 510                 }
 511                 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE,
 512                                        &xics_ipi_message[cpu].value)) {
 513                         smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
 514                 }
 515 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 516                 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK,
 517                                        &xics_ipi_message[cpu].value)) {
 518                         smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
 519                 }
 520 #endif
 521         }
 522         return IRQ_HANDLED;
 523 }
 524
 525 static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id)
 526 {
 527         int cpu = smp_processor_id();
 528
 529         direct_qirr_info(cpu, 0xff);
 530
 531         return xics_ipi_dispatch(cpu);
 532 }
 533
 534 static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id)
 535 {
 536         int cpu = smp_processor_id();
 537
 538         lpar_qirr_info(cpu, 0xff);
 539
 540         return xics_ipi_dispatch(cpu);
 541 }
 542
 543 static void xics_request_ipi(void)
 544 {
 545         unsigned int ipi;
 546         int rc;
 547
 548         ipi = irq_create_mapping(xics_host, XICS_IPI);
 549         BUG_ON(ipi == NO_IRQ);
 550
 551         /*
 552          * IPIs are marked IRQF_DISABLED as they must run with irqs
 553          * disabled
 554          */
 555         set_irq_handler(ipi, handle_percpu_irq);
 556         if (firmware_has_feature(FW_FEATURE_LPAR))
 557                 rc = request_irq(ipi, xics_ipi_action_lpar,
 558                                 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
 559         else
 560                 rc = request_irq(ipi, xics_ipi_action_direct,
 561                                 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
 562         BUG_ON(rc);
 563 }
 564
 565 int __init smp_xics_probe(void)
 566 {
 567         xics_request_ipi();
 568
 569         return cpus_weight(cpu_possible_map);
 570 }
 571
 572 #endif /* CONFIG_SMP */
 573
 574
 575 /* Initialization */
 576
 577 static void xics_update_irq_servers(void)
 578 {
 579         int i, j;
 580         struct device_node *np;
 581         u32 ilen;
 582         const u32 *ireg;
 583         u32 hcpuid;
 584
 585         /* Find the server numbers for the boot cpu. */
 586         np = of_get_cpu_node(boot_cpuid, NULL);
 587         BUG_ON(!np);
 588
 589         ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
 590         if (!ireg) {
 591                 of_node_put(np);
 592                 return;
 593         }
 594
 595         i = ilen / sizeof(int);
 596         hcpuid = get_hard_smp_processor_id(boot_cpuid);
 597
 598         /* Global interrupt distribution server is specified in the last
 599          * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
 600          * entry fom this property for current boot cpu id and use it as
 601          * default distribution server
 602          */
 603         for (j = 0; j < i; j += 2) {
 604                 if (ireg[j] == hcpuid) {
 605                         default_server = hcpuid;
 606                         default_distrib_server = ireg[j+1];
 607                 }
 608         }
 609
 610         of_node_put(np);
 611 }
 612
 613 static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
 614                                      unsigned long size)
 615 {
 616         int i;
 617
 618         /* This may look gross but it's good enough for now, we don't quite
 619          * have a hard -> linux processor id matching.
 620          */
 621         for_each_possible_cpu(i) {
 622                 if (!cpu_present(i))
 623                         continue;
 624                 if (hw_id == get_hard_smp_processor_id(i)) {
 625                         xics_per_cpu[i] = ioremap(addr, size);
 626                         return;
 627                 }
 628         }
 629 }
 630
 631 static void __init xics_init_one_node(struct device_node *np,
 632                                       unsigned int *indx)
 633 {
 634         unsigned int ilen;
 635         const u32 *ireg;
 636
 637         /* This code does the theorically broken assumption that the interrupt
 638          * server numbers are the same as the hard CPU numbers.
 639          * This happens to be the case so far but we are playing with fire...
 640          * should be fixed one of these days. -BenH.
 641          */
 642         ireg = of_get_property(np, "ibm,interrupt-server-ranges", NULL);
 643
 644         /* Do that ever happen ? we'll know soon enough... but even good'old
 645          * f80 does have that property ..
 646          */
 647         WARN_ON(ireg == NULL);
 648         if (ireg) {
 649                 /*
 650                  * set node starting index for this node
 651                  */
 652                 *indx = *ireg;
 653         }
 654         ireg = of_get_property(np, "reg", &ilen);
 655         if (!ireg)
 656                 panic("xics_init_IRQ: can't find interrupt reg property");
 657
 658         while (ilen >= (4 * sizeof(u32))) {
 659                 unsigned long addr, size;
 660
 661                 /* XXX Use proper OF parsing code here !!! */
 662                 addr = (unsigned long)*ireg++ << 32;
 663                 ilen -= sizeof(u32);
 664                 addr |= *ireg++;
 665                 ilen -= sizeof(u32);
 666                 size = (unsigned long)*ireg++ << 32;
 667                 ilen -= sizeof(u32);
 668                 size |= *ireg++;
 669                 ilen -= sizeof(u32);
 670                 xics_map_one_cpu(*indx, addr, size);
 671                 (*indx)++;
 672         }
 673 }
 674
 675 void __init xics_init_IRQ(void)
 676 {
 677         struct device_node *np;
 678         u32 indx = 0;
 679         int found = 0;
 680         const u32 *isize;
 681
 682         ppc64_boot_msg(0x20, "XICS Init");
 683
 684         ibm_get_xive = rtas_token("ibm,get-xive");
 685         ibm_set_xive = rtas_token("ibm,set-xive");
 686         ibm_int_on  = rtas_token("ibm,int-on");
 687         ibm_int_off = rtas_token("ibm,int-off");
 688
 689         for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
 690                 found = 1;
 691                 if (firmware_has_feature(FW_FEATURE_LPAR)) {
 692                         of_node_put(np);
 693                         break;
 694                         }
 695                 xics_init_one_node(np, &indx);
 696         }
 697         if (found == 0)
 698                 return;
 699
 700         /* get the bit size of server numbers */
 701         found = 0;
 702
 703         for_each_compatible_node(np, NULL, "ibm,ppc-xics") {
 704                 isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
 705
 706                 if (!isize)
 707                         continue;
 708
 709                 if (!found) {
 710                         interrupt_server_size = *isize;
 711                         found = 1;
 712                 } else if (*isize != interrupt_server_size) {
 713                         printk(KERN_WARNING "XICS: "
 714                                "mismatched ibm,interrupt-server#-size\n");
 715                         interrupt_server_size = max(*isize,
 716                                                     interrupt_server_size);
 717                 }
 718         }
 719
 720         xics_update_irq_servers();
 721         xics_init_host();
 722
 723         if (firmware_has_feature(FW_FEATURE_LPAR))
 724                 ppc_md.get_irq = xics_get_irq_lpar;
 725         else
 726                 ppc_md.get_irq = xics_get_irq_direct;
 727
 728         xics_setup_cpu();
 729
 730         ppc64_boot_msg(0x21, "XICS Done");
 731 }
 732
 733 /* Cpu startup, shutdown, and hotplug */
 734
 735 static void xics_set_cpu_priority(unsigned char cppr)
 736 {
 737         if (firmware_has_feature(FW_FEATURE_LPAR))
 738                 lpar_cppr_info(cppr);
 739         else
 740                 direct_cppr_info(cppr);
 741         iosync();
 742 }
 743
 744 /* Have the calling processor join or leave the specified global queue */
 745 static void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
 746 {
 747         int index;
 748         int status;
 749
 750         if (!rtas_indicator_present(GLOBAL_INTERRUPT_QUEUE, NULL))
 751                 return;
 752
 753         index = (1UL << interrupt_server_size) - 1 - gserver;
 754
 755         status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, index, join);
 756
 757         WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n",
 758              GLOBAL_INTERRUPT_QUEUE, index, join, status);
 759 }
 760
 761 void xics_setup_cpu(void)
 762 {
 763         xics_set_cpu_priority(0xff);
 764
 765         xics_set_cpu_giq(default_distrib_server, 1);
 766 }
 767
 768 void xics_teardown_cpu(void)
 769 {
 770         int cpu = smp_processor_id();
 771
 772         xics_set_cpu_priority(0);
 773
 774         /* Clear any pending IPI request */
 775         if (firmware_has_feature(FW_FEATURE_LPAR))
 776                 lpar_qirr_info(cpu, 0xff);
 777         else
 778                 direct_qirr_info(cpu, 0xff);
 779 }
 780
 781 void xics_kexec_teardown_cpu(int secondary)
 782 {
 783         xics_teardown_cpu();
 784
 785         /*
 786          * we take the ipi irq but and never return so we
 787          * need to EOI the IPI, but want to leave our priority 0
 788          *
 789          * should we check all the other interrupts too?
 790          * should we be flagging idle loop instead?
 791          * or creating some task to be scheduled?
 792          */
 793
 794         if (firmware_has_feature(FW_FEATURE_LPAR))
 795                 lpar_xirr_info_set((0x00 << 24) | XICS_IPI);
 796         else
 797                 direct_xirr_info_set((0x00 << 24) | XICS_IPI);
 798
 799         /*
 800          * Some machines need to have at least one cpu in the GIQ,
 801          * so leave the master cpu in the group.
 802          */
 803         if (secondary)
 804                 xics_set_cpu_giq(default_distrib_server, 0);
 805 }
 806
 807 #ifdef CONFIG_HOTPLUG_CPU
 808
 809 /* Interrupts are disabled. */
 810 void xics_migrate_irqs_away(void)
 811 {
 812         int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
 813         unsigned int irq, virq;
 814
 815         /* If we used to be the default server, move to the new "boot_cpuid" */
 816         if (hw_cpu == default_server)
 817                 xics_update_irq_servers();
 818
 819         /* Reject any interrupt that was queued to us... */
 820         xics_set_cpu_priority(0);
 821
 822         /* Remove ourselves from the global interrupt queue */
 823         xics_set_cpu_giq(default_distrib_server, 0);
 824
 825         /* Allow IPIs again... */
 826         xics_set_cpu_priority(DEFAULT_PRIORITY);
 827
 828         for_each_irq(virq) {
 829                 struct irq_desc *desc;
 830                 int xics_status[2];
 831                 int status;
 832                 unsigned long flags;
 833
 834                 /* We cant set affinity on ISA interrupts */
 835                 if (virq < NUM_ISA_INTERRUPTS)
 836                         continue;
 837                 if (irq_map[virq].host != xics_host)
 838                         continue;
 839                 irq = (unsigned int)irq_map[virq].hwirq;
 840                 /* We need to get IPIs still. */
 841                 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
 842                         continue;
 843                 desc = get_irq_desc(virq);
 844
 845                 /* We only need to migrate enabled IRQS */
 846                 if (desc == NULL || desc->chip == NULL
 847                     || desc->action == NULL
 848                     || desc->chip->set_affinity == NULL)
 849                         continue;
 850
 851                 spin_lock_irqsave(&desc->lock, flags);
 852
 853                 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
 854                 if (status) {
 855                         printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
 856                                         __func__, irq, status);
 857                         goto unlock;
 858                 }
 859
 860                 /*
 861                  * We only support delivery to all cpus or to one cpu.
 862                  * The irq has to be migrated only in the single cpu
 863                  * case.
 864                  */
 865                 if (xics_status[0] != hw_cpu)
 866                         goto unlock;
 867
 868                 printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
 869                        virq, cpu);
 870
 871                 /* Reset affinity to all cpus */
 872                 irq_desc[virq].affinity = CPU_MASK_ALL;
 873                 desc->chip->set_affinity(virq, cpu_all_mask);
 874 unlock:
 875                 spin_unlock_irqrestore(&desc->lock, flags);
 876         }
 877 }
 878 #endif