[PATCH] powerpc: trivial: modify comments to refer to new location of files
[deliverable/linux.git] / arch / ppc / platforms / 4xx / ebony.h
1 /*
2 * Ebony board definitions
3 *
4 * Matt Porter <mporter@mvista.com>
5 *
6 * Copyright 2002 MontaVista Software Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14 #ifdef __KERNEL__
15 #ifndef __ASM_EBONY_H__
16 #define __ASM_EBONY_H__
17
18 #include <linux/config.h>
19 #include <platforms/4xx/ibm440gp.h>
20
21 /* F/W TLB mapping used in bootloader glue to reset EMAC */
22 #define PPC44x_EMAC0_MR0 0xE0000800
23
24 /* Where to find the MAC info */
25 #define OPENBIOS_MAC_BASE 0xfffffe0c
26 #define OPENBIOS_MAC_OFFSET 0x0c
27
28 /* Default clock rates for Rev. B and Rev. C silicon */
29 #define EBONY_440GP_RB_SYSCLK 33000000
30 #define EBONY_440GP_RC_SYSCLK 400000000
31
32 /* RTC/NVRAM location */
33 #define EBONY_RTC_ADDR 0x0000000148000000ULL
34 #define EBONY_RTC_SIZE 0x2000
35
36 /* Flash */
37 #define EBONY_FPGA_ADDR 0x0000000148300000ULL
38 #define EBONY_BOOT_SMALL_FLASH(x) (x & 0x20)
39 #define EBONY_ONBRD_FLASH_EN(x) (x & 0x02)
40 #define EBONY_FLASH_SEL(x) (x & 0x01)
41 #define EBONY_SMALL_FLASH_LOW1 0x00000001ff800000ULL
42 #define EBONY_SMALL_FLASH_LOW2 0x00000001ff880000ULL
43 #define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000ULL
44 #define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000ULL
45 #define EBONY_SMALL_FLASH_SIZE 0x80000
46 #define EBONY_LARGE_FLASH_LOW 0x00000001ff800000ULL
47 #define EBONY_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
48 #define EBONY_LARGE_FLASH_SIZE 0x400000
49
50 #define EBONY_SMALL_FLASH_BASE 0x00000001fff80000ULL
51 #define EBONY_LARGE_FLASH_BASE 0x00000001ff800000ULL
52
53 /*
54 * Serial port defines
55 */
56
57 #if defined(__BOOTER__)
58 /* OpenBIOS defined UART mappings, used by bootloader shim */
59 #define UART0_IO_BASE 0xE0000200
60 #define UART1_IO_BASE 0xE0000300
61 #else
62 /* head_44x.S created UART mapping, used before early_serial_setup.
63 * We cannot use default OpenBIOS UART mappings because they
64 * don't work for configurations with more than 512M RAM. --ebs
65 */
66 #define UART0_IO_BASE 0xF0000200
67 #define UART1_IO_BASE 0xF0000300
68 #endif
69
70 /* external Epson SG-615P */
71 #define BASE_BAUD 691200
72
73 #define STD_UART_OP(num) \
74 { 0, BASE_BAUD, 0, UART##num##_INT, \
75 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
76 iomem_base: (void*)UART##num##_IO_BASE, \
77 io_type: SERIAL_IO_MEM},
78
79 #define SERIAL_PORT_DFNS \
80 STD_UART_OP(0) \
81 STD_UART_OP(1)
82
83 /* PCI support */
84 #define EBONY_PCI_LOWER_IO 0x00000000
85 #define EBONY_PCI_UPPER_IO 0x0000ffff
86 #define EBONY_PCI_LOWER_MEM 0x80002000
87 #define EBONY_PCI_UPPER_MEM 0xffffefff
88
89 #define EBONY_PCI_CFGREGS_BASE 0x000000020ec00000
90 #define EBONY_PCI_CFGA_PLB32 0x0ec00000
91 #define EBONY_PCI_CFGD_PLB32 0x0ec00004
92
93 #define EBONY_PCI_IO_BASE 0x0000000208000000ULL
94 #define EBONY_PCI_IO_SIZE 0x00010000
95 #define EBONY_PCI_MEM_OFFSET 0x00000000
96
97 #endif /* __ASM_EBONY_H__ */
98 #endif /* __KERNEL__ */
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