arch/s390/include/asm/cpu_mf.h

   1 /*
   2  * CPU-measurement facilities
   3  *
   4  *  Copyright IBM Corp. 2012
   5  *  Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
   6  *             Jan Glauber <jang@linux.vnet.ibm.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License (version 2 only)
  10  * as published by the Free Software Foundation.
  11  */
  12 #ifndef _ASM_S390_CPU_MF_H
  13 #define _ASM_S390_CPU_MF_H
  14
  15 #include <linux/errno.h>
  16 #include <asm/facility.h>
  17
  18 #define CPU_MF_INT_SF_IAE       (1 << 31)       /* invalid entry address */
  19 #define CPU_MF_INT_SF_ISE       (1 << 30)       /* incorrect SDBT entry */
  20 #define CPU_MF_INT_SF_PRA       (1 << 29)       /* program request alert */
  21 #define CPU_MF_INT_SF_SACA      (1 << 23)       /* sampler auth. change alert */
  22 #define CPU_MF_INT_SF_LSDA      (1 << 22)       /* loss of sample data alert */
  23 #define CPU_MF_INT_CF_CACA      (1 <<  7)       /* counter auth. change alert */
  24 #define CPU_MF_INT_CF_LCDA      (1 <<  6)       /* loss of counter data alert */
  25 #define CPU_MF_INT_RI_HALTED    (1 <<  5)       /* run-time instr. halted */
  26 #define CPU_MF_INT_RI_BUF_FULL  (1 <<  4)       /* run-time instr. program
  27                                                    buffer full */
  28
  29 #define CPU_MF_INT_CF_MASK      (CPU_MF_INT_CF_CACA|CPU_MF_INT_CF_LCDA)
  30 #define CPU_MF_INT_SF_MASK      (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE|   \
  31                                  CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA|  \
  32                                  CPU_MF_INT_SF_LSDA)
  33 #define CPU_MF_INT_RI_MASK      (CPU_MF_INT_RI_HALTED|CPU_MF_INT_RI_BUF_FULL)
  34
  35 /* CPU measurement facility support */
  36 static inline int cpum_cf_avail(void)
  37 {
  38         return MACHINE_HAS_LPP && test_facility(67);
  39 }
  40
  41 static inline int cpum_sf_avail(void)
  42 {
  43         return MACHINE_HAS_LPP && test_facility(68);
  44 }
  45
  46
  47 struct cpumf_ctr_info {
  48         u16   cfvn;
  49         u16   auth_ctl;
  50         u16   enable_ctl;
  51         u16   act_ctl;
  52         u16   max_cpu;
  53         u16   csvn;
  54         u16   max_cg;
  55         u16   reserved1;
  56         u32   reserved2[12];
  57 } __packed;
  58
  59 /* QUERY SAMPLING INFORMATION block */
  60 struct hws_qsi_info_block {         /* Bit(s) */
  61         unsigned int b0_13:14;      /* 0-13: zeros                       */
  62         unsigned int as:1;          /* 14: sampling authorisation control*/
  63         unsigned int b15_21:7;      /* 15-21: zeros                      */
  64         unsigned int es:1;          /* 22: sampling enable control       */
  65         unsigned int b23_29:7;      /* 23-29: zeros                      */
  66         unsigned int cs:1;          /* 30: sampling activation control   */
  67         unsigned int:1;             /* 31: reserved                      */
  68         unsigned int bsdes:16;      /* 4-5: size of basic sampling entry      */
  69         unsigned int dsdes:16;      /* 6-7: size of diagnostic sampling entry */
  70         unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
  71         unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
  72         unsigned long tear;         /* 24-31: TEAR contents              */
  73         unsigned long dear;         /* 32-39: DEAR contents              */
  74         unsigned int rsvrd0;        /* 40-43: reserved                   */
  75         unsigned int cpu_speed;     /* 44-47: CPU speed                  */
  76         unsigned long long rsvrd1;  /* 48-55: reserved                   */
  77         unsigned long long rsvrd2;  /* 56-63: reserved                   */
  78 } __packed;
  79
  80 /* SET SAMPLING CONTROLS request block */
  81 struct hws_lsctl_request_block {
  82         unsigned int s:1;           /* 0: maximum buffer indicator       */
  83         unsigned int h:1;           /* 1: part. level reserved for VM use*/
  84         unsigned long long b2_53:52;/* 2-53: zeros                       */
  85         unsigned int es:1;          /* 54: sampling enable control       */
  86         unsigned int b55_61:7;      /* 55-61: - zeros                    */
  87         unsigned int cs:1;          /* 62: sampling activation control   */
  88         unsigned int b63:1;         /* 63: zero                          */
  89         unsigned long interval;     /* 8-15: sampling interval           */
  90         unsigned long tear;         /* 16-23: TEAR contents              */
  91         unsigned long dear;         /* 24-31: DEAR contents              */
  92         /* 32-63:                                                        */
  93         unsigned long rsvrd1;       /* reserved                          */
  94         unsigned long rsvrd2;       /* reserved                          */
  95         unsigned long rsvrd3;       /* reserved                          */
  96         unsigned long rsvrd4;       /* reserved                          */
  97 } __packed;
  98
  99
 100 struct hws_data_entry {
 101         unsigned int def:16;        /* 0-15  Data Entry Format           */
 102         unsigned int R:4;           /* 16-19 reserved                    */
 103         unsigned int U:4;           /* 20-23 Number of unique instruct.  */
 104         unsigned int z:2;           /* zeros                             */
 105         unsigned int T:1;           /* 26 PSW DAT mode                   */
 106         unsigned int W:1;           /* 27 PSW wait state                 */
 107         unsigned int P:1;           /* 28 PSW Problem state              */
 108         unsigned int AS:2;          /* 29-30 PSW address-space control   */
 109         unsigned int I:1;           /* 31 entry valid or invalid         */
 110         unsigned int:16;
 111         unsigned int prim_asn:16;   /* primary ASN                       */
 112         unsigned long long ia;      /* Instruction Address               */
 113         unsigned long long gpp;     /* Guest Program Parameter           */
 114         unsigned long long hpp;     /* Host Program Parameter            */
 115 } __packed;
 116
 117 struct hws_trailer_entry {
 118         union {
 119                 struct {
 120                         unsigned int f:1;       /* 0 - Block Full Indicator   */
 121                         unsigned int a:1;       /* 1 - Alert request control  */
 122                         unsigned int t:1;       /* 2 - Timestamp format       */
 123                         unsigned long long:61;  /* 3 - 63: Reserved           */
 124                 };
 125                 unsigned long long flags;       /* 0 - 63: All indicators     */
 126         };
 127         unsigned long long overflow;     /* 64 - sample Overflow count        */
 128         unsigned char timestamp[16];     /* 16 - 31 timestamp                 */
 129         unsigned long long reserved1;    /* 32 -Reserved                      */
 130         unsigned long long reserved2;    /*                                   */
 131         unsigned long long progusage1;   /* 48 - reserved for programming use */
 132         unsigned long long progusage2;   /*                                   */
 133 } __packed;
 134
 135 /* Query counter information */
 136 static inline int qctri(struct cpumf_ctr_info *info)
 137 {
 138         int rc = -EINVAL;
 139
 140         asm volatile (
 141                 "0:     .insn   s,0xb28e0000,%1\n"
 142                 "1:     lhi     %0,0\n"
 143                 "2:\n"
 144                 EX_TABLE(1b, 2b)
 145                 : "+d" (rc), "=Q" (*info));
 146         return rc;
 147 }
 148
 149 /* Load CPU-counter-set controls */
 150 static inline int lcctl(u64 ctl)
 151 {
 152         int cc;
 153
 154         asm volatile (
 155                 "       .insn   s,0xb2840000,%1\n"
 156                 "       ipm     %0\n"
 157                 "       srl     %0,28\n"
 158                 : "=d" (cc) : "m" (ctl) : "cc");
 159         return cc;
 160 }
 161
 162 /* Extract CPU counter */
 163 static inline int ecctr(u64 ctr, u64 *val)
 164 {
 165         register u64 content asm("4") = 0;
 166         int cc;
 167
 168         asm volatile (
 169                 "       .insn   rre,0xb2e40000,%0,%2\n"
 170                 "       ipm     %1\n"
 171                 "       srl     %1,28\n"
 172                 : "=d" (content), "=d" (cc) : "d" (ctr) : "cc");
 173         if (!cc)
 174                 *val = content;
 175         return cc;
 176 }
 177
 178 /* Query sampling information */
 179 static inline int qsi(struct hws_qsi_info_block *info)
 180 {
 181         int cc;
 182         cc = 1;
 183
 184         asm volatile(
 185                 "0:     .insn   s,0xb2860000,0(%1)\n"
 186                 "1:     lhi     %0,0\n"
 187                 "2:\n"
 188                 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
 189                 : "=d" (cc), "+a" (info)
 190                 : "m" (*info)
 191                 : "cc", "memory");
 192
 193         return cc ? -EINVAL : 0;
 194 }
 195
 196 /* Load sampling controls */
 197 static inline int lsctl(struct hws_lsctl_request_block *req)
 198 {
 199         int cc;
 200
 201         cc = 1;
 202         asm volatile(
 203                 "0:     .insn   s,0xb2870000,0(%1)\n"
 204                 "1:     ipm     %0\n"
 205                 "       srl     %0,28\n"
 206                 "2:\n"
 207                 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
 208                 : "+d" (cc), "+a" (req)
 209                 : "m" (*req)
 210                 : "cc", "memory");
 211
 212         return cc ? -EINVAL : 0;
 213 }
 214
 215 /* Sampling control helper functions */
 216
 217 #include <linux/time.h>
 218
 219 static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi,
 220                                                 unsigned long freq)
 221 {
 222         return (USEC_PER_SEC / freq) * qsi->cpu_speed;
 223 }
 224
 225 static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi,
 226                                                 unsigned long rate)
 227 {
 228         return USEC_PER_SEC * qsi->cpu_speed / rate;
 229 }
 230
 231 #define SDB_TE_ALERT_REQ_MASK   0x4000000000000000UL
 232 #define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL
 233
 234 /* Return TOD timestamp contained in an trailer entry */
 235 static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te)
 236 {
 237         /* TOD in STCKE format */
 238         if (te->t)
 239                 return *((unsigned long long *) &te->timestamp[1]);
 240
 241         /* TOD in STCK format */
 242         return *((unsigned long long *) &te->timestamp[0]);
 243 }
 244
 245 /* Return pointer to trailer entry of an sample data block */
 246 static inline unsigned long *trailer_entry_ptr(unsigned long v)
 247 {
 248         void *ret;
 249
 250         ret = (void *) v;
 251         ret += PAGE_SIZE;
 252         ret -= sizeof(struct hws_trailer_entry);
 253
 254         return (unsigned long *) ret;
 255 }
 256
 257 /* Return if the entry in the sample data block table (sdbt)
 258  * is a link to the next sdbt */
 259 static inline int is_link_entry(unsigned long *s)
 260 {
 261         return *s & 0x1ul ? 1 : 0;
 262 }
 263
 264 /* Return pointer to the linked sdbt */
 265 static inline unsigned long *get_next_sdbt(unsigned long *s)
 266 {
 267         return (unsigned long *) (*s & ~0x1ul);
 268 }
 269 #endif /* _ASM_S390_CPU_MF_H */