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s390/kdump: add support for vector extension
[deliverable/linux.git] / arch / s390 / include / asm / lowcore.h
1 /*
2 * Copyright IBM Corp. 1999, 2012
3 * Author(s): Hartmut Penner <hp@de.ibm.com>,
4 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
5 * Denis Joseph Barrow,
6 */
7
8 #ifndef _ASM_S390_LOWCORE_H
9 #define _ASM_S390_LOWCORE_H
10
11 #include <linux/types.h>
12 #include <asm/ptrace.h>
13 #include <asm/cpu.h>
14 #include <asm/types.h>
15
16 #ifdef CONFIG_32BIT
17
18 #define LC_ORDER 0
19 #define LC_PAGES 1
20
21 struct save_area {
22 u32 ext_save;
23 u64 timer;
24 u64 clk_cmp;
25 u8 pad1[24];
26 u8 psw[8];
27 u32 pref_reg;
28 u8 pad2[20];
29 u32 acc_regs[16];
30 u64 fp_regs[4];
31 u32 gp_regs[16];
32 u32 ctrl_regs[16];
33 } __packed;
34
35 struct save_area_ext {
36 struct save_area sa;
37 __vector128 vx_regs[32];
38 };
39
40 struct _lowcore {
41 psw_t restart_psw; /* 0x0000 */
42 psw_t restart_old_psw; /* 0x0008 */
43 __u8 pad_0x0010[0x0014-0x0010]; /* 0x0010 */
44 __u32 ipl_parmblock_ptr; /* 0x0014 */
45 psw_t external_old_psw; /* 0x0018 */
46 psw_t svc_old_psw; /* 0x0020 */
47 psw_t program_old_psw; /* 0x0028 */
48 psw_t mcck_old_psw; /* 0x0030 */
49 psw_t io_old_psw; /* 0x0038 */
50 __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */
51 psw_t external_new_psw; /* 0x0058 */
52 psw_t svc_new_psw; /* 0x0060 */
53 psw_t program_new_psw; /* 0x0068 */
54 psw_t mcck_new_psw; /* 0x0070 */
55 psw_t io_new_psw; /* 0x0078 */
56 __u32 ext_params; /* 0x0080 */
57 __u16 ext_cpu_addr; /* 0x0084 */
58 __u16 ext_int_code; /* 0x0086 */
59 __u16 svc_ilc; /* 0x0088 */
60 __u16 svc_code; /* 0x008a */
61 __u16 pgm_ilc; /* 0x008c */
62 __u16 pgm_code; /* 0x008e */
63 __u32 trans_exc_code; /* 0x0090 */
64 __u16 mon_class_num; /* 0x0094 */
65 __u8 per_code; /* 0x0096 */
66 __u8 per_atmid; /* 0x0097 */
67 __u32 per_address; /* 0x0098 */
68 __u32 monitor_code; /* 0x009c */
69 __u8 exc_access_id; /* 0x00a0 */
70 __u8 per_access_id; /* 0x00a1 */
71 __u8 op_access_id; /* 0x00a2 */
72 __u8 ar_mode_id; /* 0x00a3 */
73 __u8 pad_0x00a4[0x00b8-0x00a4]; /* 0x00a4 */
74 __u16 subchannel_id; /* 0x00b8 */
75 __u16 subchannel_nr; /* 0x00ba */
76 __u32 io_int_parm; /* 0x00bc */
77 __u32 io_int_word; /* 0x00c0 */
78 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
79 __u32 stfl_fac_list; /* 0x00c8 */
80 __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */
81 __u32 extended_save_area_addr; /* 0x00d4 */
82 __u32 cpu_timer_save_area[2]; /* 0x00d8 */
83 __u32 clock_comp_save_area[2]; /* 0x00e0 */
84 __u32 mcck_interruption_code[2]; /* 0x00e8 */
85 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
86 __u32 external_damage_code; /* 0x00f4 */
87 __u32 failing_storage_address; /* 0x00f8 */
88 __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */
89 psw_t psw_save_area; /* 0x0100 */
90 __u32 prefixreg_save_area; /* 0x0108 */
91 __u8 pad_0x010c[0x0120-0x010c]; /* 0x010c */
92
93 /* CPU register save area: defined by architecture */
94 __u32 access_regs_save_area[16]; /* 0x0120 */
95 __u32 floating_pt_save_area[8]; /* 0x0160 */
96 __u32 gpregs_save_area[16]; /* 0x0180 */
97 __u32 cregs_save_area[16]; /* 0x01c0 */
98
99 /* Save areas. */
100 __u32 save_area_sync[8]; /* 0x0200 */
101 __u32 save_area_async[8]; /* 0x0220 */
102 __u32 save_area_restart[1]; /* 0x0240 */
103
104 /* CPU flags. */
105 __u32 cpu_flags; /* 0x0244 */
106
107 /* Return psws. */
108 psw_t return_psw; /* 0x0248 */
109 psw_t return_mcck_psw; /* 0x0250 */
110
111 /* CPU time accounting values */
112 __u64 sync_enter_timer; /* 0x0258 */
113 __u64 async_enter_timer; /* 0x0260 */
114 __u64 mcck_enter_timer; /* 0x0268 */
115 __u64 exit_timer; /* 0x0270 */
116 __u64 user_timer; /* 0x0278 */
117 __u64 system_timer; /* 0x0280 */
118 __u64 steal_timer; /* 0x0288 */
119 __u64 last_update_timer; /* 0x0290 */
120 __u64 last_update_clock; /* 0x0298 */
121 __u64 int_clock; /* 0x02a0 */
122 __u64 mcck_clock; /* 0x02a8 */
123 __u64 clock_comparator; /* 0x02b0 */
124
125 /* Current process. */
126 __u32 current_task; /* 0x02b8 */
127 __u32 thread_info; /* 0x02bc */
128 __u32 kernel_stack; /* 0x02c0 */
129
130 /* Interrupt, panic and restart stack. */
131 __u32 async_stack; /* 0x02c4 */
132 __u32 panic_stack; /* 0x02c8 */
133 __u32 restart_stack; /* 0x02cc */
134
135 /* Restart function and parameter. */
136 __u32 restart_fn; /* 0x02d0 */
137 __u32 restart_data; /* 0x02d4 */
138 __u32 restart_source; /* 0x02d8 */
139
140 /* Address space pointer. */
141 __u32 kernel_asce; /* 0x02dc */
142 __u32 user_asce; /* 0x02e0 */
143 __u32 current_pid; /* 0x02e4 */
144
145 /* SMP info area */
146 __u32 cpu_nr; /* 0x02e8 */
147 __u32 softirq_pending; /* 0x02ec */
148 __u32 percpu_offset; /* 0x02f0 */
149 __u32 machine_flags; /* 0x02f4 */
150 __u32 ftrace_func; /* 0x02f8 */
151 __u32 spinlock_lockval; /* 0x02fc */
152
153 __u8 pad_0x0300[0x0e00-0x0300]; /* 0x0300 */
154
155 /*
156 * 0xe00 contains the address of the IPL Parameter Information
157 * block. Dump tools need IPIB for IPL after dump.
158 * Note: do not change the position of any fields in 0x0e00-0x0f00
159 */
160 __u32 ipib; /* 0x0e00 */
161 __u32 ipib_checksum; /* 0x0e04 */
162 __u32 vmcore_info; /* 0x0e08 */
163 __u8 pad_0x0e0c[0x0e18-0x0e0c]; /* 0x0e0c */
164 __u32 os_info; /* 0x0e18 */
165 __u8 pad_0x0e1c[0x0f00-0x0e1c]; /* 0x0e1c */
166
167 /* Extended facility list */
168 __u64 stfle_fac_list[32]; /* 0x0f00 */
169 } __packed;
170
171 #else /* CONFIG_32BIT */
172
173 #define LC_ORDER 1
174 #define LC_PAGES 2
175
176 struct save_area {
177 u64 fp_regs[16];
178 u64 gp_regs[16];
179 u8 psw[16];
180 u8 pad1[8];
181 u32 pref_reg;
182 u32 fp_ctrl_reg;
183 u8 pad2[4];
184 u32 tod_reg;
185 u64 timer;
186 u64 clk_cmp;
187 u8 pad3[8];
188 u32 acc_regs[16];
189 u64 ctrl_regs[16];
190 } __packed;
191
192 struct save_area_ext {
193 struct save_area sa;
194 __vector128 vx_regs[32];
195 };
196
197 struct _lowcore {
198 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
199 __u32 ipl_parmblock_ptr; /* 0x0014 */
200 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
201 __u32 ext_params; /* 0x0080 */
202 __u16 ext_cpu_addr; /* 0x0084 */
203 __u16 ext_int_code; /* 0x0086 */
204 __u16 svc_ilc; /* 0x0088 */
205 __u16 svc_code; /* 0x008a */
206 __u16 pgm_ilc; /* 0x008c */
207 __u16 pgm_code; /* 0x008e */
208 __u32 data_exc_code; /* 0x0090 */
209 __u16 mon_class_num; /* 0x0094 */
210 __u8 per_code; /* 0x0096 */
211 __u8 per_atmid; /* 0x0097 */
212 __u64 per_address; /* 0x0098 */
213 __u8 exc_access_id; /* 0x00a0 */
214 __u8 per_access_id; /* 0x00a1 */
215 __u8 op_access_id; /* 0x00a2 */
216 __u8 ar_mode_id; /* 0x00a3 */
217 __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
218 __u64 trans_exc_code; /* 0x00a8 */
219 __u64 monitor_code; /* 0x00b0 */
220 __u16 subchannel_id; /* 0x00b8 */
221 __u16 subchannel_nr; /* 0x00ba */
222 __u32 io_int_parm; /* 0x00bc */
223 __u32 io_int_word; /* 0x00c0 */
224 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
225 __u32 stfl_fac_list; /* 0x00c8 */
226 __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
227 __u32 mcck_interruption_code[2]; /* 0x00e8 */
228 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
229 __u32 external_damage_code; /* 0x00f4 */
230 __u64 failing_storage_address; /* 0x00f8 */
231 __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
232 __u64 breaking_event_addr; /* 0x0110 */
233 __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
234 psw_t restart_old_psw; /* 0x0120 */
235 psw_t external_old_psw; /* 0x0130 */
236 psw_t svc_old_psw; /* 0x0140 */
237 psw_t program_old_psw; /* 0x0150 */
238 psw_t mcck_old_psw; /* 0x0160 */
239 psw_t io_old_psw; /* 0x0170 */
240 __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
241 psw_t restart_psw; /* 0x01a0 */
242 psw_t external_new_psw; /* 0x01b0 */
243 psw_t svc_new_psw; /* 0x01c0 */
244 psw_t program_new_psw; /* 0x01d0 */
245 psw_t mcck_new_psw; /* 0x01e0 */
246 psw_t io_new_psw; /* 0x01f0 */
247
248 /* Save areas. */
249 __u64 save_area_sync[8]; /* 0x0200 */
250 __u64 save_area_async[8]; /* 0x0240 */
251 __u64 save_area_restart[1]; /* 0x0280 */
252
253 /* CPU flags. */
254 __u64 cpu_flags; /* 0x0288 */
255
256 /* Return psws. */
257 psw_t return_psw; /* 0x0290 */
258 psw_t return_mcck_psw; /* 0x02a0 */
259
260 /* CPU accounting and timing values. */
261 __u64 sync_enter_timer; /* 0x02b0 */
262 __u64 async_enter_timer; /* 0x02b8 */
263 __u64 mcck_enter_timer; /* 0x02c0 */
264 __u64 exit_timer; /* 0x02c8 */
265 __u64 user_timer; /* 0x02d0 */
266 __u64 system_timer; /* 0x02d8 */
267 __u64 steal_timer; /* 0x02e0 */
268 __u64 last_update_timer; /* 0x02e8 */
269 __u64 last_update_clock; /* 0x02f0 */
270 __u64 int_clock; /* 0x02f8 */
271 __u64 mcck_clock; /* 0x0300 */
272 __u64 clock_comparator; /* 0x0308 */
273
274 /* Current process. */
275 __u64 current_task; /* 0x0310 */
276 __u64 thread_info; /* 0x0318 */
277 __u64 kernel_stack; /* 0x0320 */
278
279 /* Interrupt, panic and restart stack. */
280 __u64 async_stack; /* 0x0328 */
281 __u64 panic_stack; /* 0x0330 */
282 __u64 restart_stack; /* 0x0338 */
283
284 /* Restart function and parameter. */
285 __u64 restart_fn; /* 0x0340 */
286 __u64 restart_data; /* 0x0348 */
287 __u64 restart_source; /* 0x0350 */
288
289 /* Address space pointer. */
290 __u64 kernel_asce; /* 0x0358 */
291 __u64 user_asce; /* 0x0360 */
292 __u64 current_pid; /* 0x0368 */
293
294 /* SMP info area */
295 __u32 cpu_nr; /* 0x0370 */
296 __u32 softirq_pending; /* 0x0374 */
297 __u64 percpu_offset; /* 0x0378 */
298 __u64 vdso_per_cpu_data; /* 0x0380 */
299 __u64 machine_flags; /* 0x0388 */
300 __u64 ftrace_func; /* 0x0390 */
301 __u64 gmap; /* 0x0398 */
302 __u32 spinlock_lockval; /* 0x03a0 */
303 __u8 pad_0x03a0[0x0400-0x03a4]; /* 0x03a4 */
304
305 /* Per cpu primary space access list */
306 __u32 paste[16]; /* 0x0400 */
307
308 __u8 pad_0x04c0[0x0e00-0x0440]; /* 0x0440 */
309
310 /*
311 * 0xe00 contains the address of the IPL Parameter Information
312 * block. Dump tools need IPIB for IPL after dump.
313 * Note: do not change the position of any fields in 0x0e00-0x0f00
314 */
315 __u64 ipib; /* 0x0e00 */
316 __u32 ipib_checksum; /* 0x0e08 */
317 __u64 vmcore_info; /* 0x0e0c */
318 __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */
319 __u64 os_info; /* 0x0e18 */
320 __u8 pad_0x0e20[0x0f00-0x0e20]; /* 0x0e20 */
321
322 /* Extended facility list */
323 __u64 stfle_fac_list[32]; /* 0x0f00 */
324 __u8 pad_0x1000[0x11b0-0x1000]; /* 0x1000 */
325
326 /* Pointer to vector register save area */
327 __u64 vector_save_area_addr; /* 0x11b0 */
328
329 /* 64 bit extparam used for pfault/diag 250: defined by architecture */
330 __u64 ext_params2; /* 0x11B8 */
331 __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
332
333 /* CPU register save area: defined by architecture */
334 __u64 floating_pt_save_area[16]; /* 0x1200 */
335 __u64 gpregs_save_area[16]; /* 0x1280 */
336 psw_t psw_save_area; /* 0x1300 */
337 __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
338 __u32 prefixreg_save_area; /* 0x1318 */
339 __u32 fpt_creg_save_area; /* 0x131c */
340 __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
341 __u32 tod_progreg_save_area; /* 0x1324 */
342 __u32 cpu_timer_save_area[2]; /* 0x1328 */
343 __u32 clock_comp_save_area[2]; /* 0x1330 */
344 __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */
345 __u32 access_regs_save_area[16]; /* 0x1340 */
346 __u64 cregs_save_area[16]; /* 0x1380 */
347 __u8 pad_0x1400[0x1800-0x1400]; /* 0x1400 */
348
349 /* Transaction abort diagnostic block */
350 __u8 pgm_tdb[256]; /* 0x1800 */
351 __u8 pad_0x1900[0x1c00-0x1900]; /* 0x1900 */
352
353 /* Software defined save area for vector registers */
354 __u8 vector_save_area[1024]; /* 0x1c00 */
355 } __packed;
356
357 #endif /* CONFIG_32BIT */
358
359 #define S390_lowcore (*((struct _lowcore *) 0))
360
361 extern struct _lowcore *lowcore_ptr[];
362
363 static inline void set_prefix(__u32 address)
364 {
365 asm volatile("spx %0" : : "m" (address) : "memory");
366 }
367
368 static inline __u32 store_prefix(void)
369 {
370 __u32 address;
371
372 asm volatile("stpx %0" : "=m" (address));
373 return address;
374 }
375
376 #endif /* _ASM_S390_LOWCORE_H */
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