arch/s390/include/asm/pci_insn.h

   1 #ifndef _ASM_S390_PCI_INSN_H
   2 #define _ASM_S390_PCI_INSN_H
   3
   4 /* Load/Store status codes */
   5 #define ZPCI_PCI_ST_FUNC_NOT_ENABLED            4
   6 #define ZPCI_PCI_ST_FUNC_IN_ERR                 8
   7 #define ZPCI_PCI_ST_BLOCKED                     12
   8 #define ZPCI_PCI_ST_INSUF_RES                   16
   9 #define ZPCI_PCI_ST_INVAL_AS                    20
  10 #define ZPCI_PCI_ST_FUNC_ALREADY_ENABLED        24
  11 #define ZPCI_PCI_ST_DMA_AS_NOT_ENABLED          28
  12 #define ZPCI_PCI_ST_2ND_OP_IN_INV_AS            36
  13 #define ZPCI_PCI_ST_FUNC_NOT_AVAIL              40
  14 #define ZPCI_PCI_ST_ALREADY_IN_RQ_STATE         44
  15
  16 /* Load/Store return codes */
  17 #define ZPCI_PCI_LS_OK                          0
  18 #define ZPCI_PCI_LS_ERR                         1
  19 #define ZPCI_PCI_LS_BUSY                        2
  20 #define ZPCI_PCI_LS_INVAL_HANDLE                3
  21
  22 /* Load/Store address space identifiers */
  23 #define ZPCI_PCIAS_MEMIO_0                      0
  24 #define ZPCI_PCIAS_MEMIO_1                      1
  25 #define ZPCI_PCIAS_MEMIO_2                      2
  26 #define ZPCI_PCIAS_MEMIO_3                      3
  27 #define ZPCI_PCIAS_MEMIO_4                      4
  28 #define ZPCI_PCIAS_MEMIO_5                      5
  29 #define ZPCI_PCIAS_CFGSPC                       15
  30
  31 /* Modify PCI Function Controls */
  32 #define ZPCI_MOD_FC_REG_INT     2
  33 #define ZPCI_MOD_FC_DEREG_INT   3
  34 #define ZPCI_MOD_FC_REG_IOAT    4
  35 #define ZPCI_MOD_FC_DEREG_IOAT  5
  36 #define ZPCI_MOD_FC_REREG_IOAT  6
  37 #define ZPCI_MOD_FC_RESET_ERROR 7
  38 #define ZPCI_MOD_FC_RESET_BLOCK 9
  39 #define ZPCI_MOD_FC_SET_MEASURE 10
  40
  41 /* FIB function controls */
  42 #define ZPCI_FIB_FC_ENABLED     0x80
  43 #define ZPCI_FIB_FC_ERROR       0x40
  44 #define ZPCI_FIB_FC_LS_BLOCKED  0x20
  45 #define ZPCI_FIB_FC_DMAAS_REG   0x10
  46
  47 /* FIB function controls */
  48 #define ZPCI_FIB_FC_ENABLED     0x80
  49 #define ZPCI_FIB_FC_ERROR       0x40
  50 #define ZPCI_FIB_FC_LS_BLOCKED  0x20
  51 #define ZPCI_FIB_FC_DMAAS_REG   0x10
  52
  53 /* Function Information Block */
  54 struct zpci_fib {
  55         u32 fmt         :  8;   /* format */
  56         u32             : 24;
  57         u32 reserved1;
  58         u8 fc;                  /* function controls */
  59         u8 reserved2;
  60         u16 reserved3;
  61         u32 reserved4;
  62         u64 pba;                /* PCI base address */
  63         u64 pal;                /* PCI address limit */
  64         u64 iota;               /* I/O Translation Anchor */
  65         u32             :  1;
  66         u32 isc         :  3;   /* Interrupt subclass */
  67         u32 noi         : 12;   /* Number of interrupts */
  68         u32             :  2;
  69         u32 aibvo       :  6;   /* Adapter interrupt bit vector offset */
  70         u32 sum         :  1;   /* Adapter int summary bit enabled */
  71         u32             :  1;
  72         u32 aisbo       :  6;   /* Adapter int summary bit offset */
  73         u32 reserved5;
  74         u64 aibv;               /* Adapter int bit vector address */
  75         u64 aisb;               /* Adapter int summary bit address */
  76         u64 fmb_addr;           /* Function measurement block address and key */
  77         u64 reserved6;
  78         u64 reserved7;
  79 } __packed;
  80
  81
  82 int s390pci_mod_fc(u64 req, struct zpci_fib *fib);
  83 int s390pci_refresh_trans(u64 fn, u64 addr, u64 range);
  84 int s390pci_load(u64 *data, u64 req, u64 offset);
  85 int s390pci_store(u64 data, u64 req, u64 offset);
  86 int s390pci_store_block(const u64 *data, u64 req, u64 offset);
  87 void set_irq_ctrl(u16 ctl, char *unused, u8 isc);
  88
  89 #endif