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s390: add support for runtime instrumentation
[deliverable/linux.git] / arch / s390 / include / asm / processor.h
1 /*
2 * S390 version
3 * Copyright IBM Corp. 1999
4 * Author(s): Hartmut Penner (hp@de.ibm.com),
5 * Martin Schwidefsky (schwidefsky@de.ibm.com)
6 *
7 * Derived from "include/asm-i386/processor.h"
8 * Copyright (C) 1994, Linus Torvalds
9 */
10
11 #ifndef __ASM_S390_PROCESSOR_H
12 #define __ASM_S390_PROCESSOR_H
13
14 #include <linux/linkage.h>
15 #include <linux/irqflags.h>
16 #include <asm/cpu.h>
17 #include <asm/page.h>
18 #include <asm/ptrace.h>
19 #include <asm/setup.h>
20 #include <asm/runtime_instr.h>
21
22 /*
23 * Default implementation of macro that returns current
24 * instruction pointer ("program counter").
25 */
26 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
27
28 static inline void get_cpu_id(struct cpuid *ptr)
29 {
30 asm volatile("stidp %0" : "=Q" (*ptr));
31 }
32
33 extern void s390_adjust_jiffies(void);
34 extern const struct seq_operations cpuinfo_op;
35 extern int sysctl_ieee_emulation_warnings;
36
37 /*
38 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
39 */
40 #ifndef CONFIG_64BIT
41
42 #define TASK_SIZE (1UL << 31)
43 #define TASK_UNMAPPED_BASE (1UL << 30)
44
45 #else /* CONFIG_64BIT */
46
47 #define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
48 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
49 (1UL << 30) : (1UL << 41))
50 #define TASK_SIZE TASK_SIZE_OF(current)
51
52 #endif /* CONFIG_64BIT */
53
54 #ifndef CONFIG_64BIT
55 #define STACK_TOP (1UL << 31)
56 #define STACK_TOP_MAX (1UL << 31)
57 #else /* CONFIG_64BIT */
58 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
59 #define STACK_TOP_MAX (1UL << 42)
60 #endif /* CONFIG_64BIT */
61
62 #define HAVE_ARCH_PICK_MMAP_LAYOUT
63
64 typedef struct {
65 __u32 ar4;
66 } mm_segment_t;
67
68 /*
69 * Thread structure
70 */
71 struct thread_struct {
72 s390_fp_regs fp_regs;
73 unsigned int acrs[NUM_ACRS];
74 unsigned long ksp; /* kernel stack pointer */
75 mm_segment_t mm_segment;
76 unsigned long gmap_addr; /* address of last gmap fault. */
77 struct per_regs per_user; /* User specified PER registers */
78 struct per_event per_event; /* Cause of the last PER trap */
79 /* pfault_wait is used to block the process on a pfault event */
80 unsigned long pfault_wait;
81 struct list_head list;
82 /* cpu runtime instrumentation */
83 struct runtime_instr_cb *ri_cb;
84 int ri_signum;
85 };
86
87 typedef struct thread_struct thread_struct;
88
89 /*
90 * Stack layout of a C stack frame.
91 */
92 #ifndef __PACK_STACK
93 struct stack_frame {
94 unsigned long back_chain;
95 unsigned long empty1[5];
96 unsigned long gprs[10];
97 unsigned int empty2[8];
98 };
99 #else
100 struct stack_frame {
101 unsigned long empty1[5];
102 unsigned int empty2[8];
103 unsigned long gprs[10];
104 unsigned long back_chain;
105 };
106 #endif
107
108 #define ARCH_MIN_TASKALIGN 8
109
110 #define INIT_THREAD { \
111 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
112 }
113
114 /*
115 * Do necessary setup to start up a new thread.
116 */
117 #define start_thread(regs, new_psw, new_stackp) do { \
118 regs->psw.mask = psw_user_bits | PSW_MASK_EA | PSW_MASK_BA; \
119 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
120 regs->gprs[15] = new_stackp; \
121 } while (0)
122
123 #define start_thread31(regs, new_psw, new_stackp) do { \
124 regs->psw.mask = psw_user_bits | PSW_MASK_BA; \
125 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
126 regs->gprs[15] = new_stackp; \
127 __tlb_flush_mm(current->mm); \
128 crst_table_downgrade(current->mm, 1UL << 31); \
129 update_mm(current->mm, current); \
130 } while (0)
131
132 /* Forward declaration, a strange C thing */
133 struct task_struct;
134 struct mm_struct;
135 struct seq_file;
136
137 /* Free all resources held by a thread. */
138 extern void release_thread(struct task_struct *);
139 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
140
141 /*
142 * Return saved PC of a blocked thread.
143 */
144 extern unsigned long thread_saved_pc(struct task_struct *t);
145
146 extern void show_code(struct pt_regs *regs);
147 extern void print_fn_code(unsigned char *code, unsigned long len);
148
149 unsigned long get_wchan(struct task_struct *p);
150 #define task_pt_regs(tsk) ((struct pt_regs *) \
151 (task_stack_page(tsk) + THREAD_SIZE) - 1)
152 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
153 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
154
155 static inline unsigned short stap(void)
156 {
157 unsigned short cpu_address;
158
159 asm volatile("stap %0" : "=m" (cpu_address));
160 return cpu_address;
161 }
162
163 /*
164 * Give up the time slice of the virtual PU.
165 */
166 static inline void cpu_relax(void)
167 {
168 if (MACHINE_HAS_DIAG44)
169 asm volatile("diag 0,0,68");
170 barrier();
171 }
172
173 static inline void psw_set_key(unsigned int key)
174 {
175 asm volatile("spka 0(%0)" : : "d" (key));
176 }
177
178 /*
179 * Set PSW to specified value.
180 */
181 static inline void __load_psw(psw_t psw)
182 {
183 #ifndef CONFIG_64BIT
184 asm volatile("lpsw %0" : : "Q" (psw) : "cc");
185 #else
186 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
187 #endif
188 }
189
190 /*
191 * Set PSW mask to specified value, while leaving the
192 * PSW addr pointing to the next instruction.
193 */
194 static inline void __load_psw_mask (unsigned long mask)
195 {
196 unsigned long addr;
197 psw_t psw;
198
199 psw.mask = mask;
200
201 #ifndef CONFIG_64BIT
202 asm volatile(
203 " basr %0,0\n"
204 "0: ahi %0,1f-0b\n"
205 " st %0,%O1+4(%R1)\n"
206 " lpsw %1\n"
207 "1:"
208 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
209 #else /* CONFIG_64BIT */
210 asm volatile(
211 " larl %0,1f\n"
212 " stg %0,%O1+8(%R1)\n"
213 " lpswe %1\n"
214 "1:"
215 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
216 #endif /* CONFIG_64BIT */
217 }
218
219 /*
220 * Rewind PSW instruction address by specified number of bytes.
221 */
222 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
223 {
224 #ifndef CONFIG_64BIT
225 if (psw.addr & PSW_ADDR_AMODE)
226 /* 31 bit mode */
227 return (psw.addr - ilc) | PSW_ADDR_AMODE;
228 /* 24 bit mode */
229 return (psw.addr - ilc) & ((1UL << 24) - 1);
230 #else
231 unsigned long mask;
232
233 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
234 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
235 (1UL << 24) - 1;
236 return (psw.addr - ilc) & mask;
237 #endif
238 }
239
240 /*
241 * Function to drop a processor into disabled wait state
242 */
243 static inline void __noreturn disabled_wait(unsigned long code)
244 {
245 unsigned long ctl_buf;
246 psw_t dw_psw;
247
248 dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
249 dw_psw.addr = code;
250 /*
251 * Store status and then load disabled wait psw,
252 * the processor is dead afterwards
253 */
254 #ifndef CONFIG_64BIT
255 asm volatile(
256 " stctl 0,0,0(%2)\n"
257 " ni 0(%2),0xef\n" /* switch off protection */
258 " lctl 0,0,0(%2)\n"
259 " stpt 0xd8\n" /* store timer */
260 " stckc 0xe0\n" /* store clock comparator */
261 " stpx 0x108\n" /* store prefix register */
262 " stam 0,15,0x120\n" /* store access registers */
263 " std 0,0x160\n" /* store f0 */
264 " std 2,0x168\n" /* store f2 */
265 " std 4,0x170\n" /* store f4 */
266 " std 6,0x178\n" /* store f6 */
267 " stm 0,15,0x180\n" /* store general registers */
268 " stctl 0,15,0x1c0\n" /* store control registers */
269 " oi 0x1c0,0x10\n" /* fake protection bit */
270 " lpsw 0(%1)"
271 : "=m" (ctl_buf)
272 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
273 #else /* CONFIG_64BIT */
274 asm volatile(
275 " stctg 0,0,0(%2)\n"
276 " ni 4(%2),0xef\n" /* switch off protection */
277 " lctlg 0,0,0(%2)\n"
278 " lghi 1,0x1000\n"
279 " stpt 0x328(1)\n" /* store timer */
280 " stckc 0x330(1)\n" /* store clock comparator */
281 " stpx 0x318(1)\n" /* store prefix register */
282 " stam 0,15,0x340(1)\n"/* store access registers */
283 " stfpc 0x31c(1)\n" /* store fpu control */
284 " std 0,0x200(1)\n" /* store f0 */
285 " std 1,0x208(1)\n" /* store f1 */
286 " std 2,0x210(1)\n" /* store f2 */
287 " std 3,0x218(1)\n" /* store f3 */
288 " std 4,0x220(1)\n" /* store f4 */
289 " std 5,0x228(1)\n" /* store f5 */
290 " std 6,0x230(1)\n" /* store f6 */
291 " std 7,0x238(1)\n" /* store f7 */
292 " std 8,0x240(1)\n" /* store f8 */
293 " std 9,0x248(1)\n" /* store f9 */
294 " std 10,0x250(1)\n" /* store f10 */
295 " std 11,0x258(1)\n" /* store f11 */
296 " std 12,0x260(1)\n" /* store f12 */
297 " std 13,0x268(1)\n" /* store f13 */
298 " std 14,0x270(1)\n" /* store f14 */
299 " std 15,0x278(1)\n" /* store f15 */
300 " stmg 0,15,0x280(1)\n"/* store general registers */
301 " stctg 0,15,0x380(1)\n"/* store control registers */
302 " oi 0x384(1),0x10\n"/* fake protection bit */
303 " lpswe 0(%1)"
304 : "=m" (ctl_buf)
305 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
306 #endif /* CONFIG_64BIT */
307 while (1);
308 }
309
310 /*
311 * Use to set psw mask except for the first byte which
312 * won't be changed by this function.
313 */
314 static inline void
315 __set_psw_mask(unsigned long mask)
316 {
317 __load_psw_mask(mask | (arch_local_save_flags() & ~(-1UL >> 8)));
318 }
319
320 #define local_mcck_enable() \
321 __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT | PSW_MASK_MCHECK)
322 #define local_mcck_disable() \
323 __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT)
324
325 /*
326 * Basic Machine Check/Program Check Handler.
327 */
328
329 extern void s390_base_mcck_handler(void);
330 extern void s390_base_pgm_handler(void);
331 extern void s390_base_ext_handler(void);
332
333 extern void (*s390_base_mcck_handler_fn)(void);
334 extern void (*s390_base_pgm_handler_fn)(void);
335 extern void (*s390_base_ext_handler_fn)(void);
336
337 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
338
339 /*
340 * Helper macro for exception table entries
341 */
342 #ifndef CONFIG_64BIT
343 #define EX_TABLE(_fault,_target) \
344 ".section __ex_table,\"a\"\n" \
345 " .align 4\n" \
346 " .long " #_fault "," #_target "\n" \
347 ".previous\n"
348 #else
349 #define EX_TABLE(_fault,_target) \
350 ".section __ex_table,\"a\"\n" \
351 " .align 8\n" \
352 " .quad " #_fault "," #_target "\n" \
353 ".previous\n"
354 #endif
355
356 extern int memcpy_real(void *, void *, size_t);
357 extern void memcpy_absolute(void *, void *, size_t);
358
359 #define mem_assign_absolute(dest, val) { \
360 __typeof__(dest) __tmp = (val); \
361 \
362 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
363 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
364 }
365
366 #endif /* __ASM_S390_PROCESSOR_H */
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