arch/s390/include/asm/smp.h

   1 /*
   2  *  include/asm-s390/smp.h
   3  *
   4  *  S390 version
   5  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
   7  *               Martin Schwidefsky (schwidefsky@de.ibm.com)
   8  *               Heiko Carstens (heiko.carstens@de.ibm.com)
   9  */
  10 #ifndef __ASM_SMP_H
  11 #define __ASM_SMP_H
  12
  13 #include <linux/threads.h>
  14 #include <linux/cpumask.h>
  15 #include <linux/bitops.h>
  16
  17 #if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__)
  18
  19 #include <asm/lowcore.h>
  20 #include <asm/sigp.h>
  21 #include <asm/ptrace.h>
  22 #include <asm/system.h>
  23
  24 /*
  25   s390 specific smp.c headers
  26  */
  27 typedef struct
  28 {
  29         int        intresting;
  30         sigp_ccode ccode;
  31         __u32      status;
  32         __u16      cpu;
  33 } sigp_info;
  34
  35 extern void machine_restart_smp(char *);
  36 extern void machine_halt_smp(void);
  37 extern void machine_power_off_smp(void);
  38
  39 #define NO_PROC_ID              0xFF            /* No processor magic marker */
  40
  41 /*
  42  *      This magic constant controls our willingness to transfer
  43  *      a process across CPUs. Such a transfer incurs misses on the L1
  44  *      cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
  45  *      gut feeling is this will vary by board in value. For a board
  46  *      with separate L2 cache it probably depends also on the RSS, and
  47  *      for a board with shared L2 cache it ought to decay fast as other
  48  *      processes are run.
  49  */
  50
  51 #define PROC_CHANGE_PENALTY     20              /* Schedule penalty */
  52
  53 #define raw_smp_processor_id()  (S390_lowcore.cpu_nr)
  54
  55 /*
  56  * returns 1 if cpu is in stopped/check stopped state or not operational
  57  * returns 0 otherwise
  58  */
  59 static inline int
  60 smp_cpu_not_running(int cpu)
  61 {
  62         __u32 status;
  63
  64         switch (signal_processor_ps(&status, 0, cpu, sigp_sense)) {
  65         case sigp_order_code_accepted:
  66         case sigp_status_stored:
  67                 /* Check for stopped and check stop state */
  68                 if (status & 0x50)
  69                         return 1;
  70                 break;
  71         case sigp_not_operational:
  72                 return 1;
  73         default:
  74                 break;
  75         }
  76         return 0;
  77 }
  78
  79 #define cpu_logical_map(cpu) (cpu)
  80
  81 extern int __cpu_disable (void);
  82 extern void __cpu_die (unsigned int cpu);
  83 extern void cpu_die (void) __attribute__ ((noreturn));
  84 extern int __cpu_up (unsigned int cpu);
  85
  86 extern struct mutex smp_cpu_state_mutex;
  87 extern int smp_cpu_polarization[];
  88
  89 extern void arch_send_call_function_single_ipi(int cpu);
  90 extern void arch_send_call_function_ipi(cpumask_t mask);
  91
  92 #endif
  93
  94 #ifndef CONFIG_SMP
  95 static inline void smp_send_stop(void)
  96 {
  97         /* Disable all interrupts/machine checks */
  98         __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
  99 }
 100
 101 #define hard_smp_processor_id()         0
 102 #define smp_cpu_not_running(cpu)        1
 103 #endif
 104
 105 #ifdef CONFIG_HOTPLUG_CPU
 106 extern int smp_rescan_cpus(void);
 107 #else
 108 static inline int smp_rescan_cpus(void) { return 0; }
 109 #endif
 110
 111 extern union save_area *zfcpdump_save_areas[NR_CPUS + 1];
 112 #endif